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EVAL-AD7124-4SDZ

EVAL-AD7124-4SDZ

  • 厂商:

    AD(亚德诺)

  • 封装:

    -

  • 描述:

    EVAL BOARD FOR AD7124

  • 数据手册
  • 价格&库存
EVAL-AD7124-4SDZ 数据手册
EVAL-AD7124-4SDZ User Guide UG-855 One Technology Way • P.O. Box 9106 • Norwood, MA 02062-9106, U.S.A. • Tel: 781.329.4700 • Fax: 781.461.3113 • www.analog.com Evaluation Board for the AD7124-4 4-Channel, Low Noise, Low Power, 24-Bit, Sigma-Delta ADC with In-Amp and Reference FEATURES GENERAL DESCRIPTION Full featured evaluation board for the AD7124-4 PC control in conjunction with the Analog Devices, Inc., System Demonstration Platform (EVAL-SDP-CB1Z) PC software for control and data analysis (time domain) Standalone capability The EVAL-AD7124-4SDZ evaluation kit features the AD7124-4 24-bit, low power, low noise analog-to-digital converter (ADC). EVALUATION KIT CONTENTS EVAL-AD7124-4SDZ evaluation board Evaluation software CD for the AD7124-4 ONLINE RESOURCES Documents Needed AD7124-4 data sheet EVAL-AD7124-4SDZ user guide Required Software AD7124-4 EVAL+ Software EQUIPMENT NEEDED EVAL-AD7124-4SDZ evaluation board EVAL-SDP-CB1Z System Demonstration Platform DC signal source USB cable PC running Windows with USB 2.0 port PLEASE SEE THE LAST PAGE FOR AN IMPORTANT WARNING AND LEGAL TERMS AND CONDITIONS. A 7 V to 9 V external supply is regulated to 3.3 V to supply the AD7124-4 and to support all necessary components. The EVAL-AD7124-4SDZ board connects to the USB port of the PC via the connection to the EVAL-SDP-CB1Z motherboard. The AD7124-4 EVAL+ Software fully configures the AD7124-4 device register functionality and provides dc time domain analysis in the form of waveform graphs, histograms, and associated noise analysis for ADC performance evaluation. The EVAL-AD7124-4SDZ is an evaluation board that allows the user to evaluate the features of the ADC. The user PC software executable controls the AD7124-4 over the USB through the EVAL-SDP-CB1Z System Demonstration Platform (SDP) board. Full specifications on the AD7124-4 are available in the product data sheet, which should be consulted in conjunction with this user guide when working with the evaluation board. Rev. 0 | Page 1 of 29 UG-855 EVAL-AD7124-4SDZ User Guide TABLE OF CONTENTS Features .............................................................................................. 1 Analog Inputs.................................................................................7 Evaluation Kit Contents ................................................................... 1 Reference Options .........................................................................8 Online Resources .............................................................................. 1 Evaluation Board Setup Procedures ...........................................8 Equipment Needed ........................................................................... 1 Evaluation Board Software ...............................................................9 General Description ......................................................................... 1 Software Installation Procedures.................................................9 Revision History ............................................................................... 2 Software Operation .................................................................... 12 EVAL-AD7124-4SDZ Block Diagram ........................................... 3 Configuration Tab ...................................................................... 12 EVAL-AD7124-4SDZ Quick Start Guide ...................................... 4 Wavefrom Tab ............................................................................. 14 Evaluation Board Hardware ............................................................ 5 Histogram Tab ............................................................................ 16 Device Description ....................................................................... 5 Register Map Tab ........................................................................ 17 Hardware Link Options ............................................................... 5 Noise Test—Quick Start Demonstration ................................ 18 Power Supplies .............................................................................. 7 Evaluation Board Schematics and Artwork ................................ 20 Serial Interface .............................................................................. 7 Bill of Materials ............................................................................... 27 REVISION HISTORY 7/15—Revision 0: Initial Version Rev. 0 | Page 2 of 29 EVAL-AD7124-4SDZ User Guide UG-855 EVAL-AD7124-4SDZ BLOCK DIAGRAM 7V TO 9V VIN AVDD 1.9V LDO NC OUT GND NC EN GND GND 2.5V OUTPUT IN 57.6kΩ NC NC REFOUT BANDGAP REF 1.8V OUTPUT GND OUT GND EN GND REFIN2(+) REFIN2(–) AVSS AVDD GND IN REFIN1(–) IOVDD REFIN1(+) AVDD AVSS CROSSPOINT MUX AIN0/IOUT/VBIAS ADJ VOUT REGCAPA VBIAS ADP1720ARMZ-R7 27kΩ TP ADR4525 REGCAPD 1.8V LDO REFERENCE BUFFERS AIN1/IOUT/VBIAS SDP-B DOUT/RDY AIN2/IOUT/VBIAS/P1 BUF AIN3/IOUT/VBIAS/P2 BURNOUT DETECT AIN4/IOUT/VBIAS PGA1 PGA2 24-BIT Σ-Δ ADC BUF AIN5/IOUT/VBIAS VARIABLE DIGITAL FILTER SERIAL INTERFACE AND CONTROL LOGIC X-MUX AIN6/IOUT/VBIAS/REFIN2(+) AIN7/IOUT/VBIAS/REFIN2(–) ANALOG BUFFERS AVSS TEMPERATURE SENSOR AVDD POWER SWITCH CS ADSP-BF527 POWER LED USB STATUS DIAGNOSTICS COMMUNICATIONS POWER SUPPLY SIGNAL CHAIN DIGITAL DIAGNOSTICS PSW SCLK SYNC CHANNEL SEQUENCER GPOs DIN LED ON-BOARD NOISE TEST AIN0 TO AIN1 GND ADP1720 GND 3.3V OUTPUT IN GND EXCITATION CURRENTS INTERNAL CLOCK CLK AD7124-4 AVSS DGND 13304-001 AVSS NOTES 1. FOR SIMPLICITY, DECOUPLING NOT SHOWN. Figure 1. Rev. 0 | Page 3 of 29 UG-855 EVAL-AD7124-4SDZ User Guide EVAL-AD7124-4SDZ QUICK START GUIDE To begin using the evaluation board, do the following: 2. 3. With the EVAL-SDP-CB1Z board disconnected from the USB port of the PC, install the AD7124-4 EVAL+ Software (the software is included on the CD in the evaluation kit, or it can be downloaded from the Analog Devices website). The PC must be restarted after the software installation is complete. (For complete software installation instructions, see the Software Installation Procedures section.) Connect the EVAL-SDP-CB1Z board to the EVALAD7124-4SDZ board. Screw the two boards together using the plastic screw and washer set included in the evaluation board kit to ensure that the boards are connected firmly together. 5. 6. Apply an external voltage in the range of 7 V to 9 V to the J3 or J5 connecter of the EVAL-AD7124-4SDZ board. This provides the power supply for the board. Connect the EVAL-SDP-CB1Z board to the PC using the supplied USB cable. If you are using Windows® XP, you may need to search for the EVAL-SDP-CB1Z drivers. Choose to automatically search for the drivers for the EVAL-SDP-CB1Z board if prompted by the operating system. From the Programs menu, go to the Analog Devices subfolder, and click AD7124 Eval+ to launch the AD7124-4 EVAL+ Software (see the Launching the Software section for further details). 13304-002 1. 4. Figure 2. Hardware Configuration, Setting Up the EVAL-AD7124-4SDZ Evaluation Board Rev. 0 | Page 4 of 29 EVAL-AD7124-4SDZ User Guide UG-855 EVALUATION BOARD HARDWARE DEVICE DESCRIPTION The AD7124-4 is a low power, low noise, complete analog front end for high precision measurement applications. It contains a low noise, 24-bit, Σ-Δ ADC. It can be configured to have four differential inputs or seven single-ended or pseudo differential inputs. The on-chip low noise instrumentation amplifier means that signals of small amplitude can be interfaced directly to the ADC. Other on-chip features include a low drift 2.5 V reference, excitation currents, reference buffers, multiple filter options, and many diagnostic features. Complete specifications for the AD7124-4 are provided in the product data sheet, which should be consulted in conjunction with this user guide when using the evaluation board. Full details about the EVAL-SDP-CB1Z are available on the Analog Devices website. HARDWARE LINK OPTIONS Table 1 lists the default link options. By default, the board is configured to operate from a wall wart (dc plug) power supply via Connector J5. The supply required for the AD7124-4 comes from the on-board ADP1720 low dropout regulators (LDOs), which generate their voltage from J5. Table 1. Default Link and Solder Link Options Link No. LK1 Default Option A LK2 B LK3 LK4 Inserted 2.5 V LK5 Inserted LK6 Inserted SL2 A SL3, SL7 A, A SL5 B AVSS to AGND Description Connects the AVDD voltage to the power supply sequencer, ADM1185. When AVDD equals 3.3 V, LK1 must be in Position A. When AVDD equals 1.8 V, LK1 must be in Position B. Selects the connector for the external 7 V to 9 V power supply. In Position A, this link selects the external 7 V to 9 V power supply to come from Connector J3. In Position B, this link selects the external 7 V to 9 V power supply to come from Connector J5. Inserting this link connects REFIN(−) to AVSS. Selects the reference source for the ADC. In Position 2.5 V, REFIN1(+) is connected to the external 2.5 V reference (ADR4525). In Position INT REF, REFIN1(+) is connected to the REFOUT pin of the AD7124-4. The internal reference of the AD7124-4 can be enabled and applied to the AD7124-4 external to the ADC. This link shorts AIN0 to AIN1. This is useful for performing noise tests on the AD7124-4. The internal bias can be enabled on AIN0 or AIN1 so that AIN0 and AIN1 are at an appropriate voltage for the noise test. LK6 can be used to connect the AIN4 and AIN5 channels to external components such as an external amplifier. The jumpers in Position A and Position B at LK6 must be opened to include the external component on the front end. Jumper A and Jumper B of this link can be used to connect the AIN4 and AIN5 channels to external components such as an external amplifier. For this, the jumpers must be open. Having Jumper A and Jumper B in place connects AIN4 and AIN5 to on-board thermistor used for cold junction measurements. Sets the voltage applied to the AVDD pin. In Position A, this link sets the voltage applied to the AVDD pin to be a 3.3 V supply from the ADP1720-3.3 (U7) regulator or a 2.5 V supply from the ADP1720 (U4) regulator. In Position B, this link sets the voltage applied to the AVDD pin to be supplied from an external voltage source via Connector J9. With SL3 and SL7 in Position A, AVDD is supplied with 3.3 V from the ADP1720-3.3 (U7) regulator. With SL3 and SL7 in Position B, AVDD is supplied with 1.8 V from the ADP1720 (U4) regulator. With this link in Position A, the IOVDD supply is provided from an external source via Connector J9. With this link in Position B, the 3.3 V supply is generated by the ADP1720-3.3 (U10) regulator. The evaluation system operates with 3.3 V logic. When these links are inserted, AVSS is tied to AGND. When AVSS is set to −1.8 V, these links must be removed. Rev. 0 | Page 5 of 29 UG-855 EVAL-AD7124-4SDZ User Guide On-Board Connectors Table 2 provides information about the external connectors on the EVAL-AD7124-4SDZ. Table 2. On-Board Connectors Connector J1 J2 J3 J5 J6 J9 J11 J12 J13 J14 A0 A1 A2 A5 A6 Function A 120-pin connector that mates with the EVAL-SDP-CB1Z (controller board). Straight PCB mount SMB/SMA jack for master clock (not inserted). The EVAL-AD7124-4SDZ has the footprint to include an SMA/SMB connector, if an external clock source is being used to provide the master clock to the ADC. Bench top power supply voltage input. Apply 7 V to 9 V and GND (0 V) to this connector to power the evaluation board. Wall wart (dc plug) power supply voltage input. Apply 7 V to 9 V and GND (0 V) to this connector to power the evaluation board. Analog input connector. Connections to AIN0 to AIN5 are available along with REFIN1(±) connections. This connector can be used to connect an RTD to the AD7124-4. Optional external connector, allowing external bench top or alternative supply for AVDD and IOVDD. When split supplies are used, AVSS is supplied externally via J9. Analog input connector. Connections to AIN6 to AIN7 are available along with REFIN1(±) and analog power supply connections. This connector can be used to connect a load cell to the AD7124-4. 6-pin connector. Provides an I2C interface to allow the SDP to interface to a digital temperature sensor. This is required if a thermocouple is interfaced to the AD7124-4 using Connector A2. 7-pin connector that can be used to connect an external amplifier to Channel AIN4/Channel AIN5. 7-pin connector that allows connection to the AIN4 and AIN5 pins. Straight PCB mount SMB/SMA jack. The footprint for an SMA/SMB connector is included on the evaluation board to provide the signal to the AIN4 analog input. Straight PCB mount SMB/SMA jack. The footprint for an SMA/SMB connector is included on the evaluation board to provide the signal to the AIN5 analog input. Thermocouple connector. This connector is required if a thermocouple is being interfaced to the evaluation board. Straight PCB mount SMB/SMA jack. The footprint for an SMA/SMB connector is included on the evaluation board to provide the REFIN1(+) signal. Straight PCB mount SMB/SMA jack. The footprint for an SMA/SMB connector is included on the evaluation board to provide the REFIN1(−) signal. Rev. 0 | Page 6 of 29 EVAL-AD7124-4SDZ User Guide UG-855 POWER SUPPLIES SERIAL INTERFACE The evaluation board requires that an external power supply— either a bench top supply or a wall wart (dc plug) supply—be applied to J3 or J5 (see Table 3 for more information). Linear regulators generate the required power supply levels from the applied VIN rail. The regulators used are the ADP1720-3.3 (U7) and the ADP1720 (U4), which supply 3.3 V and 1.8 V, respectively, to AVDD of the ADC. The 3.3 V ADP1720 (U10) delivers 3.3 V to the IOVDD pin of the AD7124-4. The EVAL-AD7124-4SDZ evaluation board connects via the serial peripheral interface (SPI) to the Blackfin® ADSP-BF527 on the EVAL-SDP-CB1Z. There are four primary signals: CS, SCLK, DIN, and DOUT/RDY (all are inputs, except for DOUT/RDY, which is an output). When a split power supply is used, the AVSS voltage must be applied from an external source via Connector J9. AVDD and IOVDD can also be provided via Connector J9. However, the 7 V to 9 V supply is still required because the on-board reference (ADR4525) is supplied from this power supply. Each supply is decoupled at the point where it enters the board and again at the point where it connects to each device (see the schematics shown in Figure 26 to Figure 29 to identify decoupling points). To operate the EVAL-AD7124-4SDZ in standalone mode, the AD7124-4 serial interface lines can be disconnected from the 120-pin header by removing the 0 Ω links, R9 through R13. The test points can then be used to fly-wire the signals to an alternative digital capture setup. ANALOG INPUTS The EVAL-AD7124-4SDZ primary analog inputs can be applied in two ways: • • Using J6 and J11, the green screw in terminal connectors Using the A0 and A1 SMB/SMA footprints on the evaluation board, which connect to the AIN4 and AIN5 analog inputs. The AD7124-4 EVAL+ Software is set up to analyze dc inputs to the ADC. Table 3. Required External Power Supply1 Power Supply (VIN) Applied To J3 Voltage Range 7 V to 9 V J5 7 V to 9 V 1 Function Bench top supply to the evaluation board. Supplies LDOs that create the 3.3 V and 1.8 V rails. It also supplies the ADR4525 external reference. Ensure that LK2 is set to Position A when the external power supply is applied to this connector. Wall wart (dc plug) supply to the evaluation board. Supplies LDOs that create the 3.3 V and 1.8 V rails. It also supplies the ADR4525 external reference. Ensure that LK2 is set to Position B when the external power supply is applied to this connector. Only a single supply is required, either J3 or J5. This supply can be selected using LK2. Rev. 0 | Page 7 of 29 UG-855 EVAL-AD7124-4SDZ User Guide REFERENCE OPTIONS EVALUATION BOARD SETUP PROCEDURES The EVAL-AD7124-4SDZ includes an external 2.5 V reference (the ADR4525) and an internal 2.5 V reference. The default operation is to use the external reference input, which is set to accept the 2.5 V ADR4525 on the evaluation board. After following the instructions in the Software Installation Procedures section, set up the evaluation and SDP boards as detailed in this section. The reference used for a conversion is selected by choosing the reference in the configuration registers associated with Setup 0 to Setup 7. Switch between using the internal reference and external reference by accessing the AD7124-4 registers through the pop-up windows (discussed in more detail in the following sections) via the evaluation software. Figure 3 shows how to select the reference source for Setup 0 to Setup 7. Figure 4 shows the ADC_CONTROL register setting that enables the internal reference. The evaluation software and drivers must be installed before connecting the evaluation board and EVAL-SDP-CB1Z board to the USB port of the PC to ensure that the evaluation system is correctly recognized when it is connected to the PC. Warning Configuring the Evaluation and SDP Boards 1. 13304-003 2. 3. 13304-004 Figure 3. Selecting the Reference Source Figure 4. Enabling the Internal 2.5 V Reference Rev. 0 | Page 8 of 29 Connect the EVAL-SDP-CB1Z board to Connector A or Connector B on the EVAL-AD7124-4SDZ board. Screw the two boards together using the plastic screw and washer set included in the evaluation board kit to ensure that the boards are connected firmly together. Connect the power supplies to the EVAL-AD7124-4SDZ board. The EVAL-AD7124-4SDZ board, by default, uses the wall wart (dc plug) supply that accompanies the evaluation kit. Connect this supply to J5 on the EVALAD7124-4SDZ board. (For more information about the required connections and available options, see the Power Supplies section.) Connect the EVAL-SDP-CB1Z board to the PC using the supplied USB cable. EVAL-AD7124-4SDZ User Guide UG-855 EVALUATION BOARD SOFTWARE 4. SOFTWARE INSTALLATION PROCEDURES The EVAL-AD7124-4SDZ evaluation kit includes a CD containing software to be installed on the PC before using the evaluation board. Select the location to install the software, and then click Next. (Figure 6 shows the default locations, which are displayed when the window opens; you can select another location by clicking Browse.) There are two procedures in the installation:   AD7124-4 EVAL+ Software installation EVAL-SDP-CB1Z SDP board drivers installation Warning The evaluation software and drivers must be installed before connecting the evaluation board and EVAL-SDP-CB1Z board to the USB port of the PC to ensure that the evaluation system is correctly recognized when it is connected to the PC. Installing the AD7124-4 EVAL+ Software 3. Figure 6. AD7124-4 EVAL+ Software Installation: Selecting the Location for Software Installation 5. A license agreement appears. Read the agreement, select I accept the License Agreement, and click Next. Figure 5. AD7124-4 EVAL+ Software Installation: Granting Permission for the Program to Make Changes to Your PC 13304-007 2. With the EVAL-SDP-CB1Z board disconnected from the USB port of the PC, insert the installation CD into the CDROM drive. Double-click the setup.exe file to begin the evaluation board software installation. The software installs to the following default location: C:\Program Files\Analog Devices\ AD7124 EVAL+. A dialog box appears asking for permission to allow the program to make changes to your PC. Click Yes. 13304-005 1. 13304-006 To install the AD7124-4 EVAL+ Software, do the following: Figure 7. AD7124-4 EVAL+ Software Installation: Accepting the License Agreement Rev. 0 | Page 9 of 29 UG-855 6. EVAL-AD7124-4SDZ User Guide Installing the EVAL-SDP-CB1Z System Demonstration Platform Board Drivers A summary of the installation displays. Click Next to continue. After the installation of the evaluation software is complete, a welcome window displays for the installation of the SDP board drivers. With the EVAL-SDP-CB1Z board still disconnected from the USB port of the PC, make sure that all other applications are closed, and then click Next. 13304-008 1. Figure 8. AD7124-4 EVAL+ Software Installation: Reviewing a Summary of the Installation 13304-010 The message in Figure 9 appears when the installation is complete. Click Next. Figure 10. EVAL-SDP-CB1Z Drivers Setup: Beginning the Drivers Installation 2. Select the location to install the drivers, and then click Next. 13304-009 Figure 9. AD7124-4 EVAL+ Software Installation: Indicating When the Installation Is Complete 13304-011 7. Figure 11. EVAL-SDP-CB1Z Drivers Setup: Selecting the Location for Drivers Installation Rev. 0 | Page 10 of 29 EVAL-AD7124-4SDZ User Guide 3. UG-855 Click Install to confirm that you want to install the drivers. Setting Up the System for Data Capture After completing the steps in the Software Installation Procedures and Evaluation Board Hardware sections, set up the system for data capture as follows: 13304-012 1. 2. To complete the drivers installation, click Finish, which closes the setup wizard. 3. 13304-013 4. Figure 12. EVAL-SDP-CB1Z Drivers Setup: Granting Permission to Install Drivers Allow the Found New Hardware Wizard to run after the EVAL-SDP-CB1Z board is plugged into your PC. (If you are using Windows XP, you may need to search for the EVAL-SDP-CB1Z drivers. Choose to automatically search for the drivers for the EVAL-SDP-CB1Z board if prompted by the operating system.) Check that the board is connecting to the PC correctly using the Device Manager of the PC. Access the Device Manager as follows: a. Right-click My Computer and then click Manage. b. A dialog box appears asking for permission to allow the program to make changes to your PC. Click Yes. c. The Computer Management window appears. From the list of System Tools, click Device Manager (see Figure 15). d. The EVAL-SDP-CB1Z board should appear under ADI Development Tools, which indicates that the driver software is installed and that the board is connecting to the PC correctly. Before using the evaluation board, you must restart the PC. Figure 15. Device Manager: Checking that the Board Is Connected to the PC Correctly 13304-014 5. 13304-015 Figure 13. EVAL-SDP-CB1Z Drivers Setup: Completing the Drivers Setup Wizard Figure 14. EVAL-SDP-CB1Z Drivers Setup: Restarting the PC Rev. 0 | Page 11 of 29 UG-855 EVAL-AD7124-4SDZ User Guide Launching the Software SOFTWARE OPERATION After completing the steps in the Setting Up the System for Data Capture section, launch the AD7124-4 EVAL+ Software as follows: Overview of the Main Window 2. From the Start menu, click Programs > Analog Devices > AD7124 Eval+ > AD7124 Eval+. The dialog box in Figure 19 appears; select EVAL-AD7124-4SDZ, and the main window of the software then displays as shown in Figure 20. If the AD7124-4 evaluation system is not connected to the USB port via the EVAL-SDP-CB1Z when the software is launched, a connectivity error displays (see Figure 16). Connect the evaluation board to the USB port of the PC, wait a few seconds, click Rescan, and then follow the onscreen instructions. 13304-019 1. The evaluation software supports both the AD7124-4 and the AD7124-8 devices. On running the software, the user selects the evaluation board that is connected to the PC. For the AD7124-4, select EVAL-AD7124-4SDZ from the drop-down list, as shown in Figure 19. 13304-016 Figure 19. EVAL-AD7124-4SDZ Evaluation Board Selection Figure 16. Connectivity Error Alert After selecting the EVAL-AD7124-4SDZ evaluation board, the main window of the evaluation software displays, as shown in Figure 20. Figure 20 shows the significant control buttons and analysis indicators of the AD7124-4 EVAL+ Software. The main window of the AD7124-4 EVAL+ Software contains four tabs:     When the software starts running, it searches for hardware connected to the PC. A dialog box indicates when the generic SDP attached to the PC is detected, and then the main window appears (see Figure 20). Press the RESET button on the SDP board, as shown in Figure 17. Configuration Waveform Histogram Register Map CONFIGURATION TAB The Configuration tab shows a block diagram of the AD7124-4. It allows the user to set up the ADC, reset the ADC, read the diagnostics to see errors present, as well as configure the device for different demo modes. Figure 20 shows the Configuration tab in more detail, and the following sections discuss the different elements on the Configuration tab of the software window. ADC Reset 13304-017 Click ADC RESET (Label 2) to perform a software reset of the AD7124-4. There is no hardware reset pin on the AD7124-4. A hard reset can be performed by removing power to the board. The software reset has the same effect as a hard reset. Selecting External Reference Figure 17. SDP Connectivity Board—RESET Button 13304-018 Pressing the RESET button causes the software to rescan for a connected SDP board. If found, the message shown in Figure 18 displays. Figure 18. Connectivity when SDP and Evaluation Boards are Found There are a number of different options that can be used when selecting the reference to the AD7124-4. Two options are AVdd and Refin1(+/-) (Label 3). The Refin1(+/-). field sets the external reference voltage that is connected between REFIN1(+) and REFIN1(−). Using the EVAL-AD7124-4SDZ evaluation board, the AVDD voltage is 3.3 V. Either of these can be used in calculating the results on the Waveform and Histogram tabs. The evaluation board has an external 2.5 V ADR4525 reference, which can be bypassed; if bypassing the ADR4525 on board, be sure to change the external reference voltage value in Refin1(+/-) to ensure correct calculation of results in the Waveform and Histogram tabs. Rev. 0 | Page 12 of 29 EVAL-AD7124-4SDZ User Guide UG-855 Tutorial Button CONFIG SUMMARY Clicking TUTORIAL (Label 4) opens a tutorial on using the software, which provides additional information on using the AD7124-4 EVAL+ Software. Clicking CONFIG SUMMARY (Label 7) displays the channel configuration, information on the individual setups, as well as information on any error present. These tabs can be used to quickly check how the ADC channels are configured, as well as any errors that are present. Functional Block Diagram The functional block diagram of the ADC (Label 5) shows each of the functional blocks within the ADC. Clicking a configuration button on this graph opens the configuration popup window for that block. Configuration Pop-Up Button Each configuration pop-up button (Label 6) opens a different window allowing configuration of the relevant functional block. Demo Modes The AD7124-4 EVAL+ Software supports a number of demo modes (Label 8); these demo modes configure the AD7124-4 for each of the modes shown. A help file is available for each demo mode; to access this help file, click the question mark button. Status Bar The status bar (Label 9) displays status updates such as Analysis Completed, Reset Completed, and Configuring Demo Mode during software use, as well as the software version and the Busy indicator. 1 2 3 3 4 7 5 6 8 13304-020 9 Figure 20. Configuration Tab of the AD7124-4 EVAL+ Software Rev. 0 | Page 13 of 29 UG-855 EVAL-AD7124-4SDZ User Guide WAVEFROM TAB Channel Selection The Waveform tab graphs the conversions and processes the data, calculating the p-p noise, rms noise, and resolution (see Figure 21). The channel selection control (Label 7) chooses which channels display on the data waveform, and also shows the analog inputs for the channel labeled next to the on and off controls. These controls only affect the display of the channels and have no effect on the channel settings in the ADC register map. Waveform Graph and Controls The data waveform graph (Label 1) shows each successive sample of the ADC output. Zoom in on the data using the control toolbar (Label 2) in the graph. Change the scales on the graph by typing values into the x-axis and y-axis. Analysis Channel The Noise Analysis section and histogram graph show the analysis of the channel selected via the Analysis Channel control (Label 3). Samples The Samples numeric control (Label 4) and batch control (Label 5) set the number of samples gathered per batch and whether a single batch or multiple batches of samples are gathered. This control is unrelated to the ADC mode. The user can capture a defined sample set or continuously gather batches of samples. In both cases, the number of samples set in the Samples numeric input dictates the number of samples. Sample Click SAMPLE (Label 6) to start gathering ADC results. Results appear in the waveform graph (Label 1). Display Units and Axis Controls Click the Display Units drop-down list (Label 8) to select whether the data graph displays in units of voltages or codes. This control affects both the waveform graph and the histogram graph. The axis controls can be switched between dynamic and fixed. When dynamic is selected, the axis automatically adjusts to show the entire range of the ADC results after each batch of sample. When fixed is selected, the user can program the axis ranges; the axis ranges do not automatically adjust after each batch of sample. CRC Error and Overall Error The CRC Error LED indicator (Label 9) illuminates when a cyclic redundancy check (CRC) error is detected in the communications between the software and the AD7124-4. The CRC functionality on the AD7124-4 is disabled by default and must be enabled for this indicator to work. The Error Present LED indicates if an overall error is present in the diagnostics register. For this indicator to work, the check for the different diagnostic errors must be enabled in the Error_EN register. Noise Analysis The Noise Analysis section (Label 10) displays the results of the noise analysis for the selected analysis channel, which includes both noise and resolution measurements. Rev. 0 | Page 14 of 29 EVAL-AD7124-4SDZ User Guide UG-855 4 5 6 7 1 3 2 10 8 13304-021 9 Figure 21. Waveform Tab of the AD7124-4 EVAL+ Software Rev. 0 | Page 15 of 29 UG-855 EVAL-AD7124-4SDZ User Guide HISTOGRAM TAB Display Units and Axis Controls The Histogram tab generates a histogram using the gathered samples and processes the data, calculating the peak-to-peak noise, rms noise, and resolution (see Figure 22). The data histogram graph (Label 1) shows the number of times each sample of the ADC output occurs. Zoom in on the data using the control toolbar (Label 6) in the graph. Change the scales on the graph by typing values into the x-axis and y-axis. Click the Display Units drop-down list (Label 4) to select whether the data graph displays in units of voltages or codes. This control affects both the waveform graph and the histogram graph. The axis controls can be switched between dynamic and fixed. When dynamic is selected, the axis automatically adjusts to show the entire range of the ADC results after each batch of sample. When fixed is selected, the user can program the axis ranges; the axis ranges do not automatically adjust after each batch of sample. Analysis Channel CRC Error and Overall Error The Noise Analysis section and histogram graph show the analysis of the channel selected via the Analysis Channel control (Label 2). The CRC Error LED indicator (Label 5) illuminates when a cyclic redundancy check (CRC) error is detected, in the communications between the software and the AD7124-4. The CRC functionality on the AD7124-4 is disabled by default and must be enabled for this indicator to work. The Error Present LED (Label 5) indicates if an overall error is present in the diagnostics register. For this indicator to work, the check for the different diagnostic errors must be enabled in the Error_EN register. Histogram Graph and Controls Noise Analysis The Noise Analysis section (Label 3) displays the results of the noise analysis for the selected analysis channel, which includes both noise and resolution measurements. 1 6 2 3 4 13304-022 5 Figure 22. Histogram Tab of the AD7124-4 EVAL+ Software Rev. 0 | Page 16 of 29 EVAL-AD7124-4SDZ User Guide UG-855 REGISTER MAP TAB Use the Register Map tab to access the registers of the AD7124-4. Figure 23 shows the view when Register Map tab is selected. This tab can be used to quickly change register settings and also to obtain additional information about each of the bits in each of the individual registers. Register Map On the left-hand side of Figure 23 are the registers of the AD7124-4. Click any register to read the register value. Each register of the AD7124-4 can be accessed quickly using this register map (Label 1). Save and Load Buttons The Save and Load buttons (Label 2) in the Register Map tab allow the user to save and load register settings. Click Save to save all the current register settings to a file for use again later. Click Load to load a previously saved register map. Register The Register section (Label 3) shows the value that is currently set in the selected register. The value of the register can be checked in this section by clicking the bits that are to be changed. Clicking any of the individual bit changes that bit from 1 to 0 or 0 to 1, depending on the initial state of the bit. The register value can also be changed by writing the hex value to the input field on the right-hand side of the individual bits. Bitfields The individual bitfields of the selected register are shown in the Bitfields section (Label 4). In this section, the register is broken by name into its bitfields, name of the bitfields, a description of each of each bitfield, as well as the access information. The options for the individual bitfields can be viewed by clicking the arrow next to the bitfield. Changing the bitfield value can also be done through this drop-down list. The value of the bitfield can also be changed by writing the appropriate hex value to the associated Value input field on the right-hand side of the bitfield. Documentation The Documentation section (Label 5) shows information relating to the different bit fields when selected from the register map section on the left. This information is the same information that is presented in the AD7124-4 data sheet. 3 1 4 5 13304-023 2 Figure 23. Register Map Tab of the AD7124-4 EVAL+ Software Rev. 0 | Page 17 of 29 UG-855 EVAL-AD7124-4SDZ User Guide b. NOISE TEST—QUICK START DEMONSTRATION Click the NOISE TEST demo button to configure the device for the noise test. The AD7124-4 is now configured for the noise test demo, where the output data rate is set to 9.38 SPS, with the sinc4 digital filter, full power mode of operation, and the REFIN1(±) external reference selected. Gain and offset are the default factory values following a reset. To gather samples, change the Samples field to the number of samples required value, then click SAMPLE to acquire the samples from the ADC. Figure 24 shows an example of the main window after running a noise test. Reading Samples from the ADC The evaluation board is set up to use the external 2.5 V on-board reference (ADR4525). To read samples from the ADC, take the following steps: The value in the Refin1(+/-) field on the Configuration tab is set to 2.5 V by default to use the external 2.5 V onboard reference (ADR4525). If a different reference is used, set the value in the Refin1(+/-) field accordingly. The analysis results are based on the value set in this field. a. When Single Run is selected from the drop-down list, a batch of samples is read when SAMPLE is clicked, with the batch size being set by the value in the Samples box. Waveform The waveforms resulting from the gathered samples are shown in this tab. The waveform graph shows each successive sample of the ADC output (input referred). The indicators beside this graph show the channels being converted. Navigation tools are provided to allow the user to control the cursor, zooming, and panning. The conversions can be displayed as codes or as volts. Parameters such as peak-to-peak noise and rms noise are displayed below the graph in the Analysis section for the current batch of samples. If several analog input channels are enabled, each enabled channel can be selected and the conversions on that channel analyzed using Analysis Channel. The conversion data can be saved in a text file from the File menu. To save the data into an Excel file, right-click the waveform graph and select Export Data from the drop-down list that appears. A Save dialog box displays, prompting the user to save the data to an appropriate folder location. 13304-024 1. 2. When the drop-down box is set to Continuous Run, the software performs a continuous capture from the ADC when SAMPLE is clicked. c. Click Stop to stop streaming data. Use the navigation tools within each graph to control the cursor, zooming, and panning. Figure 24. Example of the Waveform Tab After Running a Noise Test Rev. 0 | Page 18 of 29 EVAL-AD7124-4SDZ User Guide UG-855 Histogram This tab shows the histogram analysis. The indicators beside this graph show the channels being converted. Navigation tools are provided to allow you to control the cursor, zooming, and panning. The conversions can be displayed as codes or as volts. The conversion data can be saved in a text file from the File at menu. To save the data into an Excel file, right-click the histogram graph and select Export Data from the drop-down list that appears. A Save dialog box displays, prompting the user to save the data to an appropriate folder location. 13304-025 Parameters such as peak-to-peak noise and rms noise are displayed in the Analysis Results section for the current batch of samples. Figure 25. Example of the Histogram Tab After Running a Noise Test Rev. 0 | Page 19 of 29 UG-855 EVAL-AD7124-4SDZ User Guide EVALUATION BOARD SCHEMATICS AND ARTWORK 13304-026 Figure 26. Schematic Rev. 0 | Page 20 of 29 EVAL-AD7124-4SDZ User Guide UG-855 13304-027 Figure 27. Schematic—Power Supply Rev. 0 | Page 21 of 29 UG-855 EVAL-AD7124-4SDZ User Guide 13304-028 Figure 28. Schematic—Regulators Rev. 0 | Page 22 of 29 UG-855 13304-029 EVAL-AD7124-4SDZ User Guide Figure 29. Schematic—SDP Rev. 0 | Page 23 of 29 EVAL-AD7124-4SDZ User Guide 13304-030 UG-855 Figure 30. Top Printed Circuit Board (PCB) Silkscreen Rev. 0 | Page 24 of 29 UG-855 13304-031 EVAL-AD7124-4SDZ User Guide 13304-032 Figure 31. Layer 1—Component Side Figure 32. Layer 2—Ground Plane Rev. 0 | Page 25 of 29 EVAL-AD7124-4SDZ User Guide 13304-033 UG-855 13304-034 Figure 33. Layer 3—Power/Ground Plane Figure 34. Layer 4—Component Side Rev. 0 | Page 26 of 29 EVAL-AD7124-4SDZ User Guide UG-855 BILL OF MATERIALS Table 4. Reference Designator A0, A1, A5, A6, J2 A2 C1, C17, C29, C30, C43, C47 C2, C22, C25, C26, C36, C38, C54, C55 C3, C45, C46 C4, C6 C5, C7, C8, C9, C16 C10 to C12, C24, C27, C28 C13, C14, C18, C20, C21, C31, C33, C34, C44, C50 to C53 C15, C37 C19, C59 C23 C32, C35, C39, C48, C49 D2, D6 D4 D5 GND, GN1 to GND6, MCLK, REF+, REF−, REFOUT, S1 to S8, S1' to S8', TDIN, TDIN1, TDOUT, TDOUT1, TSCLK, TSCLK1, TSYNC, TSYNC1, T\CS, T\CS1 J1 J3 Description Straight PCB mount SMB jack, keep hole clear of solder Miniature thermocouple connector Capacitor, ceramic, 6.3 V, X5R, 0603, 4.7 µF, ±10% Capacitor, ceramic, 50 V, X7R, 0603, 0.1 µF, ±10% Manufacturer1 Tyco Part No.1 1-1337482-0 Stock Code Do not insert Omega Murata PCC-SMP-U-50 GRM188R60J475K Do not insert FEC 173-5527 Murata GRM188R71H104K FEC 882-0023 Capacitor, ceramic, 10 V, X5R, 0603, 4.7 µF, ±10% Capacitor, 0805, 1 µF, 50V, X7R, 1 µF, ±10% Ceramic capacitor, not inserted, 0402 Ceramic capacitor, 50 V, NPO, 0603, 0.01 µF Kemet Murata N/A Phycomp C0603C475K8PACTU GRM21BR71H105KA12L N/A 2238 586 15636 FEC 157-2625 FEC 173-5541 Do not insert FEC 722-236 Capacitor, ceramic, 16 V, X7R, 0402, 0.1 µF, ±10% Murata GRM155R71C104K FEC 881-9742 Capacitor, 6.3 V, 1 µF, ±10% Ceramic capacitor, 25 V, NPO, 0603, 0.01 µF Ceramic capacitor, 50 V, NPO, 0603, 0.1 µF Capacitor, ceramic, 50 V, X5R, 1210, 10 µF Murata N/A N/A Murata GRM188R70J105KA01D N/A N/A GRM32ER61H106K FEC 184-5765 Do not insert Do not insert FEC 184-5764 Red LED, high intensity (>90 mCd), 0603 LED, SMD, green Diode, Zener, 0.5 W, 5.1 V, BZT52 Test point, not inserted, keep hole clear of solder Avago Tech OSRAM Vishay N/A HSMC-C191 LGQ971 BZT52B5V1-V-GS08 N/A FEC 855-8528 Digikey 475-1409-1-ND FEC 161-7767 Do not insert 120-way connector, 0.6 mm pitch Socket terminal block, 3.81 mm pitch Hirose Phoenix Contact Phoenix Contact Kycon FX8-120S-SV(21) MC 1.5/3-G-3.81 FEC 132-4660 FEC 370-4737 1727023 Do not insert KLDX-SMT2-0202-A MOUSER 806-KLDXSMT20202A FEC 370-4774 J4 Screw terminal block, pitch 3.81 mm J5 DC power connectors, 2 mm, SMT, power jack J6, J11 8-pin terminal header, pitch 3.81 mm, vertical J7 Connector, pitch 3.81 mm, right angle, 1 × 4-pin J8, J10 8-pin terminal header, pitch 3.81 mm, vertical J9 Screw terminal block, pitch 3.81 mm, 1 × 4-pin J12 PCB pads, 6-way solder slot for Analog Devices PCB, 6-way 7-way SSW, 2.54 mm vertical socket 7-way sip, 2.54 mm, TH header Do not insert Ferrite bead, 0.3 Ω at dc, 1000 Ω at 100 MHz, 350 mA, 0805, 1000 Ω 3-pin (3×1), 0.1" header and shorting block in Position A J13 J14 J15 L3 LK1, LK2 Phoenix Contact Phoenix Contact Phoenix Contact Phoenix Contact Aragorn MC 1,5/ 8-G-3,81 MC 1,5/ 4-G-3,81 and 180-3594 1727078 Do not insert 1727036 FEC 370-4592 ADT7320-CJC-PCB ADT7320-CJC-PCB Samtec Samtec N/A Tyco SSW-107-01-T-S TLW-107-05-G-S N/A BMB2A1000LN2 FEC 180-3478 FEC 166-8499 Do not insert FEC 119-3421 Harwin M20-9990346 and M7566-05 FEC 102-2249 and 150-411 Rev. 0 | Page 27 of 29 Do not insert UG-855 EVAL-AD7124-4SDZ User Guide Reference Designator LK3, LK5 Description 2-pin (0.1" pitch) header and shorting shunt Manufacturer1 Harwin Part No.1 M20-9990246 LK4, LK6 4-pin (2×2) 0.1" header and shorting block Harwin Q1 Q2 MOSFET transistor Transistor, NPN, SOT-23 R1 R2 to R4, R7, R48 R5, R6, R8, R71 R9 to R13, R19 to R22, R35 to R38, R58, R59, R61, R62, R70 R14 R15, R17, R18, R24 R16 R23 R25, R57 R26, R27, R29, R30, R32, R40 R28 Resistor, not inserted, 0603 SMD resistor, 100 kΩ, 1% Resistor, 1%, 0402, 10 kΩ Resistor, 0402, 0 Ω, 1% Vishay Siliconix ON Semiconductor N/A Multicomp Phycomp Vishay M20-9983646 and M7566-05 SI2304DDS-T1-GE3 MMBT3904LT1G Stock Code FEC 102-2247 and 150-411 FEC 1022244 and 150-411 (36-pin strip) FEC 185-8939 FEC 145-9100 N/A MC 0.063W 0603 1% 100K CRCW040210K0FKEAHP CRCW04020000Z0ED Do not insert FEC 933-0402 FEC 173-8864 FEC 146-9661 Resistor, 0402, 1%, 30 kΩ SMD resistor, 10.2 kΩ, 1% Resistor, 0402, 1%, 69.8 kΩ Resistor, 0402, 1%, 86.6 kΩ Resistor, 0402, 1%, 15 kΩ Resistor, 0603, 1 kΩ, 1% Multicomp Multicomp Multicomp Multicomp Multicomp Multicomp MC 0.0625W 0402 1% 30K MC 0.0625W 0402 1% 10K2 MC 0.0625W 0402 1% 69K8 MC 0.0625W 0402 1% 86K6 MC 0.0625W 0402 1% 15k MC 0.063W 0603 1% 1K FEC 135-8082 FEC 180-3137 FEC 180-3735 FEC 180-3744 FEC 1358073 FEC 933-0380 Thermistor, 1950 Ω to 1990 Ω Infineon Q62705-K110 R31, R90 R33, R34, R39, R47, R81 to R84, R87, R89 R42 to R45 R49 to R52 R53 R54 R55 R56 R60 R88 SL2, SL3, SL7 SL5 STAR3 U1 U2 Resistor, not inserted, 0402 Resistor, 0603, 0 Ω, 1% N/A Vishay Draloric N/A CRCW06030000Z0EA Philips (Arrow) KTY81/110 Do not insert FEC 146-9739 Resistor, thick film, 10 kΩ, 62.5 mW, 5% Resistor, 1206, 0 Ω, 5% Resistor, 0402, 27 kΩ, 1% Resistor, thick film, 4.53 kΩ, 63 mW, 1% Resistor, 0402, 1%, 61.9 Ω Resistor, 0402, 57.6 kΩ, 1% Resistor, thick film, 2.4 kΩ, 0603, 100 mW, 1% Resistor, 0603, not inserted 2-way solder link (use 0 Ω, 0603 resistor) 2-way solder link (use 0 Ω, 0603 resistor) Ground link 32k I2C serial EEPROM Linear regulator 5 V, 20 V, 500 mA, ultralow noise, CMOS Quad voltage monitor and sequencer 50 mA, high voltage, micropower linear regulator, ADJ 4-channel, low power, low noise, Σ-Δ ADC 2.5 V low noise reference 50 mA, high voltage, micropower linear regulator, 3.3 V 1206, place holder Yageo Multicomp Multicomp Vishay Dale Multicomp Multicomp Yageo N/A N/A N/A N/A Microchip Analog Devices RC0402JR-1310KL MC 0.125W 1206 0R MC 0.0625W 0402 1% 27K CRCW04024K53FKED MC 0.0625W 0402 1% 61R9 MC 0.0625W 0402 1% 57K6 RC0603FR-072K4L N/A Insert in Link Position A Insert in Link Position B N/A 24LC32A-I/MS ADP7104ARDZ-5.0 FEC 179-9316 FEC 933-6974 FEC 135-8081 FEC 115-1244 FEC 180-2915 FEC 185-1295 FEC 179-9329 Do not insert FEC 933-1662 FEC 933-1662 N/A FEC133-1330 ADP7104ARDZ-5.0 Analog Devices Analog Devices ADM1185ARMZ-1 ADP1720ARMZ-R7 ADM1185ARMZ-1 ADP1720ARMZ-R7 Analog Devices Analog Devices Analog Devices AD7124-4BCPZ ADR4525BRZ ADP1720ARMZ-3.3-R7 AD7124-4BCPZ ADR4525BRZ ADP1720ARMZ-3.3-R7 N/A N/A Do not insert U3 U4 U5 U6 U7, U10 V1 to V4 1 N/A means not applicable. Rev. 0 | Page 28 of 29 EVAL-AD7124-4SDZ User Guide UG-855 NOTES I2C refers to a communications protocol originally developed by Philips Semiconductors (now NXP Semiconductors). ESD Caution ESD (electrostatic discharge) sensitive device. Charged devices and circuit boards can discharge without detection. Although this product features patented or proprietary protection circuitry, damage may occur on devices subjected to high energy ESD. Therefore, proper ESD precautions should be taken to avoid performance degradation or loss of functionality. Legal Terms and Conditions By using the evaluation board discussed herein (together with any tools, components documentation or support materials, the “Evaluation Board”), you are agreeing to be bound by the terms and conditions set forth below (“Agreement”) unless you have purchased the Evaluation Board, in which case the Analog Devices Standard Terms and Conditions of Sale shall govern. Do not use the Evaluation Board until you have read and agreed to the Agreement. Your use of the Evaluation Board shall signify your acceptance of the Agreement. This Agreement is made by and between you (“Customer”) and Analog Devices, Inc. (“ADI”), with its principal place of business at One Technology Way, Norwood, MA 02062, USA. Subject to the terms and conditions of the Agreement, ADI hereby grants to Customer a free, limited, personal, temporary, non-exclusive, non-sublicensable, non-transferable license to use the Evaluation Board FOR EVALUATION PURPOSES ONLY. Customer understands and agrees that the Evaluation Board is provided for the sole and exclusive purpose referenced above, and agrees not to use the Evaluation Board for any other purpose. Furthermore, the license granted is expressly made subject to the following additional limitations: Customer shall not (i) rent, lease, display, sell, transfer, assign, sublicense, or distribute the Evaluation Board; and (ii) permit any Third Party to access the Evaluation Board. As used herein, the term “Third Party” includes any entity other than ADI, Customer, their employees, affiliates and in-house consultants. The Evaluation Board is NOT sold to Customer; all rights not expressly granted herein, including ownership of the Evaluation Board, are reserved by ADI. CONFIDENTIALITY. This Agreement and the Evaluation Board shall all be considered the confidential and proprietary information of ADI. Customer may not disclose or transfer any portion of the Evaluation Board to any other party for any reason. Upon discontinuation of use of the Evaluation Board or termination of this Agreement, Customer agrees to promptly return the Evaluation Board to ADI. ADDITIONAL RESTRICTIONS. Customer may not disassemble, decompile or reverse engineer chips on the Evaluation Board. Customer shall inform ADI of any occurred damages or any modifications or alterations it makes to the Evaluation Board, including but not limited to soldering or any other activity that affects the material content of the Evaluation Board. Modifications to the Evaluation Board must comply with applicable law, including but not limited to the RoHS Directive. TERMINATION. ADI may terminate this Agreement at any time upon giving written notice to Customer. Customer agrees to return to ADI the Evaluation Board at that time. LIMITATION OF LIABILITY. THE EVALUATION BOARD PROVIDED HEREUNDER IS PROVIDED “AS IS” AND ADI MAKES NO WARRANTIES OR REPRESENTATIONS OF ANY KIND WITH RESPECT TO IT. ADI SPECIFICALLY DISCLAIMS ANY REPRESENTATIONS, ENDORSEMENTS, GUARANTEES, OR WARRANTIES, EXPRESS OR IMPLIED, RELATED TO THE EVALUATION BOARD INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, TITLE, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT OF INTELLECTUAL PROPERTY RIGHTS. IN NO EVENT WILL ADI AND ITS LICENSORS BE LIABLE FOR ANY INCIDENTAL, SPECIAL, INDIRECT, OR CONSEQUENTIAL DAMAGES RESULTING FROM CUSTOMER’S POSSESSION OR USE OF THE EVALUATION BOARD, INCLUDING BUT NOT LIMITED TO LOST PROFITS, DELAY COSTS, LABOR COSTS OR LOSS OF GOODWILL. ADI’S TOTAL LIABILITY FROM ANY AND ALL CAUSES SHALL BE LIMITED TO THE AMOUNT OF ONE HUNDRED US DOLLARS ($100.00). EXPORT. Customer agrees that it will not directly or indirectly export the Evaluation Board to another country, and that it will comply with all applicable United States federal laws and regulations relating to exports. GOVERNING LAW. This Agreement shall be governed by and construed in accordance with the substantive laws of the Commonwealth of Massachusetts (excluding conflict of law rules). Any legal action regarding this Agreement will be heard in the state or federal courts having jurisdiction in Suffolk County, Massachusetts, and Customer hereby submits to the personal jurisdiction and venue of such courts. The United Nations Convention on Contracts for the International Sale of Goods shall not apply to this Agreement and is expressly disclaimed. ©2015 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. UG13304-0-7/15(0) Rev. 0 | Page 29 of 29
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