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EVAL-ADE9000EBZ

EVAL-ADE9000EBZ

  • 厂商:

    AD(亚德诺)

  • 封装:

    -

  • 描述:

    ADE9000EVALUATIONBOARD

  • 数据手册
  • 价格&库存
EVAL-ADE9000EBZ 数据手册
EVAL-ADE9000EBZ User Guide UG-1082 One Technology Way • P.O. Box 9106 • Norwood, MA 02062-9106, U.S.A. • Tel: 781.329.4700 • Fax: 781.461.3113 • www.analog.com Evaluating the ADE9000 High Performance, Multiphase Energy, Power Quality Monitoring IC FEATURES SOFTWARE NEEDED Full featured evaluation board for the ADE9000 PC control in conjunction with the EVAL-SDP-CB1Z system demonstration platform (SDP) PC software for control and data analysis (time and frequency domain) Standalone capability EVAL-ADE9000EBZ evaluation software EVALUATION KIT CONTENTS The EVAL-ADE9000EBZ evaluation board allows the performance of the ADE9000 energy monitoring IC to be evaluated in a context very similar to an actual power quality monitor. The kit requires purchasing a second board: the controller board for the system demonstration platform (EVAL-SDP-CB1Z) and current sensors. The ADE9000 evaluation kit includes evaluation software, written in LabVIEW®, which provides access to the registers and features of the device using a PC interface. EVAL-ADE9000EBZ evaluation board ADDITIONAL EQUIPMENT NEEDED EVAL-SDP-CB1Z (must be ordered separately) Includes a mini USB cable Current transformers or Rogowski coils for 3-phase current channels and the neutral channel Precision current and voltage signal source PC running Windows XP SP2, Windows Vista, or Windows 7 with USB 2.0 port ONLINE RESOURCES Design and integration files Schematics, layout files, and bill of materials GENERAL DESCRIPTION Consult the ADE9000 data sheet in conjunction with this user guide when using the evaluation board. DOCUMENTS NEEDED ADE9000 data sheet EVAL-ADE9000EBZ user guide 15326-001 TYPICAL EVALUATION BOARD SETUP Figure 1. EVAL-ADE9000EBZ (Left) Connected to EVAL-SDP-CB1Z SDP Interface Board (Right) PLEASE SEE THE LAST PAGE FOR AN IMPORTANT WARNING AND LEGAL TERMS AND CONDITIONS. Rev. 0 | Page 1 of 31 UG-1082 EVAL-ADE9000EBZ User Guide TABLE OF CONTENTS Features .............................................................................................. 1 Using the Evaluation Board with Another Microcontroller......6 Evaluation Kit Contents ................................................................... 1 Evaluation Board Software ...............................................................7 Additional Equipment Needed ....................................................... 1 Installing the Drivers ....................................................................7 Documents Needed .......................................................................... 1 Installing and Uninstalling the EVAL-ADE9000EBZ Software ..........................................................................................7 Software Needed ............................................................................... 1 Online Resources .............................................................................. 1 Main Window ................................................................................7 General Description ......................................................................... 1 Evaluation Software Functions ........................................................9 Typical Evaluation Board Setup ...................................................... 1 Read/Write Registers Option .......................................................9 Revision History ............................................................................... 2 Evaluation Kit Connection Diagram ............................................. 3 Evaluation Board Hardware ............................................................ 4 Overview........................................................................................ 4 Powering Up the Evaluation Boards .......................................... 4 Powers and Energies .................................................................. 13 RMS Window .............................................................................. 16 Waveform Buffer Window ........................................................ 17 Angle Window ............................................................................ 18 Quick Startup Window .............................................................. 19 Analog Inputs ................................................................................ 4 Interrupts Window..................................................................... 20 Current Sense Inputs: IAP, IAN, IBP, IBN, ICP, ICN, INP, and INN Test Pins ................................................................................ 4 Power Quality Window ............................................................. 21 Troubleshooting .............................................................................. 23 Using Current Sense Transformers ............................................ 4 Evaluation Board Schematics and Artwork ................................ 24 Using Rogowski Coils .................................................................. 5 Ordering Information .................................................................... 29 Phase Voltage Sense Inputs: VAP and VAN, VBP and VBN, and VCP and VCN Test Pins ...................................................... 5 Bill of Materials ........................................................................... 29 Setting Up the Evaluation Board as an Energy Meter ............. 6 REVISION HISTORY 1/2017—Revision 0: Initial Version Rev. 0 | Page 2 of 31 EVAL-ADE9000EBZ User Guide UG-1082 EVALUATION BOARD CONNECTION DIAGRAM USB CONNECTOR SDP-B BOARD CON A ISOLATED SIGNALS P2 P9 P7 NONISOLATED SIGNALS DATA AND POWER ISOLATION EXTERNAL POWER SUPPLY INTERFACE CIRCUITRY BARREL CONNECTOR RESET IAP AGND IAN FILTER NETWORK IBP AGND IBN FILTER NETWORK ICP AGND ICN FILTER NETWORK SPI, CFx, IRQx, RESET, AND PMx SIGNALS 9V ADAPTER VDD AGND EXT_5V ADE9000 ATTENUATION NETWORK FILTER NETWORK VAP VBP VCP NEUTRAL Figure 2. Evaluation Board Connection Diagram Rev. 0 | Page 3 of 31 15326-002 EVAL-ADE9000EBZ EVALUATION BOARD INP AGND INN UG-1082 EVAL-ADE9000EBZ User Guide EVALUATION BOARD HARDWARE OVERVIEW IAP The EVAL-ADE9000EBZ and the SDP-B (also referred to as the EVAL-SDP-CB1Z or the Blackfin® SDP board) boards are both required to evaluate the ADE9000. 0Ω C3A 0.022µF 0.022µF R6A 1kΩ IAN 15326-003 1500Ω IAP C4A R4A 0.022µF A C C DNI A A C E2A The EVAL-ADE9000EBZ board is connected to the SDP-B board using the 120-pin connector, P9, on the EVAL-ADE9000EBZ evaluation board. The SDP-B board consists of an ADSP-BF527 microcontroller that handles all the communications from the PC to the ADE9000 device that populates the evaluation board. 0.022µF 1kΩ C1A R5A 0Ω C2A R3A DNI A 1500Ω When ordering the EVAL-ADE9000EBZ evaluation board, order the EVAL-SDP-CB1Z; the evaluation kit and the SDP-B board are purchased and packaged separately, but must be used together. C E1A IAN Figure 3. Phase A Current Input Structure on the Evaluation Board POWERING UP THE EVALUATION BOARDS USING CURRENT SENSE TRANSFORMERS The ADE9000 can be powered through the USB of the SDP-B board or an external power supply. Figure 4 shows an example of a current transformer sensor configuration. When using current sense transformers, populate the R1A and R2A burden resistors according to the full-scale current and the current transformer (CT) turns ratio of the application. The CT turns ratio and the burden resistor values must be chosen such that the IAP pin to AGND pin and IAN pin to AGND pin potentials do not exceed ±0.5 V peak. The C1A and C2A capacitors are not populated when the current transformer is used. An example burden resistor calculation, where the maximum expected current at current transformer primary is 50 A rms, the CT turns ratio is 3000:1, and the secondary current at 50 A is as follows, Power the ADE9000 externally by connecting a 3.3 V supply to the VDD test point, or a 5 V to 16 V dc supply to the EXT_5V test point or barrel jack. When using an external supply, connect Pin 1 and Pin 2 at J3. Connect Pin 2 and Pin 3 to power the ADE9000 with internal isolated power from the SDP-B board. ANALOG INPUTS Current and voltage signals are connected at the test pins placed on the evaluation board. All analog input signals are filtered using the on-board antialiasing filters before the signals are connected to the ADE9000. The components used on the board are the recommended values to be used with the ADE9000. CURRENT SENSE INPUTS: IAP, IAN, IBP, IBN, ICP, ICN, INP, AND INN TEST PINS Figure 3 shows the structure used for the Phase A current channel in the evaluation board. The same signal path is used for the other current channels. Therefore, the explanation in this section applies to other current channels on the evaluation board, such as Phase B, Phase C, and the neutral phase. E1A and E2A are ferrite beads that filter any high frequency noise present on the wires. Immediately following the ferrite beads, there are four protection diodes per current channel used for overcurrent protection. The antialiasing filter network appears after the protection network. I SECONDARY = 50 = 16.66 mA 3000 To allow headroom, the input signal into the current channel analog-to-digital converter (ADC) at maximum current is set at half of full scale. Because the full-scale differential input is ±0.707 V rms, the total burden resistor, RB, can be calculated as  0.707  1  = 21.2 Ω RB =  ×  2  16.66 mA   Because the total burden resistor is split to have a differential configuration, Rev. 0 | Page 4 of 31 R1A = R2A = RB 21.2 = = 10.6 Ω 2 2 EVAL-ADE9000EBZ User Guide UG-1082 PHASE VOLTAGE SENSE INPUTS: VAP AND VAN, VBP AND VBN, AND VCP AND VCN TEST PINS IAP VAP E3AP R7A R9A R9A E1A VAN VAN 0.022µF 0.022µF Figure 6. Phase A Voltage Input Structure on the Evaluation Board IAN IAN 15326-005 1kΩ C3A R6A C4A 0.022µF 0.022µF C 100Ω IAP 1kΩ C1A 100Ω R4A 1500Ω R5A C2A C C A A C E2A A ROGOWSKI COIL A R3A 1500Ω VAP Figure 5. Example of a Rogowski Coil Connection Rev. 0 | Page 5 of 31 15326-006 IAP 1500Ω R8A 330kΩ 330kΩ 330kΩ 0.022µF PHASE A 0.022µF Figure 5 shows an example of a configuration using a Rogowski coil current sensor. The R1A and R2A burden resistors are not used in this configuration, and are therefore removed from the board. Because Rogowski coil sensors have a gain that increases with frequency (20 dB/decade), the high frequency components of the current signal are amplified by a larger factor. Therefore, two stages of resistor capacitor (RC) filtering are required to attenuate the high frequency components and to avoid aliasing. The R3A and R4A resistors must be 100 Ω and are used in conjunction with the 22 nF C1A and C2A capacitors to form a low-pass filter with a cutoff frequency of 72 kHz. This first stage is followed by the 1 kΩ/22 nF RC filter combination that provides a cutoff frequency of 7.2 kHz. The Rogowski coil must be chosen such that the IAP to AGND and IAN to AGND potentials do not exceed ±0.5 V peak. C5A USING ROGOWSKI COILS C6A IAN Figure 4. Example of a Current Transformer Connection 1kΩ 15326-004 IAN 1kΩ 1kΩ R11A R6A 0Ω E3AP is a ferrite bead that filters any high frequency noise present on the wires. There are three 330 kΩ resistors connected in series, forming an attenuation network with a 1 kΩ resistor, R11A. This setup provides an attenuation ratio of 990:1. The R11A and C5A RC combination and the R10A and C6A RC combination have the same cutoff frequency as that of the RC filters used on the current channels. This matching is essential to avoid large phase errors between the voltage and current signals. If a different attenuation ratio is preferred, replace the R7A, R8A, and R9A resistors with alternate resistors. The resistors must be chosen such that the maximum signal at the VAP pin is ±0.5 V peak with respect to the AGND pin. The Phase A line is connected to the VAP test point and the neutral line (in the case of the 3-phase, 4-wire wye configuration) is connected to the NEUTRAL test point. The NEUTRAL test point is tied to the AGND potential of the ADE9000. R10A R4A 1500Ω Figure 6 shows the Phase A voltage channel signal path on the evaluation board. The same signal path is also replicated on the Phase B and Phase C channels; therefore, the description in this section applies to the Phase B and Phase C channels. IAP 0.022µF 1kΩ 0.022µF R5A 0Ω C3A R3A C4A A R1A C C C R2A A E2A C CT A 1500Ω A E1A UG-1082 EVAL-ADE9000EBZ User Guide SETTING UP THE EVALUATION BOARD AS AN ENERGY METER PHASE A PHASE B Figure 7 shows a typical setup for the EVAL-ADE9000EBZ evaluation board. In this example, an energy meter for a 3-phase, 4-wire, wye distribution system is shown. Current transformers sense the phase currents and are connected as shown in Figure 7. The line voltages are connected directly to the board as shown. EVALUATION BOARD TEST POINTS PHASE C ICP ICN IAP IAN VCP SOURCE PHASE B EVALUATION BOARD TEST POINTS VAP LOAD 15326-008 PHASE C IBN ICP Figure 8. Typical Setup for the EVAL-ADE9000EBZ for a 3-Phase, 3-Wire, Delta Distribution System ICN IAP USING THE EVALUATION BOARD WITH ANOTHER MICROCONTROLLER IAN VBP VCP VAP LOAD LOAD 15326-007 NEUTRAL LOAD NEUTRAL IBP Figure 7. Typical Setup for the EVAL-ADE9000EBZ for 3-Phase, 4-Wire, Wye Distribution System Figure 8 shows a typical setup for the EVAL-ADE9000EBZ evaluation board as an energy meter for a 3-phase, 3-wire, delta distribution system. The Phase B voltage is considered a reference and therefore is tied to the NEUTRAL test point on the evaluation board. It is possible to manage the ADE9000 evaluation board with a different microcontroller mounted on another board. The evaluation board can be connected to this second board through the P2 connector. The SDP-B board in this case is unused and not connected. If nonisolated signals are to be used with the external microcontroller, the P7 connector can be used. In this case, the U7, U8, U10, and U11 isolators must be removed from the EVALADE9000EBZ evaluation board. Note that the P2 and P9 connectors have isolated signals, whereas the P7 connector is nonisolated. It is necessary to have isolation on the host side if signals from the P7 connector are used. Rev. 0 | Page 6 of 31 EVAL-ADE9000EBZ User Guide UG-1082 EVALUATION BOARD SOFTWARE The EVAL-ADE9000EBZ is supported by Windows®-based software that allows the user to access all the functionality of the ADE9000. The software communicates with the SDP-B board using the USB. The SDP-B microcontroller communicates with the ADE9000 placed on the evaluation board to process the requests sent from the PC. Both the EVAL-ADE9000EBZ evaluation software program and the run-time engine are uninstalled using the Add/Remove Programs option in the Control Panel. Before installing a new version of the EVAL-ADE9000EBZ evaluation software, use the following procedure: INSTALLING THE DRIVERS 1. 2. Make sure to have administrator privileges to install and run the evaluation software. Disconnect the SDP-B board. 3. 1. MAIN WINDOW 2. Install SDPDriversNET.exe located in the SDP Drivers\ folder. This installs the SDP drivers and the .NET framework required to install LabVIEW run-time engine. .NET 3.5 or higher is required to install LabVIEW run-time engine. Connect the USB cable from the PC to the SDP-B board. Windows detects the device and locates the correct driver automatically. INSTALLING AND UNINSTALLING THE EVALADE9000EBZ SOFTWARE The ADE9000 evaluation software is supplied with the evaluation software package. It contains an installer to install the EVALADE9000EBZ evaluation software. The program to be installed is a LabVIEW-based program that runs on the PC. When running the software on a PC that does not have LabVIEW 2014 for the first time, run the installer. The installer installs a LabVIEW run-time engine that enables the PC to open the evaluation software executable without any issues. This installer is available in the LabVIEW\InstallationFiles folder. If LabVIEW 2014 is available on the PC, the executable can be directly opened from the Executable\ folder. Uninstall the previous version of the evaluation software. Select the add/remove programs option in the Windows Control Panel. Select the program to uninstall and click Add/Remove. When the software executable opens, the main window of the evaluation software appears, as shown in Figure 9. When opened for the first time, the software searches for two files: the register file, ADE9000_reg_map.bin, and the SDP microcontroller code file, ADE9000.ldr. These files can be found in the \Executable\data folder. After manually choosing the location of these files the first time, the ADE9000coms.ini file is updated with their file paths. This update allows the software to find the files correctly during the next run. The software recognizes the device on the evaluation board, (the ADE9000) and displays the device features in the IC being evaluated: box of the window. The SDP code version and the version register value of the IC are displayed in their corresponding boxes in the window. 1. 2. Double click InstallationFiles\setup.exe to launch the setup program that automatically installs all the software components, including the uninstall program, and creates the required directories. To launch the software, click Start, All Programs, ADE9000 and click ADE9000_Evaluation_Software. When the software runs for the first time, right-click ADE9000_Evaluation_Software.exe and select run as the administrator. Rev. 0 | Page 7 of 31 15326-010 To install and launch the EVAL-ADE9000EBZ evaluation software, use the following procedure: Figure 9. Main Window of the Evaluation Software EVAL-ADE9000EBZ User Guide Three different operations can be performed using the options present in the left pane of the main window (see Figure 9). These operations are enacted using the following buttons: 1. 2. 3. Set SCLK. Click this option to open the Select SPI Frequency window, as shown in Figure 10. Set the serial peripheral interface (SPI) clock frequency for communication between the ADE9000 and the SDP-B board using this window. Enter the intended SCLK frequency value on the SCLK control and click Check if Valid. The Check if Valid option rounds off the clock frequency to the closest setting that is possible in the SDP-B board. Finally, click Set SCLK to set the SCLK frequency in the SDP-B board. The window closes automatically. The default SPI clock rate is 10 MHz. Software reset. Click this option to perform a software reset on the ADE9000. A dialog box appears confirming the completion of the reset operation. Rev. 0 | Page 8 of 31 Hardware reset. Click this option to perform a hardware reset on the ADE9000. A dialog box appears confirming the completion of the reset operation. 15326-011 UG-1082 Figure 10. Set SCLK Option on the SDP-B Board EVAL-ADE9000EBZ User Guide UG-1082 EVALUATION SOFTWARE FUNCTIONS The right pane of the main window (see Figure 9) consists of eight options, each of which can be used to evaluate a particular functionality of the ADE9000. The functionalities that can be evaluated are represented by the following options:         Read/Write registers Powers and Energies RMS Waveform buffer Angle Quick Startup Interrupts Power Quality READ/WRITE REGISTERS OPTION The first option in the right pane of the main window is Read/Write registers. Click this option to open the Read/Write registers window, as shown in Figure 11. There are four tabs available within this window: Single access, Sequential access, All register access, and Read on Interrupt. Each tab helps perform read/write operations to the ADE9000 at different capacities. Single Access Tab 15326-012 Clicking any of these eight options opens a corresponding window. To close any of these windows, the same option must be clicked again in the main window. Multiple windows can be left open on the monitor to evaluate different features at the same time. The Single access tab contains a Name selection box. Click the down arrow in the selection box to open a list of all the registers within ADE9000. Any of the registers can be selected for communication purposes. After the registers are selected, the Address box and Length box are updated on the screen. Alternatively, the address of the register can be written first, which updates the register name and the length fields. The individual bit fields within the register can be accessed via the Bitfield box. Data can be written to and read from the IC using the Write and Read options. The white boxes in the window denote the description of the register and the corresponding bit fields. Figure 11 shows the window when the Single access tab is selected. Figure 11. Single access Tab in the Read/Write registers Window Rev. 0 | Page 9 of 31 UG-1082 EVAL-ADE9000EBZ User Guide Sequential Access Tab 15326-013 The Sequential access tab allows the user to perform read or write operations on four different registers, in a particular order. The Enable checkboxes at the beginning of each of the steps (Step 1 through Step 4) can be selected to enable that particular step. When all the required settings are entered, click Execute Sequence to perform the operations in sequence. Figure 12 shows the window when the Sequential access tab is selected. Figure 12. Sequential access Tab in the Read/Write registers Window Rev. 0 | Page 10 of 31 EVAL-ADE9000EBZ User Guide UG-1082 All Register Access Tab 15326-014 The All register access tab allows the user to read from all the registers on the device and to write all writable registers by clicking a single option. Click Read and display all registers to read the registers and output the results to the Register values table. Enter the file path for saving the register values and click Save data to file to generate a text file with all the register values. Any notes for reference can be added to the file using the Notes field. The saved text file can also be edited and used to write back to the registers. When attempting to write back to the registers, edit the hexadecimal register value in the text file and specify the file path next to the Read from file and update display option (perform this action before clicking this option). Click Read from file and update display to update the table in the window with the values from the file. At this point, clicking the Write register values from display option writes to all the writable registers within the ADE9000. Figure 13 shows the window with the All register access tab selected. Figure 13. All register access Tab in the Read/Write registers Window Rev. 0 | Page 11 of 31 UG-1082 EVAL-ADE9000EBZ User Guide Read on Interrupt Tab The Read on Interrupt tab allows the user to read any particular register on any particular interrupt event. Examples of cases where using this tab may be useful are as follows:  Reading the AVRMS register result on each DREADY interrupt. Reading the AWATTHR_HI register result at every EGYRDY interrupt. 15326-015  The register and the interrupt can be selected from their respective boxes in the window. The number of desired register reads is entered in the No. of interrupts field. Click Read on interrupts at this point to perform the read operation. The results are available in the Read-back values table. Click Save data to a file to save the readback values. Figure 14 shows the window when the Read on Interrupt tab is selected. Figure 14. Read on Interrupt Tab in the Read/Write registers Window Rev. 0 | Page 12 of 31 EVAL-ADE9000EBZ User Guide UG-1082 POWERS AND ENERGIES The next functionality available in the evaluation software is powers and energies, located in the Powers and Energies window. This window contains the Powers, Energies, and CF tabs. Powers Tab 15326-016 The Powers tab allows the user to read from all the instantaneous powers and accumulated powers available in the ADE9000. Before evaluating the accumulated powers, it is recommended to set the Power update rate (ms) field and click Set. This action writes to the PWR_TIME register accordingly. Figure 15 shows the window when the Powers tab is selected in the evaluation software. The signal path for the independent current and voltage channels is found in the RMS Window section. Note that the update continuously option must be disabled before writing a value to any register. Figure 15. Powers Tab in the Powers and Energies Window Rev. 0 | Page 13 of 31 UG-1082 EVAL-ADE9000EBZ User Guide Energies Tab 15326-017 The Energies tab allows the user to set the EP_CFG register and the EGY_TIME register correctly and to read the energy results from the ADE9000. Figure 16 shows the Energies tab. In the ENERGY SETTINGS pane, there are different options available for the user, such as the Accumulation Setting, which, when turned on, can be further specified using the Sample-based or Half-Line Cycle options. Select the Enable accumulation box to overwrite the user energy register at every EGYRDY bit interval (EGY_LD_ACCUM = 1). After all inputs are populated, click Set to write to the registers appropriately. Then, select the Enable energy/power calculations box and click Set. The ENERGY pane displays the energy results. Note that the Update continuously option must be disabled before writing a value to any register. Figure 16. Energies Tab in the Powers and Energies Window Rev. 0 | Page 14 of 31 EVAL-ADE9000EBZ User Guide UG-1082 CF Tab 15326-018 The CF tab allows the user to configure the CF1 to CF4 pins of the ADE9000. There is a wide range of configurability available in the ADE9000 with respect to the functionality of the CF1 to CF4 pins. Some of the major settings that affect the CF1 to CF4 pins results include the phases enabled in each CF1 to CF4 pin, the type of energy represented, and the CF1DEN to CF4DEN register values. These settings can be set using the CF tab, as shown in Figure 17. There are additional functionalities muxed onto the CF3 and CF4 pins, which can also be controlled using this tab. Common threshold settings such as WTHR, VARTHR, and VATHR can also be set in the COMMON SETTINGS pane of the CF tab. The CF1 to CF4 low pulse widths can be fixed at a particular value by enabling the corresponding check boxes for each of the CF1 to CF4 pins and setting a value for the CF_LTMR[18:0] bit field to execute this pulse width setting. Figure 17. CF Tab in the Powers and Energies Window Rev. 0 | Page 15 of 31 UG-1082 EVAL-ADE9000EBZ User Guide RMS WINDOW There are individual tabs present for each of the voltage and current channels. Under each of these tabs, there are multiple subtabs. The IA and VA tabs are shown in Figure 19 and Figure 20, respectively. The VB and VC datapaths are very similar to the VA datapath; the IB and IC datapaths are very similar to the IA datapath. To enable or disable the Multi-point Gain and Phase calibration, click Disabled. The state of this option controls the multi-point gain and phase register accessibility. 15326-019 The RMS window allows the user to visualize the datapath inside the ADE9000, configure the high-pass filter, integrator, programmable gain amplifier (PGA) gain levels, ADC_REDIRECT register values, VCONSEL and ICONSEL settings, and view the results. To perform the configuration changes, enter the changes to the respective boxes in the window and click Write, located in the bottom right corner of the signal path, as shown in Figure 19. The different gain and offset registers can also be accessed via the tabs within this window. There are several tabs within the RMS window. The first tab is the Continuous monitor tab, shown in Figure 18. The current and voltage rms results are shown separately on the screen. 15326-020 Figure 18. Continuous monitor Tab in the RMS Window Figure 19. IA Tab (Total RMS Subtab) in the RMS Window Rev. 0 | Page 16 of 31 UG-1082 15326-021 EVAL-ADE9000EBZ User Guide Figure 20. VA Tab (Total RMS Subtab) in the RMS Window WAVEFORM BUFFER WINDOW 15326-023 The Waveform Buffer window has two panes. The upper pane of the window controls the different settings of the waveform buffer. Settings such as the operation mode, specifying which channels burst, the source of the waveforms, and the number of samples to be collected are selected from this upper pane of the window. After all the settings are entered, click Run to start the filling process of the buffer. When the filling is complete, the buffer samples are plotted in the time domain under the Waveforms tab. Figure 21 shows the Waveform Buffer window with the Waveforms tab selected. Figure 22. FFT Tab in the Waveform Buffer Window 15326-022 When the FFT tab is selected, the window appears as shown in Figure 22. The FFT of all the waveforms is computed and plotted automatically based on the waveforms. The window allows the user to save the waveform and FFT data into a text file. The waveform and FFT display images can be saved to a .bmp file as well. Figure 21. Waveforms Tab in the Waveform Buffer Window Rev. 0 | Page 17 of 31 UG-1082 EVAL-ADE9000EBZ User Guide ANGLE WINDOW 15326-024 The Angle window is shown in Figure 23. This window allows the user to visualize the angles of three voltage and three current channels with respect to each other. In the Angle register readings pane, all nine angle register values are displayed. Using these register results, the angles are computed in degrees and displayed in their respective boxes. The dial to the right of the screen provides a phasor-like representation of the six signals. The frequency values are displayed below the dial. These values are computed from the COM PERIOD and APERIOD register values. The Angle window does not require the user to perform a write. The user can save the values in the window to a file, perform a single read of the screen quantities, or perform a continuous update of the quantities using the respective options in the window. Figure 23. Angle Window Rev. 0 | Page 18 of 31 EVAL-ADE9000EBZ User Guide UG-1082 QUICK STARTUP WINDOW The Configuration tab accepts the user response on a few parameters and selects the appropriate VCONSEL[2:0] and ICONSEL[0] settings for the user. The Input circuitry tab can be used as a quick calculator for determining if the input signal exceeds the current channel and the voltage channel ADCs inside the ADE9000. By feeding in the system parameters and input signals, along with the PGA setting, the software calculates the signal level at the ADCs. If the signal level exceeds the full-scale range of the ADCs, the indicator turns red. This indication signals to the user that the system parameters must be adjusted. 15326-025 There are three tabs within the Quick Startup window: the Configuration tab, the Input circuitry tab, and the Startup procedure tab. The Startup procedure tab is the main tab that performs the quick start-up routine, as well as all the necessary initializations. However, before the start-up routine and the initializations, make sure that the inputs are operating in the correct 3-phase configuration and that they are not overranging the ADCs. Figure 24. Configuration Tab in the Quick Startup Window 1. 2. 3. 4. 5. 6. 7. 8. Sets the PGA for all channels. Sets SELFREQ and VLEVEL. Enables the integrator and sets DICOEFF. This step is skipped for everything except the di/dt sensor. Enables the DSP. Disables the CF1 to CF4 pin outputs, enables the energy and powers functionality, and reads all the energy registers on reset. Performs a quick gain calibration and obtains calibration conversion constants, such as V/LSB, A/LSB, and Wh/LSB. Obtains the CF1DEN to CF4DEN values from the Meter constant and writes these values to the registers. Enables the CF1 and CF2 pins and configures them such that the CF1 pin denotes the sum of all the total active energy of the phases and the CF2 pin denotes the sum of all the total reactive energy phases. 15326-026 The Startup procedure tab performs the following initialization steps, which must be completed sequentially (see Figure 26): Figure 25. Input Circuitry Tab in the Quick Startup Window 15326-027 These steps must be performed sequentially. The user must click the options in each step to perform the operation. Figure 26. Startup Procedure Tab in the Quick Startup Window Rev. 0 | Page 19 of 31 UG-1082 EVAL-ADE9000EBZ User Guide INTERRUPTS WINDOW To view the IRQ0 and IRQ1 pin logic level, click Check IRQx pin logic state. If the LED is lit, this means that the pin is in a logic low state. Click Auto Clear to reset the interrupts available on the pins on the fly. The IRQ0 and IRQ1 pins can be monitored on a scope to understand the rate at which the interrupts are being set. The Route all events to IRQ1 pin option sets the configuration bit that routes all interrupt events to be accessible via the IRQ1 pin. 15326-028 The Interrupts window displays the status of all the interrupt events. The individual bits of the STATUS0 and STATUS1 registers are shown as green LEDs in the window (see Figure 27). If the LED is lit, it indicates that the corresponding status bit is set to 1. Next to each of the LEDs, a checkbox represents the corresponding MASK0 and MASK1 bits. If the MASK1 and MASK0 bits must be set, select the corresponding checkbox and click Write Mask Registers. Click Write ‘1’ to all set status bits to reset all status bits simultaneously. If specific values must be written to the status bits, write to the bits using the controls under the Write to STATUSx registers option on the screen. Figure 27. Interrupts Window Rev. 0 | Page 20 of 31 EVAL-ADE9000EBZ User Guide UG-1082 POWER QUALITY WINDOW The Power Quality window allows the user to access all the power quality features of the ADE9000. The window is subdivided into the Voltage monitor, Current monitor, and Power Factor and THD tabs. Voltage Monitor Tab Current Monitor Tab The Current monitor tab is shown in Figure 29. This tab is organized in the same way as the Voltage monitor tab. The IPEAK, ZX, and OI power quality features are accessible in this tab. 15326-029 The Voltage monitor tab is shown in Figure 28. This tab evaluates the DIP, SWELL, ZX & ZXTOUT, VPEAK, and PHASE SEQUENCE ERROR DETECTION features. This tab allows the user to configure all the control inputs for the features and to monitor the status bits as LEDs. The corresponding mask bits can also be set using the checkboxes in the tab. Figure 29. Current monitor Tab in the Power Quality Window Rev. 0 | Page 21 of 31 15326-030 14345-031 Figure 28. Voltage monitor Tab in the Power Quality Window UG-1082 EVAL-ADE9000EBZ User Guide 14345-031 The Power Factor and THD tab is shown in Figure 30. This window reads all the power factor and total harmonic distortion (THD) register results from the device, converts these results to meaningful results, and displays them. Figure 30. Power Factor and THD Tab in the Power Quality Window Rev. 0 | Page 22 of 31 15326-031 Power Factor and THD Tab EVAL-ADE9000EBZ User Guide UG-1082 TROUBLESHOOTING If this message appears, take the following steps: If the software does not detect the SDP-B board, the message shown in Figure 31 is displayed. 1. 15326-033 2. 3. Verify that the SDP-B board is connected to the PC using the USB cable. The window in Figure 32 appears on the task bar; Windows then installs any other necessary drivers. After the installation is complete, click Rescan. When another window appears, check if the LED on the board is flashing; if so, click Select. 15326-032 Figure 32. Installing device driver software Message Figure 31. Hardware Select Message Rev. 0 | Page 23 of 31 C6 A A C Figure 33. Evaluation Board Schematic—ADE9000 CF2 750ΩΩ CF2 C3 C CF3/ZX R1 DS3 CF4/EVENT 1 2 3 IRQ0B AGND AGND 1 BLK IRQ1B AGND9 BLK LDO_5.0V_ISO VDD_5.0V_ISO 1 AGND VDD JP3 22-03-2031 EXT_VDD_5.0V_ISO EXT_5V ORG 1 C IRQ1B 1 AGND AGND6 C IRQ0B CF4/EVENT PJ-002AH-SMT DC BARREL JACK 16V MAX P1 CF3/ZX A CF1 C7 OUTPUT LED CIRCUIT R3 CF1 R2 0.1µF AGND 750Ω C4 4.7µF R4 DVDD AGND 0.1µF DIGITAL LDO DECOUPLING 750Ω 1 R6 4.7µF 750Ω 1.5SMC15AT3G AGND 750Ω AVDD 750Ω CR2 A C R7 1 2 3 VDD 1 AGND BLK AGND5 DS4 C DS2 DS1 C LDO_5.0V_ISO LDO_ISO ORG JP6 2 DNI AGND 69157-102HLF 1 AGND RESET PM0 DUT SIDE LDO 1 AGND PM1 1 1µF AGND8 BLK C11 1 AGND C13 AGND7 BLK 10µF 4 PAD EP AGND VDD VDD RED AGND 1 AGND 0Ω R11 AGND 0.1µF ADR3412ARJZ DS5 1 GND_FORCE 4 VIN 3 ENABLE CLKOUT CLKIN GND VDD AGND AVDDOUT VCP VCN VBP VBN AGND GND_SENSE 2 U2 DNI AGND 0Ω R10 CLKOUT CLKIN S1 3 4 B3S1000 1 2 1 0 JP1 0.1µF 2 DNI RESET CIRCUIT AGND AVDD VCP VCN VBP VBN MCU_VDD AGND 1 IRQ0B 1 IRQ1B 1 CF1 1 CF2 VDD 1 CF3/ZX PLACE C35, C36 AS CLOSE TO DUT PIN 17 AS POSSIBLE 0.1µF 6 VOUT_FORCE 5 VOUT_SENSE DNI MCU_VDD 30 29 28 27 26 25 24 23 22 21 ADE9000 U9 IRQ0B IRQ1B CF1 CF2 CF3/ZX AGND REFERENCE DECOUPLING AND EXTERNAL REF AGND GND U1 ADM7150ACPZ-3.3 1 VREG 2 3 BYP VOUT 5 7 EN REF_SENSE 8 6 VIN REF VPP DGND DVDDOUT PM0 PM1 RESET IAP IAN IBP IBN CSB MOSI 1 2 DVDD 3 PM0 4 PM1 5 RESET 6 IAP 7 IAN 8 IBP 9 IBN 10 1 1 MCU_VDD AGND CSB MOSI C15 MISO 1µF ANALOG LDO DECOUPLING 10µF C12 1 1µF C9 ICP ICN INP INN 10µF REFIN 0.1µF MISO C2 1 C14 PAD 40 39 38 37 36 35 34 33 32 31 PAD CSB MOSI MISO SCLK CF4/EVENT CF3/EVENT CF2 CF1 IRQ1 IRQ0 ICP ICN INP INN REFGND REFIN NC1 NC2 VAN VAP VAN VAP 10µF C26 499 R5 A DNI A C8 A DNI 0.1µF SCLK DNI 1 R15 SCLK 10kΩ 11 12 13 14 15 16 17 18 19 20 C5 Rev. 0 | Page 24 of 31 C17 CLKOUT CLKIN 4.7µF REFIN RESET 1µF VDD C18 0Ω R12 1 1 24.576MHz XTAL CIRCUIT 16PF C20 16PF C19 AGND AGND2 BLK AGND AGND4 BLK 1 1 AGND AGND1 BLK AGND AGND3 BLK EXTRA GROUND TP FOR PROBING Y1 CF4/EVENT 0Ω CF4/EVENT 1 DNI R13 PS CONNECTIONS C16 1 2 C AGND C1 0.1µF VDD C21 CMD28-21VGCTR8T1 AGND AGND TP5 CF3/ZX CF3/ZX CF4/EVENT 10µF CR1 ADUC IRQ0B MISO RESET CF1 CF2 VDD MOSI IRQ1B CSB SCLK INTERFACE TP6 PM0 PM1 1 A 1 1 2 C10 P7 PEC10DAAN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 UG-1082 EVAL-ADE9000EBZ User Guide EVALUATION BOARD SCHEMATICS AND ARTWORK DS6 15326-038 IAN_IN BLU R1A IBN_IN BLU IBN YEL IBP_IN 1 NEUTRAL AGND WHT E3AP 1500Ω 1 VIOLET VAP_IN 1 VAP 2 VOLTAGE CHANNELS 1 1 IBP AT 8MHZ 60.87 DB ATTEN AT 4MHZ 54.80 DB ATTEN AT 2MHZ 48.83 DB ATTEN AT 1MHZ 42.81 DB ATTEN 1kΩ AND .022µF = 7.234KHZ CORNER 1 IAN IAP_IN TBD1206 TBD1206 1 E1A 1 330kΩ 330kΩ BRN VAN R8A R7A 330kΩ R9A PHASE A VOLTAGE 1500Ω 2 TS4148 RZ DNI E2B 1 2 TS4148 RZ E1B 1500Ω DNI 1 1500Ω 2 TS4148 RZ DNI E2A 1 2 TS4148 RZ 1500Ω DNI TBD1206 R2A R1B R2B C VAN VAP TS4148 RZ TS4148 RZ PHASE B CURRENT TS4148 RZ TS4148 RZ 1 R6A AGND 0Ω R4B 1kΩ 0Ω VBP_IN E3BP 1500Ω 1 VIOLET VBP 1kΩ R6B 2 AGND R5B R3B 0Ω R4A 1kΩ 0Ω AGND R5A R3A PHASE A CURRENT R11A R10A TBD1206 D4A D3A A C C A C A C1A C2A C1B C2B A D3B D4B 1kΩ 1kΩ 0.022µF 0.022µF 0.022µF 0.022µF 0.022µF 1 330kΩ 330kΩ BRN VBN R8B R7B 1 1 1 ICP INN_IN BLU INN YEL INP_IN INP ICN_IN BLU ICN YEL ICP_IN 330kΩ R9B PHASE B VOLTAGE IBN AGND IBP IAN AGND IAP 1 1 TS4148 RZ E1N 2 2 E2N VBN AGND VBP 1 VIOLET VCP VCP_IN 2 TS4148 RZ TS4148 RZ 1500Ω 1 DNI DNI 1500Ω 1 1500Ω 1 2 TS4148 RZ DNI E2C DNI 1500Ω E1C D3C C A D4C IAP C5A C6A 1kΩ E3CP 1500Ω 1 2 0Ω R4C 1kΩ 0Ω R7C 330kΩ 0 R4N R8C 1 BRN VCN 330kΩ R9C 330kΩ 1kΩ R6N AGND 1kΩ 0 PHASE C VOLTAGE TS4148 RZ TS4148 RZ R5N R3N 1kΩ R6C AGND R5C R3C NEUTRAL CURRENT TS4148 RZ TS4148 RZ PHASE C CURRENT C3C C4C YEL 0.022µF 0.022µF DNI DNI DNI DNI C3A C4A C3B C4B 0.022µF 0.022µF 0.022µF R1C R2C R1N R2N TBD1206 TBD1206 TBD1206 TBD1206 0.022µF 0.022µF 1 1kΩ Rev. 0 | Page 25 of 31 R11B C 1kΩ Figure 34. Evaluation Board Schematic—Current and Voltage Channels C5B A R10B D2B C C6B D1B 0.022µF C 0.022µF C1C C2C C1N C2N C D4N 0.022µF DNI 0.022µF DNI 0.022µF DNI 0.022µF DNI A D3N C A C A A C 1kΩ D2A A R11C A D2N C 1kΩ D1N R10C C A C5C D1A C3N A C C6C D2C C4N A 0.022µF C 0.022µF D1C 0.022µF A 0.022µF CURRENT CHANNELS AGND VCN VCP INN AGND INP ICN AGND ICP EVAL-ADE9000EBZ User Guide UG-1082 15326-037 EEPROM_A0 PM0_ISO CF3_ISO CF1_ISO IRQ0B_ISO RESET_ISO SSB_SDP USB_VBUS 117 4 114 113 112 111 110 109 108 107 106 105 104 7 8 9 10 11 12 13 14 15 16 17 100 99 98 97 96 95 94 93 21 22 23 24 25 26 27 28 R33 EEPROM_A0 R34 R31 R35 R32 DNI ID EEPROM PM1_ISO CF4_ISO CF2_ISO IRQ1B_ISO SCL SDA SCLK_SDP MISO_SDP MOSI_SDP SCLK_ISO MOSI_ISO SSB_ISO SPORT_RFS/PPI_D1 VIO_SDP 60 FX8-120S-SV(21) 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 DNI SSB_ISO 1 WP SCL SDA A1 A2 VSS VCC PAD U3 R36 R37 5 6 7 8 4 D_FRAME Y U5 D_FRAME_SYNC SSB_ISO D_FRAME DNI VIO_SDP SPORT_RSCLK/PPI_D2 A0 PAD GND 3 5 VCC TAP5 TAP4 TAP3 TAP2 TAP1 5 3 6 2 7 U4 D GND CLK SDA SCL VIO_SDP 0Ω Q VCC DNI 0Ω R46 0Ω R45 DNI 0Ω R23 0Ω R22 DNI 0Ω R21 D_FRAME 4 5 DCLK_ISO SCLK_ISO SPORT_RFS/PPI_D1 D_FRAME_SYNC 6 LDO_3.3V_SDP 0Ω R20 0Ω R19 0Ω R18 0Ω R17 R16 CLR_N U6 DNI DNI DNI DNI SN74LVC1G175DCKR 3 2 1 GND 4 DS1100LU-30+ 8 VCC BYPASS DELAYED FRAME IF NEEDED NC7SZ04P5X DCLK_ISO 2 A IN LDO_3.3V_SDP LDO_3.3V_SDP 24LC32A-I/MC 4 3 2 1 FX8-120S-SV(21) 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 101 20 MISO_ISO 102 19 29 103 18 SPORT_RSCLK/PPI_D2 115 6 116 118 3 VIO_SDP 119 2 5 P9 120 USB_VBUS 10µF C24 0.1µF C25 .1µF C23 0 DNI R24 8 7 6 5 4 3 2 LDO_3.3V_SDP LDO_3.3V_SDP LDO_3.3V_SDP C27 0.1µF C29 0.1µF C28 0.1µF 13 12 11 CF2_ISO CF1_ISO PM0_ISO PM1_ISO 9 10 11 12 13 IRQ1B_ISO IRQ0B_ISO 14 15 16 CF4_ISO SI GND2 DCLK GND1 VIB GND2 VIB VE1 GND1 VE2 GND2 11 12 13 14 15 16 17 18 19 20 8 7 5 IRQ0B 6 PM1 DUT SIDE AGND 10µF C31 VDD_5.0V_ISO AGND AGND AGND VDD 10µF C34 AGND AGND AGND 0.1µF C37 VDD VDD FROM SHEET 3 AGND VDD 0.1µF C36 VDD FROM SHEET 3 AGND 0.1µF C35 VDD FROM SHEET 3 AGND AGND VDD_5.0V_ISO VDD_5.0V_ISO TO SHEET 3 AGND 0.1µF C30 VDD_5.0V_ISO TO SHEET 3 RESET CSB MISO MOSI SCLK 3 CF4/EVENT 4 IRQ1B 2 1 8 7 5 CF1 6 PM0 3 CF3/ZX 4 CF2 2 1 ADUM3401CRWZ VOD VIC VID VOC VOB VIA VDD1 GND1 GND2 VOA VDD2 ADUM3401CRWZ VE1 GND1 VE2 VIC VOD VID VOC VOB VIA GND1 GND2 VOA VDD1 VDD2 ADUM3150ARSZ VIB NIC VOB VOA SSS_N SO VIA MSS_N MI MO SCLK GND2 GND1 MCLK 9 10 11 12 13 14 15 U8 VDD2 U11 9 10 14 15 CF3_ISO GNDISO VISO NC NC VSEL NC VDD1 U10 16 10 9 8 7 RESET_ISO DCLK_ISO 6 5 4 3 SSB_ISO MISO_ISO MOSI_ISO SCLK_ISO 2 1 *IMPLEMENT MULTIPLE VIAS FROM THE EXPANDED GND PADS TO THE GROUND PLANE. VISO 16 U7 GNDISO ADUM5000ARWZ GND1 VDD1 RCSEL RCOUT RCIN NC GND1 VDD1 *IMPLEMENT EXPANDED GND PADS. CONNECT PINS 2,3 TO A BIG GND PAD TO DISSIPATE HEAT THROUGH GND PLANE. SAME WITH 14, 15. *DECOUPLING CAPS LESS THAN 10mm FAR FROM POWER PINS USB_VBUS 10µF C22 10kΩ 10kΩ 1 1 SPI ISOLATOR R27 USB_VBUS R25 R26 10kΩ SDP SIDE R28 P9 0Ω 100kΩ LDO_3.3V_SDP SDP SIDE LDO USB_VBUS RED VBUS 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 TSW-116-08-G-D P2 1 USB_VBUS 10µF C39 DELAY FRAME 10kΩ 499Ω 499Ω 1µF C40 SDP INTERFACE 100kΩ 0Ω 100kΩ Rev. 0 | Page 26 of 31 0Ω Figure 35. Evaluation Board Schematic—SDP-B Interface and Isolation 100kΩ C38 DEVICE INTERFACE HEADER R29 R30 C RESET_ISO IRQ0B_ISO IRQ1B_ISO CF4_ISO CF1_ISO CF2_ISO CF3_ISO EP 1 1 1µF BLK DGND3 BLK CF4_ISO CF1_ISO CF2_ISO CF3_ISO BLK 1 DGND1 DGND2 PAD SCLK_ISO MISO_ISO MOSI_ISO SSB_ISO PM1_ISO PM0_ISO 4 GND U12 ADM7150ACPZ-3.3 1 VREG 3 2 BYP VOUT 7 5 EN REF_SENSE 8 6 VIN REF 10µF CMD67-21UBC/TR8 (BLUE) 1 CR9 1 CMD28-21VGCTR8T1 A 1 C C41 CR8 3.3V 1 DGND BLK 1 ORG LDO_3.3V_SDP 10µF A 1 UG-1082 EVAL-ADE9000EBZ User Guide 15326-039 C42 UG-1082 15326-034 EVAL-ADE9000EBZ User Guide 15326-035 Figure 36. Evaluation Board Silkscreen Figure 37. Layout of the Top Layer of the Evaluation Board Rev. 0 | Page 27 of 31 EVAL-ADE9000EBZ User Guide 15326-036 UG-1082 Figure 38. Layout of the Bottom Layer of the Evaluation Board Rev. 0 | Page 28 of 31 EVAL-ADE9000EBZ User Guide UG-1082 ORDERING INFORMATION BILL OF MATERIALS Table 1. 1 Reference Designator Not applicable 3.3 V, EXT_5V, LDO_ISO DGND, AGND1 to AGND9, DGND1 to DGND3 C1, C5 to C7, C26 C2, C11, C13, C15, C21, C22, C24, C31, C34, C38, C40, C42 C12, C14, C16, C39, C41 C17 3 C3, C4, C18 2 C19, C20 9 C23, C25, C27 to C30, C35 to C37 C3A to C6A, C3B to C6B, C3C to C6C, C3N, C4N CF1, CF2, CS, PM0, PM1, TP5, TP6, MISO, MOSI, SCLK, IRQ0, IRQ1, CF3/ZX, RESET , CF1_ISO to CF4_ISO, CF4/EVENT CR1, CR8 CR2 CR9 Qty 1 3 13 5 12 5 14 19 2 1 1 16 4 4 1 D1A to D4A, D1B to D4B, D1C to D4C, D1N to D4N DS1 to DS6 E1A, E1B, E1C, E1N, E2A, E2B, E2C, E2N, E3AP, E3BP, E3CP IAN, IBN, ICN, INN IAP, IBP, ICP, INP JP3 1 1 NEUTRAL P1 1 P7 6 11 Description Printed circuit board (PCB) Connector; PCB test point, orange Value1 N/A Orange Tolerance (Ω)1 N/A N/A Voltage (V)1 N/A N/A Part Number 08_039712c TP104-01-03 Connector; PCB test point, black Black N/A N/A TP-104-01-00 Capacitor, ceramic, chip, X8R Capacitor, ceramic, monolithic, X7R 0.1 µF 10 µF 10 10 25 25 C1608X8R1E104K GRM31CR71E106KA12L Capacitor, ceramic, chip, 1206, X7R Capacitor, ceramic, X7R, 0402 1 µF 10 35 GMK316B7105KL-T 0.1 µF 10 16 Capacitor, monolithic, ceramic, X5R Capacitor, chip, monolithic, ceramic, C0G, 0402 Capacitor, ceramic, X7R 4.7 µF 10 6.3 GRM155R71C104KA88D GRM188R60J-475KE19 16 pF 5 50 GJM1555C1H160JB01D 0.1 µF 10 10 0306ZC104KAT2A Capacitor, ceramic, multilayer, C0G 0.022 µF 5 50 C2012C0G1H223J Connector; PCB test point, gray Gray N/A N/A TP104-01-08 Diode, LED, green, SMD Diode, Zener TVS LED, blue, surface-mount N/A N/A N/A 2.1 15 4.5 CMD28-21VGCTR8T1 1.5SMC15AT3G CMD67-21UBC/TR8 Diode, high speed switching CMD28-21VGCTR8T1 1.5SMC15AT3G CMD67-21UBC/TR8 (blue) TS4148 RZ N/A 100 TS4148 RZ LED red, surface-mount Inductor, chip, ferrite bead, 0805 LNJ208R8ARA (red) 1500 Ω N/A 25 2.5 N/A LNJ208R8ARA BLM21BD152SN1D Connector; PCB test point, blue Connector; PCB test point, yellow Connector; PCB header, 2.54 mm, 3 position, vertical Connector; PCB test point, white Connector; PCB, use E022246 for 4-pin power jack from the CN4P_V6 folder Connector; PCB BERG header, ST male, 20-pin Blue Yellow 22-03-2031 N/A N/A N/A N/A N/A N/A TP104-01-06 TP-104-01-04 22-03-2031 White PJ-002AH-SMT N/A N/A N/A N/A TP-104-01-09 PJ-002AH-SMT PEC10DAAN N/A N/A PEC10DAAN Rev. 0 | Page 29 of 31 UG-1082 Qty 1 Reference Designator P9 3 R1, R29, R30 6 4 5 R10A, R10B, R10C, R11A, R11B, R11C R11, R12, R19, R23 R15, R25 to R28 6 R2 to R7 4 R33 to R35, R37 9 1 2 R3A, R3B, R3C, R3N, R46, R4A, R4B, R4C, R4N R5A, R5B, R5C, R5N, R6A, R6B, R6C, R6N R7A to R9A, R7B to R9B, R7C to R9C S1 U1, U12 2 U10, U11 1 1 U3 U4 1 1 U5 U6 1 U7 1 U8 1 U9 3 3 2 1 VAN, VBN, VCN VAP, VBP, VCP VDD, VBUS Y1 8 9 1 EVAL-ADE9000EBZ User Guide Value1 FX8-120S-SV(21) Tolerance (Ω)1 N/A Voltage (V)1 N/A Part Number FX8-120S-SV(21) 499 1 N/A ERJ-8ENF4990V 1 kΩ 0.1 N/A ERA-3YEB102V Resistor, thick film, chip Resistor, precision, thick film, chip, R0805 Resistor, precision, thick film, chip, R0805 Resistor, precision, thick film, chip, R0805 Resistor, film, SMD, 0603 0 10 kΩ 1 N/A N/A ERJ-6GEY0R00V ERJ-6ENF1002V 750 1 N/A ERJ-6ENF7500V 100 kΩ 1 N/A ERJ-6ENF1003V 0 5 N/A ERJ-3GEY0R00V Resistor, precision, thick film, chip, R0603 Resistor, high voltage, thin film, flat chip SW SM mechanical keyswitch Analog Devices, Inc. IC, 800 mA, ultralow noise, high PSRR, RF linear regulator (3.3 V output) Analog Devices IC, quad-channel digital isolator IC, 32 kB, I2C serial EEPROM IC, 3.3 V to 5-tap economy timing element IC, tiny logic UHS inverter IC-TTL, single D-type flip-flop with asynchronous clear Analog Devices IC, 2.5 kV, isolated dc-to-dc converter Analog Devices IC, 3.75 kV, 6channel, SPIsolator® digital isolator for SPI with delay clock Analog Devices IC, high performance, polyphase, energy metering AFE Connector; PCB test point, brown Connector; PCB test point, violet Connector; PCB test point, red IC, crystal SMD, low profile 1 kΩ 1 N/A ERJ-3EKF1001V 33 kΩ 0.1 N/A TNPV1206330KBEEN B3S1000 N/A N/A N/A N/A N/A B3S1000 ADM7150ACPZ-3.3 N/A N/A ADuM3401CRWZ 24LC32A-I/MC DS1100LU-30+ N/A N/A 2.7 to 5.5 N/A N/A NC7SZ04P5X SN74LVC1G175DCKR N/A N/A N/A N/A NC7SZ04P5X SN74LVC1G175-DCKR N/A N/A N/A ADuM5000ARWZ N/A N/A N/A ADuM3150ARSZ N/A N/A N/A ADE9000 Brown Violet Red 24.576 MHz N/A N/A N/A N/A N/A N/A N/A N/A TP104-01-01 TP104-01-07 TP-104-01-02 ABLS-24.576MHZ-8-L4QF-T Description Connector; PCB, board to board receptacle, ST, 0.6 mm pitch Resistor, precision, thick film, chip, R1206 Resistor, film, SMD, 0603 N/A means not applicable. Rev. 0 | Page 30 of 31 24LC32A-I/MC DS1100LU-30+ EVAL-ADE9000EBZ User Guide UG-1082 NOTES I2C refers to a communications protocol originally developed by Philips Semiconductors (now NXP Semiconductors). ESD Caution ESD (electrostatic discharge) sensitive device. Charged devices and circuit boards can discharge without detection. Although this product features patented or proprietary protection circuitry, damage may occur on devices subjected to high energy ESD. Therefore, proper ESD precautions should be taken to avoid performance degradation or loss of functionality. Legal Terms and Conditions By using the evaluation board discussed herein (together with any tools, components documentation or support materials, the “Evaluation Board”), you are agreeing to be bound by the terms and conditions set forth below (“Agreement”) unless you have purchased the Evaluation Board, in which case the Analog Devices Standard Terms and Conditions of Sale shall govern. Do not use the Evaluation Board until you have read and agreed to the Agreement. Your use of the Evaluation Board shall signify your acceptance of the Agreement. This Agreement is made by and between you (“Customer”) and Analog Devices, Inc. (“ADI”), with its principal place of business at One Technology Way, Norwood, MA 02062, USA. Subject to the terms and conditions of the Agreement, ADI hereby grants to Customer a free, limited, personal, temporary, non-exclusive, non-sublicensable, non-transferable license to use the Evaluation Board FOR EVALUATION PURPOSES ONLY. Customer understands and agrees that the Evaluation Board is provided for the sole and exclusive purpose referenced above, and agrees not to use the Evaluation Board for any other purpose. Furthermore, the license granted is expressly made subject to the following additional limitations: Customer shall not (i) rent, lease, display, sell, transfer, assign, sublicense, or distribute the Evaluation Board; and (ii) permit any Third Party to access the Evaluation Board. As used herein, the term “Third Party” includes any entity other than ADI, Customer, their employees, affiliates and in-house consultants. The Evaluation Board is NOT sold to Customer; all rights not expressly granted herein, including ownership of the Evaluation Board, are reserved by ADI. CONFIDENTIALITY. This Agreement and the Evaluation Board shall all be considered the confidential and proprietary information of ADI. Customer may not disclose or transfer any portion of the Evaluation Board to any other party for any reason. Upon discontinuation of use of the Evaluation Board or termination of this Agreement, Customer agrees to promptly return the Evaluation Board to ADI. ADDITIONAL RESTRICTIONS. Customer may not disassemble, decompile or reverse engineer chips on the Evaluation Board. Customer shall inform ADI of any occurred damages or any modifications or alterations it makes to the Evaluation Board, including but not limited to soldering or any other activity that affects the material content of the Evaluation Board. Modifications to the Evaluation Board must comply with applicable law, including but not limited to the RoHS Directive. TERMINATION. ADI may terminate this Agreement at any time upon giving written notice to Customer. Customer agrees to return to ADI the Evaluation Board at that time. LIMITATION OF LIABILITY. THE EVALUATION BOARD PROVIDED HEREUNDER IS PROVIDED “AS IS” AND ADI MAKES NO WARRANTIES OR REPRESENTATIONS OF ANY KIND WITH RESPECT TO IT. ADI SPECIFICALLY DISCLAIMS ANY REPRESENTATIONS, ENDORSEMENTS, GUARANTEES, OR WARRANTIES, EXPRESS OR IMPLIED, RELATED TO THE EVALUATION BOARD INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, TITLE, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT OF INTELLECTUAL PROPERTY RIGHTS. IN NO EVENT WILL ADI AND ITS LICENSORS BE LIABLE FOR ANY INCIDENTAL, SPECIAL, INDIRECT, OR CONSEQUENTIAL DAMAGES RESULTING FROM CUSTOMER’S POSSESSION OR USE OF THE EVALUATION BOARD, INCLUDING BUT NOT LIMITED TO LOST PROFITS, DELAY COSTS, LABOR COSTS OR LOSS OF GOODWILL. ADI’S TOTAL LIABILITY FROM ANY AND ALL CAUSES SHALL BE LIMITED TO THE AMOUNT OF ONE HUNDRED US DOLLARS ($100.00). EXPORT. Customer agrees that it will not directly or indirectly export the Evaluation Board to another country, and that it will comply with all applicable United States federal laws and regulations relating to exports. GOVERNING LAW. This Agreement shall be governed by and construed in accordance with the substantive laws of the Commonwealth of Massachusetts (excluding conflict of law rules). Any legal action regarding this Agreement will be heard in the state or federal courts having jurisdiction in Suffolk County, Massachusetts, and Customer hereby submits to the personal jurisdiction and venue of such courts. The United Nations Convention on Contracts for the International Sale of Goods shall not apply to this Agreement and is expressly disclaimed. ©2017 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. UG15326-0-1/17(0) Rev. 0 | Page 31 of 31
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