EVAL-ADF7021-NDBIZ

EVAL-ADF7021-NDBIZ

  • 厂商:

    AD(亚德诺)

  • 封装:

    -

  • 描述:

  • 数据手册
  • 价格&库存
EVAL-ADF7021-NDBIZ 数据手册
ߛႠీ ቏‫ټ‬๭݀ഗIC ADF7021-N  ༬Ⴀ ೌాण‫ׯ‬VCOࢅၭຕN‫ݴ‬ೕ໮၎࣍DŽPLLDž ೌాण‫ׯ‬7࿋ADCࢅ࿒‫ߌد܈‬ഗ ඇጲ‫ۯ‬ೕ୲੦዆࣍ୟDŽAFCDž ຕጴথ๭႑ࡽഽ‫܈‬ኸ๖DŽRSSIDž ण‫ׯ‬๭݀DŽTx/RxDžਸ࠲ ู‫ۉ‬ఇ๕ူႅ୑‫ྺୁۉ‬0.1 μA ‫ࡼࠀگ‬Ă቏‫ټ‬๭݀ഗ ૧ᆩມVCO‫ڦ‬ೕ‫ྷݔټ‬ǖ 80 MHz዁650 MHz 842 MHz዁916 MHz ੗Պ‫ײ‬ዐೕ୳հഗ‫ྺ੻ټ‬9 kHzĂ13.5 kHzࢅ18.5 kHz ۙ዆‫ݛ‬๕ǖ2FSKĂ3FSKĂ4FSKĂMSK ೕ೷ኝႚ‫ݛ‬๕ǖߛຯࢅืᇆ၀୳հ ኧ‫ڦ׼‬ຕ਍໏୲ǖ0.05 kbps዁24 kbps 2.3 V዁3.6 V‫ۉ‬ᇸࠃ‫ۉ‬ ੗Պ‫ײ‬๼‫୲ࠀ؜‬: -16 dBm዁+13 dBmLj63߲օ‫ޗ‬ ጲ‫ٷݣ୲ࠀۯ‬ഗDŽPADžၽೢ੦዆ থ๭ऐଳ௺‫܈‬: 100 bpsĂ2FSK้−130 dBm 1 kbpsĂ2FSK้-122 dBm ኟሞฤ൩ጆ૧‫ాೌڦ‬৥ၟᅞ዆ၯጚ ᆌᆩ ቏‫܌ټ‬ਐ૗࿮၍‫ۉ‬ཚ႑ยԢDŽSRDDžՔጚǖ ARIB STD-T67ĂETSI EN 300 220ĂࡣࡔSRDՔጚĂ FCC Part 15ĂFCC Part 90ĂFCC Part 95 ‫ׯگ‬Ԩ࿮၍ຕ਍‫د‬๼ ᇺ‫ײ‬੦዆/Ҿඇဣཥ ࿮၍ऺଉ ࿮၍ᅅଐᄫ֪‫ޜ‬ခDŽWMTSDž ॆབྷጲ‫ࣅۯ‬ ࡗ‫୍ࢅײ‬ᇔ੦዆ ლࢬऐ ࠀీ઀཮ CE RSET TEMP SENSOR RLNA MUX 7-BIT ADC 2FSK 3FSK 4FSK LNA RFIN RSSI/ LOG AMP IF FILTER RFINB CREG(1:4) MUXOUT LDO(1:4) TEST MUX CLOCK AND DATA RECOVERY DEMODULATOR TxRxCLK Tx/Rx CONTROL TxRxDATA SWD GAIN AGC CONTROL SLE SERIAL PORT AFC CONTROL PA RAMP DIV P VCO1 VCO2 VCOIN SCLK GAUSSIAN/ RAISED COSINE FILTER 3FSK ENCODING CP PFD DIV R L2 2FSK 3FSK 4FSK MOD CONTROL Σ-Δ MODULATOR ÷2 MUX L1 N/N + 1 SREAD CPOUT OSC OSC1 OSC2 CLK DIV CLKOUT 07246-001 ÷1/÷2 RFOUT SDATA ཮1 Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2008 Analog Devices, Inc. All rights reserved. ADIዐ࿔Ӳຕ਍๮֩๟ᆈ࿔Ӳຕ਍๮֩‫ڦ‬ᅳ࿔Lj৤൩ଌ঴‫݋‬ᅳዐ੗ీ٪ሞ‫ڦ‬ᇕჾፇኯई‫݋‬ᅳ‫ٱ‬ဃLjADIփ‫݋ܔ‬ᅳዐ٪ሞ‫ֶڦ‬ᅴईᆯׂُิ‫ٱڦ‬ဃ޶ሴăසႴඓණඪࢆَᇕ‫ڦ‬ጚඓႠLj൩֖੊ADI༵ࠃ ‫ڦ‬ፌႎᆈ࿔Ӳຕ਍๮֩ă ADF7021-N ణ୤ ༬Ⴀ 1 ! ঴ۙĂॠհࢅCDR 32 ᆌᆩ 1 ! থ๭ऐยዃ 34 ࠀీ઀཮ 1 ! ঴ۙഗ੊୯ᅺ໎ 36 Ⴊ۩૦๏ 2 ᆌᆩ႑တ 38 ߁ຎ 3 ! ዐೕ୳հഗ‫੻ټ‬ၯጚ 38 रຍࡀ߭ LNA/PA೅ದ 39 RFࢅPLLࡀ߭ 4 ! ৥ၟᅞ዆ၯጚ 40 ! ݀พࡀ߭ 5 ! ‫ݴ‬ፇ঳ࠓतՊஓ 42 ! থ๭ऐࡀ߭ 6 ! ‫؛‬๔ฉ‫ࢫۉ‬Պ‫ײ‬ 42 ! ຕጴࡀ߭ 9 ‫ز‬ႜথ੨ 46 ! ཚᆩࡀ߭ 10 ! ࣮‫߭܁‬๕ 46 ! ้Ⴞ༬Ⴀ 11 ! ྲ੦዆ഗ/DSPথ੨ 48 ! ้Ⴞ཮ 12 ! स٪ഗ 0—Nस٪ഗ 49 ਨ‫ܔ‬ፌ‫ۨܮٷ‬ኵ 15 ! स٪ഗ1—VCO/ና‫ږ‬ഗस٪ഗ 50 15 ! स٪ഗ2—݀พۙ዆स٪ഗ 51 ᆅগದዃࢅࠀీ௮ຎ 16 ! स٪ഗ3—݀พ/থ๭้ዓस٪ഗ 52 ‫ۆ‬႙߾ፕ༬Ⴀ 18 ! स٪ഗ4—঴ۙഗยዃस٪ഗ 53 ೕ୲ࢇ‫ׯ‬ഗ 22 ! स٪ഗ5—ዐೕ୳հഗยዃस٪ഗ 54 ! एጚ๼෇ 22 ! स٪ഗ6—ዐೕ৛ၯยዃस٪ഗ 55 MUXOUT 23 ! स٪ഗ7—࣮‫܁‬ยዃस٪ഗ 56 ! ‫ۉ‬უ੦዆ና‫ږ‬ഗ)VCO* 24 ! स٪ഗ8—ู‫֪ۉ‬๬स٪ഗ 57 ! ჋ስཚ‫ڢ‬ᅜइ‫ڥ‬ፌॅဣཥႠీ 25 ! स٪ഗ9—AGCस٪ഗ 58 26 ! स٪ഗ10—AFCस٪ഗ 59 RF๼‫؜‬प 26 ! स٪ഗ11—ཞօጴॠ֪स٪ഗ 60 ! ೕ೷ኝႚ 28 ! स٪ഗ12—SWD/ពኵยዃस٪ഗ 60 ! ۙ዆ࢅ୳հ჋ၜ 29 ! स٪ഗ13—3FSK/4FSK঴ۙस٪ഗ 61 ! ݀พჽ‫׿‬ 29 ! स٪ഗ14—֪๬DACस٪ഗ 62 ! ֪๬ஓ݀ิഗ 29 ! स٪ഗ15—֪๬ఇ๕स٪ഗ 63 থ๭ऐև‫ݴ‬ 30 ྔႚ؅٫ 64 RFമ‫܋‬ 30 ! 64 ዐೕ୳հഗ 30 RSSI/AGC 30 ESDয়ߢ ݀พऐ ! 4 Ⴊ۩૦๏! 2008౎2ሆ—ӲԨ0:‫؛‬๔Ӳ Rev. 0 | Page 2 of 64 ۩ࠔኸళ ADF7021-N  ߁ຎ ADF7021-N๟ᅃ੼एᇀADF7021‫ߛڦ‬ႠీĂ‫୲ࠀگ‬Ă቏‫ټ‬ ๭݀ഗLjᆛᆶ9 kHzĂ13.5 kHzࢅ18.5 kHz‫ڦ‬ዐೕ୳հഗ‫ټ‬ ੻Ljྜඇ‫߳ࢇޙ‬ዖඇ൰቏‫ټ‬ཚ႑ՔጚLjᆮഄ๟ఫၵᄲ൱ 12.5 kHzཚ‫ݴڢ‬૗‫ڦ‬Քጚă ADF7021-N੗ሞ቏‫ټ‬Ă௨ኴቷISMೕ܎ᅜत80 MHz዁650 MHzࢅ842 MHz዁916 MHzೕ୲‫ڦྷݔ‬༬Ⴙኴቷೕ܎ా߾ ፕă޿ഗॲਏᆶߛຯࢅืᇆ၀ଇዖ݀ໃຕ਍୳հ჋ၜLjᆩ ᅜ߀฀቏‫ټ‬ᆌᆩ‫ڦ‬ೕ೷ၳ୲ă໲๢ࢇ‫ࢇޙ‬ᅜူՔጚई݆ࡀ ‫ۉڦ‬ୟᆌᆩǖනԨARIB STD-T67Ă౹ዞETSI EN 300 220Ă ࡣࡔৎ‫ײ‬ยԢ࠶૙݆ࡀĂዐࡔৎ‫ײ‬ยԢ࠶૙݆ࡀᅜतԛெ FCC Part 15ĂPart 90ࢅPart 95॔࠶ՔጚăADF7021-NኻႴ ณଉྔև‫ݴ‬૬ഗॲՍ੗ࠓॺᅃ߲ྜኝ‫ڦ‬๭݀ഗLjᅺُ‫׉ݥ‬ ๢ᆩᇀॏ߭௺ߌࢅ൶ᇘ௺ߌ‫ڦ‬ᆌᆩă ཚࡗᅃဣଚೌాFSKۙ዆ࢅຕ਍୳հ჋ၜLjᆩࢽ੗ᅜ߸ଳ ऄጲස‫ں‬჋ስۙ዆‫ݛ‬ӄLjཞ้஢ፁჹ߭ೕ೷ၳ୲ᄲ൱ă ADF7021-N࣏ኧ‫׼‬ሞ2FSKĂ3FSKࢅ4FSKक़‫ۯ‬ༀൎ࣑‫ڦ‬ၹ ᅱLjᅜ؊‫ݴ‬ક‫ٷ‬ཚ႑‫ྷݔ‬ժ༵ߛຕ਍ཾུଉă ݀พև‫ݴ‬Ԉࡤଇ߲‫ۉ‬უ੦዆ና‫ږ‬ഗ)VCO*ࢅᅃ߲๼‫؜‬ೕ୲ ‫ݴ‬Ր୲!ྷݔ‬−211!eCn዁−58!eCn! ๼෇ࠀ୲‫!>!ྷݔ‬−211!eCn዁−58!eCn! ֖९STTJ0BHDև‫!ݴ‬ kHz ੗ሞस٪ഗ10DŽR10_DB[24:31]DžాՊ‫ײ‬ 64 0.5 Bits kHz ๼෇ࠀ୲‫ = ྷݔ‬−100 dBm዁+12 dBm −91/−91 dBm ཀ၍๼෇‫ت‬1 GHzLj࿄୳հ‫ڞد‬/୳հ‫ڞد‬ −62/−72 dBm ཀ၍๼෇‫ت‬1 GHzLj࿄୳հ‫ڞد‬/୳հ‫ڞد‬ 24 − j60 26 − j63 63 − j129 68 − j134 96 − j160 178 − j190 Ω Ω Ω Ω Ω Ω −120 to −47 ±2 ±3 390 0.5 1.5 × IF_ FILTER_BW 3 Rxሗො݀พ ాև‫ߌۉ‬VCO ྔև‫ߌۉ‬VCO LNA๼෇ፆੇ fRF = 915 MHz fRF = 868 MHz fRF = 450 MHz fRF = 426 MHz fRF = 315 MHz fRF = 175 MHz RFIN዁RFGND ৥ၟᅞ዆૧ᆩྔևRFᇸઠၯጚă থ๭႑ࡽ‫ۉ‬ೝ< −100 dBm้Ljॺᅱ‫֑߲ܠܔ‬ᄣ‫ۅ‬ฉ‫ڦ‬RSSI࣮‫܁‬ኵ൱ೝ਩‫ت‬૙ᅜ༵ߛ‫گ‬๼෇ࠀ୲้‫ڦ‬RSSI৛‫܈‬ă 3.ā ୳հ‫ڞد‬থ๭ሗො݀พ๟ሞEVAL-ADF7021-NDBxxฉ֪ۨ‫ڦ‬LjࢫኁԈઔᅃ߲Tपၿհ୳հഗDŽଇ߲‫ࢅߌۉ‬ᅃ߲‫ۉ‬ඹDžă 1.ā 2.ā Rev. 0 | Page 8 of 64 ADF7021-N  ຕጴࡀ߭ ՗4 ֖ຕ ้Ⴞ႑တ ႊೌ๑ీ዁ۙবഗ৽Ⴣ ႊೌ๑ీ዁݀พఇ๕ TCXOएጚᇸ XTAL ႊೌ๑ీ዁থ๴ఇ๕ TCXOएጚᇸ XTAL ݀พ-থ๭ዜገ้क़ இड๼෇ ๼෇ߛ‫ۉ‬ೝVINH ๼෇‫ۉگ‬ೝVINL ๼෇‫ୁۉ‬IINH/IINL ๼෇‫ۉ‬ඹCIN ੦዆้ዓ๼෇ இड๼‫؜‬ ๼‫ۉߛ؜‬ೝVOH ๼‫ۉگ؜‬ೝVOL CLKOUTฉื/ူই CLKOUT޶ሜ ፌၭኵ!!‫ۆ‬႙ኵ!! ፌ‫ٷ‬ኵ ‫ڇ‬࿋ ֪๬ཉॲ0ጀ๥! 10 μs CREG (1:4) = 100 nF 32࿋स٪ഗႀ෇้क़ = 50 μs 1 2 ms ms 32࿋स٪ഗႀ෇้क़ = 50 μsLj ৈ၌ዐೕ୳հഗٚۙၯጚ 1.2 2.2 390 μs + (5 × tBIT) ms ms ཞօຕ਍๼‫้ڦ؜‬क़LjԈઔAGCॺ૬)ෙዖAGC‫ۉ‬ೝ* ࢅCDRཞօǗᆶ࠲ၘ൧Lj൩֖९AGC႑တࢅ้Ⴞև‫ݴ‬Ǘ tBIT= ຕ਍࿋ዜ೺ 0.2 × VDD ±1 10 50 V V μA pF MHz 0.4 5 10 V V ns pF 0.7 × VDD DVDD − 0.4 Rev. 0 | Page 9 of 64 IOH = 500 μA IOL = 500 μA ADF7021-N ཚᆩࡀ߭! ՗5 ֖ຕ ࿒‫(ྷݔ܈‬TA) ‫ۉ‬ᇸ ‫ۉ‬ᇸ‫ۉ‬უVDD ݀พ‫ୁۉ‬ၩࡼ1 868 MHz 0 dBm 5 dBm 10 dBm 450 MHzLjాև‫ߌۉ‬VCO 0 dBm 5 dBm 10 dBm 426 MHzLjྔև‫ߌۉ‬VCO 0 dBm 5 dBm 10 dBm থ๭‫ୁۉ‬ၩࡼ 868 MHz ‫ୁۉگ‬ఇ๕ ߛଳ௺‫܈‬ఇ๕ 433MHzLjాև‫ߌۉ‬VCO ‫ୁۉگ‬ఇ๕ ߛଳ௺‫܈‬ఇ๕ 426 MHzLjྔև‫ߌۉ‬VCO ‫ୁۉگ‬ఇ๕ ߛଳ௺‫܈‬ఇ๕ ู‫ୁۉۉ‬ၩࡼ ‫ࡼࠀگ‬ລ௥ఇ๕ ፌၭኵ!!‫ۆ‬႙ኵ!!ፌ‫ٷ‬ኵ ‫ڇ‬࿋ −40 +85 °C ֪๬ཉॲ0ጀ๥! 2.3 ໯ᆶVDDᆅগՂႷ૶ሞᅃഐ VDD = 3.0 VLjPA೅ದ‫ׯ‬50 Ω VCO_BIAS = 8 3.6 V 20.2 24.7 32.3 mA mA mA 19.9 23.2 29.2 mA mA mA 13.5 17 23.3 mA mA mA VCO_BIAS = 8 VCO_BIAS = 2 VDD = 3.0 V VCO_BIAS = 8 22.7 24.6 mA mA 24.5 26.4 mA mA 17.5 19.5 mA mA VCO_BIAS = 8 VCO_BIAS = 2 0.1 1 μA CE ‫ۉگ‬ೝ! ݀พ‫ୁۉ‬ၩࡼ֪๬๑ᆩ‫ڦ‬ፇࢇ๕PAࢅLNA೅ದྪஏᇑEVAL-ADF7021-NDBxxೠࠚӱฉ໯ᆩ‫ڦ‬၎ཞă૧ᆩ‫ڦ܀ڇ‬PA೅ದྪஏ੗इ‫ڦߛ߸ڥ‬PAࠀၳă 1.  Rev. 0 | Page 10 of 64 ADF7021-N  ้Ⴞ༬Ⴀ ‫ݥأ‬ଷᆶำ௽LjVDD = 3 V ± 10%LjDGND = AGND = 0 VLjTA = 25°CăᆶยऺԍኤLj‫ڍ‬࿄ঢ়ิׂ֪๬ă ՗6 ֖ຕ t1 t2 t3 t4 t5 t6 t8 t9 t10 t11 t12 t13 t14 t15 ሞTMIN዁TMAX้‫ڦ‬၌ኵ >10 >10 >25 >25 >10 >20 5 >5 >¼ × tBIT >¼ × tBIT ‫ڇ‬࿋ ns ns ns ns ns ns ns ns ns ns ns ns μs μs ֪๬ཉॲ0ጀ๥! SDATA዁SCLKॺ૬้क़ SDATA዁SCLKԍ‫้׼‬क़ SCLKߛ‫ۉ‬ೝ‫׼‬Ⴤ้क़ SCLK‫ۉگ‬ೝ‫׼‬Ⴤ้क़ SCLK዁SLEॺ૬้क़ SLEஞ؋੻‫܈‬ SCLK዁SREADຕ਍ᆶၳLj࣮‫܁‬ SCLKኮࢫ‫ڦ‬SREADԍ‫้׼‬क़Lj࣮‫܁‬ SCLK዁SLE্ᆩ้क़Lj࣮‫܁‬ TxRxCLK޶Չᄂ዁SLE TxRxDATA዁TxRxCLKॺ૬้क़)݀พఇ๕* TxRxCLK዁TxRxDATAԍ‫้׼‬क़)݀พఇ๕* TxRxCLK޶Չᄂ዁SLE SLEኟՉᄂ዁TxRxCLKኟՉᄂ Rev. 0 | Page 11 of 64 ADF7021-N ้Ⴞ཮ ‫ز‬ႜথ੨! t3 t4 SCLK t1 SDATA DB31 (MSB) t2 DB30 DB0 (LSB) (CONTROL BIT C1) DB1 (CONTROL BIT C2) DB2 t6 t5 ཮2.‫ز‬ႜথ੨้Ⴞ཮ t1 07246-002 SLE t2 SCLK SDATA REG7 DB0 (CONTROL BIT C1) SLE t3 t10 RV16 RV2 RV15 RV1 X 07246-003 X SREAD t9 t8 ཮3.‫ز‬ႜথ੨࣮‫้܁‬Ⴞ཮ 2FSK/3FSK้Ⴞ ±1 × DATA RATE/32 1/DATA RATE TxRxCLK TxRxDATA 07246-004 DATA ཮4. থ๭ఇ๕ူ‫ڦ‬TxRxDATA/TxRxCLK้Ⴞ཮ 1/DATA RATE TxRxCLK TxRxDATA FETCH 07246-005 DATA SAMPLE ཮5. ݀พఇ๕ူ‫ڦ‬TxRxDATA/TxRxCLK้Ⴞ཮ Rev. 0 | Page 12 of 64 ADF7021-N  4FSK้Ⴞ ሞ4FSKথ๭ఇ๕ူLjMSB/LSBཞօᆌᆯথ๭࿋ୁዐ‫ڦ‬SWDઠԍኤ REGISTER 0 WRITE SWITCH FROM Rx TO Tx tSYMBOL t13 t12 t11 tBIT SLE TxRxCLK Rx SYMBOL MSB Rx SYMBOL LSB Rx SYMBOL MSB Rx SYMBOL LSB Tx SYMBOL MSB Tx SYMBOL LSB Rx MODE Tx/Rx MODE Tx SYMBOL MSB Tx MODE 07246-074 TxRxDATA ཮6. 4FSKఇ๕ူ‫ڦ‬থ๭዁݀พ้Ⴞ཮ REGISTER 0 WRITE SWITCH FROM Tx TO Rx t15 tSYMBOL t14 tBIT SLE TxRxCLK Tx/Rx MODE Tx SYMBOL MSB Tx SYMBOL LSB Tx SYMBOL MSB Tx SYMBOL LSB Tx MODE Rev. 0 | Page 13 of 64 Rx SYMBOL MSB Rx SYMBOL LSB Rx MODE 07246-075 TxRxDATA ADF7021-N UART/SPIఇ๕ UARTఇ๕ཚࡗॽR0_DB28ዃ1ઠഔᆩăSPIఇ๕ཚࡗॽR0_DB28ዃ1ժॽR15_DB[17:19]ዃ0x7ઠഔᆩă݀พ/থ๭ຕ਍้ዓሞ CLKOUTᆅগฉ༵ࠃă tBIT CLKOUT (TRANSMIT/RECEIVE DATA CLOCK IN SPI MODE. NOT USED IN UART MODE.) Tx BIT SAMPLE Tx BIT TxRxDATA (RECEIVE DATA OUTPUT IN UART/SPI MODE.) Tx BIT Tx BIT Tx BIT HIGH-Z Tx/Rx MODE 07246-082 TxRxCLK (TRANSMIT DATA INPUT IN UART/SPI MODE.) FETCH Tx MODE ཮8. UART/SPIఇ๕ူ‫݀ڦ‬พ้Ⴞ཮ tBIT CLKOUT (TRANSMIT/RECEIVE DATA CLOCK IN SPI MODE. NOT USED IN UART MODE.) FETCH SAMPLE TxRxCLK (TRANSMIT DATA INPUT IN UART/SPI MODE.) Tx/Rx MODE Rx BIT Rx BIT Rx BIT Rx BIT Rx MODE ཮9. UART/SPIఇ๕ူ‫ڦ‬থ๭้Ⴞ཮ Rev. 0 | Page 14 of 64 Rx BIT 07246-078 TxRxDATA (RECEIVE DATA OUTPUT IN UART/SPI MODE.) HIGH-Z ADF7021-N  ਨ‫ܔ‬ፌ‫ۨܮٷ‬ኵ ‫ݥأ‬ଷᆶำ௽LjTA = 25°Că ՗7 ֖ຕ! VDD዁GND1 ఇెI/O‫ۉ‬უ዁GND ຕጴI/O‫ۉ‬უ዁GND ߾ፕ࿒‫ྷݔ܈‬ !!!߾ᄽDŽBपDž ٪‫ئ‬࿒‫ྷݔ܈‬ ፌߛ঳࿒ MLF θJAඤፆ ࣮ୁࡰ !!!‫ރ‬ኵ࿒‫܈‬ !!!‫ރ‬ኵ࿒‫้܈‬क़ 1 ‫ۨܮ‬ኵ! −0.3 V ዁ +5 V −0.3 V዁ AV DD + 0.3 V −0.3 V዁ DV DD + 0.3 V −40°C ዁ +85°C −65°C ዁ +125°C 150°C 26°C/W ጀᅪLj‫؜ג‬ฉຎਨ‫ܔ‬ፌ‫ۨܮٷ‬ኵ੗ీࣷ‫ڞ‬ዂഗॲᆦ৳Ⴀ໦ ࣋ăኄኻ๟‫ۨܮ‬ᆌ૰ኵLjփ՗๖ሞኄၵཉॲူईኁሞඪࢆ ഄ໲‫؜ג‬Ԩरຍࡀ߭֡ፕև‫ݴ‬໯๖ࡀ߭‫ڦ‬ཉॲူLjഗॲీ ࠕኟ‫߾׉‬ፕă‫׊‬೺ሞਨ‫ܔ‬ፌ‫ۨܮٷ‬ኵཉॲူ߾ፕࣷᆖၚഗ ॲ‫ڦ‬੗੍Ⴀă ԨഗॲྺߛႠీRFण‫ۉׯ‬ୟ-ESD‫ۨܮ‬ኵၭᇀ2 kVLj‫ܔ‬ESD )ৢ‫ߌ௺*ۉݣۉ‬ăӭሏࢅጎದ้ᆌ֑ൽ๢‫ٯݔݞڦړ‬แă ESDয়ߢ ESDDŽৢ‫ۉݣۉ‬Dž௺ߌഗॲă ‫ۉټ‬ഗॲࢅ‫ۉ‬ୟӱ੗ీࣷሞுᆶִਥ‫ڦ‬൧઄ူ‫ۉݣ‬ă ৑࠶Ԩׂ೗ਏᆶጆ૧ईጆᆶԍࢺ‫ۉ‬ୟLj‫ڍ‬ሞᇜ‫ీߛڟ‬ ଉESD้Ljഗॲ੗ీࣷ໦࣋ă ᅺُLjᆌ‫֑ړ‬ൽ๢‫ڦړ‬ESD‫ٯݔݞ‬แLjᅜՆ௨ഗॲႠీ ူইईࠀీෟ฿ă 260°C 40 sec GND = CPGND = RFGND = DGND = AGND = 0. Rev. 0 | Page 15 of 64 ADF7021-N CVCO GND1 L1 GND L2 VDD CPOUT CREG3 VDD3 OSC1 OSC2 MUXOUT 48 47 46 45 44 43 42 41 40 39 38 37 ᆅগದዃࢅࠀీ௮ຎ PIN 1 INDICATOR 1 36 CLKOUT 2 35 TxRxCLK VDD1 3 34 TxRxDATA RFOUT 4 33 SWD RFGND 5 32 VDD2 RFIN 6 31 CREG2 RFINB 7 30 ADCIN RLNA 8 29 GND2 VDD4 9 28 SCLK RSET 10 27 SREAD CREG4 11 26 SDATA GND4 12 25 SLE ADF7021-N CE 24 TEST_A 23 GND4 22 FILT_Q 21 FILT_Q 20 GND4 19 FILT_I 18 FILT_I 17 MIX_Q 16 MIX_Q 15 MIX_I 14 MIX_I 13 TOP VIEW (Not to Scale) 07246-006 VCOIN CREG1 ཮21/ᆅগದዃ ՗8. ᆅগࠀీ௮ຎ ᆅগՊࡽ! ᆅগఁ‫׬‬ 1 VCOIN ௮ຎ! ُᆅগฉ‫ۙڦ‬ၿ‫ۉ‬უਦۨ‫ۉ‬უ੦዆ና‫ږ‬ഗDŽVCODž‫ڦ‬๼‫؜‬ೕ୲ăۙၿ‫ۉ‬უሁߛLj๼‫؜‬ೕ୲৽ሁߛă 2 CREG1 3 VDD1 PAఇ੷‫ۙڦ‬বഗ‫ۉ‬უăሞُᆅগࢅথ‫ں‬ኮक़‫ݣ‬ዃᅃ߲‫૴ز‬3.9 Ω‫ۉ‬ፆࢅᅃ߲100 nF‫ۉ‬ඹ੗࿘ۨۙবഗժᅞ ዆ሯำă PAఇ੷‫ۉڦ‬ᇸ‫ۉ‬უă৑ଉ੍ৎُᆅগ‫ݣ‬ዃ 0.1 μFࢅ100 pF‫ڦ‬ඁ᳘‫ۉ‬ඹăॽ໯ᆶVDDᆅগ૶ሞᅃഐă 4 RFOUT 5 6 RFGND RFIN 7 8 9 10 11 RFINB RLNA VDD4 RSET CREG4 12, 19, 22 13 to 18 24 GND4 MIX_I, MIX_I, MIX_Q, MIX_Q, FILT_I, FILT_I FILT_Q, FILT_Q, TEST_A CE 25 SLE 26 SDATA 27 SREAD 28 SCLK 20, 21, 23 ُᆅগฉ༵ࠃۙ዆႑ࡽă๼‫ۉ୲ࠀ؜‬ೝሞ−16 dBm዁+13 dBmኮक़ăᆌ૧ᆩ๢‫ڦړ‬ፇॲ๑๼‫؜‬ᇑ໯Ⴔ޶ሜ ৊ႜፆੇ೅ದDŽ֖९݀พऐև‫ݴ‬Džă ݀พऐ๼‫؜‬पথ‫ں‬ă໯ᆶHOEᆅগᆌ૶ሞᅃഐă থ๭ऐև‫ڦݴ‬LNA๼෇ăሞཀ၍ࢅֶ‫ݴ‬LNA๼෇ኮक़Ⴔᄲ৊ႜ๼෇೅ದᅜඓԍፌ‫د୲ࠀٷ‬๼)֖९LNA/PA೅ ದև‫*ݴ‬ ࢻցLNA๼෇DŽ֖९LNA/PA೅ದև‫ݴ‬Dž LNA‫ྔڦ‬ևೋዃ‫ۉ‬ፆăᆫࣅ‫ۉ‬ፆྺ1.1 kΩLjඹֶ5%ă LNA/MIXERఇ੷‫ۉڦ‬ᇸ‫ۉ‬უăُᆅগᆌᆩᅃ߲10 nF‫ۉ‬ඹඁ᳘዁থ‫ں‬ă ྔև‫ۉ‬ፆăยዃ‫ࢁۉ‬ԭ‫ࢅୁۉ‬ᅃၵాևೋዃ‫ୁۉ‬ă๑ᆩඹֶ5%‫ڦ‬3.6 kΩ‫ۉ‬ፆă LNA/MIXERఇ੷‫ۙڦ‬বഗ‫ۉ‬უăሞُᆅগࢅGNDኮक़‫ݣ‬ዃᅃ߲100 nF‫ۉ‬ඹ੗࿘ۨۙবഗժᅞ዆ሯำă LNA/MIXERఇ੷থ‫ں‬ă ႑ࡽ૾֪๬ᆅগăኄၵᆅগሞኟ‫׉‬ཉॲူ‫ߛװ‬ፆੇժᆌ჈੣ă ႑ࡽ૾֪๬ᆅগăኄၵᆅগሞኟ‫׉‬ཉॲူ‫ߛװ‬ፆੇժᆌ჈੣ ႊೌ๑ీăઙ‫گ‬CE‫ۉ‬ೝ੗ॽADF7021-Nዃᇀඇู‫ۉ‬ఇ๕ă‫ړ‬CE‫ۉگװ‬ೝ้۪ࣷ฿स٪ഗኵLjܸઙߛCE‫ۉ‬ೝ ࢫՂႷ‫ܔ‬ഗॲ৊ႜዘႎยዃă ेሜ๑ీLjCMOS๼෇ă‫ړ‬SLEՎྺߛ‫ۉ‬ೝ้Lj٪‫ئ‬ሞᅎ࿋स٪ഗా‫ڦ‬ຕ਍ॽሜ෇຺߲໮٪ഗዐ‫ڦ‬ᅃ߲ă੗ ཚࡗ੦዆࿋჋ስ໮٪ഗă ‫ز‬ႜຕ਍๼෇ă‫ز‬ႜຕ਍ᅜMSBᆫံ‫ݛ‬๕ेሜLj຺߲LSBᆩፕ੦዆࿋ăُᆅগྺߛፆੇCMOS๼෇ă ‫ز‬ႜຕ਍๼‫؜‬ăُᆅগᆩᇀॽ࣮‫܁‬ຕ਍ٗADF7021-Nઍ෇ྲ੦዆ഗăSCLK๼෇ᆩઠ‫ܔ‬SREADᆅগ‫ڦ‬௅߲࣮ ‫܁‬࿋DŽසAFCईADCDž৊ႜऺ้ă ‫ز‬ႜ้ዓ๼෇ăُ‫ز‬ႜ้ዓᆩઠॽ‫ز‬ႜຕ਍ደ߲๼෇स٪ഗăຕ਍ሞCLKฉืᄂ໮٪‫ڟ‬32࿋ᅎ࿋स٪ഗ ాăُᆅগྺຕጴCMOS๼෇ă Rev. 0 | Page 16 of 64 ADF7021-N  ᆅগՊࡽ! ᆅগఁ‫׬‬ 29 GND2 30 ADCIN ௮ຎ! ຕጴև‫ݴ‬থ‫ں‬ ఇຕገ࣑ഗ๼෇ăཚࡗُᆅগ੗‫ݡ‬࿚ాև7࿋ADCă஢ଉ‫ྺײ‬0V዁1.9 Vă੗૧ᆩSREADᆅগํ၄࣮‫܁‬ă 31 CREG2 ຕጴఇ੷‫ۙڦ‬বഗ‫ۉ‬უăሞُᆅগࢅথ‫ں‬ኮक़‫ݣ‬ዃᅃ߲100 nF‫ۉ‬ඹ੗࿘ۨۙবഗժᅞ዆ሯำă 32 33 VDD2 SWD ຕጴఇ੷‫ۉڦ‬ᇸ‫ۉ‬უă৑ଉ੍ৎُᆅগ‫ݣ‬ዃᅃ߲10 nFඁ᳘‫ۉ‬ඹă ཞօጴॠ֪ăADF7021-N݀၄ཞօጴႾଚ೅ದ้ࣷॽُᆅগዃ1)֖९स٪ഗ11—ཞօጴॠ֪स٪ഗև ‫!*ݴ‬ăኄᄣ৽༵ࠃକᅃ߲ྔևྲ੦዆ഗዐ܏Lj՗௽ኟሞথ๭ᆶၳຕ਍ă 34 TxRxDATA ݀พຕ਍๼෇/থ๭ຕ਍๼‫؜‬ăኄຌᇀຕጴᆅগLj๢ᆩኟ‫׉‬CMOS‫ۉ‬ೝăሞUART/SPIఇ๕ူLjُᆅগ๼‫؜‬ሞ থ๭ఇ๕ူথ๭‫ڦ‬ຕ਍ăሞ݀พUART/SPIఇ๕ူLjُᆅগ‫ߛװ‬ፆੇDŽ֖९ྲ੦዆ഗ/DSPথ੨և‫ݴ‬Džă 35 TxRxCLK ሞথ๭ࢅ݀พଇ߲ఇ๕ူ๼‫؜‬ຕ਍้ዓăኄຌᇀຕጴᆅগLj๢ᆩኟ‫׉‬CMOS‫ۉ‬ೝăኟ้ዓᄂᇑথ๭ຕ਍ዐ ႐၎೅ದăሞ݀พఇ๕ူLjُᆅগ๼‫؜‬৛ඓ้ዓLjᅜՍጚඓӀቷ໯Ⴔຕ਍໏୲ॽຕ਍ٗྲ੦዆ഗ໮٪዁݀ พև‫ݴ‬ăሞUART/SPIఇ๕ူLjُᆅগ๼෇ሞ݀พఇ๕ူ݀พ‫ڦ‬ຕ਍ăሞথ๭UART/SPIఇ๕ူLjُᆅগ‫ߛװ‬ ፆੇ)֖९ྲ੦዆ഗ/DSPথ੨և‫*ݴ‬ă 36 CLKOUT ਏᆶ๼‫؜‬ൻ‫ۯ‬ഗ‫ڦ‬ৗናएጚᇸ‫ݴڦ‬ೕႚ๕ăຕጴ้ዓ๼‫؜‬੗ᆩઠൻ‫ྲۯ‬੦዆ഗ้ዓ‫߲ܠڪ‬ഄ໱CMOS๼ ෇ă޿๼‫؜‬ਏᆶ50:50‫ࡽدڦ‬-੣ࡽԲժ၎‫ܔ‬ᇀएጚᇸ‫ݒ‬ၠăሞ૧ᆩCLKOUTࠀీ‫ڦ‬ᆌᆩዐLjᆌ৑ଉ੍ৎ޿ᆅ গ‫ݣ‬ዃᅃ߲‫ز‬ႜ1 kΩ‫ۉ‬ፆă 37 MUXOUT ༵ࠃDIGITAL_LOCK_DETECT႑ࡽăُ႑ࡽᆩઠඓۨPLL๟‫ޏ‬໮ۨ዁ኟඓೕ୲Ljଷྔ࣏༵ࠃഄ໱႑ࡽLjසኸ ๖‫ز‬ႜথ੨ۙবഗጒༀ‫ڦ‬REGULATOR_READYDŽᆶ࠲ၘ൧൩֖९MUXOUTև‫ݴ‬Džă 38 OSC2 39 OSC1 40 41 VDD3 CREG3 ሞُᆅগࢅOSC1ኮक़૶থएጚৗናăᆩCMOS‫ۉ‬ೝൻ‫ُۯ‬ᆅগժ্ᆩాևৗ༹ና‫ږ‬ഗࢫLj੗๑ᆩTCXOए ጚᇸă ሞُᆅগࢅOSC1ኮक़૶থएጚৗናăᆩ঍ୁ᳘ࢇ0.8 V p-p‫ۉ‬ೝൻ‫ُۯ‬ᆅগժ্ᆩాևৗ༹ና‫ږ‬ഗࢫLj੗๑ ᆩTCXOएጚᇸă ‫ࢁۉ‬ԭࢅPLL‫ݴ‬ೕഗ‫ۉڦ‬ᇸ‫ۉ‬უăᆩ10 nF‫ۉ‬ඹ‫ُܔ‬ᆅগඁ᳘዁থ‫ں‬ă 42 CPOUT ‫ࢁۉ‬ԭ๼‫؜‬ăُ๼‫؜‬੗ׂิሞ࣍ୟ୳հഗాঢ়ࡗओ‫ୁۉڦݴ‬ஞ؋ăঢ়ࡗओ‫߀ୁۉڦݴ‬ՎକVCO๼෇ዐ‫ڦ‬੦ ዆‫ۉ‬უă 43 44, 46 VDD L2, L1 VCOၿና‫ۉ‬ୟ‫ۉڦ‬ᇸ‫ۉ‬უăᆩ10 nF‫ۉ‬ඹ‫ُܔ‬ᆅগඁ᳘዁থ‫ں‬ă ྔևVCO‫ߌۉ‬ᆅগăසࡕ๑ᆩྔևVCO‫ߌۉ‬Ljሞኄၵᆅগฉ૶থႊೌ‫ߌۉ‬੗ยዃVCO߾ፕೕ୲ăසࡕ๑ᆩ ాևVCO‫ߌۉ‬Ljኄၵᆅগ੗ԍ‫ޝ׼‬੣ăၘ൧൩֖९‫ۉ‬უ੦዆ና‫ږ‬ഗDŽVCODžև‫ݴ‬ă 45, 47 48 GND, GND1 CVCO WDPఇ੷থ‫ں‬ă ሞُᆅগࢅCREG1ኮक़‫ݣ‬ዃᅃ߲22 nF‫ۉ‬ඹᅜই‫گ‬VCOሯำă Rev. 0 | Page 17 of 64 ADF7021-N ‫ۆ‬႙߾ፕ༬Ⴀ –70 PHASE NOISE (dBc/Hz) ICP = 0.8mA –90 DR = 9.6kbps DATA = PRBS9 fDEV = 2.4kHz RF FREQ = 869.5MHz RF FREQ = 900MHz VDD = 2.3V TEMPERATURE = 25°C VCO_BIAS = 8 VCO_ADJUST = 3 –80 ICP = 1.4mA 2FSK –100 GFSK –110 ICP = 2.2mA –120 –130 1 10 100 1000 10000 FREQUENCY OFFSET (kHz) CENTER 869.5 25MHz RES BW 300Hz VBW 300Hz ཮14. ሞ2FSKࢅGFSKఇ๕ူ‫ڦ‬๼‫؜‬ೕ೷ ཮11. ሞ900 MHzLjVDD = 2.3 V้‫ڦ‬၎࿋ሯำၚᆌ 16 8 PA_BIAS = 9μA 4 0 PA_BIAS = 5μA –4 2FSK PA_BIAS = 7μA –8 –12 –16 –20 –24 RC2FSK –28 –32 0 4 8 12 16 20 24 28 32 36 40 44 48 52 56 60 PA SETTING VBW 300Hz SPAN 50kHz SWEEP 2.118s (601pts) ཮15. ሞ2FSKࢅืᇆ၀2FSKఇ๕ူ‫ڦ‬๼‫؜‬ೕ೷ ཮12. RF๼‫ࢅ୲ࠀ؜‬PAยዃ༬Ⴀ൸၍ 1R CENTER 869.5 25MHz RES BW 300Hz 07246-048 –40 07246-051 –36 RF FREQ = 440MHz OUTPUT POWER = 10dBm FILTER = T-STAGE LC FILTER MARKER Δ= 52.2dB SR = 4.8ksym/s DATA = PRBS9 fDEV = 2.4kHz RF FREQ = 869.5MHz 4FSK 1 START 300MHz RES BW 100Hz STOP 3.5GHz VBW 100Hz SWEEP 385.8ms (601pts) CENTER 869.493 8MHz RES BW 300Hz ཮13. TपLC୳հഗ‫ڦ‬PA๼‫؜‬ၿհၚᆌ VBW 300Hz SPAN 100kHz SWEEP 4.237s (601pts) ཮16. ሞ4FSKࢅืᇆ၀4FSKఇ๕ူ‫ڦ‬๼‫؜‬ೕ೷ Rev. 0 | Page 18 of 64 07246-049 RC4FSK 07246-050 RF OUTPUT POWER (dBm) DR = 9.6kbps DATA = PRBS9 fDEV = 2.4kHz RF FREQ = 869.5MHz PA_BIAS = 11μA 12 SPAN 50kHz SWEEP 2.118s (601pts) 07246-047 –150 07246-060 –140 ADF7021-N  REF 15dBm SAMP LOG 10dB/ 0 ATTEN 25dB DR = 9.6kbps DATA = PRS9 fDEV = 2.4kHz RF FREQ = 869.5MHz DATA RATE = 1kbps fDEV = 1kHz RF FREQ = 135MHz IF BW = 12.5kHz –1 –2 VAVG 100 V1 V2 S3 FC LOG BER –3 3FSK 3.0V, +25°C 2.3V, +85°C –4 –5 3.6V, –40°C RC3FSK –6 CENTER 869.5MHz RES BW 300Hz VBW 300Hz SPAN 50kHz SWEEP2.226s (401pts) 07246-070 –8 –130 –128 –126 –124 –122 –120 –118 –116 –114 –112 –110 –108 ཮17. ሞ3FSKࢅืᇆ၀3FSKఇ๕ူ‫ڦ‬๼‫؜‬ೕ೷ RAMP RATE: CW ONLY 256 CODES/BIT 128 CODES/BIT 64 CODES/BIT 32 CODES/BIT 10 ཮20. 2FSKଳ௺‫ࢅ܈‬VDD त࿒‫܈‬༬Ⴀ൸၍LjfRF = 135 MHz 0 TRACE = MAX HOLD PA ON/OFF RATE = 3Hz PA ON/OFF CYCLES = 10,000 VDD = 3.0V –2 –10 –30 –4 –5 –40 –6 –50 –7 –50 0 50 100 FREQUENCY OFFSET (kHz) ཮18. փཞPAၽೢ୲჋ၜሞፌ‫ٷ‬ኵԍ‫׼‬ఇ๕ူ‫ڦ‬๼‫؜‬ೕ೷ 0 –8 –120 0 –2 –95 –4 –5 –6 –6 –7 –7 –114 –112 –110 RF INPUT POWER (dBm) –108 –106 –104 –8 –120 07246-052 –116 ཮19. 2FSKଳ௺‫ ࢅ܈‬VDD त࿒‫܈‬༬Ⴀ൸၍LjfRF = 868 MHz 2.3V +25°C 3.0V +25°C 3.6V +25°C 2.3V –40°C 3.0V –40°C 3.6V –40°C 2.3V +85°C 3.0V +85°C 3.6V +85°C –115 –110 –105 RF INPUT POWER (dBm) –100 –95 07246-066 LOG BER 2.3V, +85°C –5 –118 –100 –3 3.6V, –40°C –120 –105 DATA RATE = 19.6kbps SYMBOL RATE = 9.8ksym/s fDEV (inner) = 2.4kHz MOD INDEX = 0.5 RF FREQ = 420MHz IF BW = 12.5kHz –1 3.0V, +25°C –4 –8 –122 –110 ཮21. 3FSKଳ௺‫ࢅ܈‬VDD त࿒‫܈‬༬Ⴀ൸၍LjfRF = 440 MHz –2 –3 –115 RF INPUT POWER (dBm) DATA RATE = 9.6kbps fDEV = 4kHz RF FREQ = 868MHz IF BW = 25kHz –1 2.3V +25°C 3.0V +25°C 3.6V +25°C 2.3V –40°C 3.0V –40°C 3.6V –40°C 2.3V +85°C 3.0V +85°C 3.6V +85°C 07246-065 LOG BER –3 –20 –60 –100 LOG BER 3FSK MODULATION DATA RATE = 9.6kbps fDEV = 2.4kHz MOD INDEX = 0.5 RF FREQ = 440 MHz –1 07246-068 OUTPUT POWER (dBm) 0 RF INPUT POWER (dBm) 07246-053 –7 ཮22. 4FSKଳ௺‫ࢅ܈‬VDD त࿒‫܈‬༬Ⴀ൸၍LjfRF = 420 MHz Rev. 0 | Page 19 of 64 90 2.5 80 0 –2.5 70 –5.0 –7.5 60 –10.0 –12.5 ATTENUATION (dB) 50 RF FREQ = 868MHz WANTED SIGNAL (10dB ABOVE SENSITIVITY POINT) = 2FSK, fDEV = 4kHz, DATA RATE = 9.8kbps BLOCKER = 2FSK, fDEV = 4kHz, DATA RATE = 9.8kbps VDD = 3.0V TEMPERATURE = 25°C 30 20 10 0 –10 –22 –18 –14 –10 –6 –2 0 2 6 10 14 18 22 FREQUENCY OFFSET (MHz) –15.0 –17.5 –25.0 –27.5 –30.0 –32.5 –35.0 –37.5 90 92 94 96 98 100 –100 RSSI READBACK LEVEL 106 108 110 RF FREQ = 860MHz 2FSK MODULATION DATA RATE = 9.6kbps IF BW = 25kHz VDD = 3.0V TEMPERATURE = 25°C SENSITIVITY POINT (dBm) –102 –60 –80 –100 104 ཮26. ዐೕ୳հഗၚᆌໜ࿒‫ڦ܈‬ՎࣅDŽIF_FILTER_BW = 9kHz,温度范围−40°C至 +90°C,10°步进) –20 –40 102 IF FREQUENCY (kHz) ཮23. ੻‫߅ټ‬ඡᅞ዆ RSSI LEVEL (dBm) –40°C –20.0 –22.5 07246-059 40 +90°C 007246-091 BLOCKING (dB) ADF7021-N ACTUAL RF INPUT LEVEL –104 –106 –108 DISCRIMINATOR BANDWIDTH = 2× FSK FREQUENCY DEVIATION –110 –112 –114 –120 –116 –52.5 –42.5 ཮24. ຕጴRSSI࣮‫܁‬၍Ⴀ‫܈‬ 70 CALIBRATED 60 0.2 0.4 0.6 0.8 1.0 1.2 ཮ 27. 2FSKଳ௺‫܈‬Ăۙ዆ኸຕĂ၎࠲६ೕഗ‫੻ټ‬༬Ⴀ൸၍ 0 RF FREQ = 430MHz EXTERNAL VCO INDUCTOR DATA RATE = 9.6kbps TEMPERATURE = 25°C, VDD = 3.0V –1 THRESHOLD DETECTION –2 LOG BER 40 UNCALIBRATED –3 VITERBI DETECTION –4 20 –6 0 –10 429.80 429.85 429.90 429.95 430.00 430.05 430.10 430.15 430.20 RF FREQUENCY (MHz) ཮25. ࿄ၯጚࢅၯጚ৥ၟᅞ዆ 3FSK MODULATION VDD = 3.0V, TEMP = 25°C DATA RATE = 9.6kbps fDEV = 2.4kHz RF FREQ = 868MHz IF BW = 18.75kHz –7 –120 –118 –116 –114 –112 –110 –108 –106 –104 –102 –100 INPUT POWER (dBm) 07246-062 –5 10 07246-054 BLOCKING (dB) 0 MODULATION INDEX 50 30 DISCRIMINATOR BANDWIDTH = 1× FSK FREQUENCY DEVIATION 07246-058 –62.5 –118 07246-055 –140 –122.5 –112.5 –102.5 –92.5 –82.5 –72.5 RF INPUT (dBm) ཮28. ૧ᆩྼ༬Բॠ֪ࢅពኵॠ֪‫ڦ‬3FSKথ๭ऐଳ௺‫܈‬ Rev. 0 | Page 20 of 64 ADF7021-N  –70 +3 HIGH MIXER LINEARITY SENSITIVITY (dBm) +1 0 –1 –90 22452 ACQS IF BW = 25kHz POST DEMOD BW = 12.4kHz M 50μs IP3 = –9dBm IP3 = –3dBm IP3 = –20dBm –110 –120 DEFAULT MIXER LINEARITY IP3 = –13.5dBm IP3 = –24dBm –130 ཮29. ૧ᆩ֪๬DAC๼‫֪؜‬ଉ‫ڦ‬4FSKথ๭ऐᄅ཮ 3, 72 10, 72 30, 72 (LOW GAIN MODE) (MEDIUM GAIN MODE) (HIGH GAIN MODE) LNA GAIN, FILTER GAIN 07246-069 RF I/P LEVEL = –70dBm DATA RATE = 9.7kbps fDEV (inner) = 1.2kHz IP3= –5dBm –100 –3 07246-064 RECEIVER SYMBOL LEVEL –80 MODULATION = 2FSK DATA RATE = 9.6kbps fDEV = 4kHz IF BW = 12.5kHz DEMOD = CORRELATOR SENSITIVITY @ 1E-3 BER +1 0 –1 4 RF I/P LEVEL = –70dBm DATA RATE = 10kbps fDEV = 2.5kHz 20834 ACQS IF BW = 12.5kHz POST DEMOD BW = 12.4kHz M 20μs C13 1.7V 07246-063 RECEIVER SYMBOL LEVEL ཮31. থ๭ଳ௺‫ࢅ܈‬LNA/ዐೕ୳հഗሺᅮतंೕഗ၍Ⴀ‫܈‬ ยዃ༬Ⴀ൸၍(࣏၂๖௅߲ยዃ‫ڦت‬๼෇IP3) ཮30. ૧ᆩ֪๬DAC๼‫֪؜‬ଉ‫ڦ‬3FSKথ๭ऐᄅ཮ Rev. 0 | Page 21 of 64 ADF7021-N ೕ୲ࢇ‫ׯ‬ഗ एጚ๼෇! CLKOUT‫݆أ‬ഗࢅ࣐؋ ӱฉৗ༹ና‫ږ‬ഗ‫ۉ‬ୟDŽ९཮32Dž੗૧ᆩ็ᆈৗናፕྺPLL एጚᇸăॺᅱ቏‫ټ‬ᆌᆩ֑ᆩೕ୲ඹֶ≤10 ppm‫็ڦ‬ᆈৗ ናăᄺ੗ᅜ֑ᆩඹֶ>10 ppm‫็ڦ‬ᆈৗናLj‫ྺڍ‬କ‫ࢇޙ‬቏ ‫ݔࡀټ‬DŽසARIB STD-T67ࢅETSI EN 300 220Dž‫ڦ‬ਨ‫ܔ‬ೕ୲ ဃֶࡀ߭LjՂႷ‫ܔ‬ৗናೕ୲ဃֶ৊ႜց‫׋‬ă CLKOUT‫ۉ‬ୟٗና‫ږ‬ഗև‫ݴ‬इ‫ڥ‬एጚ้ዓ႑ࡽ)९཮32*Lj ժ ॽ ‫ ݴ‬ೕ Ă 50:50቞ ੣ Բ ႑ ࡽ ‫ د‬ໃ ‫ ڟ‬CLKOUTᆅ গ ă CLKOUT႑ࡽ၎‫ܔ‬ᇀएጚ้ዓ‫ݒ‬ၠă੗༵ࠃٗ2዁30‫ڦ‬਩ ሌ ‫ ݴ‬ೕ ă ُ ‫ ݴ‬ೕ ຕ ሞ R1_DB[7:10]ా ย ۨ ă ฉ ‫ ้ ۉ‬Lj CLKOUTఐණ8‫ݴ‬ೕă DVDD ና‫ږ‬ഗ‫ۉ‬ୟཚࡗॽR1_DB12ยྺߛ‫ۉ‬ೝઠഔᆩă໲ሞฉ‫ۉ‬ ้ఐණഔᆩLj੗ཚࡗઙ‫گ‬CE‫ۉ‬ೝઠ্ᆩăৗናဃֶ੗ཚࡗ ૧ᆩጲ‫ۯ‬ೕ୲੦዆ࠀీईۙኝၭຕN‫ݴ‬ೕኵઠၯኟ)֖९N ‫ݴ‬ೕഗև‫*ݴ‬ă DIVIDER 1 TO 15 OSC1 ÷2 CLKOUT 07246-008 CLKOUT ENABLE BIT ཮33. CLKOUTप OSC1 ᄲ্ᆩCLKOUTLj൩ॽ‫ݴ‬ೕຕยྺ0ă๼‫࣐؜‬؋ഗ੗ሞ4.8 MHzူᆩ10ǁ‫ڦ‬ฉื้क़ൻ‫ٳܠۯ‬20 pF‫޶ڦ‬ሜă߸੺‫ڦ‬Չ ᄂ੗‫ڞ‬ዂᅃၵሗො኱থઍ෇๼‫܋؜‬ă੗૧ᆩᅃ߲‫ز‬থ‫ۉ‬ፆ )1kΩ*ઠ३้࣐ዓՉᄂᅜሞCLKOUTೕ୲ူ३ณኄၵሗ ොă CP2 CP1 07246-083 OSC2 ཮32. ADF7021-Nฉ‫ڦ‬ና‫ږ‬ഗ‫ۉ‬ୟ ሞኟඓೕ୲ူ৊ႜና‫ږ‬Ⴔᄲଇ߲ժ૴ၿና‫ۉ‬ඹăഄ֖ຕኵ ൽਦᇀৗናࡀ߭ă཈჋้ᆌඓԍ‫ۉ‬ඹ‫૴ز‬ኵेฉPCBጽ၍ ‫ۉ‬ඹ੗‫ڟٳ‬ৗና‫޶ۨܮڦ‬ሜ‫ۉ‬ඹDŽཚ‫׉‬12 pF዁20 pFDžă ጽ၍‫ۉ‬ඹኵሞ2 pF዁5 pFኮक़ՎࣅLjਏ༹๫‫ۉ‬ୟӱքਆܸ ۨă৑ଉ཈჋࿒‫܈‬ဣຕ‫ۉڦگ‬ඹLjᅜඓԍሞ߳ዖཉॲူइ ‫ڥ‬࿘ۨ‫ڦ‬ೕ୲֡ፕă R‫ݴ‬ೕഗ 3࿋R‫ݴ‬ೕഗॽएጚ๼෇ೕ୲‫أ‬ᅜ1‫ڟ‬7‫ڦ‬ኝຕă޿‫ݴ‬ೕ႑ࡽ ፕྺएጚ้ዓ༵ࠃߴ६ೕ६၎ഗ)PFD*ă‫ݴ‬ೕԲሞR1_DB [4:6]ాยۨăPFDೕ୲ሁߛLjNኵሁ‫گ‬ăኄ़ই‫گ‬କᅜ20 log(N)໏୲Ԡሺ‫ڟ‬๼‫ڦ؜‬ሯำLjᆼ३ณକሗො‫؜ڦݴׯ‬၄ ْຕă ሞฉ‫้ۉ‬Ljस٪ഗ1ఐණR = 1ă ๑ᆩTCXOएጚᇸ ADF7021-Nᄺ ੗ ֑ ᆩ ‫ ܋ ڇ‬ए ጚ ᇸ ) TCXOĂ VCXOई OCXO*ăॺᅱᆩᇀਨ‫ܔ‬ೕ୲৛‫܈‬ᄲ൱!ዐೕ႑ࡽᅼၯጚ้क़!ġ!21! ࢆ้Ⴔᄲٚၯ! ॺᅱ௅ْᅜথ๭ఇ๕ฉ‫้ۉ‬৊ႜᅃْٚၯăኄዖၯጚᅃӯ Ⴔᄲ311!̂t้क़ăNVYPVUฉ‫ڦ‬GJMUFS`DBM` DPNQMFUF႑ࡽ੗ᆩᇀ॔੦୳հഗၯጚ‫׼‬Ⴤ้क़ईཚኪ ၯጚ঳ຐăၯጚ೺क़փᆌ‫ݡ‬࿚BEG8132.Oă! Rev. 0 | Page 38 of 64 ADF7021-N  ࢆ้Ⴔᄲ৛ၯ! LNA/PA೅ದ ැথ๭႑ࡽ‫׉ݥ੻ټ‬থৎዐೕ୳հഗ‫੻ټ‬Lj௅ْഗॲᅜথ ๭ఇ๕ฉ‫้ۉ‬Ljॺᅱ৊ႜᅃْ৛ၯă ᄲ๑ADF7021-Nሞଳ௺‫܈‬Ă݀พࠀ୲ࢅࠀࡼ‫ݛ‬௬՗၄ፌॅ ႠీLjRF๼෇ࢅ๼‫܋؜‬੨ՂႷᇑཀ၍ፆੇኟඓ೅ದă‫ܔ‬ᇀ ‫ׯ‬Ԩ௺ߌ႙ᆌᆩLjADF7021-NದԢᅃ߲ాևRx/Txਸ࠲Lj ᅜ‫ݛ‬Ս๑ᆩ०‫ڦڇ‬ፇࢇ๕࿮ᇸPA/LNA೅ದྪஏăईኁᄺ ੗ᅜ๑ᆩᅃ߲ྔևRx/Txਸ࠲DŽසADG919DžLjࢫኁ੗୼ྲ ༵ߛথ๭ऐଳ௺‫܈‬ժই‫݀گ‬พऐࠀࡼă OBW + ٚၯՎࣅ > IF_FILTER_BW ഄዐǖ OBWྺ݀พ႑ࡽ቞ᆩ‫ڦ੻ټ‬99ǁăٚၯՎࣅྺ2.5 kHzăIF_FILTER_BWEᆯR4_DB[30:31]ยዃă MUXOUTฉ‫ڦ‬FILTER_CAL_COMPLETE႑ࡽ)ᆯR0_DB [29:31]ยዃ*੗ᆩᇀ॔੦୳հഗၯጚ‫׼‬Ⴤ้क़ईཚኪၯጚ঳ ຐă୳հഗٚၯሞ୳հഗ৛ၯമጲ‫ۯ‬ኴႜă ࢆ้Ⴔᄲ‫ْڇ‬৛ၯ! ሞথ๭ऐႴᄲ‫܌‬೺ా‫ْܠ‬ฉ‫ڦۉ‬ᆌᆩዐLjኻႴሞথ๭ऐ‫؛‬ ْฉ‫้ۉ‬৊ႜᅃْႠ৛ၯन੗ă ‫ ْ ؛‬ٚ ၯ ࢅ ৛ ၯ ࢫ Lj ੗ ཚ ࡗ ‫ ز‬ႜ থ ੨ ๑ ᆩ FILTER_CAL_READBACK঳ࡕ‫ܔ‬৛ၯ঳ࡕ৊ႜ࣮‫֖)܁‬९ “୳հഗ‫੻ټ‬ၯጚ࣮‫”܁‬և‫*ݴ‬ăࢫჄᅜথ๭ఇ๕ฉ‫้ۉ‬Lj૧ ᆩമْ୳հഗ৛ၯ঳ࡕ๮‫ۙۯ‬ব୳հഗă๮‫ۙۯ‬ব๟๑ᆩ IF_FILTER_ADJUST࿋)R5_DB[14:19]*ኴႜ‫ڦ‬ă ాևRx/Txਸ࠲ ሞ཮50၂๖‫ڦ‬ದዃዐLjADF7021-NದԢᅃ߲ాևRx/Txਸ ࠲ᆩᇀፇࢇ๕LNA/PA೅ದྪஏăኄ๟EVAL-ADF7021NDBxxೠࠚӱฉ๑ᆩ‫ڦ‬ದዃăాևRx/Txਸ࠲ࣷ๑Ⴀీই ‫گ‬1 dB዁2 dBLj‫ܔ‬ᇀ‫ܠٷ‬ຕᆌᆩܸჾLjኄዖ୼ྲ‫ڦ‬Ⴀీူ ই๟੗ᅜথ๴‫ڦ‬Ljᆩࢽ੗ᅜ؊‫ࣩ݀ݴ‬ኄዖ঴ਦ‫ݛ‬ӄ‫ׯڦ‬Ԩ ᆫ๞ăยऺፇࢇ๕೅ದྪஏ้ՂႷց‫ྪ׋‬ஏሞTxࢅRxୟ০ ዐ༵ࠃ‫ੇۉڦ‬Ljཞ้ॽRx/Txਸ࠲‫ڦ‬ጒༀ੊୯ሞాă VBAT C1 L1 PA_OUT PA ANTENNA ኄዖ‫݆ݛ‬ኻ๢ᆩᇀ‫܌‬೺ాᅜথ๭ఇ๕૶Ⴤฉ‫ڦۉ‬൧઄Ljഄ क़࿒‫܈‬Վࣅ࢔ၭ) 6൐KP < 7ă • ‫ړڍ‬ഔᆩRF_DIVIDE_BY_2(R1_DB18)้LjՊ‫ײ‬AFCၯ থ๭ऐ‫ڦ‬ଳ௺‫ۅ܈‬Lj๑AFC࿮݆ॠ֪‫ڟ‬ă ᄲइ‫ڥ‬ፌॅAFCႠీLjॺᅱยዃྺKI = 11൐KP = 4ăᄲ ሞAFCॺ૬้क़ࢅAFC৛‫܈‬ኮक़ლቴೝ࢚‫ۅ‬Lj੗ߵ਍ ॺᅱยዃۙবKIࢅKP֖ຕ(ԍ‫׼‬ሞඹႹ‫)ాྷݔ‬Ljᅜඓ ԍ AFCၯኟ‫ = ྷݔ‬MAX_AFC_RANGE × 500 Hz Rev. 0 | Page 59 of 64 ADF7021-N DB0 C1 (1) DB6 MT1 DB1 DB7 MT2 C2 (1) DB8 SB1 DB2 DB9 SB2 DB3 DB10 SB3 C3 (0) DB11 SB4 C4 (1) DB12 SB5 DB4 DB13 SB6 CONTROL BITS PL1 DB14 SB7 PL2 DB15 SB8 DB5 MATCHING_ TOLERANCE DB16 SB9 SB10 DB17 SB11 DB18 SB12 DB19 SB13 DB20 SB14 DB21 SB15 DB22 SB16 DB23 SB17 DB24 SB18 DB25 SB19 DB26 SB20 DB27 SB21 DB28 SB22 DB29 SB23 DB30 SYNC_BYTE_SEQUENCE SB24 DB31 SYNC_BYTE_ LENGTH स٪ഗ11—ཞօጴॠ֪स٪ഗ PL2 PL1 SYNC_BYTE_ LENGTH 0 0 1 1 0 1 0 1 12 BITS 16 BITS 20 BITS 24 BITS 0 0 1 1 0 1 0 1 ACCEPT 0 ERRORS ACCEPT 1 ERROR ACCEPT 2 ERRORS ACCEPT 3 ERRORS 07246-041 MATCHING_ MT2 MT1 TOLERANCE ཮74. स٪ഗ11—ཞօጴॠ֪स٪ഗᆙพ SWD_MODE LOCK_ THRESHOLD_ MODE स٪ഗ12—SWD/ពኵยዃस٪ഗ DB15 DB14 DB13 DB12 DB11 DB10 DB9 DB8 DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 DP7 DP6 DP5 DP4 DP3 DP2 DP1 IL2 IL1 LM2 LM1 C4 (1) C3 (1) C2 (0) C1 (0) CONTROL BITS DP8 DATA_PACKET_LENGTH DATA_PACKET_LENGTH 0 1 ... 255 INVALID 1 BYTE ... 255 BYTES SWD_MODE 0 1 2 3 SWD PIN LOW SWD PIN HIGH AFTER NEXT SYNCWORD SWD PIN HIGH AFTER NEXT SYNCWORD FOR DATA PACKET LENGTH NUMBER OF BYTES INTERRUPT PIN HIGH 3 THRESHOLD FREE RUNNING LOCK THRESHOLD AFTER NEXT SYNCWORD LOCK THRESHOLD AFTER NEXT SYNCWORD FOR DATA PACKET LENGTH NUMBER OF BYTES LOCK THRESHOLD 07246-042 LOCK_THRESHOLD_MODE 0 1 2 ཮75. स٪ഗ12—SWD/ពኵยዃस٪ഗᆙพ ໮ۨពኵࣷ໮ۨԈஏॠ֪ഗ‫ڦ‬ពኵăኄᄣ੗ᅜሞ၍Ⴀ঴ۙዐ໮ۨ၌‫ޗ‬ഗLjժሞ๑ᆩ၍Ⴀई၎࠲ഗ঴้ۙ໮ۨAFCࢅAGC࣍ ୟă Rev. 0 | Page 60 of 64 ADF7021-N  स٪ഗ13—3FSK/4FSK঴ۙस٪ഗ ... 0 0 0 0 . . 1 ... ... ... ... ... ... ... 0 0 0 0 . . 1 OFF 1 2 3 . . 127 VM2 VM1 0 1 0 1 DB2 DB1 DB0 C2 (0) C1 (1) DB4 ST1 C3 (1) DB5 ST2 DB3 DB6 C4 (1) DB7 ST3 CONTROL BITS ST4 DB8 DB9 ST5 DB10 DB12 PC1 0 1 0 1 . . 1 ST6 DB13 VM1 0 0 1 1 . . 1 ST7 DB14 VM2 3FSK_CDR_ THRESHOLD DB11 DB15 VT1 VT1 3FSK/4FSK_ SLICER_THRESHOLD VD1 DB16 VT2 VT2 0 0 1 1 PHASE_ CORRECTION 3FSK_VITERBI_ DETECTOR DB17 VT3 DB18 DB19 VT4 DB20 VT6 VT7 VT3 VT5 DB21 3FSK_CDR_THRESHOLD VT7 PTV1 DB22 PTV2 DB23 PTV3 DB24 PTV4 DB25 3FSK_PREAMBLE_ TIME_VALIDATE VITERBI_ PATH_ MEMORY ᆶ࠲ኄၵยዃ‫ڦ‬Պ‫ײ‬႑တLj൩֖९“থ๭ऐยዃ”և‫ݴ‬ă 3FSK_VITERBI_ VD1 DETECTOR 0 DISABLED 1 ENABLED PHASE_ PC1 CORRECTION 0 DISABLED 1 ENABLED VITERBI_PATH _ MEMORY 4 BITS 6 BITS 8 BITS 32 BITS ST7 ... ST3 ST2 ST1 SLICER THRESHOLD 0 0 0 0 . . 1 ... ... ... ... ... ... ... 0 0 0 0 . . 1 0 0 1 1 . . 1 0 1 0 1 . . 1 OFF 1 2 3 . . 127 3FSK_PREMABLE_ PTV4 PTV3 PTV2 PTV1 TIME_VALIDATE 0 0 0 0 . . 1 0 0 1 1 . . 1 0 1 0 1 . . 1 0 1 2 3 . . 15 07246-043 0 0 0 0 . . 1 ཮76. स٪ഗ13—3FSK/4FSK঴ۙस٪ഗᆙพ Rev. 0 | Page 61 of 64 ADF7021-N PULSE_EXTENSION TEST_DAC_GAIN 0 1 2 3 0 1 ... 15 NO PULSE EXTENSION EXTENDED BY 1 EXTENDED BY 2 EXTENDED BY 3 TEST_ TDAC_EN DB13 DB12 DB11 DB10 DB9 DB8 DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 TO8 TO7 TO6 TO5 TO4 TO3 TO2 TO1 TE1 C4 (1) C3 (1) C2 (1) C1 (0) ADDRESS BITS TO9 TO10 DB14 TO11 DB15 TO12 DB16 TO13 DB17 TO14 DB18 TO15 DB19 DB21 DB23 TG3 TG1 DB24 TG4 TEST_DAC_OFFSET TO16 DB20 DB25 ER1 DB22 DB26 LEAKAGE = 2^–8 2^–9 2^–10 2^–11 2^–12 2^–13 2^–14 2^–15 TG2 PULSE_ EXTENSION DB27 EF1 ED_LEAK_FACTOR 0 1 2 3 4 5 6 7 TEST_DAC_GAIN ER2 DB29 EF3 DB28 DB30 PE1 EF2 DB31 PE2 ED_LEAK_ FACTOR ED_PEAK_ RESPONSE स٪ഗ14—֪๬DACस٪ഗ NO GAIN × 2^1 ... × 2^15 ED_PEAK_RESPONSE FULL RESPONSE TO PEAK 0.5 RESPONSE TO PEAK 0.25 RESPONSE TO PEAK 0.125 RESPONSE TO PEAK 07246-044 0 1 2 3 ཮77. स٪ഗ14—֪๬DACस٪ഗᆙพ ᄲ ഔ ᆩ ঴ ۙ ഗ ۙ ၿ ֖ ຕ PULSE_EXTENSIONĂ ໚඗၎࠲ഗࢅ୳հഗᆯDEMOD CLK༵ࠃ้ዓ႑ࡽLj‫֪ڍ‬ ED_LEAK_FACTORࢅ ED_PEAK_RESPONSELj Ղ Ⴗ ॽ ๬DACၠCDR CLK༵ࠃ้ዓ႑ࡽăጀᅪLj৑࠶֪๬DACሞ R15_DB[4:7]ยྺ0x9ă ‫ࡀ׉‬ᆩࢽఇ๕ူ੗ᅜ߾ፕLj‫ॽڍ‬CDR CLKሺे‫ڟ‬DEMOD ૧ᆩ֪๬DACઠํแఇెFM DEMODժ֪ଉSNR CLKೕ୲ईᅜฉ้֍ీइ‫ڥ‬ፌॅႠీăኄዖ൧઄ူCDRఇ ᆶ࠲๑ᆩ֪๬DAC‫ၘڦ‬൧Lj൩֖९“ᆌᆩԴऻAN-852”ă ֪๬DACሎႹᅜྔև‫ݛ‬๕ֱੂ၍Ⴀࢅ၎࠲ഗ঴ۙഗ‫ࢫڦ‬ዃ ঴ۙഗ୳հഗ๼‫؜‬ă֪๬DAC࣏๑ᆩܾ঩ဃֶ‫ݒ‬ઍΣ-Δገ ੷փ߾ፕă Պ‫ײ‬स٪ഗ14ഔᆩ֪๬DACă၍Ⴀࢅ၎࠲ഗ/঴ۙഗ๼‫؜‬ ‫ۼ‬੗‫ܠ‬ୟްᆩ዁DACă ࣑ഗॽ16࿋୳հഗ๼‫؜‬ገ࣑ྺߛೕĂ‫߲ڇ‬࿋๼‫؜‬ă๼‫؜‬੗ स٪ഗ14ሎႹٗ႑ࡽዐၩ‫ۨࠦأ‬฿ۙၜ(ణ‫ڦ‬๟ሞddt൧઄ ሞSWDᆅগฉֱੂă๢‫୳ړ‬հࢫLjُ႑ࡽ੗ᆩᇀසူ֡ ူၩ‫أ‬ዐೕ‫ݴ‬ଉ)ă໲࣏ᆶᅃ߲႑ࡽሺᅮၜLjᅜሎႹ๑ᆩ ፕǖ DAC‫ڦ‬ፌ‫ۯٷ‬ༀ‫ྷݔ‬ă • ॔੦FSKࢫዃ঴ۙഗ୳հഗ๼‫ڦ܋؜‬႑ࡽLjኄᄣन੗ ֪ଉ঴ۙഗ๼‫؜‬SNRăᄺ੗ࠓॺথ๭࿋ୁ‫ڦ‬ᄅ཮ᅜ֪ ଉথ๭႑ࡽዊଉă • ༵ࠃఇెFM঴ۙă Rev. 0 | Page 62 of 64 ADF7021-N  DB1 DB0 DB5 RT2 C1 (1) DB6 RT3 DB2 DB7 RT4 C2 (1) DB8 TM1 C3 (1) DB9 TM2 DB3 DB10 ADDRESS BITS DB4 DB11 Rx_TEST_ MODES SD1 Tx_TEST_ MODES TM3 Σ-Δ_TEST_ MODES RT1 DB12 CLK_MUX C4 (1) DB13 SD2 DB19 CM3 DB14 DB20 PM1 SD3 DB21 PM2 PC1 DB22 PM3 DB15 PFD/CP_TEST_ MODES DB23 PM4 DB16 DB24 PC2 DB25 AM1 PC3 DB26 AM3 AM2 DB17 DB27 DB18 DB28 FH1 AM4 PLL_TEST_ MODES CM1 DB29 RD1 ANALOG_TEST_ MODES CM2 REG 1_PD FORCE_LD HIGH DB30 CO1 CAL_ OVERRIDE DB31 CO2 स٪ഗ15—֪๬ఇ๕स٪ഗ CAL_OVERRIDE 0 1 2 3 AUTO CAL OVERRIDE GAIN OVERRIDE BW OVERRIDE BW AND GAIN PFD/CP_TEST_MODES 0 1 2 3 4 5 6 7 REG1_PD 0 1 NORMAL PWR DWN DEFAULT, NO BLEED (+VE) CONSTANT BLEED (–VE) CONSTANT BLEED (–VE) PULSED BLEED (–VE) PULSE BLD, DELAY UP? CP PUMP UP CP TRI-STATE CP PUMP DN FORCE_LD_HIGH 0 1 Σ-Δ_TEST_MODES NORMAL FORCE 0 1 2 3 4 5 6 7 ANALOG_TEST_MODES 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 BAND GAP VOLTGE 40μA CURRENT FROM REG4 FILTER I CHANNEL: STAGE 1 FILTER I CHANNEL: STAGE 2 FILTER I CHANNEL: STAGE 1 FILTER Q CHANNEL: STAGE 1 FILTER Q CHANNEL: STAGE 2 FILTER Q CHANNEL: STAGE 1 ADC REFERENCE VOLTAGE BIAS CURRENT FROM RSSI 5μA FILTER COARSE CAL OSCILLATOR O/P ANALOG RSSI I CHANNEL OSET LOOP +VE FBACK V (I CH) SUMMED O/P OF RSSI RECTIFIER+ SUMMED O/P OF RSSI RECTIFIER– BIAS CURRENT FROM BB FILTER DEFAULT, 3RD ORDER SD, NO DITHER 1ST ORDER SD 2ND ORDER SD DITHER TO FIRST STAGE DITHER TO SECOND STAGE DITHER TO THIRD STAGE DITHER × 8 DITHER × 32 Tx_TEST_MODES 0 1 2 3 4 5 6 NORMAL OPERATION Tx CARRIER ONLY Tx +VE TONE ONLY Tx –VE TONE ONLY Tx "1010" PATTERN Tx PN9 DATA, AT PROGRAMED RATE Tx SYNC BYTE REPEATEDLY Rx_TEST_MODES 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 PLL_TEST_MODES 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 NORMAL OPERATION R DIV N DIV RCNTR/2 ON MUXOUT NCNTR/2 ON MUXOUT ACNTR TO MUXOUT PFD PUMP UP TO MUXOUT PFD PUMP DN TO MUXOUT SDATA TO MUXOUT (OR SREAD?) ANALOG LOCK DETECT ON MUXOUT END OF COARSE CAL ON MUXOUT END OF FINE CAL ON MUXOUT FORCE NEW PRESCALER CONFIG. FOR ALL N TEST MUX SELECTS DATA LOCK DETECT PERCISION RESERVED NORMAL SCLK, SDATA -> I, Q REVERSE I,Q I,Q TO TxRxCLK, TxRxDATA 3FSK SLICER ON TxRxDATA CORRELATOR SLICER ON TxRxDATA LINEAR SLICER ON RXDATA SDATA TO CDR ADDITIONAL FILTERING ON I, Q ENABLE REG 14 DEMOD PARAMETERS POWER DOWN DDT AND ED IN T/4 MODE ENVELOPE DETECTOR WATCHDOG DISABLED RESERVED PROHIBIT CALACTIVE FORCE CALACTIVE ENABLE DEMOD DURING CAL CLK MUXES ON CLKOUT PIN NORMAL, NO OUTPUT DEMOD CLK CDR CLK SEQ CLK BB OFFSET CLK SIGMA DELTA CLK ADC CLK TxRxCLK 07246-045 0 1 2 3 4 5 6 7 ཮78. स٪ഗ15—֪๬ఇ๕स٪ഗᆙพ • ॽANALOG_TEST_MODESยྺ11Lj੗ሞTest_Aᆅগ • ฉֱੂఇెRSSIă • ᄲಖୟCDRఇ੷Lj੗ॽRx_TEST_ MODESยྺ4Ă5ई6 ઠಖୟLjਏ༹๫໯ᆩ঴ۙഗܸۨă Tx_TEST_MODES੗ᆩઠഔᆩ֪๬ۙ዆ă Rev. 0 | Page 63 of 64 ADF7021-N ྔႚ؅٫ 7.00 BSC SQ 0.60 MAX 37 36 PIN 1 INDICATOR TOP VIEW 12° MAX 48 PIN 1 INDICATOR 1 EXPOSED PAD 6.75 BSC SQ 4.25 4.10 SQ 3.95 (BOTTOM VIEW) 0.50 0.40 0.30 1.00 0.85 0.80 0.30 0.23 0.18 0.60 MAX 25 24 12 13 0.25 MIN 5.50 REF 0.80 MAX 0.65 TYP 0.05 MAX 0.02 NOM 0.50 BSC SEATING PLANE 0.20 REF COPLANARITY 0.08 ‫ࢇޙ‬JEDECՔጚMO-220-VKKD-2 ཮79. 48ᆅগLFCSP_VQ‫ހ‬ጎLj 7 mm x 7 mm‫ג‬ԋ༹ (CP-48-3)Lj ؅٫‫ڇ‬࿋ǖmm ۩ࠔኸళ ႙ࡽ ADF7021-NBCPZ 1 ADF7021-NBCPZ-RL1 ADF7021-NBCPZ-RL71 ADF7021-NDF EVAL-ADF70XXMBZ21 EVAL-ADF7021-NDBIZ1 EVAL-ADF7021-NDBEZ1 EVAL-ADF7021-NDBZ21 EVAL-ADF7021-NDBZ51 1 ࿒‫ྷݔ܈‬ −40°C዁+85°C −40°C዁+85°C −40°C዁+85°C −40°C዁+85°C ‫ހ‬ጎ௮ຎ 48ᆅগLFCSP_VQ 48ᆅগLFCSP_VQ 48ᆅগLFCSP_VQ ԋఈႊೌ ೠࠚೝ໼ዷӱ 426 MHz዁429 MHzጱӱ 426 MHz዁429 MHzጱӱ 860 MHz዁870 MHzጱӱ ೅ದ࿮ሜጱӱ Z = ‫ࢇޙ‬RoHSՔጚ‫ڦ‬ग़ඹഗॲă ©2008 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D07246-0-2/08(0) Rev. 0 | Page 64 of 64 ‫ހ‬ጎ჋ၜ CP-48-3 CP-48-3 CP-48-3
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EVAL-ADF7021-NDBIZ
    •  国内价格
    • 1+1354.37400
    • 200+540.41040
    • 500+522.35280
    • 1000+513.42120

    库存:0