EVAL-ADuM1441EBZ User Guide
UG-630
One Technology Way • P.O. Box 9106 • Norwood, MA 02062-9106, U.S.A. • Tel: 781.329.4700 • Fax: 781.461.3113 • www.analog.com
Evaluating the iCoupler ADuM1440ARQZ/ADuM1441ARQZ/
ADuM1442ARQZ/ADuM1445ARQZ/ADuM1446ARQZ/ADuM1447ARQZ
with the EVAL-ADuM1441EBZ Evaluation System
FEATURES
GENERAL DESCRIPTION
Access to all 4 data channels
Multiple connection options
Support for Tektronix active probes
Provision for cable terminations
Support for PCB edge-mounted coaxial connectors
Easy configuration
Installed iCoupler digital isolator: ADuM1441 in 16-lead QSOP
The EVAL-ADuM1441EBZ supports the ADuM1440ARQZ,
ADuM1441ARQZ, ADuM1442ARQZ, ADuM1445ARQZ,
ADuM1446ARQZ, and ADuM1447ARQZ, which are ultralow
power, 4-channel iCoupler® isolators. The evaluation board
provides a JEDEC standard 16-lead QSOP pad layout, support
for signal distribution, loopback, and loads referenced to VDDx
or GNDx, as well as optimal bypass capacitance. Signal sources
can be wired onto the board as well as brought onto the board
through edge-mounted SubMiniature version A (SMA)
connectors (sold separately) or terminal blocks for power
connections. The board includes 200 mil (5.08 mm) header
positions for compatibility with Tektronix active probes.
SUPPORTED iCoupler MODELS
ADuM1440ARQZ
ADuM1441ARQZ
ADuM1442ARQZ
ADuM1445ARQZ
ADuM1446ARQZ
ADuM1447ARQZ
The board follows best printed circuit board (PCB) design practices
for 4-layer boards, including a full power and ground plane on
each side of the isolation barrier. No other electromagnetic
interference (EMI) or noise mitigation design features are
included on this board. In cases of high speed operation or
when ultralow emissions are required, refer to the AN-1109
application note for additional board layout techniques.
11889-006
PHOTOGRAPH OF THE EVALUATION BOARD
Figure 1. EVAL-ADuM1441EBZ Evaluation Board
PLEASE SEE THE LAST PAGE FOR AN IMPORTANT
WARNING AND LEGAL TERMS AND CONDITIONS.
Rev. A | Page 1 of 6
UG-630
EVAL-ADuM1441EBZ User Guide
TABLE OF CONTENTS
Features .............................................................................................. 1
Connectors .....................................................................................3
Supported iCoupler Models ............................................................ 1
Power Input ....................................................................................3
General Description ......................................................................... 1
Data Input/Output (I/O) Structures ...........................................4
Photograph of the Evaluation Board .............................................. 1
Bypass on the PCB ........................................................................4
Revision History ............................................................................... 2
High Voltage Capability ...............................................................4
Evaluation Board Circuitry ............................................................. 3
Evaluation Board Schematics and Artwork ...................................5
PCB Evaluation Goals .................................................................. 3
Bill of Materials ..................................................................................6
REVISION HISTORY
10/2017—Rev. 0 to Rev. A
Changes to Connectors Section and Power Input Section ......... 3
Changes to Table 1 ............................................................................ 6
11/2013—Revision 0: Initial Version
Rev. A | Page 2 of 6
EVAL-ADuM1441EBZ User Guide
UG-630
EVALUATION BOARD CIRCUITRY
PCB EVALUATION GOALS
The EVAL-ADuM1441EBZ board is intended to achieve the
following goals:
•
2) SMA CONNECTOR
Evaluate the full range of iCoupler data transfer functions
Power each side of the iCoupler isolator independently
Allow high differential voltage to be applied between the
two sides of the iCoupler isolator
Allow easy connecting to power and instrumentation
5) SCOPE PROBE
HEADER
Although the evaluation board comes with the ADuM1441ARQZ
iCoupler digital isolator installed, the board is also compatible with
the ADuM1440ARQZ, ADuM1442ARQZ, ADuM1445ARQZ,
ADuM1446ARQZ, and ADuM1447ARQZ, and the user can substitute any of these components in place of the ADuM1441ARQZ.
3) TERMINAL
BLOCK
6) PADS TO
CONNECT SMA
4) SHORTING
JUMPER
11889-002
•
•
•
1) SCOPE PROBE
Figure 2. Optional Components
CONNECTORS
The PCB provides support for three types of interconnections:
POWER INPUT
•
•
•
Each side of the ADuM1440ARQZ/ADuM1441ARQZ/
ADuM1442ARQZ/ADuM1445ARQZ/ADuM1446ARQZ/
ADuM1447ARQZ iCoupler isolator requires an off board power
source. Each power source must be independent if common-mode
voltages are applied across the isolation barrier. Sharing a single
supply for both sides of the device across the isolation barrier does
not harm the isolator, and it is useful for functional testing of
the ADuM1440ARQZ/ADuM1441ARQZ/ADuM1442ARQZ/
ADuM1445ARQZ/ADuM1446ARQZ/ADuM1447ARQZ
iCoupler isolator when common-mode voltages are not present.
If common-mode voltages are applied across the isolation
barrier, provide independent power supplies for each side of the
isolator.
SMA edge-mounted connectors
Through-hole signal ground pairs
Terminal blocks for power connections
With these three options, both temporary and permanent
connections to the board can easily be made.
When coaxial connections are desired, SMA connector positions
are available for VDD1A, VDD1B, VDD2A, and VDD2B power
supplies, as well as all digital inputs and outputs. These SMA
connector positions are left unpopulated so that the user can
customize the connectors for a given application. Figure 2
shows examples of installed SMA connectors; these connectors
are chosen because they are not only low profile and provide
excellent mechanical connections to the PCB but also support
50 Ω coaxial cabling. Because most lab equipment is compatible
with BNC connectors, adaptors may be required to use some on
board connectors.
Power can be connected through the P15 and P16 terminal blocks
or can be wired directly to the PCB via the P13 and P14
through-hole connectors. Each through-hole pair provides a power
ground pair with the power on the Pin 1 hole. The pin spacing
of each through-hole connector is 200 mil (5.08 mm) between
centers. This 200 mil (5.08 mm) spacing matches the pin spacing
required for Tektronix active scope probes. When a scope probe
connection is needed, the header shown in Figure 2 can be
soldered into the through-hole positions, and the signal pin can
be trimmed to match the height requirements of a Tektronix
active scope probe.
The inner layers of the PCB are full power and ground planes
on each side of the isolation barrier. Power connects to VDD1A
and VDD1B for Side 1 and to VDD2A and VDD2B for Side 2.
The A and B power pins on each side cannot be powered
separately.
Rev. A | Page 3 of 6
UG-630
EVAL-ADuM1441EBZ User Guide
DATA INPUT/OUTPUT (I/O) STRUCTURES
Figure 2 shows many of the optional components installed, as well
as how jumpers can connect channels temporarily. Figure 2
shows a signal connected to the first channel SMA and then
fanned out to the top three channels and monitored by an active
scope probe.
Each data channel has a variety of structures to help configure,
load, and monitor both the input and the output. Figure 3 shows
one of the datapaths from an external connection to the device
under test (DUT) pin. Each channel has similar connections.
Starting at the external connection, the signal path is as follows:
BYPASS ON THE PCB
1.
Several positions and structures are provided to allow optimum
bypass of the evaluation board. Provision has been made for
optional surface-mount bulk capacitors to be installed near
the power connectors to compensate for long cables to the
power supply. Parallel bypass capacitors are installed near the
ADuM1441ARQZ and consist of a 0.1 µF capacitor for each
VDDxA on the top side and bottom side and a 0.1 µF capacitor
for each VDDxB on the bottom side of the board. It is best to
use the top side bypass positions if possible.
3.
4.
5.
6.
7.
8.
The PCB also implements a distributed capacitive bypass on the
PCB, which consists of power and ground planes closely spaced
on the inner layers of the PCB. This construction minimizes
noise and the transmission of EMI without using complex
design features.
HIGH VOLTAGE CAPABILITY
This PCB is designed in adherence with 2500 V basic insulation
practices. High voltage testing beyond 2500 V is not recommended.
Appropriate care must be taken when using this evaluation board
at high voltages. Do not rely on the PCB for safety functions
because it has not been high potential tested (also known as
hipot tested or dielectric withstanding voltage tested) or
certified for safety.
1 SMA CONNECTOR PADS
6 OPEN HOLES FOR
SOLDERED WIRES OR 200mil
TEKTRONIX HEADER,
GND/GND/SIGNAL
8 CONNECT TO
NEXT CHANNEL UP
2 TERMINATION
2 × 100Ω
8 CONNECT TO
NEXT CHANNEL DOWN
5 2-PIN HEADER
GND/SIGNAL
4 PULL-UP
PAD
7 PULL-DOWN
PAD
3 CONNECT
TO SMA
NOTES
1. THE NUMBERED COMPONENTS IN THIS FIGURE CORRESPOND
TO THE DESCRIPTIONS IN THE DATA I/O STRUCTURES SECTION.
11889-004
2.
A pad layout for a PCB board edge-mounted SMA
connector.
Two 0805 pads are provided where 100 Ω resistors to
ground can be installed. The combined resistance is 50 Ω
to provide a termination for a standard coaxial cable.
A standard 0805 pad layout that allows the coaxial and
termination structures to be connected to the rest of the
signal path.
A 0603 pad layout between the signal path and VDDxA or
VDDxB can be used for installing a pull-up resistor.
A populated 2-pin header provides a signal ground pair
that can be used for clip leads or for shorting a channel to
ground temporarily.
There are groupings of three open through holes, consisting
of a signal and two ground connections. These holes can be
used for hardwiring signal wires into the PCB, installing a
header to accept a Tektronix active probe, or installing a
2-pin header to allow adjacent channels to temporarily be
shorted together.
A 0805 pad layout between the signal and ground where a
load capacitor or resistor can be installed.
Pads to the adjacent channels are provided to allow permanent
connection of adjacent channels. Inputs can be fanned out
to several channels, or inputs and outputs can be connected
together to allow signals to be looped back.
Figure 3. Configuration and Monitoring Structures (Showing a Datapath from an External Connection to the DUT Pin)
Rev. A | Page 4 of 6
EVAL-ADuM1441EBZ User Guide
UG-630
EVALUATION BOARD SCHEMATIC AND ARTWORK
DNI
J13
5
VDD1
DNI
R5
VIA_1
1
DNI
R1
100
2 3 4 5
DNI
R3
100
0
VDD1
4
DNI
3 C32
10UF
P15
P13
P16
1
2
1
2
DNI
R7
0
1
VDD2
P14
1
2
1716020000
1
2
DNI
C8
10UF
J14
5 4 3 2
VDD2
DNI
R11
0
1716020000
AGND1
AGND2
VIA_2
DNI
C1
15PF
P1A
1
2
3
P1B
1
2
DNI
R9
0
DNI
R40
0
AGND1
VDD1
DNI
J2
DNI
R6
VIB_1
1
DNI
R2
100
2 3 4 5
DNI
R4
100
AGND1
DNI
R8
0
DNI
R27
100
DNI
R31
2 3 4 5
DNI
R29
100
P2A
1
2
3
DNI
R37
0
0
DUT1
1
2
1
2
3
4
5
6
7
8
VDD1
AGND1
DNI
R33
0
VIC_2
DNI
C6
15PF
P3A
1
2
3
P3B
VDD1
VDD1
VDD2
GND1
GND2
VIA
VOA
VIB
VOB
VXC1
VXC2
VXD1
VXD2
EN1 EN2/NC
GND1
GND2
16
15
14
13
12
11
10
9
VDD2
DNI
R38
0
AGND1
DNI
R22
VID_1
DNI
R10
100
2 3 4 5
0
DNI
R20
100
DNI
R26
0
1
2
3
DNI
R39
0
DNI
R23
EN1_1
1
DNI
R19
100
2 3 4 5
AGND1
DNI
R21
100
0
1
2
P8A
1
2
P8B
EN1_2
P5A
P5B
DNI
VOB_2
DNI
R16
100
J8
1
DNI
R18
100
5 4 3 2
VDD2
DNI
R43
0
DNI
R47
1
2
3
P9A
1
2
P9B
DNI
C15
15PF
0
DNI
VOC_2
DNI
R51
100
J9
1
DNI
R55
100
5 4 3 2
VDD2
DNI
R49
1
2
3
P10A
1
2
P10B
VDD1
VDD2
VDD2
DNI
C19
0.1UF
C23
0.1UF
C13
0.1UF
C21
0.1UF
C28
0.1UF
AGND2
AGND1
AGND1
AGND2
Figure 4. EVAL-ADuM1441EBZ Schematic
Figure 5. Top Side Layout
Rev. A | Page 5 of 6
DNI
R53
100
J10
1
DNI
R57
100
5 4 3 2
DNI
R48
P11A
P12B
DNI
C16
15PF
0
DNI
EN2_2
DNI
R52
100
J11
1
DNI
R56
100
5 4 3 2
AGND2
1
2
3
DNI
C11
0.1UF
DNI
VOD_2
VDD2
DNI
R44
0
1
2
3
VDD1
0
DNI
C17
15PF
EN2_1
1
2
3
1
2
3
0
AGND2
AGND1
DNI
R25
0
DNI
C5
15PF
1
2
3
AGND2
11889-005
DNI
J5
DNI
R14
DNI
C10
15PF
VOD_1
AGND1
P4B
5 4 3 2
AGND2
VID_2
VDD1
DNI
R17
100
AGND2
DNI
R12
0
DNI
R45
0
P4A
J7
1
DNI
R15
100
AGND2
AGND2
DNI
R24
0
DNI
C4
15PF
DNI
VOA_2
VDD2
VOC_1
DNI
R41
0
1
2
0
AGND2
AGND1
1
P7B
AGND2
GEN_QSOP16
16 LEAD QSOP CLAMP
DNI
R35
0
AGND1
DNI
J4
1
2
VIB_2
DNI
C2
15PF
P2B
VIC_1
P7A
VOB_1
0
VDD1
1
1
2
3
DNI
C9
15PF
AGND2
AGND1
DNI
J3
DNI
R13
VOA_1
11889-003
DNI
J1
DNI
1
UG-630
EVAL-ADuM1441EBZ User Guide
BILL OF MATERIALS
Table 1. Bill of Materials
Qty
1
2
2
2
2
8
2
4
7
Reference Designator
DUT1
C23, C28
P15, P16
Not applicable
P5B, P12B
P1B to P4B, P7B to P10B
C3, C8
C11, C13, C19, C21
C1 to C5, C15, C16
42
R1 to R27, R29, R31, R33, R43 to R45,
R47 to R49, R51 to R53, R55 to R57
P1A to P12A, P13, P14
J1 to J5, J7 to J11, J13, J14
14
12
1
Description
DUT
0.1 µF, 16 V, 10%, 0603
Terminal blocks
100 mil (2.54 mm) jumper
3-pin headers, 100 mil (2.54 mm) spacing
2-pin headers, 100 mil (2.54 mm) spacing
0805 bypass capacitor position
0.1 µF, 16 V, 10%, 0603
0603 pads for optional, application specific
connections
0805 pads for optional, application specific
connections
2-pin headers, 200 mil (5.08 mm) spacing
SMA edge connectors
Part Number 1
Analog Devices, Inc., ADuM1441ARQZ
AVX, 0603YC104KAT2A
On-Shore Technology, Inc., OSTTC022162
65474-001LF
FCI, 90726-403HLF
Samtec HTSW-102-07-T-S
DNI
DNI
DNI
DNI
DNI, Samtec MTSW-202-12-G-S-730
DNI, Johnson/Emerson Network Power
Connectivity Solutions, Inc., 142-0701-851
DNI means do not install.
ESD Caution
ESD (electrostatic discharge) sensitive device. Charged devices and circuit boards can discharge without detection. Although this product features patented or proprietary protection
circuitry, damage may occur on devices subjected to high energy ESD. Therefore, proper ESD precautions should be taken to avoid performance degradation or loss of functionality.
Legal Terms and Conditions
By using the evaluation board discussed herein (together with any tools, components documentation or support materials, the “Evaluation Board”), you are agreeing to be bound by the terms and conditions
set forth below (“Agreement”) unless you have purchased the Evaluation Board, in which case the Analog Devices Standard Terms and Conditions of Sale shall govern. Do not use the Evaluation Board until you
have read and agreed to the Agreement. Your use of the Evaluation Board shall signify your acceptance of the Agreement. This Agreement is made by and between you (“Customer”) and Analog Devices, Inc.
(“ADI”), with its principal place of business at One Technology Way, Norwood, MA 02062, USA. Subject to the terms and conditions of the Agreement, ADI hereby grants to Customer a free, limited, personal,
temporary, non-exclusive, non-sublicensable, non-transferable license to use the Evaluation Board FOR EVALUATION PURPOSES ONLY. Customer understands and agrees that the Evaluation Board is provided
for the sole and exclusive purpose referenced above, and agrees not to use the Evaluation Board for any other purpose. Furthermore, the license granted is expressly made subject to the following additional
limitations: Customer shall not (i) rent, lease, display, sell, transfer, assign, sublicense, or distribute the Evaluation Board; and (ii) permit any Third Party to access the Evaluation Board. As used herein, the term
“Third Party” includes any entity other than ADI, Customer, their employees, affiliates and in-house consultants. The Evaluation Board is NOT sold to Customer; all rights not expressly granted herein, including
ownership of the Evaluation Board, are reserved by ADI. CONFIDENTIALITY. This Agreement and the Evaluation Board shall all be considered the confidential and proprietary information of ADI. Customer may
not disclose or transfer any portion of the Evaluation Board to any other party for any reason. Upon discontinuation of use of the Evaluation Board or termination of this Agreement, Customer agrees to
promptly return the Evaluation Board to ADI. ADDITIONAL RESTRICTIONS. Customer may not disassemble, decompile or reverse engineer chips on the Evaluation Board. Customer shall inform ADI of any
occurred damages or any modifications or alterations it makes to the Evaluation Board, including but not limited to soldering or any other activity that affects the material content of the Evaluation Board.
Modifications to the Evaluation Board must comply with applicable law, including but not limited to the RoHS Directive. TERMINATION. ADI may terminate this Agreement at any time upon giving written notice
to Customer. Customer agrees to return to ADI the Evaluation Board at that time. LIMITATION OF LIABILITY. THE EVALUATION BOARD PROVIDED HEREUNDER IS PROVIDED “AS IS” AND ADI MAKES NO
WARRANTIES OR REPRESENTATIONS OF ANY KIND WITH RESPECT TO IT. ADI SPECIFICALLY DISCLAIMS ANY REPRESENTATIONS, ENDORSEMENTS, GUARANTEES, OR WARRANTIES, EXPRESS OR IMPLIED, RELATED
TO THE EVALUATION BOARD INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, TITLE, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT OF INTELLECTUAL
PROPERTY RIGHTS. IN NO EVENT WILL ADI AND ITS LICENSORS BE LIABLE FOR ANY INCIDENTAL, SPECIAL, INDIRECT, OR CONSEQUENTIAL DAMAGES RESULTING FROM CUSTOMER’S POSSESSION OR USE OF
THE EVALUATION BOARD, INCLUDING BUT NOT LIMITED TO LOST PROFITS, DELAY COSTS, LABOR COSTS OR LOSS OF GOODWILL. ADI’S TOTAL LIABILITY FROM ANY AND ALL CAUSES SHALL BE LIMITED TO THE
AMOUNT OF ONE HUNDRED US DOLLARS ($100.00). EXPORT. Customer agrees that it will not directly or indirectly export the Evaluation Board to another country, and that it will comply with all applicable
United States federal laws and regulations relating to exports. GOVERNING LAW. This Agreement shall be governed by and construed in accordance with the substantive laws of the Commonwealth of
Massachusetts (excluding conflict of law rules). Any legal action regarding this Agreement will be heard in the state or federal courts having jurisdiction in Suffolk County, Massachusetts, and Customer hereby
submits to the personal jurisdiction and venue of such courts. The United Nations Convention on Contracts for the International Sale of Goods shall not apply to this Agreement and is expressly disclaimed.
©2013–2017 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
UG11889-0-10/17(A)
Rev. A | Page 6 of 6
