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EVAL-CN0190-EB1Z

EVAL-CN0190-EB1Z

  • 厂商:

    AD(亚德诺)

  • 封装:

    Module

  • 描述:

    EVAL BOARD FOR CN0190

  • 数据手册
  • 价格&库存
EVAL-CN0190-EB1Z 数据手册
Circuit Note CN-0190 Devices Connected/Referenced Circuits from the Lab™ reference circuits are engineered and tested for quick and easy system integration to help solve today’s analog, mixed-signal, and RF design challenges. For more information and/or support, visit www.analog.com/CN0190. ADP1872 Synchronous Buck Controller ADP121 150 mA Linear Regulator ADP1864 Step-Down Controller ADP1613 Step-Up PWM Switching Converter ADP2114 Dual Synchronous Step-Down Regulator ADM1066 Super Sequencer® with Margining ADP2300 Nonsynchronous Step-Down Regulator ADM1178 Hot Swap Controller and Digital Power Monitor ADP2301 Nonsynchronous Step-Down Regulator ADCMP670 Dual Comparator with Reference ADP2108 600 mA , 3 MHz Step-Down Converter ADM1170 ADP1741 2 A, Low Dropout Linear Regulator ADCMP350 Comparator with Reference ADP151 Ultralow Noise, 200 mA Linear Regulator AD628 1.6 V to 16.5 V Hot Swap Controller High Common-Mode Difference Amp Robust, Multivoltage, High Efficiency, 25 W Universal Power Supply Module with 6 V to 14 V Input EVALUATION AND DESIGN SUPPORT CIRCUIT FUNCTION AND BENEFITS Circuit Evaluation Boards CN-0190 Circuit Evaluation Board (EVAL-CN0190-EB1Z) Design and Integration Files Schematics, Layout Files, Bill of Materials Modern complex systems using various combinations of FPGAs, CPUs, DSPs, and analog circuits typically require multiple voltage rails. In order to provide high reliability and stability, the power system must not only provide the multiple voltage rails but also include proper sequencing control and necessary protection circuits. 6V TO 14V ADM1178 INPUT CONTROL POWER MONITOR ADP1872 3.3V (2A) SYNC-BUCK CONTROLLER ADP121 I2C INTERFACE LOW QUIESCENT CURRENT LDO 3V (0.1A) ADP2114 1.5V (1A) DUAL SYNC BUCK REGULATOR 1.8V (1A) ADP1741 ADP2300 NON-SYNC BUCK REGULATOR SYNC BUCK REGULATOR ADM1066 SEQUENCING MONITORING MARGIN CONTROL ADP2108 LOW DROPOUT HIGH CURRENT LDO 1.0V (2A) 1.2V (0.5A) 2.5V (1A) ADP1864 NON-SYNC BUCK CONTROLLER ADP2301 NON-SYNC BUCK REGULATOR –5V (0.2A) 5V (1A) ADP151 3.3V (0.1A) LOW NOISE LDO ADP1613 ENABLE Px (0.1A) 2.5V, 5V, 12V OR 15V ENABLE Nx (0.1A) ENABLE 09578-001 NON-SYNC BOOST REGULATOR Figure 1. Functional Block Diagram of Universal Power Supply Module Rev.0 Circuits from the Lab™ circuits from Analog Devices have been designed and built by Analog Devices engineers. Standard engineering practices have been employed in the design and construction of each circuit, and their function and performance have been tested and verified in a lab environment at room temperature. However, you are solely responsible for testing the circuit and determining its suitability and applicability for your use and application. Accordingly, in no event shall Analog Devices be liable for direct, indirect, special, incidental, consequential or punitive damages due to any cause whatsoever connected to the use of any Circuits from the Lab circuits. (Continued on last page) One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2011 Analog Devices, Inc. All rights reserved. CN-0190 Circuit Note undervoltage, and overcurrent detection and protection. In addition, this module shows how to implement sequencing and power margining control. The module shown in Figure 1 is a reference solution for multivoltage power systems. The design can easily be adapted to customer requirements and provides the most popular system voltages. The circuit uses an optimum combination of switching and linear regulators to provide an overall efficiency of approximately 78% when the outputs are fully loaded. Output power delivered under full load is approximately 25 W. The circuit is flexible and can accept a wide input voltage range from 6 V to 14 V. This is possible because the highly efficient switching controllers and regulators used in the first stage of each power rail have correspondingly wide input ranges. The ADM1178 block provides overvoltage and overcurrent detection and protection for the input supply, as well as hotswap control for the whole system. The ADM1066 offers a single-chip solution for power supply monitoring and sequencing control for all of the 12 power rails and also margining control for the 3.3V(2A) rail. CIRCUIT DESCRIPTION A functional block diagram of the circuit is shown in Figure 1. Complete schematics of each section are included in the CN0190 Design Support Package. This module supplies most of the typical power rails required for digital and analog circuits and also demonstrates an easy way to realize overvoltage, VIN_MAIN R2 SYSTEM_POWERIN S 15mΩ 1% 2010 G D Q1 Si7461DP R4 100kΩ 1% 0603 R1 100kΩ 1% 0603 V3_3_AUX D1 RED LED0603 TP1 U1 R65 100kΩ 1% 0603 1 2 3 4 5 EN_ADP1178 C2 0.1µF 50V 0603 SYS_GND VCC SENSE ON GND TIMER C31 0.1µF 50V 0603 VIN Q2 SI7192DP 30V 60A ALERT GATE ADR SDA SCL 10 9 8 7 6 ADM1178ARMZ R3 10Ω 1% 0603 R5 1kΩ 1% 0603 SYS_GND SCL SDA SYS_GND SYS_GND SYS_GND VIN_MAIN R11 52.3kΩ 1% 0603 V3_3_AUX Q5 SI2302CDS-T1-GE3 20V 3A R8 1kΩ 1% 0603 SYS_GND SYS_GND R9 1kΩ 1% 0603 U3 1 2 3 SYS_GND R11 1.5kΩ 1% 0603 Q4 Si2302CDS-T1-GE3 20V 3A VOUTA GND +INA SYS_GND V3_3_AUX 6 VOUTB 5 VDD 4 –INB ADCMP670-1YUJZ D4 RED LED0603 SYS_GND D2 RED LED0603 SYS_GND Figure 2. Module Input Protection Circuit Rev. 0 | Page 2 of 16 R12 60.4kΩ 1% 0603 C5 0.1µF 50V 0603 R13 4.7kΩ 1% 0603 SYS_GND 09578-002 VIN_MAIN Circuit Note CN-0190 Description of Input Protection Circuits The circuit shown in Figure 2 provides input protection for the module and is described in detail in the following sections. Input Voltage Polarity Reversal Protection Protection against input voltage reversal is provided by the P-channel MOSFET, Q1. In normal operation with positive input voltages, Q1 (SI7461DP) turns on when the voltage between SYSTEM_POWERIN and SYS_GND is positive and larger than the gate-to-source threshold voltage. If the input is negative (fault condition with polarity reversed), Q1 will turn off to prevent the main circuit from damage, and its function is similar to that of a diode. Because of the high input current (up to 6.67 A), a P-channel MOSFET is much better than a diode because the low onresistance of the MOSFET minimizes power dissipation. For example, the on-resistance of the SI7461DP is approximately 0.02 Ω for a VGS of −4.5 V. A current of 6.67 A yields a power dissipation of only 0.9 W. A diode with 0.6 V forward drop would dissipate about 4 W at the same current. The maximum V GS of the SI7461DP is ±20 V which covers the module's input range of 6 V to 14 V. Note that the gate bias voltage for Q1 is supplied by the output of the divider R4-R5 to make Q1 robust to input voltage changes. Overcurrent Detection and Protection Input current is sensed by using the ADM1178 hot-swap controller/digital power monitor to measure the voltage drop across R2, the 15 mΩ current sense resistor. The ADM1178 internal FET drive controller regulates the maximum load current by modulating the gate voltage of the N-channel MOSFET, Q2. When the voltage through the sense resistor is more 100 mV, the gate drive voltage limits the current through Q2, thereby protecting downstream circuitry. Overvoltage and Undervoltage Detection and Protection The ADCMP670-1 is a dual, low power, high accuracy comparator with an internal 400 mV reference. The two comparators and the external MOSFETs, Q4 and Q5, are configured as a window comparator. The low and high voltage thresholds of 5.54 V and 14.35 V, respectively, are set by the dividers R10–R11 and R12–R13. If the input voltage is outside the window on the high side, VOUTA goes high, Q5 turns on, and the ON pin of the AD1178 is pulled low, thereby turning Q2 off. Similarly, if the input voltage is outside the window on the low side, VOUTB goes high, Q4 turns on, and the ON pin of the AD1178 is pulled low, thereby turning Q2 off. Overcurrent, Undervoltage Overvoltage Calculation Summary Overcurrent Threshold = 100 mV ÷ 15 mΩ = 6.67 A Power in Current Sense Resistor = 100 mV × 6.67 A = 0.667 W (use 0.75 W resistor) High Voltage Threshold = 0.4 V(R10 + R11)/R11 = 14.35 V Low Voltage Threshold = 0.4 V(R12 + R13)/R11 = 5.54 V IC Protection Technology There are also several protection features associated with the individual power ICs. Undervoltage lockout (UVLO) disables all inputs and the output to an IC when the input voltage is less than the minimum voltage required for the rails to behave in a predictable manner during power-up. Thermal shut down (TSD) prevents the IC from damage due to high operating junction temperature. Overcurrent protection (OCP) also protects the IC when there is a short on the output. Further details can be found on the individual power IC data sheets. Description of Power Rails in Universal Power Supply Module There are 12 power rails supplied by this module summarized in Table 1. The following four rails are based on the synchronous buck topology: 3.3V(2A), 1.5V(1A), 1.8V(1A), 1.2V(0.5A). The following two rails are based on the nonsynchronous buck topology: 5.0V(1A), 2.5V(1A). The −5 V rail is generated from the +5.0V(1A) rail using the inverting buck-boost topology. The positive and negative analog rails {Px,Nx}(0.1A) are generated by the Sepic-Cuk topology. The last three rails are supplied by LDOs. Each rail has an independent power on LED indicator. Table 1 lists the voltage, maximum current capability, key features of the power IC, and typical applications for each power rail. . Rev. 0 | Page 3 of 16 CN-0190 Circuit Note Table 1. Summary of Power Rails in Universal Power Supply Module Output Voltage Current Power IC General Description of Power IC Typical Applications The ADP1872 is a versatile current-mode, synchronous step-down controller that provides superior transient response, optimal stability, and current limit protection by ADP1872 using a constant on-time, pseudo-fixed frequency with a programmable currentsense gain, current-control scheme. General purpose digital circuits, The ADP1864 is a compact, inexpensive, constant-frequency, current-mode, stepdown dc-to-dc controller. The ADP1864 drives a P-channel MOSFET that regulates an I/O voltages ADP1864 output voltage as low as 0.8 V with ±1.25% accuracy, for up to 5 A load currents, from input voltages as high as 14 V. The device can operate at 100% duty cycle for low dropout voltage. 3.3 V 2A 5.0 V 1A 1.5 V 1A 1.8 V 1A 2.5 V 1A The ADP2300 is a compact, constant-frequency, current-mode, step-down dc-to-dc ADP2300 regulator with integrated power MOSFET. ADP2300 operates from input voltages of 3.0 V to 20 V, making it suitable for a wide range of applications. 1.2 V 0.5 A The ADP2108 is a high efficiency, low quiescent current step-down dc-to-dc converter. The total solution requires only three small external components. It uses a ADP2108 proprietary, high-speed current mode, constant frequency PWM control scheme for excellent stability and transient response. Operation at 100% duty cycle gives low dropout voltage. 1.0 V 2A ADP1741 Px 0.1 A Nx 0.1 A The ADP1613 are step-up dc-to-dc switching converters with an integrated power ADP1613 switch capable of providing an output voltage as high as 20 V. 3.3 V 0.15 A ADP151 The ADP151 is an ultralow noise (9µV), low dropout, linear regulator that operates from 2.2V to 5.5V and provides up to 200 mA of output current. 3V 0.1 A ADP121 The ADP121 is a quiescent current, low dropout, linear regulator that operates from 2.3V to 5.5V and provides up to 150 mA of output current. −5 V 0.2 A The ADP2301 is compact, constant-frequency, current-mode, step-down dc-to-dc ADP2301 regulator with integrated power MOSFET. The ADP2301 devices operate from input voltages of 3.0 V to 20 V, making them suitable for a wide range applications. The ADP2114 is a versatile, synchronous, dual, step-down switching regulator that satisfies a wide range of customer point-of-load requirements. The two PWM channels can be configured to deliver independent outputs at 2A and 2A (or 3 A/1 A) ADP2114 or can be configured as a single interleaved output capable of delivering 4A. The two PWM channels are 180° phase shifted to reduce input ripple current and to reduce input capacitance. Core voltage of the MCU, DSP, or FPGA The ADP1741 is a low dropout (LDO) CMOS linear regulator that operates from 1.6 V to 3.6 V and provide up to 2A of output current. Low dropout linear regulators (LDOs) are generally easier to use than switching power and have lower noise and better transient response characteristics. However, they have low efficiency when the output voltage is much less than the input voltage. This limits their current output capability. A switching power supply is usually the best choice for the first stage of the power system because of its high efficiency and Analog or mixedsignal systems such as ADC, DAC, amplifiers, analog multiplexers high current output. The noise caused by switching supplies can be minimized by properly designing the control loop and using good PCB layout techniques. If care is taken, switching supplies can often be used to power high performance analog circuits as described in the following circuit notes: CN-0135, CN-0137, CN-0141, and CN-0193. Rev. 0 | Page 4 of 16 Circuit Note CN-0190 Table 2. Switching Converter Design Parameter Inputs for ADIsimPower VOUT VIN(MIN) VIN(MAX) IOUT(MAX) IRIPPLE VRIPPLE ISTEP VSTEP 3.3V(2A) 6V 14 V 4A 33% IOUT(MAX) 1% VOUT 80% IOUT(MAX) 5% VOUT 5.0V(1A) 6V 14 V 2A 33% IOUT(MAX) 1% VOUT 75% IOUT(MAX) 5% VOUT 2.5V(1A) 6V 14 V 1A 33% IOUT(MAX) 1% VOUT 80% IOUT(MAX) 5% VOUT {Px,Nx}(0.1A) 6V 14 V 0.1 A 33% IOUT(MAX) 1% VOUT 70% IOUT(MAX) 5% VOUT 1.8V(1A) 3.2 V 3.4 V 3A 33% IOUT(MAX) 1% VOUT 90% IOUT(MAX) 5% VOUT 1.5V(1A) 3.2 V 3.4 V 1A 33% IOUT(MAX) 1% VOUT 90% IOUT(MAX) 5% VOUT 1.2V(0.5A) 3.2 V 3.4 V 0.5 A 33% IOUT(MAX) 1% VOUT 90% IOUT(MAX) 3% VOUT Individual Switching Supply Designs Using ADIsimPower Design Example 1: 3.3V(2A)Rail Using the ADP1872 ADIsimPower is and interactive design tool that both simplifies the power IC selection process and provides the information required to build an optimized linear or dc-todc converter. The program performs all the tedious calculations and provides a final schematic, recommended bill-of-materials, and predicted performance. The component recommendations come from a large database of parts with known electrical characteristics. The user simply provides the system-level inputs to the program; such as minimum input voltage, maximum input voltage, output voltage, output current, output current ripple, output voltage ripple, transient response, etc., as shown in Table 2. Figure 3 shows the circuit schematic of the synchronousbuck topology controlled by the ADP1872. This circuit can be divided into three parts. Part A generates the bias voltage for ADP1872, part B is the enable control, and part C is switching regulator part of the rail. All the power rails in this power module based on switching controllers and regulators are designed using ADIsimPower except the −5V(0.2A) rail using ADP2301, which is based on inverting buck-boost topology. See more details about ADIsimPower in the article “ADIsimPowerM Provides Robust, Customizable DC-to-DC Converter Designs” and at www.analog.com/ADIsimPower. The ADP1872 operates on a wide range of bias voltages from 2.75 V to 5.5 V. In this circuit the bias voltage is supplied by a 4.7 V Zener diode combined with an NPN buffer transistor as shown in Part A of Figure 3. The Zener diode selected (DDZ9687) has a Zener voltage of 4.7 V at 50 µA current. The ADP1872 can accept an input voltage as high as 20 V. Pin 2 (COMP/EN) of the ADP1872 not only connects to the internal precision enable circuitry but also to the output of the internal error amplifier that controls the overall loop characteristic. The N-channel MOSFET, Q9, is used to ground the enable control of the ADP1872, thereby disabling the device. When Q9 is off, and the ADP1872 is enabled, the loop characteristic is controlled by the C11, C12, and R16 network. Q8 acts as an inverter so that a positive logic signal to the input of Part B (EN_3.3V) enables the ADP1872. The design shown in Part C of Figure 3 was generated using ADIsimPower with the inputs shown in Table 2. Rev. 0 | Page 5 of 16 CN-0190 Circuit Note VIN VDD_ADP1872 + Q6 MMBT2222A Q7-B FDS6898A A GND_ADP1872 2 VDD_ADP1872 Q9 2N7002E EN_3.3V C11 4.7nF 50V 0603 FB_1872 3 4 5 GND_ADP1872 C15 0.1µF 50V 0603 10 BST COMP/EN SW FB SYS_GND GND PGND VDD DRVL MSS1038-102NL L1 3.3V_2A 8 DRVH Q7-A FDS6898A 7 6 C17 22µF 10V 1206 + C18 10µF 0805 10V C13 330µF 10V R19 100kΩ 1% 0603 4 SYS_GND SYS_GND R17 100kΩ 1% 0603 ADP1872ARMZ-0.6-R7 C38 1µF 25V 0805 GND_ADP1872 GND_ADP1872 9 VDD_ADP1872 Q8 2N7002E B VIN SYS_GND 3 R23 160Ω 1% 0603 C12 39pF 50V 0603 SYS_GND 1 1 2 R22 100kΩ 1% 0603 SYS_GND U4 GND_ADP1872 R16 69.8 kΩ 1% 0603 C8 10µF 25V 1206 C7 220µF 16V SYS_GND GND_ADP1872 C77 0.1µF 50V 0603 5 6 C14 0.1µF 50V 0603 D6 4.3V DDZ9687 C6 220µF 16V 7 8 P2 + SYS_GND C R20 22kΩ 0603 1% FB_1872 09578-003 R15 4.7kΩ 1% 0603 GND_ADP1872 SYS_GND Figure 3. Design Example 1: 3.3V (2A) Rail Generated by the ADP1872 Based on Synchronous Buck Topology NV_CS NX_VOUT R21 1% NX(0.1A) 240mΩ 0805 F2 1 IN D11 SS24S L8-A MSD7342-153ML VIN_ADP1612 C62 10µF 25V 1206 SYS_GND C72 10µF 25V 1206 C70 1µF 50V 1206 L8-B R77 1% 2 GND 1µF PV_CS PX_VOUT 240mΩ 0805 2 C120 10µF 25V 1206 C118 10µF 25V 1206 1µF GND 1 C68 1µF 50V 1206 L7-A OUT 3 B10 330@100MHz SYS_GND D12 SS24S L7-B C61 10µF 25V 1206 C71 10µF 25V 1206 C79 10µF 25V 1206 C81 10µF 25V 1206 B9 330@100MHz 3 IN OUT F1 PX(0.1A) MSD7342-153ML SYS_GND EN_ADP1612 SYS_GND 1 COMP 0603 1% 24.3kΩ R60 C65 22pF 50V 0603 2 3 4 U17 SS FB FREQ EN VIN GND R54 10kΩ 1% 0603 SYS_GND SW 8 VDD_1612 7 6 5 C66 1µF 25V 0805 R63 10kΩ 1% 0603 C90 0.1µF 50V 0603 ADP1613ARMZ C64 3.3nF 50V 0603 SYS_GND 50V 0603 SYS_GND SYS_GND Q17 SI2308DS 60V 2A R58 9.1kΩ 1% 0603 R59 680Ω 1% 0603 SYS_GND SYS_GND Figure 4. Design Example 2: Analog {Px,Nx}(0.1A) Rail Based on Sepic-Cuk Topology Circuit Controlled by the ADP1613 Rev. 0 | Page 6 of 16 09578-004 C50 0.1µF Circuit Note CN-0190 Design Example 2: Positive and Negative Analog Rails {Px,Nx}(0.1A) with Overcurrent Detection and Protection for Output for noise suppression. R76 and R77 are 240 mΩ shunt resistors added for overcurrent detection and do not significantly affect the characteristics of the control loop. The positive and negative analog rails, {Px,Nx}(0.1A), are designed using the ADP1613 step-up controller based on Sepic-Cuk topology. The output can be set to four different symmetrical output voltages by changing the value of resistors in the feedback path. The voltages can be set to {+2.5V,−2.5V}, {+5V,−5V}, {+12V,−12V}, and {+15V,−15V}. Figure 4 shows the circuit where all components were selected based on ADIsimPower. The output capacitors were increased to 10 µF to further reduce the output ripple on the analog supplies. Also an external LC filter using a ferrite bead and a 3T capacitor is used The overcurrent detection circuit is shown in Figure 5. The ADM1170 is a hot-swap controller with soft start and is used for overcurrent detection for the positive output rail in this circuit. The internal overcurrent detection circuit accepts a voltage from 1.6 V to 16.5 V which includes the {Px,Nx} output ranges from 2.5 V to 15 V. When the voltage between SENSE+ and SENSE− is larger than 50 mV(typical), the gate pin is grounded, which shuts down the ADP1613. The overcurrent threshold is set to 208 mA (typical) by the 240 mΩ shunt resistor, R76. VDD_1612 C63 0.1µF 50V 0603 SYS_GND PV_CS C76 100pF 0603 50V VDD_1612 U13 8 VCC TIMER 7 SENSE+ GND 6 SENSE– SS 5 GATE ON 1 2 3 4 C89 ADM1170–2AUJZ 100pF 50V 0603 R67 D13 GREEN 2kΩ 1% 0603 LED0603 Q13 2N7002E 60V 240mA C75 0.1µF 50V 0603 SYS_GND PX_VOUT SYS_GND EN_ADP1612 +PX_VOUT R48 1kΩ 0603 1% 0.1µF 50V R47 124kΩ 0603 VDD_1612 1% SYS_GND SYS_GND C103 0.1µF 50V 0603 NX_VOUT C78 0603 SYS_GND 5 OUT R62 2kΩ 1% 0603 CFILT 4 RG 6 3 VREF 7 +VS 2 +IN –VS U11 AD628ARM 1 C98 100pF 0603 50V –IN 8 NV_CS C92 SYS_GND NX_VOUT 1 2 0.1µF 50V U14 100pF SYS_GND VIN VCC GND OUT R64 10kΩ 0603 1% 4 3 ADCMP350YKSZ SYS_GND Figure 5. Overcurrent Detection Circuit for {Px,Nx }(0.1A )Rails Rev. 0 | Page 7 of 16 09578-05 C102 0603 CN-0190 Circuit Note R62, is used to pull down the output of AD628 before the {Px,Nx} rails are at their final value, thereby preventing the circuit from going into a latch-up condition. The overcurrent detection circuit for the negative output rail uses the AD628 high common-mode voltage, programmable gain difference amplifier combined with ADCMP350 comparator with on-chip 0.6 V reference. The AD628 is a two-stage amplifier. The first stage is a difference amplifier with a fixed gain of 0.1. The gain of the second stage, G, can be programmed by external resistors. The overcurrent threshold and shunt resistor are the same values as used on the positive rails. The gain of second stage amplifier is G = 125, which is calculated from Equation 1 by solving for G: ITHRESHOLD × RSHUNT × (G × 0.1) = 0.6 V Design Example 3: −5V(0.2A) Using Inverting Buck-Boost Topology Controlled by the ADP2301 The ADP2301 is nonsynchronous step-down regulator. In the circuit shown in Figure 6 it is used in the inverting buckboost topology to generate a negative voltage. This circuit is not directly supported in ADIsimPower, but is described in detail in Application Note AN-1083, "Designing an Inverting Buck Boost Using the ADP2300 and ADP2301 Switching Regulators." In this topology the VIN pin and GND pin of the ADP2301 are connected to the input and output of the rail, respectively. Other negative voltages can be generated by changing the value of the feedback resistors. However, it is important to make sure that |VIN| + |VOUT| is less than the maximum 20 V input voltage of ADP2301. (1) where ITHRESHOLD = 208 mA, and RSHUNT = 240 mΩ. Because the AD628 is powered by the {Px,Nx} rails, both rails need time to settle during the module’s initial power-on interval. During this time, the AD628 may work abnormally due to the undefined power supply levels. The 2 kΩ resistor, L11 LPS5030-472ML TP8 C112 0.1µF 50V U9 0603 VIN_ADP2300 C113 100µF 6.3V 1206 R121 100kΩ 1% 0603 6 SW 5 VIN BST 1 GND 2 4 EN FB 3 C101 100µF 6.3V 1206 R123 14.7kΩ 1% 0603 SYS_GND ADP2301AUJZ SYS_GND EN_ADP2300 R130 Q24 MMBT3906 R122 10kΩ 1% 0603 C109 10µF 25 1206 C115 10µF 25 1206 R125 2.8kΩ 1% 0603 VOUT(-5V_0.2A) 10kΩ 1% 0603 09578-006 Q23 MMBT3906 C119 100µF 6.3V D22 SS24S 1206 SYS_GND Figure 6. Design Example 3: −5V Inverting Buck-Boost Topology Controlled by ADP2301 Rev. 0 | Page 8 of 16 Circuit Note CN-0190 The ADM1066 has up to 10 supply fault detectors (SFDs). The inputs can be configured to detect an undervoltage fault (the input voltage drops below a preprogrammed value), an overvoltage fault (the input voltage rises above a preprogrammed value), or an out-of-window fault (the input voltage is outside a preprogrammed range). All the power supplies in the module are monitored using the out-ofwindow fault criterion. The thresholds of each window are set to VOUT + 5% and V OUT − 5%. The parameters for each supply are listed in Table 3. Power Supply Monitoring, Sequencing, and Margining Control Voltage Monitoring The ADM1066 Super Sequencer® is a configurable device that offers a single-chip solution for supply monitoring and sequencing in multiple-supply systems. The circuit is shown in Figure 7. The system input power is connected to VH of the ADM1066. All the power rails except −5V(0.2A) connect to VPx, VXx and AUXx directly after attenuation by the resistor divider. See AN-780 and AN-782 for more details about how to monitor high voltage or negative inputs. The 10 PDO outputs of the ADM1066 control all the 12 power rails. The 5.0V(1A), −5V(0.2A), and {Px,Nx}(0.1A) share a single PDO pin. All the other rails are controlled by individual PDO pins. A1 A0 SCL SDA HIGH VOLTAGE MONITORING PX_VOUT R91 1% 22kΩ 0603 R94 1% 2kΩ 0603 NEGATIVE VOLTAGE MONITORING R93 1% 2kΩ 0603 R90 1% 10kΩ 0603 VOUT (3.3V, 0.1A) R117 1% 22kΩ 0603 R103 1% 22kΩ 0603 VOUT (1.8V, 2A) R92 1% 10kΩ 0603 R95 1% 22kΩ 0603 VOUT (1.0V, 2A) VOUT (1.5V, 1A) VCCP VDDCAP C83 10µF 10V 0805 C84 0.1µF 50V 0603 VOUT (1.2V, 0.5A) SYS_GND VOUT (5V, 1A) VOUT (3.3V, 2A) VOUT (2.5V, 1A) VOUT (3V, 0.1A) VIN FB_1872 R85 1% 100kΩ 0603 R89 1% C82 100pF 50V 0603 52.3kΩ 0603 C59 10µF 50V 0805 1 2 3 4 5 6 7 8 9 10 11 12 C60 0.1µF 50V 0603 NC_1 VX1 VX2 VX3 VX4 VX5 VP1 VP2 VP3 VP4 VH NC_2 NC_6 PDO1 EXPPAD PDO2 PDO3 PDO4 PDO5 PDO6 U15 PDO7 ADM1066ASUZ PDO8 PDO9 PDO10 NC_5 49 36 35 34 33 32 31 30 29 28 27 26 25 SYS_GND GND_ADP1872 OUTPUT MARGIN CONTROL FOR 3.3V(2A) Figure 7. Supply Sequencing, Voltage Monitoring, and Voltage Margining Control Using the ADM1066 Rev. 0 | Page 9 of 16 C86 10µF 10V 0805 SYS_GND EN_ADP1872 EN1_ADP2114_1.8V EN1_ADP2114_1.5V EN_ADP1741 EN_ADP2108 EN_ADP121 EN_ADP1613 EN_ADP151 EN_ADP2300 EN_ADP1864 ENABLE CONTROL 13 14 15 16 17 18 19 20 21 22 23 24 SYS_GND C85 0.1µF 50V 0603 DAC6 DAC5 DAC4 DAC3 DAC2 09578-007 22kΩ 0603 48 47 46 45 44 43 42 41 40 39 38 37 R87 1% NC_8 GND VDDCAP AUX1 AUX2 SDA SCL A1 A0 VCCP PDOGND NC_7 220kΩ 0603 NC_3 AGND REFGND REFIN REFOUT DAC1 DAC2 DAC3 DAC4 DAC5 DAC6 NC_4 R86 1% NX_VOUT CN-0190 Circuit Note Table 3. Overvoltage and Undervoltage Thresholds for Output Voltage Rails VX1 Power Rail 1.0V_2A VMAX (V) 1.05 VMIN (V) 0.95 Resistor Divider 1 Overvoltage Threshold (V) 1.05 Undervoltage Threshold (V) 0.95 VX2 1.5V_1A 1.575 1.425 5/6 1.31 1.19 VX3 1.2V_0.5A 1.26 1.14 1 1.26 1.14 VX4 3.3V_0.1A 3.465 3.135 5/16 1.08 0.98 VX5 1.8V_1A 1.89 1.71 11/16 1.30 1.18 VP1 5.0V_1A 5.25 4.75 1 5.25 4.75 VP2 3.3V_2A 3.465 3.135 1 3.465 3.135 VP3 2.5V_1A 2.625 2.375 1 2.625 2.375 VP4 3.0V_0.1A 3.15 2.85 1 3.15 2.85 VH VIN 14.20 5.70 1 14.20 5.70 AUX1 Nx_0.1A −2.375 −15.75 1/11 1.65 0.43 AUX2 Px_0.1A 15.57 2.375 1/12 1.30 0.22 Sequencing Control Strategy Depending on the output rail, there can be up to three stages in the power paths shown in Figure 1. The rails for 3.3V(2A), 2.5V(1A), 5V(1A), and {Px,Nx}(0.1A) are converted directly from input voltage and pass through only one stage. The rails for 3V(0.1), 1.5V(1A), 1.8V(1A), 1.2V(0.5A), −5V(0.2A), and 3.3V(0.1A) pass through two stages. The 1.0V(2A) rail passes through three stages. The sequencing and control strategy is as follows: 1. Turn on 1st stage, 2nd stage, and 3rd stage sequentially and then check voltage on each rail. 2. If some rails are faulty at setup, turn off all the rails in the same stages and go back and check the rails in the previous stage. If the rails in the previous stage are all ok, turn on all the rails in this stage again. 3. Monitor all the rails after they are all turned on successfully. Turn off all of the rails in all three stages if any rails are at fault, and go back to the first step and turn on the rails in the 1st stage. The state machine generated by the ADM106x Configuration Tool-Version 4.0.6 is shown in Figure 8. Also see Application Note AN-0975, "Automatic Generation of State Diagrams for the ADM1062 to ADM1069 Using Graphviz." Definitions for terms used in the state diagram are as follows: • PSetUp : Check the power input voltage • TOnStx : Turn on Stage x (x = 1, 2, 3) • TOffStx : Turn off Stage x (x = 1, 2, 3) • MoStx : Monitor Stage x (x = 1, 2, 3) • MoAll: Monitor all the rails in all three stages • Note: Binary word format is (PDO10, PDO9, PDO8, PDO7, PDO6, PDO5, PDO4, PDO3, PDO2, PDO1) Rev. 0 | Page 10 of 16 Circuit Note CN-0190 PSetUp OUTPUTS = 00000 00000 (T) IF VIN_7A (VH) IS NOT OKAY AFTER 0.1ms (S) IF VIN_7A (VH) IS OKAY AFTER 100ms TOnSt1 OUTPUTS = 11010 00001 (T) AFTER 100ms (T) AFTER 100ms MoSt1 OUTPUTS = 11010 00001 (T) AFTER 100ms (T) AFTER 100ms TonSt2 OUTPUTS = 11111 10111 (M) IF XXXXX 111XX1 TOffSt2 OUTPUTS = 00000 00000 (M) IF 11111 11111 (T) AFTER 100ms MoSt2 OUTPUTS = 11111 10111 (M) IF X1111 XXX1XX TOffSt2 OUTPUTS = 11010 00001 (T) AFTER 100ms TOnSt3 OUTPUTS = 11111 11111 (T) AFTER 100ms (T) AFTER 100ms MoSt3 OUTPUTS = 11111 11111 (M) IF 1XXXX XXXXXX MoALL OUTPUTS = 11111 11111 (T) AFTER 10ms 09578-008 TOffSt3 OUTPUTS = 11111 10111 (T) AFTER 100ms Figure 8. Power Monitor and Sequencing Control Strategy State Machine Diagram Margining Control for 3.3V(2A) Voltage Rail There are 6 DACs in the ADM1066 used to implement a closedloop margining system that enables supply adjustment by altering either the feedback node or the reference of a dc-to-dc converter using the DAC outputs. DAC1 is connected to feedback of ADP1872 in the 3.3V(2A) rail through R85, C82, and R89. The capacitor C82 is used to decouple the PCB trace noise. The total resistance of R89 and R85 is set to 152.3 kΩ, thereby allowing the output of 3.3V(2A) to be adjusted continuously from VOUT_3.3(2A) − 0.2 V to VOUT_3.3V(2A) + 0.2 V. Measured Efficiency of Switching Supplies and Overall Power Module The measured efficiency as a function of load current for each of the switching power supplies is shown in Figure 9. The overall efficiency of the power module is shown in Figure 10 for an input voltage of 10 V with the outputs fully loaded. Table 4 summarizes the module efficiency for input voltages of 6 V, 10 V, and 14 V. Rev. 0 | Page 11 of 16 CN-0190 95 Circuit Note 1.5V (1A) 1.8V (1A) 3.3V (2A) 90 5V (1A) 85 2.5V (1A) EFFICIENCY (%) 80 –5V (0.2A) 1.2V (0.5A) 5V (1A) 75 70 65 [PX, NX] 0.1A AT 15V 60 55 50 40 0 200 400 600 800 1000 1200 1400 1600 1800 2000 CURRENT OUTPUT (mA) 09578-009 45 Figure 9. Efficiency vs. Output Current for Switching Supplies OVERALL EFFICIENCY & POWER @ VIN = 10V EFF: 90.6% PLOSS: 1.63W 6V TO 14V ADM1178 3.15A 1.73A ADP1872 4.74A TOTAL INPUT POWER (W) 31.47 TOTAL CIRCUIT POWER LOSS (W) 6.63 TOTAL OUTPUT POWER (W) 24.85 OVERALL EFFICIENCY (%) 78.9% 2A 3.3V (2A) SYNC-BUCK CONTROLLER POWER MONITOR PLOSS: 0.03W 0.1A ADP121 LOW QUIESCENT CURRENT LDO 0.1A 3V (0.1A) EFF: 91.9% (1.5V); 85.6% (1.8V) PLOSS: 0.14W (1.5V); 0.9W (1.8V) EFF: 81.6% PLOSS: 0.57W 0.31A 2.43A 1.5V (1A) 3A 1.8V (1A) ADP1741 PLOSS: 1.6W 0.21A EFF: 91.1% PLOSS: 0.67W ADP2108 1A ADP1864 NON-SYNC BUCK CONTROLLER 1.34A 0.24A LOW DROPOUT HIGH CURRENT LDO 0.5A SYNC BUCK REGULATOR 1.2V (0.5A) EFF: 85.0% PLOSS: 0.1W NON-SYNC BUCK REGULATOR EFF: 84.1% PLOSS: 0.19W –5V (0.2A) 1A 5V (1A) EFF: 82.6% PLOSS: 0.62W ADP151 0.1A 0.35A PLOSS: 0.17W LOW NOISE LDO 3.3V (0.1A) ADP1613 NON-SYNC BOOST REGULATOR 1.0V (2A) 2.5V (1A) ADP2301 0.75A 1A 2A ADP2300 NON-SYNC BUCK REGULATOR ADM1066 SEQUENCING MONITORING MARGIN CONTROL ADP2114 DUAL SYNC BUCK REGULATOR Px (0.1A) 2.5V, 5V, 12V OR 15V ENABLE ENABLE Figure 10. Overall Efficiency of Fully Loaded Module with 10V Input Rev. 0 | Page 12 of 16 Nx (0.1A) ENABLE 09578-010 I2C INTERFACE Circuit Note CN-0190 Table 4. Fully Loaded Power Module Efficiency for Various Input Voltages VIN = 6 V VIN = 10 V VIN = 14 V Total Input Power (W) 30.79 31.47 32.24 Total Circuit Power Loss (W) 5.96 6.63 7.39 Total Output Power (W) 24.83 24.85 24.86 Overall Efficiency (%) 80.6 78.9 77.1 RIPPLE = 8.60mV p–p 1 DC = 1.5V 2 09578-011 Measured Output Voltage Ripple Ripple was measured on all switching module outputs. A typical result is shown in Figure 11 for the 1.5V(1A), ADP2114 switching supply output. Ripple results are summarized in Table 5. CH1 10.0mV/DIV CH2 1V/DIV 2µs/DIV Figure 11. 1.5V(1A), ADP2114 Output Ripple for Output Current of 0.5A. Tektronix TDS3034B Scope, P6139A Probe, Scope BW Set to 300 MHz Table 5. Summary of Switching Regulator Ripple and Transient Response Measured Transient Response Power Rail VIN VRIPPLE (P-P) ISTEP VSTEP 3.3V(2A) 10 V 26.4 mV (0.8%) 3.2 A* 170 mV (5.2%) 5.0V(1A) 10 V 43.6 mV (0.9%) 1.5 A* 130 mV (2.6%) 2.5V(1A) 10 V 8.2 mV (0.3%) 0.8 A 80 mV (3.2%) 1.8V(1A) 3.3 V 7.6 mV (0.4%) 2.7 A* 50 mV (2.8%) 1.5V(1A) 3.3 V 8.6 mV (0.6%) 0.9 A 39 mV (2.6%) 1.2V(0.5A) 3.3 V 11.4 mV (0.9%) 0.45 A 26 mV (2.2%) FPGAs, DSPs, and other digital ICs often place transient current loads on the power supply. It is important for the supply voltage to remain within specified limits under these conditions. A typical transient response is shown in Figure 12 for the 1.8V(1A) output based on the ADP2114. A summary of transient response measurements for the switching supplies is given in Table 5. Note that in the case of the 3.3V(2A), 5V(1A), and 1.8V(1A) rails the step current is higher than the individual rail output current because these rails drive multiple stages. *These outputs also drive other regulators in module. ΔV = 50mV 1 ΔI = 0.9A 2 Further details regarding the measurement of power supply noise and ripple can be found in Chapter 8, Power and Thermal Management Hardware Design Techniques, Analog Devices, 1998. Rev. 0 | Page 13 of 16 09578-013 Ripple measurements are highly dependent on the circuit layout, oscilloscope bandwidth setting, probe bandwidth, and the method by which the probe is connected to the output. The measurements shown in Figure 11 were made with a Tektronix TDS3034B 300 MHz oscilloscope using a P6139A, 500 MHz, 10× passive probe. The full bandwidth of the scope and probe combination is 300 MHz. The scope has several internal bandwidth settings which use internal filters to reduce the effective bandwidth. The data in Figure 11 was measured with the full 300 MHz bandwidth. CH1 100mV/DIV CH2 2A/DIV 400µs/DIV Figure 12. 1.8V(1A), ADP2114 Output Transient Response, Tektronix TDS3034B Scope, P6139A Probe, Scope BW Set to 20 MHz CN-0190 Circuit Note COMMON VARIATIONS Equipment Needed (Equivalents Can Be Substituted) The ADM1275 is a one-chip solution for hot-swap control, overcurrent, undervoltage, and overvoltage detection and protection for the system. The ADM1870 has an internal bias regulator that can supply the voltage for the internal circuit, thereby reducing the number of external components. The ADP1871 and ADP1873 are power saving mode (PSM) versions of the ADP1870 and ADP1872 that can also be used in applications that need high efficiency under a light load. The ADP2116 is a configurable 3 A/3 A or 3 A/2 A dual-output load combination or 6 A combined single-output load and pin compatible with the ADP2114. Negative rails with large current output capability can be generated by the ADP1621 based on the Cuk topology. • Tektronix TDS3034B 4-channel 300 MHz color digital phosphor oscilloscope • Tektronix P6139A, 500 MHz, 8 pF, 10 MΩ, 10× passive probe • Agilent N3302A, 150 W, 0 A to 30 A, 0 V to 60 V electronic load module combined with N3300A • Agilent E3631A, 0 V to 6 V, 5 A; 0 V to ±25 V, 1 A, triple output dc power supply • Agilent 3458A, 8.5 digit digital multimeter • Fluke 15B digital multimeter • USB-SMBUS-CABLE Z (USB-to-I2C interface dongles), or CABLE-SMBUS-3PINZ (parallel port to I2C interface cables) CIRCUIT EVALUATION AND TEST • PC (Windows 2000 or Windows XP) with USB interface This power module can be simply evaluated after powering on with dc power supply with any voltage vary from 6 V to 14 V. Make sure the dc power supply can meet the requirement when testing the output capability of any power rail. All the power rails will be turned on under the preloaded monitoring and control strategy shown in Figure 8 by the ADM1066. You can also design your own control strategy and download it into the ADM1066 through I2C bus connector JP1 to make the power monitoring and sequencing control for your own application using the ADM106x Super Sequencer Evaluation Board Software. See the data sheet of ADM1066 and AN-698 and AN-0975 for more details. Setup & Test The block diagram for measuring the efficiency of the power rails is shown as Figure 14. After powering up the EVAL-CN0190-EB1Z with 10 V dc, set the electronic load Agilent N3302A to operate in the constant current mode. Set the Agilent 3440A to act as ammeter and set the Fluke 15B to operate as a voltmeter. The power output can be calculated by multiplying VOUT by IOUT. The VIN and IIN can be read directly from the display window of the Agilent E3631A dc power supply. Efficiency can be calculated from Equation 2: Efficiency = POUT/PIN = (VOUT × IOUT) ÷ (VIN × IIN) A photograph of the EVAL-CN0190-EB1Z board is shown in Figure 13. IIN DC POWER SUPPLY AGILENT E3631A (2) VIN EVAL-CN0190-EB1Z GND VOUT GND 09578-014 VOLTMETER FLUKE 15B ELECTRONIC LOAD AGILENT N3302A Figure 14. Test Setup for Measuring Efficiency Figure 13. Photograph of EVAL-CN0190-EB1Z Universal Power Supply Module Rev. 0 | Page 14 of 16 AMMETER AGILENT 3440A 09578-015 IOUT Circuit Note CN-0190 Kessler, Matthew. Application Note AN-1075, Synchronous Inverse SEPIC Using the ADP1870/ADP1872 Provides High Efficiency for Noninverting Buck/Boost Applications , Analog Devices. Ripple and transient response is measured using the circuit shown in Figure 15. Channel A of the oscilloscope monitors the output voltage of the module. Channel B monitors the voltage across the 0.1 Ω current sense resistor, which is proportional to the load current. Set the electronic load to the "switch" mode with preset amplitude and frequency. The output dynamic voltage and current can then be captured with the oscilloscope. Bradley, Michael. Application Note AN-0975, Automatic Generation of State Diagrams for the ADM1062 to ADM1069 Using Graphviz, Analog Devices. Canty, Peter and Michael Bradley , Application Note AN-698, Configuration Registers of the ADM1062/ADM1063/ ADM1064/ADM1065/ADM1066/ADM1067/ADM1166, Analog Devices. VIN DC POWER SUPPLY AGILENT E3631A EVAL-CN0190-EB1Z GND VOUT GND Moloney, Alan. Application Note AN-780, Monitoring Negative Voltages with the ADM1062 to ADM1069 Super Sequencers, Analog Devices. 0.1 Ω Moloney, Alan. Application Note AN-782, Monitoring High Voltages with the ADM1062–ADM1069 Super Sequencers , Analog Devices. CHANNEL B OSCILLOSCOPE ELECTRONIC LOAD AGILENT N3302A 09578-016 CHANNEL A Del Mastro, Enrico. Application Note AN-897, ADC Readback Code , Analog Devices. Practical Design Techniques for Power and Thermal Management, Analog Devices, 1998. Figure 15. Test Setup for Measuring Ripple and Transient Response LEARN MORE Data Sheets and Evaluation Boards CN-0190 Design Support Package: http://www.analog.com/CN0190-DesignSupport CN-0190 Circuit Evaluation Board (EVAL-CN0190-EB1Z) ADP1872 Data Sheet ADIsimPower™ Design Tool, Analog Devices: http://www.analog.com/adisimpower ADP1864Data Sheet MT-031 Tutorial, Grounding Data Converters and Solving the Mystery of "AGND" and "DGND," Analog Devices. ADP2114 Data Sheet MT-101 Tutorial, Decoupling Techniques, Analog Devices. ADP2301 Data Sheet CN-0135 Circuit Note, Powering the AD9272 Octal Ultrasound ADC/LNA/VGA/AAF with the ADP5020 Switching Regulator PMU for Increased Efficiency, Analog Devices. ADP2108 Data Sheet CN-0137 Circuit Note, Powering the AD9268 Dual Channel, 16bit, 125 MSPS Analog-to-Digital Converter with the ADP2114 Synchronous Step-Down DC-to-DC Regulator for Increased Efficiency, Analog Devices. ADP2300 Data Sheet ADP1741 Data Sheet ADP151 Data Sheet ADP121 Data Sheet ADP1613 Data Sheet ADM1066 Data Sheet CN-0141 Circuit Note, Powering the AD9788 800 MSPS TxDAC Digital-to-Analog Converter Using the ADP2105 Synchronous Step-Down DC-to-DC Regulator for Increased Efficiency, Analog Devices. ADM1178 Data Sheet CN-0193 Circuit Note, High Voltage (30 V) DAC Powered from a Low Voltage (3 V) Supply Generates Tuning Signals for Antennas and Filters, Analog Devices. ADCMP350 Data Sheet ADCMP670 Data Sheet ADM1170 Data Sheet AD628 Data Sheet Kessler, Matthew. Application Note AN-1083, Designing an Inverting Buck Boost Using the ADP2300 and ADP2301 Switching Regulators, Analog Devices. Rev. 0 | Page 15 of 16 CN-0190 Circuit Note REVISION HISTORY 7/11—Revision 0: Initial Version (Continued from first page) Circuits from the Lab circuits are intended only for use with Analog Devices products and are the intellectual property of Analog Devices or its licensors. While you may use the Circuits from the Lab circuits in the design of your product, no other license is granted by implication or otherwise under any patents or other intellectual property by application or use of the Circuits from the Lab circuits. Information furnished by Analog Devices is believed to be accurate and reliable. However, Circuits from the Lab are supplied "as is" and without warranties of any kind, express, implied, or statutory including, but not limited to, any implied warranty of merchantability, noninfringement or fitness for a particular purpose and no responsibility is assumed by Analog Devices for their use, nor for any infringements of patents or other rights of third parties that may result from their use. Analog Devices reserves the right to change any Circuits from the Lab circuits at any time without notice but is under no obligation to do so. ©2011 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. CN09578-0-7/11(0) Rev. 0 | Page 16 of 16
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