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HMC1049-SX

HMC1049-SX

  • 厂商:

    AD(亚德诺)

  • 封装:

    QFN32

  • 描述:

    HMC1049-SX

  • 数据手册
  • 价格&库存
HMC1049-SX 数据手册
GaAs pHEMT MMIC Low Noise Amplifier, 0.3 GHz to 20 GHz HMC1049 Data Sheet FUNCTIONAL BLOCK DIAGRAM NC NC ACG1 NC NC NC NC NC FEATURES 32 31 30 29 28 27 26 25 Low noise figure: 1.8 dB P1dB output power: 14.5 dBm PSAT output power: 17.5 dBm High gain: 15 dB Output IP3: 29 dBm Supply voltage: VDD = 7 V at 70 mA 50 Ω matched input/output (I/O) 32-lead 5 mm ×5 mm SMT package: 25mm2 NC VDD NC GND RFIN NC NC NC HMC1049 24 23 22 21 20 19 18 17 NC NC GND RFOUT/VDD NC NC NC NC Test instrumentation High linearity microwave radios VSAT and SATCOM Military and space 12828-002 NC NC NC NC VGG NC ACG3 ACG2 9 10 11 12 13 14 15 16 APPLICATIONS 1 2 3 4 5 6 7 8 Figure 1. GENERAL DESCRIPTION The HMC1049 is a GaAs MMIC low noise amplifier that operates between 0.3 GHz and 20 GHz. This LNA provides 15 dB of small signal gain, 1.8 dB noise figure, and an IP3 output of 29 dBm, yet requires only 70 mA from a 7 V supply. The P1dB output power of 14.5 dBm enables the LNA to function as a local oscillator (LO) driver for balanced, I/Q, or Rev. A image rejection mixers. VDD can also be applied to Pin 21; however, Pin 21 requires a bias tee with VDD = 4 V. The HMC1049 amplifier I/Os are internally matched to 50 Ω and the device is supplied in a compact, leadless, QFN 5 mm ×5 mm surface-mount package. Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 ©2013–2014 Analog Devices, Inc. All rights reserved. Technical Support www.analog.com HMC1049 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Pin Configuration and Function Descriptions..............................5 Applications ....................................................................................... 1 Interface Schematics .....................................................................6 Functional Block Diagram .............................................................. 1 Typical Performance Characteristics ..............................................7 General Description ......................................................................... 1 Evaluation Printed Circuit Board ................................................. 12 Revision History ............................................................................... 2 Packaging and Ordering Information ......................................... 14 Specifications..................................................................................... 3 Outline Dimensions ................................................................... 14 Absolute Maximum Ratings ....................................................... 4 Ordering Guide .......................................................................... 14 ESD Caution .................................................................................. 4 REVISION HISTORY 11/14—Rev. 01.1213 to Rev. A This Hittite Microwave Products data sheet has been reformatted to meet the styles and standards of Analog Devices, Inc. Updated Format .................................................................. Universal Changes to General Description .................................................... 1 Change to Table 2, Thermal Resistance Parameter Column ...... 4 Added Figure 2.................................................................................. 5 Changes to Table 4 ............................................................................ 5 Moved Figure 3 to Figure 9 to Interface Schematics Section...... 6 Change to Figure 8 and Figure 9..................................................... 6 Changes to Figure 36 ...................................................................... 13 Added Ordering Guide Section .................................................... 15 Rev. A | Page 2 of 14 Data Sheet HMC1049 SPECIFICATIONS TA = 25°C, VDD = 7 V, IDD = 70 mA 1. Table 1. Parameter FREQUENCY RANGE GAIN Gain Variation Over Temperature NOISE FIGURE RETURN LOSS Input Output OUTPUT Output Power for 1 dB Compression (P1dB) Saturated (PSAT) Output Third-Order Intercept (IP3) 2 TOTAL SUPPLY CURRENT 1 2 Min 0.3 13.5 Typ 16.5 0.006 2.5 Max 1 3.5 Min 1 12 Typ 15 0.019 1.8 Max 14 2.5 Min 14 10 Typ 13 0.017 2.7 Max 20 4.0 Unit GHz dB dB/°C dB 15 8 13 15 14 13 dB dB 15 18 31 70 14.5 17.5 29 70 13 16 26 70 dBm dBm dBm mA Adjust VGG between −2 V to 0 V to achieve IDD = 70 mA typical. Measurement taken at POUT/tone = 8 dBm. Rev. A | Page 3 of 14 HMC1049 Data Sheet ABSOLUTE MAXIMUM RATINGS Table 3. Typical Supply Current vs. VDD Table 2. Parameter Drain Bias Voltage (VDD) Drain Bias Voltage (RF Out/VDD) RF Input Power Gate Bias Voltage, VGG Channel Temperature Continuous PDISS (T = 85°C) (Derate 37.1 mW/°C Above 85°C) Thermal Resistance (Channel to Ground Paddle) Temperature Storage Temperature Operating Temperature ESD Sensitivity (HBM) VDD (V) 5 6 7 Rating 10 V 7V 18 dBm −2 V to +0.2 V 175°C 3.34 W 1 Adjust VGG to achieve IDD = 70 mA. ESD CAUTION 26.9°C/W −65°C to +150°C −40°C to +85°C Class 1A Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability. Rev. A | Page 4 of 14 IDD1 (mA) 70 70 70 Data Sheet HMC1049 32 31 30 29 28 27 26 25 NC NC ACG1 NC NC NC NC NC PIN CONFIGURATION AND FUNCTION DESCRIPTIONS 1 2 3 4 5 6 7 8 HMC1049 TOP VIEW (Not to Scale) 24 23 22 21 20 19 18 17 NC NC GND RFOUT/VDD NC NC NC NC NOTES 1. NC = NO CONNECT. THESE PINS ARE NOT CONNECTED INTERNALLY; HOWEVER, ALL DATA WAS MEASURED WITH THESE PINS CONNECTED TO RF/DC GROUND EXTERNALLY. 2. EXPOSED PAD. THE EXPOSED GROUND PADDLE MUST BE CONNECTED TO RF/DC GROUND. 12828-004 NC NC NC NC VGG NC ACG3 ACG2 9 10 11 12 13 14 15 16 NC VDD NC GND RFIN NC NC NC Figure 2. Pin Configuration Diagram Table 4. Pin Function Descriptions Pin No. 1, 3, 6 to 12, 14, 17 to 20, 23 to 29, 31, 32 Mnemonic NC 5 2 30 21 RFIN VDD ACG1 RFOUT/VDD 15, 16 13 ACG2, ACG3 VGG 4, 22 0 GND EP 1 Description 1 No Connect. These pins are not connected internally; however, all data was measured with these pins connected to RF/dc ground externally (see the Typical Performance Characteristics section for data plots). RF Input. This pin is dc-coupled and matched to 50 Ω. Power Supply Voltage for the Amplifier. External bypass capacitors (100 pF and 0.01 μF) are required. Low Frequency Termination. An external bypass capacitor of 100 pF is required. RF Output/Alternate Power Supply Voltage for the Amplifier. An external bias tee is required when used as alternative VDD. This pin is dc-coupled and matched to 50 Ω. Low Frequency Termination. External bypass capacitors of 100 pF are required. Gate Control for Amplifier. Adjust the voltage to achieve IDD = 70 mA. External bypass capacitors of 100 pF, 0.01 μF, and 4.7μF are required. Ground. Connect Pin 4 and Pin 22 to RF/dc ground. Exposed Pad. The exposed ground paddle must be connected to RF/dc ground. See the Interface Schematics section for pin interfaces. Rev. A | Page 5 of 14 HMC1049 Data Sheet ACG2 RFIN VDD 12828-005 ACG3 12828-009 INTERFACE SCHEMATICS Figure 7. ACG2 and ACG3 Interface RFOUT/VDD GND 12828-010 Figure 3. VDD Interface 12828-006 Figure 8. RFOUT/VDD Interface Figure 4. GND Interface RFOUT/VDD 12828-011 ACG1 ACG2 Figure 9. ACG1 Interface 12828-007 RFIN VGG 12828-008 Figure 5. RFIN Interface Figure 6. VGG Interface Rev. A | Page 6 of 14 Data Sheet HMC1049 TYPICAL PERFORMANCE CHARACTERISTICS Data taken with VDD applied to Pin 2, VDD = 7 V. 0 20 S21 S11 S22 15 TA = +85°C TA = +25°C TA = –40°C –5 RETURN LOSS (dB) RESPONSE (dB) 10 5 0 –5 –10 –10 –15 –20 –15 –25 0 2 4 6 8 10 12 14 16 18 20 22 24 FREQUENCY (GHz) –30 12828-036 –25 0 4 6 8 10 12 14 16 18 20 FREQUENCY (GHz) Figure 13. Output Return Loss vs. Temperature Figure 10. Broadband Gain and Return Loss 6 20 TA = +85°C TA = +25°C TA = –40°C 18 TA = +85°C TA = +25°C TA = –40°C 5 NOISE FIGURE (dB) 16 GAIN (dB) 2 12828-039 –20 14 12 4 3 2 10 0 2 4 6 8 10 12 14 16 18 20 FREQUENCY (GHz) 0 12828-037 6 0 2 6 8 10 12 14 16 18 20 FREQUENCY (GHz) Figure 14. Noise Figure vs. Temperature Figure 11. Gain vs. Temperature 6 0 TA = +85°C TA = +25°C TA = –40°C TA = +85°C TA = +25°C TA = –40°C 5 NOISE FIGURE (dB) –5 –10 –15 –20 4 3 2 –30 0 2 4 6 8 10 12 14 16 FREQUENCY (GHz) 18 20 0 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 FREQUENCY (GHz) Figure 15. Noise Figure vs. Temperature, Low Frequency Figure 12. Input Return Loss vs. Temperature Rev. A | Page 7 of 14 2.0 12828-041 1 –25 12828-038 RETURN LOSS (dB) 4 12828-040 1 8 HMC1049 Data Sheet 6 20 5 17 4 P1dB (dBm) 3 14 11 2 0 2 4 6 8 10 12 14 16 18 20 FREQUENCY (GHz) 5 12828-042 0 0 2 6 8 10 12 14 16 18 20 FREQUENCY (GHz) Figure 16. Noise Figure vs. VDD Figure 19. P1dB vs. Temperature 23 6 TA = +85°C TA = +25°C TA = –40°C IDD = 60mA IDD = 70mA IDD = 80mA 5 20 4 PSAT (dBm) NOISE FIGURE (dB) 4 12828-045 8 1 3 17 14 2 11 1 0 2 4 6 8 10 12 14 16 18 20 FREQUENCY (GHz) 8 12828-043 0 0 2 4 6 8 10 12 14 16 18 20 FREQUENCY (GHz) Figure 17. Noise Figure vs. IDD 12828-046 NOISE FIGURE (dB) TA = +85°C TA = +25°C TA = –40°C VDD = 6V VDD = 7V VDD = 8V Figure 20. PSAT vs. Temperature 35 18 TA = +85°C TA = +25°C TA = –40°C VDD = 5V VDD = 6V VDD = 7V 16 30 14 P1dB (dBm) 20 10 8 6 4 15 10 0 2 4 6 8 10 12 14 16 FREQUENCY (GHz) 18 20 0 0 2 4 6 8 10 12 FREQUENCY (GHz) Figure 18. Output IP3 vs. Temperature Figure 21. P1dB vs. VDD Rev. A | Page 8 of 14 14 16 18 20 12828-047 2 12828-044 IP3 (dBm) 12 25 Data Sheet HMC1049 24 VDD = 5V VDD = 6V VDD = 7V POUT (dBm), GAIN (dB), PAE (%) 18 14 12 10 8 20 16 12 8 4 GAIN POUT PAE 6 0 2 4 6 8 10 12 14 16 18 20 FREQUENCY (GHz) 0 –10 12828-048 4 –8 –4 –2 0 2 4 6 8 10 INPUT POWER (dBm) Figure 22. PSAT vs. VDD Figure 24. Power Compression @ 2 GHz 24 0 TA = +85°C TA = +25°C TA = –40°C POUT (dBm), GAIN (dB), PAE (%) –5 –10 –15 –20 –25 –30 –35 20 16 12 8 4 GAIN POUT PAE –40 –45 0 2 4 6 8 10 12 14 16 FREQUENCY (GHz) 18 20 0 –10 12828-049 ISOLATION (dB) –6 –8 –6 –4 –2 0 2 4 6 INPUT POWER (dBm) Figure 23. Reverse Isolation vs. Temperature Figure 25. Power Compression @ 10 GHz Rev. A | Page 9 of 14 8 10 12828-051 PSAT (dBm) 16 12828-050 20 HMC1049 Data Sheet POUT (dBm), GAIN (dB), PAE (%) 20 24 4 18 3 12 2 6 1 12 8 4 GAIN POUT PAE –3 0 3 6 9 0 50 INPUT POWER (dBm) 18 3 12 2 6 1 NOISE FIGURE (dB) 4 GAIN PSAT NOISE FIGURE 6.5 0 7.0 12828-053 6.0 0 80 Figure 28. Noise Figure, Gain, and Power vs. Supply Current @ 10 GHz 24 5.5 70 IDD (mA) Figure 26. Power Compression @ 18 GHz 0 5.0 60 VDD (V) Figure 27. Noise Figure, Gain, and Power vs. Supply Voltage @ 10 GHz Rev. A | Page 10 of 14 12828-054 –6 GAIN PSAT NOISE FIGURE 12828-052 0 –9 GAIN (dB), PSAT (dBm) NOISE FIGURE (dB) GAIN (dB), PSAT (dBm) 16 Data Sheet HMC1049 Data taken with VDD applied to the bias tee at Pin 21. 20 40 S21 S11 S22 35 10 30 0 IP3 (dBm) –10 25 20 –20 15 4 0 8 12 16 20 24 FREQUENCY (GHz) 10 12828-055 –30 0 2 4 6 8 10 12 14 16 18 20 FREQUENCY (GHz) Figure 29. Broadband Gain and Return Loss, VDD = 4 V, Supply to Bias Tee 12828-058 RESPONSE (dB) TA = +85°C TA = +25°C TA = –40°C Figure 32. Output IP3 vs. Temperature, VDD = 4 V, Supply to Bias Tee 20 20 TA = +85°C TA = +25°C TA = –40°C 18 TA = +85°C TA = +25°C TA = –40°C 17 P1dB (dBm) GAIN (dB) 16 14 12 14 11 10 8 0 2 4 6 8 10 12 14 16 18 20 FREQUENCY (GHz) 0 12828-056 6 0 2 4 6 8 10 12 14 16 18 20 FREQUENCY (GHz) Figure 30. Gain vs. Temperature, VDD = 4 V, Supply to Bias Tee Figure 33. P1dB vs. Temperature, VDD = 4 V, Supply to Bias Tee 6 24 TA = +85°C TA = +25°C TA = –40°C 5 12828-059 8 TA = +85°C TA = +25°C TA = –40°C 22 PSAT (dBm) NOISE FIGURE (dB) 20 4 3 18 16 14 2 12 1 0 2 4 6 8 10 12 FREQUENCY (GHz) 14 16 18 20 Figure 31. Noise Figure vs. Temperature, VDD = 4 V, Supply to Bias Tee Rev. A | Page 11 of 14 8 0 2 4 6 8 10 12 14 16 18 20 FREQUENCY (GHz) Figure 34. PSAT vs. Temperature, VDD = 4 V, Supply to Bias Tee 12828-060 0 12828-057 10 HMC1049 Data Sheet EVALUATION PRINTED CIRCUIT BOARD J5 C8 J3 VDD IN 600-00541-00-1 J6 + C1 C5 C2 U1 OUT H1049 J1 J2 XXXX C3 C6 C4 C7 U1 VGG C9 J4 12828-065 + Figure 35. Evaluation Board Layout 1 5 25 26 27 28 29 GND HMC1049 OUT RFOUT/VDD 21 J2 20 RFIN 7 18 12 8 16 ACG2 19 15 ACG3 6 11 17 PACKAGE BASE J4 C9 4.7µF + C6 10nF GND C3 100pF C4 100pF Figure 36. Evaluation Board Schematic Rev. A | Page 12 of 14 C7 10nF 12828-066 J1 22 3 4 IN 23 14 C2 100pF 10 C5 10nF + 24 VDD 9 C8 4.7µF 2 13 VGG VDD J3 ACG1 30 31 32 C1 100pF Data Sheet HMC1049 Table 5. List of Materials for Evaluation PCB Item J1, J2, J5, J6 J3, J4 C1 to C4 C5 to C7 C8, C9 U1 PCB1 1 Description PCB mount SMA RF connector DC pins 100 pF capacitor, 0402 package 10000 pF capacitor, 0402 package 4.7 μF capacitor, tantalum HMC1049LP5E 600-00541-00-1 evaluation PCB The circuit board used in the application should use RF circuit design techniques. Signal lines should have 50 Ω impedance; connect the package ground leads and exposed paddle directly to the ground plane. Use a sufficient number of via holes to connect the top and bottom ground planes. The evaluation circuit board shown is available from Analog Devices, Inc., upon request. Circuit board material: Rogers 4350 or Arlon 25FR. Rev. A | Page 13 of 14 HMC1049 Data Sheet PACKAGING AND ORDERING INFORMATION OUTLINE DIMENSIONS BOT TOM VIEW TOP VIEW FOR PROPER CONNECTION OF THE EXPOSED PAD, REFER TO THE PIN CONFIGURATION AND FUNCTION DESCRIPTIONS SECTION OF THIS DATA SHEET. 11-25-2014-A NOTES: 1. LEADFRAME MATERIAL: COPPER ALLOY 2. DIMENSIONS ARE IN INCHES [MILLIMETERS]. 3. LEAD SPACING TOLERANCE IS NON-CUMULATIVE. 4. PAD BURR LENGTH SHALL BE 0.15mm MAXIMUM. PAD BURR HEIGHT SHALL BE 0.05mm MAXIMUM. 5. PACKAGE WARP SHALL NOT EXCEED 0.05mm. 6. REFER TO ANALOG DEVICES APPLICATION NOTE FOR SUGGESTED PCB LAND PATTERN. Figure 37. 32-Lead Quad Flat No-Lead Package [QFN] 5 mm × 5 mm Body, Very Thin Quad Dimensions shown in inches and [millimeters] ORDERING GUIDE Model 1 HMC1049LP5E Temperature Range −40°C to +85°C Lead Finish 100% matte Sn MSL Rating 2 MSL1 Package Description 32-Lead QFN Qty. HMC1049LP5ETR −40°C to +85°C 100% matte Sn MSL1 32-Lead QFN, 7” Tape and Reel 500 EVAL01-HMC1049LP5 Evaluation board E = RoHS Compliant Part. MSL1 rating indicates a maximum peak reflow temperature of 260°C. 3 Four-digit lot number, XXXX. 1 2 ©2013–2014 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D12828-0-11/14(A) www.analog.com/HMC1049 Rev. A | Page 14 of 14 Branding 3 H1049 XXXX H1049 XXXX
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