HMC677LP5ETR

HMC677LP5 / 677LP5E v05.0810 Typical Applications Features The HMC677LP5(E) is ideal for: Accepts Serial or Parallel Data • Microwave and Millimeterwave Control Circuits Compatible with TTL and CMOS Logic • Test and Measurement Equipment Complementary Outputs • Complex Multi-Function Assemblies 6-Bit Control Word • Military and Space Subsystems Power-up State Selection • Transmit/Receive Module Controllers Low Power Consumption Fast Clock Rate Functional Diagram INTERFACE - SMT 5 6-Bit SERIAL/PARALLEL SWITCH DRIVER/CONTROLLER General Description The HMC677LP5(E) is a multi-function BiCMOS control interface IC which is ideal for driving the gates of FET and pHEMT based MMIC control devices. This unique IC can be used to simplify the control of microwave and millimeterwave transmit/receive modules, military subsystems, and multi-throw/ multi-port test and measurement equipment. The HMC677LP5(E) accepts serial or parallel data, and can drive up to 6 complementary sets of outputs. The HMC677LP5(E) also provides additional functionality such as a power-up state selection, adjustable output voltage levels, and a latched parallel control mode which allows multiple control devices to share a common data bus. The HMC677LP5(E) is ideal for controlling digital phase shifters, digital attenuators, digital variable gain amplifiers, and switching matrices embedded in complex microwave and millimeterwave assemblies. Electrical Specifications, TA = +25° C, Vdd1 = Vdd2 = +5V, Vee = -5V, Voph = 0V Parameter Input High Voltage, Vih Low Voltage, Vil Typ Max Units 2 - - V - - 0.8 V Voph - 0.1 - - V Output Low Voltage, Vol (Iol = 2 mA, Vee = -4.5V) - - Vee + 0.1 V Maximum Input Leakage Current, Iin - - 1 µA Propagation Delay, tplh - - 80 nS Maximum Serial Bit Rate - - 10 Mbps Maximum I/O Update Rate - - 100 ns Output High Voltage, Voh (Ioh = 1 mA, Vee = -4.5V) 5-1 Min Information furnished by Analog Devices is believed to be accurate and reliable. However, no For price, 20 delivery, and to place orders: Analog For price, delivery and to place orders: Microwave Corporation, Alpha Road, Chelmsford, MADevices, 01824 Inc., responsibility is assumed by Analog Devices for its use, nor for anyHittite infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 rights of third parties that may result from its use. Specifications subject to change without notice. No Phone: 978-250-3343 Fax: 978-250-3373 Order at www.hittite.com Phone: On-line 781-329-4700 • Order online at www.analog.com license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Application Support: Phone: 1-800-ANALOG-D Trademarks and registered trademarks are the property of their respective owners. Application Support: Phone: 978-250-3343 or apps@hittite.com HMC677LP5 / 677LP5E v05.0810 6-Bit SERIAL/PARALLEL SWITCH DRIVER/CONTROLLER Serial Control Interface The HMC677LP5(E) contains a 3-wire SPI compatible digital interface (DATA, CLK, LE). It is activated when P/S is kept high. The 6-bit serial word must be loaded MSB first. The positive-edge sensitive CLK and LE requires clean transitions. Standard logic families work well. When LE is high, 6-bit data in the serial input register is transferred to the outputs. When LE is high CLK is masked to prevent data transition during output loading. When P/S is low, 3-wire SPI interface inputs (DATA, CLK, LE) are disabled and the serial input register is loaded asynchronously with parallel digital inputs (I0-I5). When LE is high, 6-bit parallel data is transferred. For all modes of operations, the outputs will stay constant while LE is kept low. INTERFACE - SMT 5 Parameter Typ. Min. serial period, tSCK 100 ns Control set-up time, tCS 20 ns Control hold-time, tCH 20 ns LE setup-time, tLN 10 ns Min. LE pulse width, tLEW 10 ns Min LE pulse spacing, tLES 630 ns Serial clock hold-time from LE, tCKN 10 ns Hold Time, tPH. 0 ns Latch Enable Minimum Width, tLEN 10 ns Setup Time, tPS 2 ns Timing Diagram (Latched Parallel Mode) Parallel Mode (Direct Parallel Mode & Latched Parallel Mode) Note: The parallel mode is enabled when P/S is set to low. Direct Parallel Mode - Outputs are changed by the Control Voltage Inputs directly. The LE (Latch Enable) must be at a logic high to control in this manner. Latched Parallel Mode - Outputs are selected using the Control Voltage Inputs and set while the LE is in the Low state. This will not change state while LE is Low. Once all Control Voltage Inputs are at the desired states the LE is pulsed. See timing diagram above for reference. Information furnished by Analog Devices is believed to be accurate and reliable. However, no For price, 20 delivery, and to place orders: Analog For price, delivery and to place orders: Microwave Corporation, Alpha Road, Chelmsford, MADevices, 01824 Inc., responsibility is assumed by Analog Devices for its use, nor for anyHittite infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 rights of third parties that may result from its use. Specifications subject to change without notice. No Phone: 978-250-3343 Fax: 978-250-3373 Order at www.hittite.com Phone: On-line 781-329-4700 • Order online at www.analog.com license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Application Support: Phone: 1-800-ANALOG-D Trademarks and registered trademarks are the property of their respective owners. Application Support: Phone: 978-250-3343 or apps@hittite.com 5-2 HMC677LP5 / 677LP5E v05.0810 6-Bit SERIAL/PARALLEL SWITCH DRIVER/CONTROLLER Operating Ranges Function Vdd Vee Voph [1] INTERFACE - SMT Parameter Typ. Max Units 4.5 5.0 5.5 V Negative DC Supply Voltage -5.5 -5.0 -4.5 V 0 - 2.2 V 4.5 - 7.7 V DC Output Supply Voph - Vee Negative Supply Voltage Range Vdd - Vee Positive to Negative Supply Range Ta 5 Min. Positive DC Supply Voltage Operating Ambient Temperature 9 10 11 V -40 25 85 C loh [2] DC Output Current - High 1 - - mA lol [2] DC Output Current - Low 2 - - mA [1] Voph can be used from 0V to 2.2V. Higher voltages can be used to increase low frequency performance of GaAs switches. [2] Ioh and Iol are measured at 0.1V variation from Voph and Vee. DC Characteristics Function Conditions Min. Typ. Max Units Vih Input High Voltage High Input Voltage 2.0 - - V Vil Input Low Voltage Low Input Voltage - - 0.8 V Voph - 0.1 - - V Voh Parameter Output High Voltage Vol Output Low Voltage lin Input Leakage Current Idd ^ Idd Ioh = 1 mA Vee = -4.5V Iol = 2 mA Vee = -4.5V - - Vee +0.1 V Vin = Vdd or GND Vdd = Max - - 1 µA Quiescent Supply Current Vdd = Max Vin = Vdd or GND - - 1.5 mA Additional Supply Current Per TTL Input Pin Vdd = Max Vin = 2V - - 50 µA Worst Case AC Characteristics at Voph = 2.2V (Vdd = 4.5V, Vee = -4.5V) Function -40 °C +25 °C +85 °C Units Tplh Rising Propagation Delay Parameter 30 30 30 ns Tphl Falling Propagation Delay 30 30 30 ns Ttlh Output Rising Transition Time 30 40 40 ns Tthl Output Falling Transition Time 15 20 20 ns Tskew Delay Skew 50 50 50 nS Cpdd [1] Power Dissipation Capacitance of Vdd 100 100 100 pF Cpde[1] Power Dissipation Capacitance of Vee 400 400 400 pF Worst Case AC Characteristics at Voph = 0V (Vdd = 4.5V, Vee = -4.5V) Function 1] 5-3 -40 °C +25 °C +85 °C Units Tplh Rising Propagation Delay 80 80 80 ns Tphl Falling Propagation Delay 80 80 80 ns Ttlh Output Rising Transition Time 100 100 100 ns Tthl Output Falling Transition Time 50 50 50 ns Tskew Delay Skew 50 50 50 nS Cpdd[1] Power Dissipation Capacitance of Vdd 100 100 100 pF Cpde Power Dissipation Capacitance of Vee 400 400 400 pF [1] Parameter Total Power Dissipation is calculated by the following formula: PD = Vdd f Cpdd + (Voph - Vee) f Cpde, where f = frequency in Hz 2 2 Information furnished by Analog Devices is believed to be accurate and reliable. However, no For price, 20 delivery, and to place orders: Analog For price, delivery and to place orders: Microwave Corporation, Alpha Road, Chelmsford, MADevices, 01824 Inc., responsibility is assumed by Analog Devices for its use, nor for anyHittite infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 rights of third parties that may result from its use. Specifications subject to change without notice. No Phone: 978-250-3343 Fax: 978-250-3373 Order at www.hittite.com Phone: On-line 781-329-4700 • Order online at www.analog.com license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Application Support: Phone: 1-800-ANALOG-D Trademarks and registered trademarks are the property of their respective owners. Application Support: Phone: 978-250-3343 or apps@hittite.com HMC677LP5 / 677LP5E v05.0810 6-Bit SERIAL/PARALLEL SWITCH DRIVER/CONTROLLER Power-On Sequence If LE is set to logic LOW at power-up, the logic state of PUP1 and PUP2 determines the power-up state of the part per PUP truth table. If the LE is set to logic HIGH at power-up, the logic state of I5-I0 determines the power-up state of the part per truth table. The attenuator latches in the desired power-up state approximately 200 ms after power-up. The required power-up sequence is: GND, Vdd, Vee, Voph, Digital Inputs (I0 - I5). The relative application of input signal order of the digital inputs are not important. Deviations from this sequence may inadvertently forward bias ESD protection structures and damage them. For added protection you may install 2 kOhm resistors in series with each digital input signal line, however these resistors will increase the RC time constant. Control Voltage Table Truth Table Input Outputs State Vdd = +3V Vdd = +5V Low 0 to 0.5V @