0.1 GHz to 24 GHz, Low Noise,
Programmable Divider
HMC862A
Data Sheet
FUNCTIONAL BLOCK DIAGRAM
13 VCC
14 GND
15 GND
16 VCC
12 GND
11 OUT
IN 2
IN 3
10 OUT
GND 4
9 GND
PACKAGE
BASE
GND
13599-001
÷1,2,4,8
GND 8
Satellite communication systems
Point to point and point to multipoint radios
Military applications
Test equipment
GND 1
S2 7
APPLICATIONS
HMC862A
S1 6
Low noise floor: −153 dBc/Hz at 100 kHz offset
Programmable frequency divider (N)
N = 1, 2, 4, or 8
Wide bandwidth: 0.1 GHz to 24 GHz
Low current consumption: 81 mA in the N = 8 divide state
HBM ESD sensitivity, Class 2 classification
FICDM ESD sensitivity, Class C3 classification
16-lead, 3 mm × 3 mm LFCSP package: 9 mm2
S0 5
FEATURES
Figure 1.
GENERAL DESCRIPTION
The HMC862A is a low noise, programmable frequency divider
in a 3 mm × 3 mm, leadless, surface-mount package. The
frequency divider, N, can be programmed to divide from 1,
2, 4, or 8 in the 0.1 GHz to 24 GHz input frequency range.
Rev. A
The low phase noise, wide frequency range, and flexible division
ratio make this device ideal for high performance and wideband
communication systems.
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HMC862A
Data Sheet
TABLE OF CONTENTS
Features .............................................................................................. 1
Divide by 2 .....................................................................................8
Applications ....................................................................................... 1
Divide by 4 .....................................................................................9
Functional Block Diagram .............................................................. 1
Divide by 8 .................................................................................. 10
General Description ......................................................................... 1
Current Consumption (ICC) ...................................................... 11
Revision History ............................................................................... 2
Theory of Operation ...................................................................... 12
Specifications..................................................................................... 3
Input Interface ............................................................................ 12
RF Specifications .......................................................................... 3
Output Interface ......................................................................... 12
DC Specifications ......................................................................... 4
Applications Information .............................................................. 13
Absolute Maximum Ratings............................................................ 5
Evaluation Printed Circuit Board (PCB) ................................ 13
Thermal Resistance ...................................................................... 5
Evaluation Board Overview ...................................................... 14
ESD Caution .................................................................................. 5
Outline Dimensions ....................................................................... 15
Pin Configuration and Function Descriptions ............................. 6
Ordering Guide .......................................................................... 15
Typical Performance Characteristics ............................................. 7
Divide by 1..................................................................................... 7
REVISION HISTORY
4/2019—Rev. 0 to Rev. A
Added Thermal Resistance Section and Table 4 .......................... 5
Changes to Theory of Operation Section .................................... 12
Changes to Ordering Guide .......................................................... 15
10/2017—Revision 0: Initial Version
Rev. A | Page 2 of 15
Data Sheet
HMC862A
SPECIFICATIONS
RF SPECIFICATIONS
VCC = 5 V, TA = −40°C to +85°C, unless otherwise noted.
Table 1.
Parameter
RF INPUT CHARACTERISTICS
RF Input Frequency
Maximum
N=1
N = 2, 4, 8
Minimum
RF Input Power Range
N = 1, 2
N=2
N = 4, 8
Reverse Leakage
N=1
N=2
N = 4, 8
RF OUTPUT CHARACTERISTICS, N = 1
Output Power, Single-Ended
Single-Sideband (SSB) Residual Phase Noise
at 100 kHz Offset
Second Harmonic
Third Harmonic
RF OUTPUT CHARACTERISTICS, N = 2
Output Power, Single-Ended
SSB Residual Phase Noise at 100 kHz Offset
Second Harmonic (Feedthrough)
Third Harmonic
RF OUTPUT CHARACTERISTICS, N = 4
Output Power, Single-Ended
SSB Residual Phase Noise at 100 kHz Offset
Second Harmonic
Third Harmonic
RF OUTPUT CHARACTERISTICS, N = 8
Output Power, Single-Ended
SSB Residual Phase Noise at 100 kHz Offset
Second Harmonic
Third Harmonic
1
Test Conditions/Comments
Min
Typ
Max
Unit
0.1
GHz
GHz
GHz
+10
+10
+10
+10
dBm
dBm
dBm
dBm
Sine wave or square wave input
18
24
Square wave input1
0.1 GHz< fIN < 18 GHz, sine or square wave input1
18 GHz < fIN < 24 GHz, sine or square wave input
0.1 GHz < fIN < 20 GHz, sine or square wave input1
20 GHz < fIN < 24 GHz, sine or square wave input
−15
−5
−15
−5
fIN = 6 GHz, input power (PIN) = 0 dBm
fIN = 6 GHz, PIN = 0 dBm
fIN = 6 GHz, PIN = 0 dBm
0.1 GHz < fIN < 10 GHz
10 GHz < fIN < 15 GHz
15 GHz < fIN < 18 GHz
fIN = 12 GHz, PIN = 5 dBm
−10
−55
−70
−1
−5
−11
fIN = 6 GHz, PIN = 0 dBm
fIN = 6 GHz, PIN = 0 dBm
+3
−2
−6
−155
dBm
dBm
dBm
+5
+3
0
−27
−6
dBm
dBm
dBm
dBc/Hz
dBm
dBm
0.1 GHz < fIN < 18 GHz
18 GHz < fIN < 24 GHz
fIN = 12 GHz, PIN = 5 dBm
fIN = 6 GHz, PIN = 0 dBm
fIN = 6 GHz, PIN = 0 dBm
0
−3
3
0
−153
−28
−7
5
+3
dBm
dBm
dBc/Hz
dBm
dBm
0.1 GHz < fIN < 18 GHz
18 GHz < fIN < 24 GHz
fIN = 12 GHz, PIN = 5 dBm
fIN = 6 GHz, PIN = 0 dBm
fIN = 6 GHz, PIN = 0 dBm
0
−1
2
+3
−154
−35
−6
4
+6
dBm
dBm
dBc/Hz
dBm
dBm
0.1 GHz < fIN < 24 GHz
fIN = 12 GHz, PIN = 5 dBm
fIN = 6 GHz, PIN = 0 dBm
fIN = 6 GHz, PIN = 0 dBm
0
2
−155
−45
−7
4
dBm
dBc/Hz
dBm
dBm
A square wave input is recommended to be below 650 MHz for best phase noise performance. If a sine wave input below 650 MHz is used, it is recommended that the
drive level be >5 dBm for best operation, including phase noise. Refer to the Typical Performance Characteristics section.
Rev. A | Page 3 of 15
HMC862A
Data Sheet
DC SPECIFICATIONS
VCC = 5 V, TA = −40°C to +85°C, unless otherwise noted.
Table 2.
Parameter
POWER SUPPLIES
VCC
CURRENT CONSUMPTION, ICC
N=1
N=2
N=4
N=8
DIGITAL INPUT S (S0, S1, S2)
Logic Voltage
Low
High
Test Conditions/Comments
Min
Typ
Max
Unit
Analog supply
4.75
5
5.25
V
55
64
68
71
61
73
78
81
71
84
90
94
mA
mA
mA
mA
0.4
5
V
V
0
3
Rev. A | Page 4 of 15
Data Sheet
HMC862A
ABSOLUTE MAXIMUM RATINGS
THERMAL RESISTANCE
Table 3.
Parameter
RF Input Power (IN, IN)
Supply Voltage (VCC)
Logic Inputs (S0, S1, S2)
Storage Temperature Range
Reflow Temperature
Operating Temperature Range (TA)
Electrostatic Discharge (ESD) Sensitivity
Human Body Model (HBM), JS-001-2012
Field Induced Charged Device Model
(FICDM), JS-002
Rating
13 dBm
5.5 V
−0.5 V to (0.5 V + VCC)
−65°C to +125°C
260°C
−40°C to +85°C
Thermal performance is directly linked to printed circuit board
(PCB) design and operating environment. Careful attention to
PCB thermal design is required.
Thermal impedance simulated values are based on the use of
the EV1HMC862ALP3 evaluation board with the exposed pad
soldered to GND. VCC = 5 V and Divider Ratio (N) = 8.
Table 4.
Package Type
HCP-16-1
Class 2
Class C3
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
ESD CAUTION
Rev. A | Page 5 of 15
Thermal Impedance (θJB)
34
Unit
°C/W
HMC862A
Data Sheet
13 VCC
14 GND
16 VCC
15 GND
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
12 GND
IN 2
HMC862A
11 OUT
IN 3
TOP VIEW
(Not to Scale)
10 OUT
9
S2 7
GND 8
S1 6
S0 5
GND 4
GND
PACKAGE
BASE
GND
NOTES
1. EXPOSED PAD. EXPOSED PAD MUST
BE CONNECTED TO RF/DC GROUND.
13599-002
GND 1
Figure 2. Pin Configuration
Table 5. Pin Function Descriptions
Pin No.
1, 4, 8, 9,
12, 14, 15
2
3
5, 6, 7
10
11
13, 16
Mnemonic
GND
Description
Ground. The backside of the package has an exposed metal ground slug that must be connected to RF/dc ground.
IN
IN
RF Input. This pin must be dc blocked.
RF Input, 180° Out of Phase with Pin 2 for Differential Operation. This pin must be ac grounded for single-ended
operation. DC block this pin for differential operation.
CMOS Compatible Division Ratio Control Bits. See Table 6.
Divider Output, 180° Out of Phase with Pin 11. This RF output must be dc blocked. See Figure 31 for proper termination.
Divided Output. This RF output must be dc blocked. See Figure 31 for proper termination.
Supply Voltage Pins, 5 V. Connect both VCC pins to a 5 V supply. These pins are internally connected.
Exposed Pad. Exposed pad must be connected to RF/dc ground.
S0, S1, S2
OUT
OUT
VCC
EPAD
Rev. A | Page 6 of 15
Data Sheet
HMC862A
TYPICAL PERFORMANCE CHARACTERISTICS
6
6
4
4
2
2
OUTPUT POWER (dBm)
0
–2
–4
–6
2
4
6
8
10
12
14
16
18
20
–12
13599-009
0
Figure 3. Output Power vs. Sine Wave Input Frequency for Various
Temperatures, PIN = 0 dBm
0
2
4
6
8
10
12
14
16
18
20
Figure 6. Output Power vs. Sine Wave Input Frequency for Various VCC
Voltages, PIN = 0 dBm
0
MAX PIN
10
–10
HARMONIC POWER (dBm)
5
0
+85°C
+25°C
–40°C
–5
–10
–15
MIN PIN
–20
–20
–30
–40
–50
2
4
6
8
10
12
14
16
18
20
22
–60
13599-011
0
2
4
6
8
10
12
14
16
18
OUTPUT FREQUENCY (GHz)
Figure 4. Allowable Range of Input Power vs. Sine Wave Input Frequency
for Various Temperatures
Figure 7. Output Harmonics, PIN = 0 dBm, TA = 25°C
–115
–115
SQUARE 100MHz
SINE 100MHz (5dBm)
SINE 12GHz
SINE 6GHz
–125
PIN = +10dBm
PIN = +5dBm
PIN = 0dBm
PIN = –5dBm
PIN = –10dBm
–120
SSB PHASE NOISE (dBc/Hz)
–120
–130
–135
–140
–145
–150
–155
–160
–125
–130
–135
–140
–145
–150
–155
–160
1k
10k
100k
OFFSET FREQUENCY (Hz)
1M
–165
100
13599-013
–165
100
0
13599-012
SECOND HARMONIC
THIRD HARMONIC
SINE WAVE INPUT FREQUENCY (GHz)
SSB PHASE NOISE (dBc/Hz)
VCC = 5.25V
VCC = 5.0V
VCC = 4.75V
SINE WAVE INPUT FREQUENCY (GHz)
15
INPUT POWER (dBm)
–6
–10
SINE WAVE INPUT FREQUENCY (GHz)
–25
–4
–18
+85°C
+25°C
–40°C
–10
–12
–2
13599-010
–18
0
Figure 5. SSB Phase Noise vs. Offset Frequency for Various Input Frequencies,
PIN = 0 dBm, TA = 25°C
1k
10k
100k
OFFSET FREQUENCY (Hz)
1M
13599-014
OUTPUT POWER (dBm)
DIVIDE BY 1
Figure 8. SSB Phase Noise vs. Offset Frequency for Various Input Power (PIN)
Levels, fIN = 12 GHz Sine Wave, TA = 25°C
Rev. A | Page 7 of 15
HMC862A
Data Sheet
6
4
4
2
0
–2
–4
2
4
6
8
10
12
14
16
18
20
22
24
SINE WAVE INPUT FREQUENCY (GHz)
Figure 9. Output Power vs. Sine Wave Input Frequency for Various
Temperatures, PIN = 0 dBm
–6
2
4
6
8
10
12
14
16
18
20
22
24
Figure 12. Output Power vs. Sine Wave Input Frequency for Various VCC
Voltages, PIN = 0 dBm
0
–10
HARMONIC POWER (dBm)
5
+85°C
+25°C
–40°C
0
–5
–10
–15
MIN PIN
–20
–20
–30
–40
–50
FEEDTHROUGH
THIRD HARMONIC
2
4
6
8
10
12
14
16
18
20
22
24
SINE WAVE INPUT FREQUENCY (GHz)
13599-023
0
–60
2
4
6
8
10
12
OUTPUT FREQUENCY (GHz)
Figure 13. Output Harmonics, PIN = 0 dBm, TA = 25°C
Figure 10. Allowable Range of Input Power vs. Sine Wave Input Frequency
for Various Temperatures
–115
–115
SQUARE 100MHz
SINE 100MHz (5dBm)
SINE 18GHz
SINE 12GHz
SINE 6GHz
–125
PIN = +10dBm
PIN = +5dBm
PIN = 0dBm
PIN = –5dBm
PIN = –10dBm
–120
SSB PHASE NOISE (dBc/Hz)
–120
–130
–135
–140
–145
–150
–155
–125
–130
–135
–140
–145
–150
–155
–160
–160
1k
10k
100k
1M
OFFSET FREQUENCY (Hz)
Figure 11. SSB Phase Noise vs. Offset Frequency for Various Input
Frequencies, PIN = 0 dBm, TA = 25°C
–165
100
13599-025
–165
100
0
13599-024
INPUT POWER (dBm)
0
MAX PIN
10
SSB PHASE NOISE (dBc/Hz)
VCC = 5.25V
VCC = 5.00V
VCC = 4.75V
SINE WAVE INPUT FREQUENCY (GHz)
15
–25
–2
–4
+85°C
+25°C
–40°C
0
0
1k
10k
100k
OFFSET FREQUENCY (Hz)
1M
13599-026
–6
2
13599-022
OUTPUT POWER (dBm)
6
13599-021
OUTPUT POWER (dBm)
DIVIDE BY 2
Figure 14. SSB Phase Noise vs. Offset Frequency for Various Input Power (PIN)
Levels, fIN = 12 GHz Sine Wave, TA = 25°C
Rev. A | Page 8 of 15
Data Sheet
HMC862A
6
5
5
4
4
3
2
1
0
+85°C
+25°C
–40°C
–1
–2
0
2
4
6
8
10
12
14
16
18
20
22
24
Figure 15. Output Power vs. Sine Wave Input Frequency for Various
Temperatures, PIN = 0 dBm
1
0
–2
0
2
4
6
8
10
12
14
16
18
20
22
24
Figure 18. Output Power vs. Sine Wave Input Frequency for Various VCC
Voltages, PIN = 0 dBm
0
MAX PIN
10
–10
+85°C
+25°C
–40°C
0
–5
–10
–15
MIN PIN
2
4
6
8
10
12
14
–40
16
18
20
22
24
SINE WAVE INPUT FREQUENCY (GHz)
–60
0
1
2
3
4
5
6
OUTPUT FREQUENCY (GHz)
Figure 19. Output Harmonics, PIN = 0 dBm, TA = 25°C
Figure 16. Allowable Range of Input Power vs. Sine Wave Input Frequency
for Various Temperatures
–115
–115
SQUARE 100MHz
SINE 100MHz (5dBm)
SINE 18GHz
SINE 12GHz
SINE 6GHz
–125
–130
–135
–140
–145
–150
–125
–130
–135
–140
–145
–150
–155
–155
–160
–160
10k
100k
1M
OFFSET FREQUENCY (Hz)
Figure 17. SSB Phase Noise vs. Offset Frequency for Various Input
Frequencies, PIN = 0 dBm, TA = 25°C
–165
100
13599-037
1k
PIN = +10dBm
PIN = +5dBm
PIN = 0dBm
PIN = –5dBm
PIN = –10dBm
–120
SSB PHASE NOISE (dBc/Hz)
–120
–165
100
FEEDTHROUGH
SECOND HARMONIC
THIRD HARMONIC
1k
10k
100k
OFFSET FREQUENCY (Hz)
1M
13599-038
0
–30
–50
13599-027
–20
–20
13599-036
HARMONIC POWER (dBm)
5
SSB PHASE NOISE (dBc/Hz)
VCC = 5.25V
VCC = 5.00V
VCC = 4.75V
SINE WAVE INPUT FREQUENCY (GHz)
15
INPUT POWER (dBm)
2
–1
SINE WAVE INPUT FREQUENCY (GHz)
–25
3
13599-034
OUTPUT POWER (dBm)
6
13599-033
OUTPUT POWER (dBm)
DIVIDE BY 4
Figure 20. SSB Phase Noise vs. Offset Frequency for Various Input Power (PIN)
Levels, fIN = 12 GHz Sine Wave, TA = 25°C
Rev. A | Page 9 of 15
HMC862A
Data Sheet
6
5
5
4
4
3
2
1
0
+85°C
+25°C
–40°C
–1
0
2
4
6
8
10
12
14
16
18
20
22
24
0
–2
0
2
4
6
8
10
12
14
16
18
20
22
24
SINE WAVE INPUT FREQUENCY (GHz)
0
15
MAX PIN
–10
5
+85°C
+25°C
–40°C
0
–5
–10
–15
MIN PIN
0
2
4
6
8
10
12
–30
–40
–50
14
16
18
20
22
24
SINE WAVE INPUT FREQUENCY (GHz)
–70
0
0.5
1.0
1.5
2.0
2.5
3.0
OUTPUT FREQUENCY (GHz)
Figure 25. Output Harmonics, PIN = 0 dBm, TA = 25°C
Figure 22. Allowable Range of Input Power vs. Sine Wave Input Frequency
for Various Temperatures
–115
–115
SQUARE 100MHz
SINE 100MHz (5dBm)
SINE 18GHz
SINE 12GHz
SINE 6GHz
–125
PIN = +10dBm
PIN = +5dBm
PIN = 0dBm
PIN = –5dBm
PIN = –10dBm
–120
SSB PHASE NOISE (dBc/Hz)
–120
–130
–135
–140
–145
–150
–155
–160
–125
–130
–135
–140
–145
–150
–155
–160
1k
10k
100k
1M
OFFSET FREQUENCY (Hz)
Figure 23. SSB Phase Noise vs. Offset Frequency for Various Input
Frequencies, PIN = 0 dBm, TA = 25°C
–165
100
13599-049
–165
100
FEEDTHROUGH
SECOND HARMONIC
THIRD HARMONIC
–60
13599-035
–20
–20
13599-048
HARMONIC POWER (dBm)
10
SSB PHASE NOISE (dBc/Hz)
VCC = 5.25V
VCC = 5.00V
VCC = 4.75V
Figure 24. Output Power vs. Sine Wave Input Frequency for Various Vcc
Voltages, PIN = 0 dBm
Figure 21. Output Power vs. Sine Wave Input Frequency for Various
Temperatures, PIN = 0 dBm
INPUT POWER (dBm)
1
–1
SINE WAVE INPUT FREQUENCY (GHz)
–25
2
1k
10k
100k
OFFSET FREQUENCY (Hz)
1M
13599-050
–2
3
13599-046
OUTPUT POWER (dBm)
6
13599-045
OUTPUT POWER (dBm)
DIVIDE BY 8
Figure 26. SSB Phase Noise vs. Offset Frequency for Various Input Power (PIN)
Levels, fIN = 12 GHz Sine Wave, TA = 25°C
Rev. A | Page 10 of 15
Data Sheet
HMC862A
CURRENT CONSUMPTION (ICC)
100
90
70
60
50
40
30
20
N=8
N=4
N=2
N=1
10
0
0
2
4
6
8
10
12
14
16
18
20
22
SINE WAVE INPUT FREQUENCY (GHz)
24
13599-052
INPUT POWER (dBm)
80
Figure 27. Input Power vs. Sine Wave Input Frequency
Rev. A | Page 11 of 15
HMC862A
Data Sheet
THEORY OF OPERATION
The divide ratio, N, can be programmed to N = 1, 2, 4, or 8 by
setting the digital input pins—S0, S1, and S2—to the logic high
(1) or logic low (0) states indicated in Table 6.
For differential input signals, ac couple the IN and IN pins as
shown in Figure 29. Off-chip termination is not required because
the IN and IN pins have internal 50 Ω termination resistors.
For single-ended input signals, ac couple the IN input. AC
ground the IN pin as close to the IN pin as possible.
Table 6. Programming Truth Table for Frequency Division
Ratios1
1
S1
0
0
1
1
S2
0
0
0
1
Divide Ratio (N)
1
2
4
8
IN
IN
IN
Figure 29. Recommended Input Configuration for Single-Ended Operation
(Left) and Differential Operation (Right)
OUTPUT INTERFACE
0 means logic low and 1 means logic high.
The HMC862A does not support any other combination of the S0,
S1, and S2 programming states other than those listed in Table 6.
Using other programming states causes the HMC862A to
generate an unstable output.
Figure 30 shows the output interface schematic for the OUT
and OUT pins.
50Ω
50Ω
OUT
OUT
13599-055
S0
0
1
1
1
IN
13599-054
The HMC862A is a wideband, configurable RF divider with
minimal additive phase noise.
Enable the HMC862A by applying a voltage (VCC) to the supply
pins, VCC. These pins are internally connected.
Figure 30. Output Interface Schematic
Note that the VCC voltage must be applied before the logic level
signals (S0, S1, and S2) can be driven to a logic high to prevent
the ESD diodes from turning on.
To provide a differential output or two single-ended outputs, ac
couple the OUT and OUT pins. Off-chip termination is not
required because the OUT and OUT pins have internal 50 Ω
termination resistors.
The HMC862A toggles on the rising edge of the IN input for all
divide ratios where N = 1, 2, 4, or 8.
INPUT INTERFACE
If only one output pin is used, connect the unused output pin to
ground through a capacitor and a 50 Ω termination
50Ω
IN
50Ω
IN
OUT
OUT
OUT
Figure 31. Recommended Output Configuration for Single-Ended Operation
(Left) and Differential Operation (Right)
13599-053
Figure 28 shows the input interface schematic for the IN and
IN pins.
OUT
13599-056
The HMC862A can be driven by differential or single-ended
input signals, and can provide differential or single-ended
output signals.
Figure 28. Input Interface Schematic
Rev. A | Page 12 of 15
Data Sheet
HMC862A
APPLICATIONS INFORMATION
EVALUATION PRINTED CIRCUIT BOARD (PCB)
600-01663-00-1
C7 +
GND
VCC
J6
J7
C6
FIN
C1
J1
FOUT
C3
J3
C
5
U1
GND
J5
C2
J2
R3
R2
R1
NFIN
J4
C4
NFOUT
13599-100
S0 S1 S2
Figure 32. Evaluation PCB
J6
+
C7
2.2µF
J7
J2
13 VCC
12 GND
IN 2
11 OUT
÷1,2,4,8
10 OUT
9 GND
GND 4
C5
100nF
C3
100nF
J3
C4
100nF
K_SRI-NS
J4
GND 8
S2 7
S1 6
K_SRI-NS
S0 5
R2
10kΩ
J5
2
1
4
3
6
R1
10kΩ
R3
10kΩ
5
13599-101
K_SRI-NS
U1
HMC862ALP3E
GND 1
IN 3
C2
100nF
14 GND
15 GND
16 VCC
C1
100nF
J1
K_SRI-NS
C6
1nF
NC
87759-0614
Figure 33. Evaluation PCB Schematic
Rev. A | Page 13 of 15
HMC862A
Data Sheet
EVALUATION BOARD OVERVIEW
Use the EV1HMC862ALP3 evaluation board to evaluate the
HMC862A.
The HMC862A is enabled by applying 5 V between J6 (VCC)
and J7 (GND). Note that J6 only provides power to Pin 13 on
the HMC862A; however, because Pin 13 and Pin 16 are
internally connected, both VCC pins receive power.
It is recommended that the circuit board used in the application
use RF circuit design techniques with a 50 Ω impedance on the
signal lines and with the package ground leads and backside
ground pad connected directly to the ground plane. Use a
sufficient number of via holes to connect the top and bottom
ground planes. The evaluation circuit board shown is available
from Analog Devices, Inc., upon request.
The divide ratio, N, is selected by inserting pin jumpers on
Component J5, as shown in Table 7. When installed, a jumper
pulls the digital input pin to ground and sets a logic low. When
removed, the R1, R2, and R3 pull-up resistors pull the digital
input to VCC and set a logic high.
Table 8. List of Materials for EV1HMC862ALP3
Table 7. Jumper Configuration for EV1HMC862ALP3
C6
C7
R1 to R3
J6, J7
Divide Ratio (N)
1
2
4
8
S0 Jumper
Installed
Open
Open
Open
S1 Jumper
Installed
Installed
Open
Open
S2 Jumper
Installed
Installed
Installed
Open
By default, the evaluation board is set up to accept a singleended input and provide a differential output. A differential
input can be used by removing Component C5; a single-ended
output can be generated by terminating J4 with a 50 Ω
termination.
Item
J1 to J4
J5
C1 to C5
U1
Heatsink
PCB
Rev. A | Page 14 of 15
Description
PCB-mount K connector
DC connector header, Molex 2 mm
ATC550L104KTT, 100 nF, 16 V, broadband capacitor,
0402 package
1000 pF capacitor, 0603 package
2.2 μF capacitor, tantalum, 3216 package
10 kΩ resistor, 0402 package
Mill-Max 0.040 inch diameter PC pin, 3101-2-00-21-0000-08-0
HMC862A, programmable divider
Custom heatsink, alumimum
600-01663-00-1 evaluation board
Data Sheet
HMC862A
OUTLINE DIMENSIONS
DETAIL A
(JEDEC 95)
0.30
0.25
0.20
0.50
BSC
PIN 1
INDIC ATOR AREA OPTIONS
(SEE DETAIL A)
16
13
1
12
1.95
1.70 SQ
1.50
EXPOSED
PAD
4
9
TOP VIEW
8
5
0.20 MIN
BOTTOM VIEW
FOR PROPER CONNECTION OF
THE EXPOSED PAD, REFER TO
THE PIN CONFIGURATION AND
0.05 MAX
FUNCTION DESCRIPTIONS
0.02 NOM
SECTION OF THIS DATA SHEET.
COPLANARITY
0.08
0.20 REF
0.90
0.85
0.80
SEATING
PLANE
PKG-004863
0.45
0.40
0.35
COMPLIANT WITH JEDEC STANDARDS MO-220-VEED-4.
03-15-2017-B
PIN 1
INDICATOR
3.10
3.00 SQ
2.90
Figure 34. 16-Lead Lead Frame Chip Scale Package [LFCSP]
3 mm × 3 mm Body and 0.85 mm Package Height
(HCP-16-1)
Dimensions shown in millimeters
ORDERING GUIDE
Model1
HMC862ALP3E
HMC862ALP3ETR
EV1HMC862ALP3
1
2
Temperature Range
−40°C to +85°C
−40°C to +85°C
Package Description
16-Lead Lead Frame Chip Scale Package [LFCSP]
16-Lead Lead Frame Chip Scale Package [LFCSP]
Evaluation Board
Lead Finish
100% Matte Sn
100% Matte Sn
The HMC862ALP3E and HMC862ALP3ETR are RoHS compliant.
The maximum peak reflow temperature is 260°C. See the Absolute Maximum Ratings section for more information.
©2017–2019 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D13599-0-4/19(A)
Rev. A | Page 15 of 15
MSL
Rating2
MSL3
MSL3
Package Option
HCP-16-1
HCP-16-1
工商网监
湘ICP备2023018690号
