LT1102CJ8

LT1102 High Speed, Precision, JFET Input Instrumentation Amplifier (Fixed Gain = 10 or 100) U FEATURES DESCRIPTIO ■ The LT ®1102 is the first fast FET input instrumentation amplifier offered in the low cost, space saving 8-pin packages. Fixed gains of 10 and 100 are provided with excellent gain accuracy (0.01%) and non-linearity (3ppm). No external gain setting resistor is required. ■ ■ ■ ■ ■ ■ ■ ■ ■ Slew Rate: 30V/μs Gain-Bandwidth Product: 35MHz Settling Time (0.01%): 3μs Overdrive Recovery: 0.4μs Gain Error: 0.05% Max Gain Drift: 5ppm/°C Gain Nonlinearity: 16ppm Max Offset Voltage (Input + Output): 600μV Max – Drift with Temperature: 2μV/°C Input Bias Current: 40pA Max Input Offset Current: 40pA Max – Drift with Temperature (to 70°C): 0.5pA/°C Slew rate, settling time, gain-bandwidth product, overdrive recovery time are all improved compared to competitive high speed instrumentation amplifiers. U APPLICATIO S ■ ■ ■ ■ Fast Settling Analog Signal Processing Multiplexed Input Data Acquisition Systems High Source Impedance Signal Amplification from High Resistance Bridges, Capacitance Sensors, Photodetector Sensors Bridge Amplifier with < 1Hz Lowpass Filtering Industry best speed performance is combined with impressive precision specifications: less than 10pA input bias and offset currents, 180μV offset voltage. Unlike other FET input instrumentation amplifiers, on the LT1102 there is no output offset voltage contribution to total error, and input bias currents do not double with every 10°C rise in temperature. Indeed, at 70°C ambient temperature the input bias current is only 40pA. , LT, LTC and LTM are registered trademarks of Linear Technology Corporation. U TYPICAL APPLICATIO Wideband Instrumentation Amplifier with ±150mA Output Current Slew Rate V+ = 15V + 7 LT1102 3 – FPO R 5 2 BIAS 8 LT1010 OUT 5V/DIV 6 4 1 V – = – 15V OUTPUT = ± 10V INTO 75Ω TO 330kHz (R = 50Ω) ± 10V INTO 200Ω TO 330kHz (R = 200Ω) DRIVES 2.2nF CAP LOAD GAIN = 10, DEGRADED 0.01% DUE TO LT1010 G = 10 0.5μs/DIV FPOLT1102 • TA02 LT1102 • TA01 1102fb 1 LT1102 W W W AXI U U ABSOLUTE RATI GS (Note 1) Supply Voltage ...................................................... ±20V Differential Input Voltage ....................................... ±40V Input Voltage ......................................................... ±20V Order Options Tape and Reel: Add #TR Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF Lead Free Part Marking: http://www.linear.com/leadfree/ Output Short-Circuit Duration .......................... Indefinite Operating Temperature Range LT1102I .............................................. –40°C to 85°C LT1102AC/LT1102C ................................ 0°C to 70°C LT1102AM/LT1102M (OBSOLETE).....–55°C to 125°C Storage Temperature Range ................. –65°C to 150°C Lead Temperature (Soldering, 10 sec).................. 300°C U U W PACKAGE/ORDER I FOR ATIO TOP VIEW OUTPUT 8 GROUND (REF) 1 OUT G = 10 90R 7 90R R 9R –IN 3 9R R 6 +IN + – REF 2 G = 10 – + TOP VIEW LT1102 GROUND (REF) 1 LT1102AMH LT1102MH LT1102ACH LT1102CH 8 OUTPUT 90R REF 2 G = 10 –IN 3 90R 7 9R R R – + 9R + – ORDER PART NUMBER OUT G = 10 ORDER PART NUMBER LT1102IN8 LT1102ACN8 LT1102CN8 6 +IN 9 = 1.8k 5 V+ 4 V – (CASE) 5 V+ V– 4 N8 PACKAGE 8-LEAD PDIP TJMAX = 100°C, θJA = 130°C/W H PACKAGE 8-LEAD TO-5 METAL CAN J8 PACKAGE 8-LEAD CERDIP OBSOLETE PACKAGE OBSOLETE PACKAGE Consider the N8 Package for Alternate Source Consider the N8 Package for Alternate Source LT1102MJ8 LT1102CJ8 LT1102 • POI01 Consult LTC Marketing for parts specified with wider operating temperature ranges. 1102fb 2 LT1102 ELECTRICAL CHARACTERISTICS VS = ±15V, VCM = 0V, TA = 25°C, Gain = 10 or 100, unless otherwise noted. CONDITIONS GE Gain Error VO = ±10V, RL = 50k or 2k GNL Gain Nonlinearity G = 100, RL = 50k G = 100, RL = 2k G = 10, RL = 50k or 2k VOS Input Offset Voltage IOS Input Offset Current 3 40 4 60 pA IB Input Bias Current ±3 ±40 ±4 ±60 pA VCM = – 11V to 8V VCM = 8V to 11V Differential Mode en MIN LT1102M/I/C TYP MAX PARAMETER Input Resistance Common Mode MIN LT1102AM/AC TYP MAX SYMBOL UNITS 0.010 0.050 0.012 0.070 % 3 8 7 14 20 16 4 8 7 18 25 30 ppm ppm ppm 180 600 200 900 μV 1012 1011 1012 1012 1011 1012 Ω 2.8 μVP-P nV/√Hz nV/√Hz Input Noise Voltage 0.1Hz to 10Hz 2.8 Input Noise Voltage Density fO = 10Hz fO = 1000Hz (Note 2) 37 19 30 37 20 Input Noise Current Density fO = 1000Hz, 10Hz (Note 3) 1.5 4 2 Ω Ω 5 fA/√Hz ±10.5 ±11.5 ±10.5 ±11.5 V CMRR Common Mode Rejection Ratio 1k Source Imbalance, VCM = ±10.5V 84 98 82 97 dB PSRR Power Supply Rejection Ratio VS = ± 9V to ±18V 88 102 86 101 dB IS Supply Current VO Maximum Output Voltage Swing RL = 50k RL = 2k BW Bandwidth SR lnput Voltage Range 3.3 5.0 3.4 5.6 mA ±13.0 ±12.0 ±13.5 ±13.0 ±13.0 ±12.0 ±13.5 ±13.0 G = 100 (Note 4) G = 10 (Note 4) 120 2.0 220 3.5 100 1.7 220 3.5 kHz MHz Slew Rate G = 100, VIN = ±0.13V, VO = ±5V G = 10, VIN = ±1V, VO = ±5V 12 21 17 30 10 18 17 30 V/μs V/μs Overdrive Recovery 50% Overdrive (Note 5) 400 400 ns Settling Time VO = 20V Step (Note 4) G = 10 to 0.05% G = 10 to 0.01% G = 100 to 0.05% G = 100 to 0.01% 1.8 3.0 7 9 4.0 6.5 13 18 1.8 3.0 7 9 V V 4.0 6.5 13 18 μs μs μs μs 1102fb 3 LT1102 ELECTRICAL CHARACTERISTICS –40°C ≤ TA ≤ 85°C for I grades, unless otherwise noted. VS = ±15V, VCM = 0V, Gain = 10 or 100, –55°C ≤ TA ≤ 125°C for AM/M grades, SYMBOL PARAMETER CONDITIONS GE Gain Error G = 100, VO = ±10V, RL = 50k or 2k G = 10, VO = ±10V, RL = 50k or 2k TCGE Gain Error Drift (Note 6) GNL Gain Nonlinearity MIN LT1102AM TYP MAX MIN LT1102M/I TYP MAX UNITS 0.10 0.05 0.25 0.12 0.10 0.06 0.30 0.15 % % G = 100, RL = 50k or 2k G = 10, RL = 50k or 2k 9 5 20 10 10 6 25 14 ppm/°C ppm/°C G = 100, RL = 50k G = 100, RL = 2k G = 10, RL = 50k or 2k 20 28 9 70 85 20 24 32 9 90 110 24 ppm ppm ppm 300 1400 400 2000 2 8 3 12 μV/°C 0.3 4 0.4 6 nA ±2 ±10 ±2.5 ±15 nA μV VOS Input Offset Voltage ΔVOS/ΔT Input Offset Voltage Drift lOS Input Offset Current IB Input Bias Current CMRR Common Mode Rejection Ratio VCM = ±10.3V 82 97 80 96 dB PSRR Power Supply Rejection Ratio VS = ±10V to ±17V 88 100 84 99 dB IS Supply Current TA = 125°C 2.5 mA VO Maximal Output Voltage Swing RL = 50k RL = 2k (Note 6) 2.5 ±12.5 ±12.0 ±13.2 ±12.6 ±12.5 ±12.0 ±13.2 ±12.6 V V VS = ±15V, VCM = 0V, Gain = 10 or 100, 0°C ≤ TA ≤ 70°C, unless otherwise noted. SYMBOL PARAMETER CONDITIONS GE Gain Error G = 100, VO = ±10V, RL = 50k or 2k G = 10, VO = ±10V, RL = 50k or 2k TCGE Gain Error Drift (Note 6) GNL Gain Nonlinearity VOS Input Offset Voltage ΔVOS/ΔT Input Offset Voltage Drift IOS Input Offset Current ΔIOS/ΔT Input Offset Current Drift MIN LT1102AC TYP MAX MIN LT1102C TYP MAX UNITS 0.04 0.03 0.11 0.09 0.05 0.04 0.14 0.12 G = 100, RL = 50k or 2k G = 10, RL = 50k or 2k 8 5 18 10 9 6 22 14 ppm/°C ppm/°C G = 100, RL= 50k G = 100, RL= 2k G = 10, RL= 50k or 2k 8 11 8 30 36 18 9 12 8 40 48 22 ppm ppm ppm 230 1000 280 1400 (Note 6) (Note 6) % % μV 2 8 3 12 μV/°C 10 150 15 220 pA 0.5 3 0.5 4 ±40 ±300 ±50 ±400 1 4 1 6 pA/°C IB Input Bias Current ΔIB/ΔT lnput Bias Current Drift (Note 6) CMRR Common Mode Rejection Ratio VCM = ±10.3V 83 98 81 97 dB PSRR Power Supply Rejection Ratio VS = ±10V to ±17V 87 101 85 100 dB IS Supply Current TA = 70°C 2.9 mA VO Maximum Output Voltage Swing RL = 50k RL = 2k 2.8 ±12.8 ±12.0 ±13.4 ±12.8 ±12.8 ±12.0 ±13.4 ±12.8 pA pA/°C V V 1102fb 4 LT1102 ELECTRICAL CHARACTERISTICS Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: This parameter is tested on a sample basis only. Note 3: Current noise is calculated from the formula: in = (2qIB)1/2 where q = 1.6 • 10–19 coulomb. The noise of source resistors up to 1GΩ swamps the contribution of current noise. Note 4: This parameter is not tested. It is guaranteed by design and by inference from the slew rate measurement. Note 5: Overdrive recovery is defined as the time delay from the removal of an input overdrive to the output’s return from saturation to linear operation. 50% overdrive equals VIN = ±2V (G = 10) or VIN = ±200mV (G = 100). Note 6: This parameter is not tested. It is guaranteed by design and by inference from other tests. U W TYPICAL PERFOR A CE CHARACTERISTICS Small Signal Response, G = 100 (Input = 5mV Pulse) Slew Rate, G = 100 (Input = ±130mV Pulse) 5V/DIV 100mV/DIV 100mV/DIV Small Signal Response, G = 10 (Input = 50mV Pulse) 2μS/DIV 2μS/DIV FPOLT1102 • TPC01 2μS/DIV FPOLT1102 • TPC02 FPOLT1102 • TPC03 Settling Time, G = 10 (Input From 10V to –10V) 5mV/DIV AT SUM NODE 5mV/DIV AT SUM NODE Settling Time, G = 10 (Input From – 10V to 10V) 1μS/DIV 1μS/DIV FPOLT1102 • TPC04 FPOLT1102 • TPC05 Settling Time, G = 100 (Input From 10V to –10V) 5mV/DIV AT SUM NODE 5mV/DIV AT SUM NODE Settling Time, G = 100 (Input From – 10V to 10V) 2μS/DIV 2μS/DIV FPOLT1102 • TPC06 FPOLT1102 • TPC07 1102fb 5 LT1102 U W TYPICAL PERFOR A CE CHARACTERISTICS Capacitive Load Handling 80 G = 10 G = 100 60 40 Gain vs Frequency 0.5 VS = ±15V TA = 25°C G = 100 G = 10 1 –1.0 30 –1.5 0 20 G = 10 –0.5 –1.0 0.1 1 10 100 CAPACITIVE LOAD (nF) 1k 1000 10k 100k FREQUENCY (Hz) RMS VOLTAGE NOISE DENSITY (nV√Hz) G = 10 RL = 50k G = 10 RL = 2k 2.6 VS = ±15V TA = 25°C 70 50 40 30 20 1/f CORNER = 28Hz 10 0 10k 100k 1M FREQUENCY (Hz) 3 10M 10 30 100 300 1k 140 120 2.0 80 1.6 60 1.4 20 TA = 25°C 1.0 VS = ±15V TA = 25°C 14 COMMON MODE RANGE (V) 40 –20 –5 –10 0 5 10 COMMON MODE VOLTAGE (V) N PACKAGE 20 H AND J PACKAGE 10 Supply Current vs Temperature G = 100 G = 10 12 11 10 –11 15 6 VS = ±15V 13 0 LT1102 • TPC13 Common Mode Range vs Temperature 15 40 TA = 70°C 1.2 0.8 –15 10k 100 TA = 125°C 1.8 LT1102 • TPC12 Warm-Up Drift 30 2.4 2.2 FREQUENCY (Hz) LT1102 • TPC11 50 3k 160 VS = ±15V INPUT BIAS CURRENT, TA = 25°C TO 70°C (pA) 100 G = 100 RL = 2k OR 50k 10 Input Bias Current Over the Common Mode Range Voltage Noise vs Frequency VS = ±15V TA = 25°C 10M LT1102 • TPC10 INPUT BIAS CURRENT, TA = 125°C (nA) Undistorted Output vs Frequency 20 100k 1M FREQUENCY (Hz) LT1102 • TPC09 LT1102 • TPC08 30 10 –1.5 10k 1M SUPPLY CURRENT (mA) 0 0.1 PEAK-TO-PEAK OUTPUT SWING (V) 40 –0.5 10 20 CHANGE IN OFFSET VOLTAGE (μV) VS = ±15V TA = 25°C G = 100 0 GAIN (dB) OUTPUT IMPEDANCE (Ω) VS = ±15V TA = 25°C 100 OVERSHOOT (%) Output Impedance vs Frequency 100 GAIN ERROR (%) 120 G = 10 OR 100 –12 4 VS = ±15V VS = ±10V 2 –13 –14 0 0 1 3 4 2 TIME AFTER POWER ON (MINUTES) LT1102 • TPC14 5 –15 –50 50 0 TEMPERATURE (°C) 100 LT1102 • TPC15 0 –50 –25 50 25 75 0 TEMPERATURE (˚C) 100 125 LT1102 • TPC16 1102fb 6 LT1102 U W TYPICAL PERFOR A CE CHARACTERISTICS Short-Circuit Current vs Time Distribution of Offset Voltage 50 35 TA = –55°C 30 30 TA = 25°C 20 10 0 VS = ±15V –10 PERCENT OF UNITS SHORT-CIRCUIT CURRENT (mA) 40 TA = 125°C TA = 125°C TA = 25°C –20 – 30 TA = –55°C –40 VS = ±15V TA = 25°C 950 UNITS TESTED IN ALL PACKAGES 25 20 15 10 5 –50 0 2 0 1 3 TIME FROM OUTPUT SHORT TO GROUND (MINUTES) –0.8 –0.4 0.4 0.8 0 INPUT OFFSET VOLTAGE (mV) LT1102 • TPC17 LT1102 • TPC18 Gain Nonlinearity Over Temperature Gain Error vs Temperature 0.10 40 VS = ±15V RL ≥ 2k GAIN NONLINEARITY (ppm) 0.08 GAIN ERROR (%) G = 100 0.06 0.04 G = 10 0.02 0 –50 –25 50 25 0 75 TEMPERATURE (°C) 100 125 LT1102 • TPC19 32 G = 100 RL = 50k 24 G = 10 RL = 2k OR 50k 16 8 G = 100 RL = 2k –50 –25 50 25 0 75 TEMPERATURE (°C) 100 125 LT1102 • TPC20 1102fb 7 LT1102 U W U U APPLICATIO S I FOR ATIO Common Mode Rejection Ratio vs Frequency 120 COMMON MODE REJECTION RATIO (dB) In the two op amp instrumentation amplifier configuration, the first amplifier is basically in unity gain, and the second amplifier provides all the voltage gain. In the LT1102, the second amplifier is decompensated for gain of 10 stability, therefore high slew rate and bandwidth are achieved. Common mode rejection versus frequency is also optimized in the G = 10 mode, because the bandwidths of the two op amps are similar. When G = 100, this statement is no longer true; however, by connecting an 18pF capacitor between pins 1 and 2, a common mode AC gain is created to cancel the inherent roll-off. From 200Hz to 30kHz, CMRR versus frequency is improved by an order of magnitude. 100 G = 10 80 G = 100 18pF PIN 1 TO PIN 2 G = 100 60 40 20 0 VS = ±15V TA = 25°C 1 10 100 1k 10k FREQUENCY (Hz) 100k 1M LT1102 • AI01 Input Protection Instrumentation amplifiers are often used in harsh environments where overload conditions can occur. The LT1102 employs FET input transistors, consequently the differential input voltage can be ±30V (with ±15V supplies, ±36V with ±18V supplies). Some competitive instrumentation amplifiers have NPN inputs which are protected by back-to-back diodes. When the differential input Voltage exceeds ±13V on these competitive devices, input current increases to milliampere level; more than ±10V differential voltage can cause permanent damage. When the LT1102 inputs are pulled below the negative supply or above the positive supply, the inputs will clamp a diode voltage below or above the supplies. No damage will occur if the input current is limited to 20mA. Gains Between 10 and 100 Gains between 10 and 100 can be achieved by connecting two equal resistors (= RX) between pins 1 and 2 and pins 7 and 8. Gain = 10 + RX R + RX/90 The nominal value of R is 1.84kΩ. The usefulness of this method is limited by the fact that R is not controlled to better than ±10% absolute accuracy in production. However, on any specific unit, 90R can be measured between Pins 1 and 2. 1102fb 8 LT1102 U W U U APPLICATIO S I FOR ATIO Gain = 20, 110, or 200 Instrumentation Amplifiers Differential Output 6 Single Ended Output + LT1102 + 3 IN – 3 + + OUT IN – – 6 LT1102 – 8 3 – 8 OUT 1 + + LT1102 3 + LT1102 1 – 6 6 8 – 8 1 1 GAIN = 200, AS SHOWN GAIN = 20, SHORT PIN 1 TO PIN 2, PIN 7 TO PIN 8 ON BOTH DEVICES GAIN = 110, SHORT PIN 1 TO PIN 2, PIN 7 TO PIN 8 ON ONE DEVICE, NOT ON THE OTHER INPUT REFERRED NOISE IS REDUCED BY √2 (G = 200 OR 20) LT1102 • AI02 Multiplexed Input Data Acquisition 509 OR EQUIVALENT S1A 4 CHANNELS OF DIFFERENTIAL INPUT DA + LT1102 S4A DB S1B OUTPUT – S4B DECODER AO A1 EN 800kHz SIGNALS CAN BE MULTIPLEXED WITH LT1102 IN G = 10 Voltage Programmable Current Source is Simple and Precise LT1102 • AI03 Dynamic Response of the Current Source A = 5V/DIV + VIN 0 ±10V LT1006 B = 5mA/DIV – 0.05μF 10k + LT1102 A = 100 R 10Ω* IK IK = VIN R • 100 HORIZ. = 20μs/DIV FPOLT1102 • AI05 – LOAD LT1102 • AI04 1102fb 9 LT1102 U TYPICAL APPLICATIO S Basic Connections V+ 5 6 NC + 7 LT1102 INPUT 3 8 – 1 OUT 4 2 NC V– REF GAIN = 100 V+ 5 6 + 7 LT1102 INPUT 3 – 2 1 8 OUT 4 V– REF GAIN = 10 LT1102 • TA03 Settling Time Test Circuit Offset Nulling 15V 15V 6 R1 20VP-P FLAT-TOP INPUT 5.1k 100Ω LT1102 3 2k 5 + – 4 –15V HP5082-2810 1 6 + 3 – 8 200Ω 5.0k 5 LT1102 OUT 8 1.8k 1 10k 4 R2 FET PROBE R1 = 910Ω, G = 10 R1 = 10k, G = 100 2k – 15V LT1102 • TA04 R2 = 3.3Ω, G = 10 R2 = 30Ω, G = 100 NULL RANGE = ± 1mV GAIN DEGRADATION ≈ 0.018% LT1102 • TA05 1102fb 10 LT1102 U PACKAGE DESCRIPTIO H Package 8-Lead TO-5 Metal Can (.230 Inch PCD) (Reference LTC DWG # 05-08-1321) .335 – .370 (8.509 – 9.398) DIA .305 – .335 (7.747 – 8.509) .040 (1.016) MAX .050 (1.270) MAX SEATING PLANE .165 – .185 (4.191 – 4.699) REFERENCE PLANE GAUGE PLANE .500 – .750 (12.700 – 19.050) .010 – .045* (0.254 – 1.143) .016 – .021** (0.406 – 0.533) .027 – .045 (0.686 – 1.143) 45°TYP PIN 1 .028 – .034 (0.711 – 0.864) .230 (5.842) TYP .110 – .160 (2.794 – 4.064) INSULATING STANDOFF *LEAD DIAMETER IS UNCONTROLLED BETWEEN THE REFERENCE PLANE AND THE SEATING PLANE .016 – .024 **FOR SOLDER DIP LEAD FINISH, LEAD DIAMETER IS (0.406 – 0.610) H8 (TO-5) 0.230 PCD 0801 J8 Package 8-Lead CERDIP (Narrow .300 Inch, Hermetic) (Reference LTC DWG # 05-08-1110) CORNER LEADS OPTION (4 PLCS) .023 – .045 (0.584 – 1.143) HALF LEAD OPTION .045 – .068 (1.143 – 1.650) FULL LEAD OPTION .005 (0.127) MIN .405 (10.287) MAX 8 7 6 5 .025 (0.635) RAD TYP .220 – .310 (5.588 – 7.874) 1 2 3 .300 BSC (7.62 BSC) 4 .200 (5.080) MAX .015 – .060 (0.381 – 1.524) .008 – .018 (0.203 – 0.457) 0° – 15° NOTE: LEAD DIMENSIONS APPLY TO SOLDER DIP/PLATE OR TIN PLATE LEADS .045 – .065 (1.143 – 1.651) .014 – .026 (0.360 – 0.660) .100 (2.54) BSC .125 3.175 MIN J8 0801 OBSOLETE PACKAGES 1102fb Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 11 LT1102 U PACKAGE DESCRIPTIO N8 Package 8-Lead PDIP (Narrow .300 Inch) (Reference LTC DWG # 05-08-1510) .400* (10.160) MAX 8 7 6 5 1 2 3 4 .255 ± .015* (6.477 ± 0.381) .300 – .325 (7.620 – 8.255) .045 – .065 (1.143 – 1.651) .065 (1.651) TYP .008 – .015 (0.203 – 0.381) ( +.035 .325 –.015 8.255 +0.889 –0.381 .130 ± .005 (3.302 ± 0.127) ) .100 (2.54) BSC .120 (3.048) .020 MIN (0.508) MIN .018 ± .003 (0.457 ± 0.076) N8 1002 NOTE: 1. DIMENSIONS ARE INCHES MILLIMETERS *THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .010 INCH (0.254mm) 1102fb 12 Linear Technology Corporation LT 0507 REV B • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com © LINEAR TECHNOLOGY CORPORATION 1991