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LT1113ACN8#PBF

LT1113ACN8#PBF

  • 厂商:

    AD(亚德诺)

  • 封装:

    DIP8

  • 描述:

    IC OPAMP JFET 2 CIRCUIT 8DIP

  • 数据手册
  • 价格&库存
LT1113ACN8#PBF 数据手册
LT1113 Dual Low Noise, Precision, JFET Input Op Amp Features Description 100% Tested Low Voltage Noise: 6nV/√Hz Max nn SO-8 Package Standard Pinout nn Voltage Gain: 1.2 Million Min nn Offset Voltage: 1.5mV Max nn Offset Voltage Drift: 15µV/°C Max nn Input Bias Current, Warmed Up: 450pA Max nn Gain Bandwidth Product: 5.6MHz Typ nn Guaranteed Specifications with ± 5V Supplies nn Guaranteed Matching Specifications The LT®1113 achieves a new standard of excellence in noise performance for a dual JFET op amp. The 4.5nV/√Hz 1kHz noise combined with low current noise and picoampere bias currents makes the LT1113 an ideal choice for amplifying low level signals from high impedance capacitive transducers. nn Applications The LT1113 is unconditionally stable for gains of 1 or more, even with load capacitances up to 1000pF. Other key features are 0.4mV VOS and a voltage gain of 4 million. Each individual amplifier is 100% tested for voltage noise, slew rate and gain bandwidth. Photocurrent Amplifiers Hydrophone Amplifiers nn High Sensitivity Piezoelectric Accelerometers nn Low Voltage and Current Noise Instrumentation Amplifier Front Ends nn Two and Three Op Amp Instrumentation Amplifiers nn Active Filters The design of the LT1113 has been optimized to achieve true precision performance with an industry standard pinout in the S0-8 package. A set of specifications are provided for ± 5V supplies and a full set of matching specifications are provided to facilitate the use of the LT1113 in matching dependent applications such as instrumentation amplifier front ends. nn nn L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and C-Load is a trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners. Typical Application Low Noise Hydrophone Amplifier with DC Servo 2 3 R2 C1* 200Ω – 40 8 1/2 LT1113 1 + OUTPUT C2 0.47µF 4 –5V TO –15V R8 100M R7 1M R6 100k 7 1/2 LT1113 DC OUTPUT ≤ 2.5mV FOR TA < 70°C OUTPUT VOLTAGE NOISE = 128nV/√Hz AT 1kHz (GAIN = 20) C1 ≈ CT ≈ 100pF TO 5000pF; R4C2 > R8CT; *OPTIONAL + CT HYDROPHONE 5V TO 15V 6 R4 1M 5 R5 1M PERCENT OF UNITS (%) R3 3.9k – R1* 100M 1kHz Input Noise Voltage Distribution 30 VS = ±15V TA = 25°C 138 S8 276 OP AMPS TESTED 20 10 0 3.8 4.0 4.2 4.4 4.6 4.8 5.0 5.2 5.4 5.6 5.8 INPUT VOLTAGE NOISE (nV/√Hz) 1113 TA02 1113 TA01 1113fc For more information www.linear.com/LT1113 1 LT1113 Absolute Maximum Ratings (Note 1) Supply Voltage –55°C to 105°C.................................................. ± 20V 105°C to 125°C................................................... ±16V Differential Input Voltage....................................... ± 40V Input Voltage (Equal to Supply Voltage)................. ± 20V Output Short Circuit Duration........................... 1 Minute Storage Temperature Range................... – 65°C to 150°C Operating Temperature Range LT1113AC/LT1113C (Note 2)............. – 40°C to 85°C LT1113AM/LT1113M (OBSOLETE) – 55°C to 125°C Specified Temperature Range LT1113AC/LT1113C (Note 3)............. – 40°C to 85°C LT1113AM/LT1113M (OBSOLETE) – 55°C to 125°C Lead Temperature (Soldering, 10 sec)................... 300°C Pin Configuration TOP VIEW 8 V+ OUT A 1 –IN A 2 +IN A 3 V– 4 TOP VIEW 7 OUT B A B 6 –IN B OUT A 1 5 +IN B –IN A 2 +IN A 3 N8 PACKAGE 8-LEAD PDIP V– 4 TJMAX = 150°C, θJA = 130°C/W (N8) 8 V+ 7 OUT B A B 6 –IN B 5 +IN B S8 PACKAGE 8-LEAD PLASTIC SO JB PACKAGE 8-LEAD CERDIP TJMAX = 160°C, θJA = 100°C/W (J8) TJMAX = 150°C, θJA = 190°C/W OBSOLETE PACKAGE Consider the N8 Package for Alternate Source Order Information LEAD FREE FINISH TAPE AND REEL PART MARKING PACKAGE DESCRIPTION TEMPERATURE RANGE LT1113ACN8#PBF LT1113CN8#PBF LT1113ACN8#TRPBF 1113ACN8 8-Lead PDIP –40°C to 85°C LT1113CN8#TRPBF 1113CN8 8-Lead PDIP –40°C to 85°C LT1113ACS8#PBF LT1113CS8#TRPBF 1113 8-Lead Plastic SO –40°C to 85°C LT1113AMJ8#PBF LT1113AMJ8#TRPBF 1113AMJ8 8-Lead CERDIP –55°C to 125°C LT1113MJ8#PBF LT1113MJ8#TRPBF 1113MJ8 8-Lead CERDIP –55°C to 125°C OBSOLETE PACKAGE Consult LTC Marketing for parts specified with wider operating temperature ranges. Consult LTC Marketing for information on nonstandard lead based finish parts. For more information on lead free part markings, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ 2 1113fc For more information www.linear.com/LT1113 LT1113 Electrical Characteristics VS = ±15V, VCM = 0V, TA = 25°C, unless otherwise noted. LT1113AM/AC SYMBOL PARAMETER CONDITIONS (Note 4) MIN LT1113M/C TYP MAX 0.40 0.45 1.5 1.7 MIN TYP MAX 0.50 0.55 1.8 2.0 UNITS VOS Input Offset Voltage IOS Input Offset Current Warmed Up (Note 5) 30 100 35 150 pA IB Input Bias Current Warmed Up (Note 5) 300 450 320 480 pA 6.0 VS = ±5V mV mV Input Noise Voltage 0.1Hz to 10Hz 2.4 2.4 µVP-P Input Noise Voltage Density fO = 10Hz fO = 1000Hz 17 4.5 17 4.5 nV/√Hz nV/√Hz in Input Noise Current Density fO = 10Hz, fO = 1000Hz (Note 6) 10 10 RIN Input Resistance Differential Mode Common Mode 1011 1011 1010 1011 1011 1010 Ω Ω Ω 14 27 14 27 pF pF en CIN Input Capacitance VCM Input Voltage Range (Note 7) CMRR Common Mode Rejection Ratio VCM = –10V to 8V VCM = 8V to 11V VS = ±5V VCM = –10V to 13V 6.0 fA/√Hz 13.0 –10.5 13.5 –11.0 13.0 –10.5 13.5 –11.0 V V 85 98 82 95 dB VS = ±15V, VCM = 0V, TA = 25°C, unless otherwise noted. LT1113AM/AC LT1113M/C SYMBOL PARAMETER CONDITIONS MIN TYP MIN TYP PSRR Power Supply Rejection Ratio VS = ± 4.5V to ± 20V 86 100 83 98 AVOL Large-Signal Voltage Gain VO = ±12V, RL = 10k 1200 4800 1000 4500 V/mV VOUT Output Voltage Swing RL = 10k RL = 1k SR Slew Rate GBW tS dB 4000 500 3000 V/mV ±13.8 ±13.0 ±13.0 ±11.5 ±13.8 ±13.0 V V RL ≥ 2k (Note 9) 2.3 3.9 2.3 3.9 V/µs Gain Bandwidth Product fO = 100kHz 4.0 5.6 4.0 5.6 MHz Settling Time 0.01%, AV = + 1, RL = 1k, CL ≤ 1000pF, 10V Step 4.2 4.2 µs Channel Separation fO = 10Hz, VO = ±10V, RL = 1k 130 126 dB VS = ±5V + UNITS 600 Supply Current per Amplifier ∆VOS MAX ±13.5 ±12.0 VO = ±10V, RL = 1k IS MAX Offset Voltage Match 5.3 6.25 5.3 6.50 mA 5.3 6.20 5.3 6.45 mA 0.8 2.5 0.8 3.3 mV 10 80 10 120 pA ∆IB Noninverting Bias Current Match Warmed Up (Note 5) ∆CMRR Common Mode Rejection Match (Note 11) 81 94 78 94 dB ∆PSRR Power Supply Rejection Match 82 95 80 95 dB (Note 11) 1113fc For more information www.linear.com/LT1113 3 LT1113 Electrical Characteristics The l denotes specifications which apply over the temperature range 0°C ≤ TA ≤ 70°C. VS = ±15V, VCM = 0V, unless otherwise noted. (Note 12) LT1113AC SYMBOL PARAMETER CONDITIONS (Note 4) MIN LT1113C TYP MAX TYP MAX VS = ± 5V l l 0.6 0.7 2.1 2.3 MIN 0.7 0.8 2.5 2.7 UNITS mV mV (Note 8) l 7 15 8 20 µV/°C 55 450 pA 700 1600 pA VOS Input Offset Voltage ∆VOS ∆Temp Average Input Offset Voltage Drift IOS Input Offset Current l 50 350 IB Input Bias Current l 600 1200 VCM Input Voltage Range l l 12.9 –10.0 13.4 –10.8 12.9 –10.0 13.4 –10.8 V V CMRR Common Mode Rejection Ratio VCM = –10V to 12.9V l 81 97 79 94 dB PSRR Power Supply Rejection Ratio VS = ± 4.5V to ±20V l 83 99 81 97 AVOL Large-Signal Voltage Gain VO = ±12V, RL = 10k VO = ±10V, RL = 1k l l 900 500 3600 2600 800 400 3400 2400 V/mV V/mV VOUT Output Voltage Swing RL = 10k RL = 1k l l ±13.2 ±11.7 ±13.5 ±12.7 ±12.7 ±11.3 ±13.5 ±12.7 V V SR Slew Rate RL ≥ 2k (Note 9) l 2.1 3.7 1.7 3.7 V/µs GBW Gain Bandwidth Product fO = 100kHz l 3.2 4.5 3.2 4.5 MHz IS Supply Current per Amplifier VS = ± 5V l l 5.3 5.3 ∆VOS Offset Voltage Match l ∆IB+ Noninverting Bias Current Match l ∆CMRR Common Mode Rejection Match (Note 11) l 76 93 74 93 dB ∆PSRR Power Supply Rejection Match (Note 11) l 79 93 77 93 dB 6.35 6.30 5.3 5.3 0.9 3.5 30 300 dB 6.55 6.50 mA mA 0.9 4.5 mV 35 400 pA The l denotes specifications which apply over the temperature range –40°C ≤ TA ≤ 85°C. VS = ±15V, VCM = 0V, unless otherwise noted. (Note 10) LT1113AC SYMBOL PARAMETER CONDITIONS (Note 4) MIN LT1113C TYP MAX l l 0.7 0.8 7 MIN TYP MAX UNITS 2.4 2.6 0.8 0.9 2.8 3.0 mV mV 15 8 20 µV/°C VOS Input Offset Voltage ∆VOS ∆Temp Average Input Offset Voltage Drift l IOS Input Offset Current l 80 700 90 1000 pA IB Input Bias Current l 1750 3000 1800 5000 pA VCM Input Voltage Range l l 12.6 –10.0 13.0 –10.5 12.6 –10.0 13.0 –10.5 V V CMRR Common Mode Rejection Ratio VCM = –10V to 12.6V l 80 96 78 93 dB VS = ± 5V PSRR Power Supply Rejection Ratio VS = ± 4.5V to ±20V l 81 98 79 96 AVOL Large-Signal Voltage Gain VO = ±12V, RL = 10k VO = ±10V, RL = 1k l l 850 400 3300 2200 750 300 3000 2000 V/mV V/mV VOUT Output Voltage Swing RL = 10k RL = 1k l l ±13.0 ±11.5 ±12.5 ±12.0 ±12.5 ±11.0 ±12.5 ±12.0 V V SR Slew Rate RL ≥ 2k l 2.0 3.5 1.6 3.5 V/µs GBW Gain Bandwidth Product fO = 100kHz l 2.9 4.3 2.9 4.3 MHz 4 dB 1113fc For more information www.linear.com/LT1113 LT1113 Electrical Characteristics The l denotes specifications which apply over the temperature range –40°C ≤ TA ≤ 85°C. VS = ±15V, VCM = 0V, unless otherwise noted. (Note 10) LT1113AC SYMBOL PARAMETER Supply Current per Amplifier IS ∆VOS CONDITIONS (Note 4) VS = ± 5V Offset Voltage Match MIN LT1113C TYP MAX l l 5.30 5.25 l MIN TYP MAX UNITS 6.35 6.30 5.30 5.25 6.55 6.50 mA mA 1.0 4.4 1.0 5.1 mV 50 600 55 900 ∆IB + Noninverting Bias Current Match ∆CMRR Common Mode Rejection Match (Note 11) l 76 93 73 93 dB ∆PSRR Power Supply Rejection Match (Note 11) l 77 92 75 92 dB l pA The l denotes specifications which apply over the temperature range –55°C ≤ TA ≤ 125°C. VS = ±15V, VCM = 0V, unless otherwise noted. (Note 12) LT1113AM SYMBOL PARAMETER Input Offset Voltage VOS ∆VOS ∆Temp Average Input Offset Voltage Drift CONDITIONS (Note 4) VS = ± 5V (Note 8) MIN LT1113M l TYP 0.8 0.8 5 MAX 2.7 2.8 12 l l MIN TYP 0.9 0.9 8 MAX 3.3 3.4 15 UNITS mV mV µV/°C IOS Input Offset Current l 0.8 15 1.0 25 nA IB Input Bias Current l 25 50 27 70 nA VCM Input Voltage Range l l CMRR Common Mode Rejection Ratio VCM = –10V to 12.6V PSRR Power Supply Rejection Ratio AVOL Large-Signal Voltage Gain VOUT Output Voltage Swing SR l 12.6 –10.0 79 13.0 –10.4 95 12.6 –10.0 77 13.0 –10.4 92 V V dB VS = ± 4.5V to ±20V l 80 97 78 95 dB l l Slew Rate VO = ±12V, RL = 10k VO = ±10V, RL = 1k RL = 10k RL = 1k RL ≥ 2k (Note 9) l 800 400 ±13.0 ±11.5 1.9 2700 1500 ±12.5 ±12.0 3.3 700 300 ±12.5 ±11.0 1.6 2500 1000 ±12.5 ±12.0 3.3 GBW Gain Bandwidth Product fO = 100kHz l 2.2 IS Supply Current Per Amplifier VS = ± 5V l l ∆VOS Offset Voltage Match l l l 3.4 2.2 5.30 5.25 1.0 6.35 6.30 5.0 1.8 12 V/mV V/mV V V V/µs 3.4 MHz 5.30 5.25 1.0 6.55 6.50 5.5 2.0 20 mA mA mV ∆IB + Noninverting Bias Current Match ∆CMRR Common Mode Rejection Match (Note 11) l 75 92 73 92 dB ∆PSRR Power Supply Rejection Match (Note 11) l 76 91 74 91 dB l Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The LT1113C is guaranteed functional over the Operating Temperature Range of –40°C to 85°C. The LT1113M is guaranteed functional over the Operating Temperature Range of – 55°C to 125°C. Note 3: The LT1113C is guaranteed to meet specified performance from 0°C to 70°C. The LT1113C is designed, characterized and expected to meet specified performance from –40°C to 85°C but is not tested or QA sampled at these temperatures. For guaranteed I grade parts, consult the nA factory. The LT1113M is guaranteed to meet specified performance from –55°C to 125°C. Note 4: Typical parameters are defined as the 60% yield of parameter distributions of individual amplifiers, i.e., out of 100 LT1113s (200 op amps) typically 120 op amps will be better than the indicated specification. Note 5: Warmed-up IB and IOS readings are extrapolated to a chip temperature of 50°C from 25°C measurements and 50°C characterization data. Note 6: Current noise is calculated from the formula: in = (2qIB)1/2 where q = 1.6 • 10 –19 coulomb. The noise of source resistors up to 200M swamps the contribution of current noise. 1113fc For more information www.linear.com/LT1113 5 LT1113 Electrical Characteristics Note 7: Input voltage range functionality is assured by testing offset voltage at the input voltage range limits to a maximum of 2.3mV (A grade) to 2.8mV (C grade). Note 8: This parameter is not 100% tested. Note 9: Slew rate is measured in AV = –1; input signal is ±7.5V, output measured at ±2.5V. Note 10: The LT1113 is designed, characterized and expected to meet these extended temperature limits, but is not tested at –40°C and 85°C. Guaranteed I grade parts are available. Consult factory. Note 11: ∆CMRR and ∆PSRR are defined as follows: (1) CMRR and PSRR are measured in µV/V on the individual amplifiers. (2) The difference is calculated between the matching sides in µV/V. (3) The result is converted to dB. Note 12: The LT1113 is measured in an automated tester in less than one second after application of power. Depending on the package used, power dissipation, heat sinking, and air flow conditions, the fully warmed-up chip temperature can be 10°C to 50°C higher than the ambient temperature. Typical Performance Characteristics 1kHz Output Voltage Noise Density vs Source Resistance 2 6 4 TIME (SEC) 8 10 1k VN – RSOURCE 100 10 VN 1 100 SOURCE RESISTANCE ONLY 1k TA = 25°C VS = ±15V 1 8 7 6 30n 3n 1n IB, VCM = 0V IB, VCM = 10V 100p 4 3 2 1 100 125 1113 G04 10 1k 100 FREQUENCY (Hz) 30p 10p 3p 10k Input Bias and Offset Currents Over the Common Mode Range 400 VS = ±15V 10n 300p 5 1 1113 G03 100n VS = ±15V INPUT BIAS AND OFFSET CURRENTS (A) VOLTAGE NOISE (AT1kHz)(nV/√Hz) TYPICAL 1/f CORNER 120Hz Input Bias and Offset Currents vs Chip Temperature 10 6 10 1113 G02 Voltage Noise vs Chip Temperature 0 –75 –50 –25 0 25 50 75 TEMPERATURE (°C) TA = 25°C VS = ±15V 10k 100k 1M 10M 100M 1G SOURCE RESISTANCE (Ω) 1113 G01 9 RMS VOLTAGE NOISE DENSITY (nV/√Hz) + INPUT BIAS AND OFFSET CURRENTS (pA) 0 Voltage Noise vs Frequency 100 10k TOTAL 1kHz VOLTAGE NOISE DENSITY (nV/√Hz) VOLTAGE NOISE (1µV/DIV) 0.1Hz to 10Hz Voltage Noise IOS, VCM = 0V IOS, VCM = 10V 1p –75 –50 –25 0 25 50 75 TEMPERATURE (°C) 100 125 1113 G05 300 TA = 25°C VS = ±15V NOT WARMED UP 200 BIAS CURRENT 100 OFFSET CURRENT 0 –15 –10 –5 0 5 10 COMMON MODE RANGE (V) 15 1113 G06 1113fc For more information www.linear.com/LT1113 LT1113 Typical Performance Characteristics 120 V + = 5V TO 20V –1.0 –1.5 –2.0 4.0 V – = –5V TO –20V 3.5 3.0 2.5 V – +2.0 –60 –20 60 100 20 TEMPERATURE (°C) 120 TA = 25°C VS = ±15V 100 80 60 40 20 0 140 1k 10k 100k 1M FREQUENCY (Hz) +PSRR 60 180 20 1M 1k 10k 100k FREQUENCY (Hz) 10M Gain and Phase Shift vs Frequency 50 VS = ±15V VO = ±10V, RL = 1k VO = ±12V, RL = 10k 9 8 VOLTAGE GAIN (V/µV) 20 100 7 6 RL =10k 5 4 RL = 1k 3 60 TA = 25°C VS = ±15V CL = 10pF 40 2 80 30 100 20 120 PHASE 10 140 GAIN 0 160 1 –20 0.01 1 10k 100 FREQUENCY (Hz) 1M 100M 0 –75 –50 –25 0 25 50 75 CHIP TEMPERATURE (°C) 1113 G10 –10 100 125 0.1 1 10 FREQUENCY (MHz) 1113 G12 1113 G11 Small-Signal Transient Response 180 100 Large-Signal Transient Response Supply Current vs Supply Voltage SUPPLY CURRENT PER AMPLIFIER (mA) 5V/DIV 20mV/DIV 6 1µs/DIV AV = 1 CL = 10pF VS = ±15V, ±5V 2µs/DIV 1113 G13 AV = 1 CL = 10pF VS = ±15V 1113 G14 25°C –55°C 5 125°C 4 0 ±10 ±15 ±5 SUPPLY VOLTAGE (V) ±20 1113 G15 1113fc For more information www.linear.com/LT1113 7 PHASE SHIFT (DEG) 60 10 1113 G09 10 TA = 25°C VS = ±15V 100 –PSRR 40 Voltage Gain vs Chip Temperature Voltage Gain vs Frequency VOLTAGE GAIN (dB) 80 1113 G08 1113 G07 140 TA = 25°C 100 0 10M VOLTAGE GAIN (dB) COMMON MODE LIMIT (V) REFERRED TO POWER SUPPLY –0.5 POWER SUPPLY REJECTION RATIO (dB) COMMON-MODE REJECTION RATIO (dB) V + –0 Power Supply Rejection Ratio vs Frequency Common Mode Rejection Ratio vs Frequency Common Mode Limit vs Temperature LT1113 Typical Performance Characteristics 50 40 –55°C OVERSHOOT (%) – 1.4 –1.6 VS = ±5V TO ±20V 1.4 VS = ±15V TA = 25°C RL ≥ 10k VO = 100mVP-P AV = +10, RF = 10k, CF = 20pF 1.2 1.0 0.8 –55°C 0.6 25°C SLEW RATE (V/µs) –1.0 30 20 10 0 0.1 1 100 1000 10 CAPACITIVE LOAD (pF) 1113 G17 Distribution of Offset Voltage Drift with Temperature (J8) Distribution of Offset Voltage Drift with Temperature (N8, S8) 40 78 S8 100 N8 356 OP AMPS PERCENT OF UNITS 30 20 10 20 10 6 0 –25 –20 –15 –10 –5 8 OFFSET VOLTAGE DRIFT WITH TEMPERATURE (µV/°C) AV = 100 0.01 AV = 10 0.001 0.0001 20 AV = 1 NOISE FLOOR 100 1k FREQUENCY (Hz) 10k 20k 1113 • G22 2 4 1 2 5 0 100 125 VS = ±15V TA = 25°C 400 S8 PACKAGE N8 PACKAGE 300 200 J8 PACKAGE 100 10 15 20 25 IN STILL AIR (S8 PACKAGE SOLDERED ONTO BOARD) 0 1 2 3 5 4 TIME AFTER POWER ON (MINUTES) THD and Noise vs Frequency for Inverting Gain 1 0.1 0.01 AV = –10 AV = –1 100 1k FREQUENCY (Hz) 120 100 80 60 VS = ±15V RL = 1k VO = 10VP-P TA = 25°C 40 20 NOISE FLOOR 0.0001 20 LIMITED BY THERMAL INTERACTION 140 AV = –100 0.001 Channel Separation vs Frequency 160 ZL = 2k||15pF VO = 20VP-P AV = –1, –10, –100 MEASUREMENT BANDWIDTH = 10Hz TO 80kHz 10k 20k 1113 G23 6 1113 G21 1113 G20 TOTAL HARMONIC DISTORTION + NOISE (%) TOTAL HARMONIC DISTORTION + NOISE (%) 0.1 GBW OFFSET VOLTAGE DRIFT WITH TEMPERATURE (µV/°C) THD and Noise vs Frequency for Noninverting Gain ZL = 2k||15pF VO = 20VP-P AV = +1, +10, +100 MEASUREMENT BANDWIDTH = 10Hz TO 80kHz 6 3 0 0 1113 G19 1 8 Warm-Up Drift CHANGE IN OFFSET VOLTAGE (µV) 75 J8 150 OP AMPS 4 SLEW RATE 4 500 VS = ±15V VS = ±15V 2 10 1113 G18 40 0 5 0 –75 –50 –25 0 25 50 75 TEMPERATURE (°C) 10000 1113 G16 0 –12 –10 –8 –6 –4 –2 12 AV = 10 125°C V – +0.4 –10 –8 –6 –4 –2 0 2 4 6 8 10 ISINK ISOURCE OUTPUT CURRENT (mA) 30 6 AV = 1 CHANNEL SEPARATION (dB) OUTPUT VOLTAGE SWING (V) 125°C 25°C –1.2 PERCENT OF UNITS Slew Rate and Gain Bandwidth Product vs Temperature Capacitive Load Handling 0 10 100 LIMITED BY PIN-TO-PIN CAPACITANCE 1k 10k 100k FREQUENCY (Hz) 1M 10M 1113 G24 *See LT1115 data sheet for definition of CCIF testing. 8 1113fc For more information www.linear.com/LT1113 GAIN BANDWIDTH PRODUCT (fO = 100kHz)(MHz) V + – 0.8 Output Voltage Swing vs Load Current LT1113 Typical Performance Characteristics ZL = 2k||15pF, fO = 1kHz AV = +1, +10, +100 MEASUREMENT BANDWIDTH = 10Hz TO 22kHz 0.1 AV = 100 0.01 AV = 10 0.001 AV = 1 NOISE FLOOR 0.0001 0.3 10 1 OUTPUT SWING (VP-P) 30 1 CCIF IMD Test (Equal Amplitude Tones at 13kHz, 14kHz)* INTERMODULATION DISTORTION (AT 1kHz)(%) 1 THD and Noise vs Output Amplitude for Inverting Gain TOTAL HARMONIC DISTORTION + NOISE (%) TOTAL HARMONIC DISTORTION + NOISE (%) THD and Noise vs Output Amplitude for Noninverting Gain ZL = 2k||15pF, fO = 1kHz AV = –1, –10, –100 MEASUREMENT BANDWIDTH = 10Hz TO 22kHz 0.1 AV = –100 0.01 AV = –10 0.001 AV = –1 NOISE FLOOR 0.0001 0.3 10 1 OUTPUT SWING (VP-P) 1113 • G25 30 1113 • G26 0.1 VS = ±15V RL = 2k TA = 25°C 0.01 AV = ±10 0.001 0.0001 20m 0.1 1 OUTPUT SWING (VP-P) 10 30 1113 • G27 Applications Information The LT1113 dual in the plastic and ceramic DIP packages are pin compatible with and directly replace such JFET op amps as the OPA2111 and OPA2604 with improved noise performance. Being the lowest noise dual JFET op amp available to date, the LT1113 can replace many bipolar op amps that are used in amplifying low level signals from high impedance transducers. The best bipolar op amps will eventually loose out to the LT1113 when transducer impedance increases due to higher current noise. The low voltage noise of the LT1113 allows it to surpass every dual and most single JFET op amps available. For the best performance versus area available anywhere, the LT1113 is offered in the narrow SO-8 surface mount package with standard pinout and no degradation in performance. INPUT NOISE VOLTAGE (nV√Hz) The low voltage and current noise offered by the LT1113 makes it useful in a wide range of applications, especially where high impedance, capacitive transducers are used 1k LT1124* such as hydrophones, precision accelerometers and photo diodes. The total output noise in such a system is the gain LT1113* CS RS times the RMS sum of the op amp input referred voltage 100 SOURCE RESISTANCE S=R noise,= 2R the thermal noise of the transducer, and the op LT1124† VO * PLUS RESISTOR † PLUS RESISTOR | | 1000pF CAPACITOR amp bias current noise times the transducer impedance. RS CS Vn = AV √Vn2(OP AMP) + 4kTR + 2q IB • R2 Figure 1 shows total input voltage noise versus source † LT1113 10 resistance. In a low source resistance ( R1 OR R2 CS RS TRANSDUCER CB OUTPUT + RB CB = CF ||CS RB = RF ||RS dQ Q = CV; = I = C dV dt dt TRANSDUCER 1113 • F02 Figure 2. Noninverting and Inverting Gain Configurations (2qIB RTRANS) will eventually dominate the total noise. At these high source resistances, the LT1113 will out perform the lowest noise bipolar op amp due to the inherently low current noise of FET input op amps. Clearly, the LT1113 will extend the range of high impedance transducers that can be used for high signal to noise ratios. This makes the LT1113 the best choice for high impedance, capacitive transducers. The high input impedance JFET front end makes the LT1113 suitable in applications where very high charge sensitivity is required. Figure 2 illustrates the LT1113 in its inverting and noninverting modes of operation. A charge amplifier is shown in the inverting mode example; here the gain depends on the principal of charge conservation at the input of the LT1113. The charge across the transducer capacitance, CS, is transferred to the feedback capacitor CF, resulting in a change in voltage, dV, equal to dQ/CF. The gain therefore is 1 + CF/CS. For unity gain, CF should equal the transducer capacitance plus the input capacitance of the LT1113 and RF should equal RS. In the noninverting mode example, the transducer current is converted to a change in voltage by the transducer capacitance; this voltage is then buffered by the LT1113 with a gain of 1 + R1/R2. A DC path is provided by RS, which is either the transducer impedance or an external resistor. Since RS is usually several orders of magnitude greater than the 10 parallel combination of R1 and R2, RB is added to balance the DC offset caused by the noninverting input bias current and RS. The input bias currents, although small at room temperature, can create significant errors over increasing temperature, especially with transducer resistances of up to 100M or more. The optimum value for RB is determined by equating the thermal noise (4kTRS) to the current noise (2qIB) times RS2. Solving for RS results in RB = RS = 2VT/IB kT   VT = = 26mV at 25°C   q A parallel capacitor, CB, is used to cancel the phase shift caused by the op amp input capacitance and RB. Reduced Power Supply Operation The LT1113 can be operated from ±5V supplies for lower power dissipation resulting in lower IB and noise at the expense of reduced dynamic range. To illustrate this benefit, let’s look at the following example: An LT1113CS8 operates at an ambient temperature of 25°C with ±15V supplies, dissipating 318mW of power (typical supply current = 10.6mA for the dual). The SO-8 package has a θJA of 190°C/W, which results in a die temperature increase of 60.4°C or a room temperature die operating temperature of 85.4°C. At ±5V supplies, the die tempera- 1113fc For more information www.linear.com/LT1113 LT1113 Applications Information INPUT: ±5.2V Sine Wave LT1113 Output OPA2111 Output Figure 3. Voltage Follower with Input Exceeding the Common Mode Range ( VS = ±5V) ture increases by only one third of the previous amount or 20.1°C resulting in a typical die operating temperature of only 45.1°C. A 40 degree reduction of die temperature is achieved at the expense of a 20V reduction in dynamic range. If no DC correction resistor is used at the input, the input referred offset will be the input bias current at the operating die temperature times the transducer resistance (refer to Input Bias and Offset Currents vs Chip Temperature graph in Typical Performance Characteristics section). A 100mV input VOS is the result of a 1nA IB (at 85°C) dropped across a 100M transducer resistance; at ±5V supplies, the input offset is only 28mV (IB at 45°C is 280pA). Careful selection of a DC correction resistor (RB) will reduce the IR errors due to IB by an order of magnitude. A further reduction of IR errors can be achieved by using a DC servo circuit shown in the applications section of this data sheet. The DC servo has the advantage of reducing a wide range of IR errors to the millivolt level over a wide temperature variation. The preservation of dynamic range is especially important when reduced supplies are used, since input bias currents can exceed the nanoamp level for die temperatures over 85°C. To take full advantage of a wide input common mode range, the LT1113 was designed to eliminate phase reversal. Referring to the photographs shown in Figure 3, the LT1113 is shown operating in the follower mode (AV = +1) at ±5V supplies with the input swinging ±5.2V. The output of the LT1113 clips cleanly and recovers with no phase reversal, unlike the competition as shown by the last photograph. This has the benefit of preventing lock-up in servo systems and minimizing distortion components. The effect of input and output overdrive on one amplifier has no effect on the other, as each amplifier is biased independently. Advantages of Matched Dual Op Amps In many applications the performance of a system depends on the matching between two operational amplifiers rather than the individual characteristics of the two op amps. Two or three op amp instrumentation amplifiers, tracking voltage references and low drift active filters are some of the circuits requiring matching between two op amps. The well-known triple op amp configuration in Figure 4 illustrates these concepts. Output offset is a function of the difference between the two halves of the LT1113. This error cancellation principle holds for a considerable number of input referred parameters in addition to offset voltage and bias current. Input bias current will be the average of the two noninverting input currents (IB+). The difference between these two currents (∆IB+) is the offset current of the instrumentation amplifier. Common mode and power supply rejections will be dependent only on the match between the two amplifiers (assuming perfect resistor matching). 1113fc For more information www.linear.com/LT1113 11 LT1113 Applications Information Typical performance of the instrumentation amplifier: 15V IN – 3 8 1/2 LT1113 2 IC1 – 4 + Input offset voltage = 0.8mV R6 10k R4 1k 1 Input bias current = 320pA C1 50pF R1 1k Input offset current = 10pA Input resistance = 1011Ω –15V R2 200Ω 6 IN + R3 1k – 1/2 LT1113 5 + IC1 7 2 Input noise = 3.4µVP-P – 1/2 LT1113 3 + IC2 1 OUTPUT High Speed Operation CL The low noise performance of the LT1113 was achieved by making the input JFET differential pair large to maximize the first stage gain. Increasing the JFET geometry also increases the parasitic gate capacitance, which if left unchecked, can result in increased overshoot and ringing. When the feedback around the op amp is resistive (RF), a pole will be created with RF, the source resistance and capacitance (RS,CS), and the amplifier input capacitance (CIN = 27pF). In closed loop gain configurations and with RS and RF in the kilohm range (Figure 5), this pole can create excess phase shift and even oscillation. A small capacitor (CF) in parallel with RF eliminates this problem. With RS(CS + CIN) = RFCF, the effect of the feedback pole is completely removed. R5 1k R7 10k GAIN = 100 BANDWIDTH = 400kHz INPUT REFERRED NOISE = 6.6nV/√Hz AT 1kHz WIDEBAND NOISE DC TO 400kHz = 6.6 µVRMS CL ≤ 0.01µF 1113 • F04 Figure 4. Three Op Amp Instrumentation Amplifier The concepts of common mode and power supply rejection ratio match (∆CMRR and ∆PSRR) are best demonstrated with a numerical example: Assume CMRRA = +50µV/V or 86dB, CF and CMRRB = + 39µV/V or 88dB, then ∆CMRR = 11µV/V or 99dB; RF if CMRRB = –39µV/V which is still 88dB, – then ∆CMRR = 89µV/V or 81dB Clearly the LT1113, by specifying and guaranteeing all of these matching parameters, can significantly improve the performance of matching-dependent circuits. RS CS + CIN OUTPUT 1113 • F05 Figure 5. 12 1113fc For more information www.linear.com/LT1113 LT1113 Typical Applications Accelerometer Amplifier with DC Servo C1 1250pF R1 100M R2 18k R3 2k C2 2µF – 7 1/2 LT1113 + 5V TO 15V ACCELEROMETER B & K MODEL 4381 OR EQUIVALENT 2 – 3 + 6 R4 20M 5 R5 20M *PICOCOULOMBS **g = EARTH’S GRAVITATIONAL CONSTANT C3 2µF 8 1/2 LT1113 R4C2 = R5C3 > R1 (1 + R2/R3) C1 OUTPUT = 0.8mV/pC* = 8.0mV/g** DC OUTPUT ≤ 2.7mV OUTPUT NOISE = 6nV/√Hz AT 1kHz 1 OUTPUT 4 1113 • TA03 –5V TO –15V Paralleling Amplifiers to Reduce Voltage Noise 3 2 + A1 1/2 LT1113 1 1k – 51Ω 1k 10k 3 2 15V + A2 1/2 LT1113 1 1k – 1k 51Ω 6 51Ω + + 1/2 LT1113 7 OUTPUT 4 8 An 1/2 LT1113 – 5 8 –15V 15V 5 6 – 4 –15V 1k 7 1k 1. ASSUME VOLTAGE NOISE OF LT1113 AND 51Ω SOURCE RESISTOR = 4.6nV/√Hz 2. GAIN WITH n LT1113s IN PARALLEL = n • 200 3. OUTPUT NOISE = √n • 200 • 4.6nV/√Hz OUTPUT NOISE 4.6 4. INPUT REFERRED NOISE = = nV/√Hz n • 200 √n 5. NOISE CURRENT AT INPUT INCREASES √n TIMES 9µV 6. IF n = 5, GAIN = 1000, BANDWIDTH = 1MHz, RMS NOISE, DC TO 1MHz = = 4µV √5 1113 • TA04 1113fc For more information www.linear.com/LT1113 13 LT1113 Typical Applications Low Noise Light Sensor with DC Servo C1 2pF R1 1M D2 1N914 2 – 3 + 1/2 LT1113 CD 1 OUTPUT C2 0.022µF +V R5 1k 7 1/2 LT1113 4 R4 1k + 2N3904 HAMAMATSU S1336-5BK 8 R3 1k – D1 1N914 R2 100k 6 5 –V R2C2 > C1R1 CD = PARASITIC PHOTODIODE CAPACITANCE VO = 100mV/µWATT FOR 200nm WAVE LENGTH 330mV/µWATT FOR 633nm WAVE LENGTH V– 1113 • TA05 10Hz Fourth Order Chebyshev Lowpass Filter (0.01dB Ripple) R2 237k R5 154k C1 33nF VIN R1 237k R3 249k C2 100nF C3 10nF 15V 2 3 – 8 1/2 LT1113 + 4 –15V 1 R4 154k R6 249k C4 330nF 6 – 5 + 1/2 LT1113 TYPICAL OFFSET ≈ 0.8mV 1% TOLERANCES FOR VIN = 10VP-P, VOUT = –121dB AT f > 330Hz = – 6dB AT f = 16.3Hz LOWER RESISTOR VALUES WILL RESULT IN LOWER THERMAL NOISE AND LARGER CAPACITORS 14 7 VOUT 1113 • TA06 1113fc For more information www.linear.com/LT1113 LT1113 Package Description Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. J8 Package 8-Lead CERDIP (Narrow .300 Inch, Hermetic) (Reference LTC DWG # 05-08-1110) CORNER LEADS OPTION (4 PLCS) 0.023 – 0.045 (0.584 – 1.143) HALF LEAD OPTION 0.015 – 0.060 (0.381 – 1.524) 0.008 – 0.018 (0.203 – 0.457) 0.005 (0.127) MIN 0.200 (5.080) MAX 0.045 – 0.068 (1.143 – 1.727) FULL LEAD OPTION 0.300 BSC (0.762 BSC) 0.405 (10.287) MAX 8 6 7 5 0.025 (0.635) RAD TYP 0.220 – 0.310 (5.588 – 7.874) 0° – 15° 1 0.045 – 0.065 (1.143 – 1.651) 0.014 – 0.026 (0.360 – 0.660) 0.100 (2.54) BSC 2 3 4 J8 1298 0.125 3.175 MIN NOTE: LEAD DIMENSIONS APPLY TO SOLDER DIP/PLATE OR TIN PLATE LEADS OBSOLETE PACKAGE N Package 8-Lead PDIP (Narrow .300 Inch) (Reference LTC DWG # 05-08-1510 Rev I) .300 – .325 (7.620 – 8.255) .008 – .015 (0.203 – 0.381) ( +.035 .325 –.015 +0.889 8.255 –0.381 ) .045 – .065 (1.143 – 1.651) .065 (1.651) TYP .400* (10.160) MAX .130 ±.005 (3.302 ±0.127) 8 7 6 5 1 2 3 4 .255 ±.015* (6.477 ±0.381) .100 (2.54) BSC .120 .020 (3.048) MIN (0.508) MIN .018 ±.003 N8 REV I 0711 (0.457 ±0.076) NOTE: 1. DIMENSIONS ARE INCHES MILLIMETERS *THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .010 INCH (0.254mm) 1113fc For more information www.linear.com/LT1113 15 LT1113 Package Description Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. S8 Package 8-Lead Plastic Small Outline (Narrow .150 Inch) (Reference LTC DWG # 05-08-1610 Rev G) .189 – .197 (4.801 – 5.004) NOTE 3 .045 ±.005 .050 BSC 8 .245 MIN .160 ±.005 .010 – .020 × 45° (0.254 – 0.508) NOTE: 1. DIMENSIONS IN .053 – .069 (1.346 – 1.752) 0°– 8° TYP .014 – .019 (0.355 – 0.483) TYP INCHES (MILLIMETERS) 2. DRAWING NOT TO SCALE 3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm) 4. PIN 1 CAN BE BEVEL EDGE OR A DIMPLE 16 5 .150 – .157 (3.810 – 3.988) NOTE 3 1 RECOMMENDED SOLDER PAD LAYOUT .016 – .050 (0.406 – 1.270) 6 .228 – .244 (5.791 – 6.197) .030 ±.005 TYP .008 – .010 (0.203 – 0.254) 7 2 3 4 .004 – .010 (0.101 – 0.254) .050 (1.270) BSC SO8 REV G 0212 1113fc For more information www.linear.com/LT1113 LT1113 Revision History (Revision history begins at Rev C) REV DATE DESCRIPTION C 09/15 Updated Order Information table format. PAGE NUMBER Updated package drawings. 2 15, 16 1113fc Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. For more information www.linear.com/LT1113 17 LT1113 Typical Application Light Balance Detection Circuit R1 1M C1 2pF TO 8pF I1 PD1 VOUT = 1M • (I1 – I2) PD1,PD2 = HAMAMATSU S1336-5BK WHEN EQUAL LIGHT ENTERS PHOTODIODES, VOUT < 3mV. – I2 VOUT 1/2 LT1113 + PD2 1113 • TA07 Unity Gain Buffer with Extended Load Capacitance Drive Capability R2 1k C1 – 1/2 LT1113 VIN R1 33Ω VOUT + CL C1 = CL ≤ 0.1µF OUTPUT SHORT-CIRCUIT CURRENT (~30mA) WILL LIMIT THE RATE AT WHICH THE VOLTAGE CAN CHANGE ACROSS LARGE CAPACITORS dV (I = C ) dt 1113 • TA08 Related Parts PART NUMBER DESCRIPTION COMMENTS LT1028 Single Low Noise Precision Op Amp VNOISE = 1.1nV/√Hz Max LT1124 Dual Low Noise Precision Op Amp VNOISE = 4.2nV/√Hz Max LT1169 Dual Low Noise Precision JFET Op Amp 10pA IB C-Load™ Op Amp LT1462 Dual Picoamp IB LT1464 Dual Picoamp IB C-Load Op Amp IB = 2pA Max, 10000pF C-Load, IS = 200µA LT1792 Single Low Noise Precision Op Amp Single LT1113 LT1793 Single Low Noise Precision Op Amp Single LT1169 18 Linear Technology Corporation IB = 2pA Max, 10000pF C-Load, IS = 45µA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 For more information www.linear.com/LT1113 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com/LT1113 1113fc LT 0915 REV C • PRINTED IN USA  LINEAR TECHNOLOGY CORPORATION 1993
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