LT1224CS8#PBF

LT1224 Very High Speed Operational Amplifier U DESCRIPTIO FEATURES ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ Unity-Gain Stable 45MHz Gain-Bandwidth 400V/µs Slew Rate 7V/mV DC Gain: RL = 500Ω Maximum Input Offset Voltage: 2mV ±12V Minimum Output Swing into 500Ω Wide Supply Range: ±2.5V to ±15V 7mA Supply Current 90ns Settling Time to 0.1%, 10V Step Drives All Capacitive Loads The LT1224 is a very high speed operational amplifier with excellent DC performance. The LT1224 features reduced input offset voltage and higher DC gain than devices with comparable bandwidth and slew rate. The circuit is a single gain stage with outstanding settling characteristics. The fast settling time makes the circuit an ideal choice for data acquisition systems. The output is capable of driving a 500Ω load to ±12V with ±15V supplies and a 150Ω load to ±3V on ±5V supplies. The circuit is also capable of driving large capacitive loads which makes it useful in buffer or cable driver applications. UO APPLICATI ■ ■ ■ ■ ■ The LT1224 is a member of a family of fast, high performance amplifiers that employ Linear Technology Corporation’s advanced bipolar complementary processing. Wideband Amplifiers Buffers Active Filters Video and RF Amplification Cable Drivers Data Acquisition Systems UO ■ S TYPICAL APPLICATI DAC Current-to-Voltage Converter Inverter Pulse Response 7pF 5k DAC-08 TYPE – LT1224 VOUT + 0.1µF 5k 1 LSB SETTLING = 140ns LT1224 • TA01 LT1224 • TA02 1 LT1224 PACKAGE/ORDER I FOR ATIO U W W W Total Supply Voltage (V+ to V–) ............................... 36V Differential Input Voltage ......................................... ±6V Input Voltage ............................................................±VS Output Short Circuit Duration (Note 1) ............ Indefinite Operating Temperature Range LT1224C ................................................ 0°C to 70°C Maximum Junction Temperature Plastic Package .............................................. 150°C Storage Temperature Range ................. – 65°C to 150°C Lead Temperature (Soldering, 10 sec.)................. 300°C ELECTRICAL CHARACTERISTICS U RATI GS W AXI U U ABSOLUTE ORDER PART NUMBER TOP VIEW NULL 1 8 NULL –IN 2 7 V+ +IN 3 6 OUT V– 4 5 NC N8 PACKAGE 8-LEAD PLASTIC DIP LT1224CN8 LT1224CS8 S8 PACKAGE 8-LEAD PLASTIC SOIC S8 PART MARKING LT1224 • POI01 1224 TJMAX = 150°C, θJA = 100°C/W (N8) TJMAX = 150°C, θJA = 150°C/W (S8) VS = ±15V, TA = 25°C, RL = 1k, VCM = 0V unless otherwise noted. SYMBOL PARAMETER CONDITIONS VOS Input Offset Voltage (Note 2) IOS Input Offset Current IB Input Bias Current en Input Noise Voltage f = 10kHz in Input Noise Current f = 10kHz RIN Input Resistance VCM = ±12V Differential CIN Input Capacitance Input Voltage Range + MIN TYP MAX UNITS 0.5 2.0 mV 100 400 nA 4 8 µA 22 nV/√Hz 1.5 pA/√Hz 24 40 250 MΩ kΩ 2 pF 12 14 V Input Voltage Range – – 13 – 12 V CMRR Common-Mode Rejection Ratio VCM = ±12V 86 100 dB PSRR Power Supply Rejection Ratio VS = ±5V to ±15V 75 84 dB AVOL Large-Signal Voltage Gain VOUT = ±10V, RL = 500Ω 3.3 7 V/mV VOUT Output Swing RL = 500Ω ±12.0 ±13.3 IOUT Output Current VOUT = ±12V 24 40 mA SR Slew Rate AVCL = –2, (Note 3) 250 400 V/µs Full Power Bandwidth 10V Peak, (Note 4) 6.4 MHz GBW Gain-Bandwidth f = 1MHz 45 MHz tr, tf Rise Time, Fall Time AVCL = 1, 10% to 90%, 0.1V 5 ns Overshoot AVCL = 1, 0.1V 30 % Propagation Delay 50% VIN to 50% VOUT 5 ns Settling Time 10V Step, 0.1% 90 ns Differential Gain f = 3.58MHz, RL = 150Ω 1 % Differential Phase f = 3.58MHz, RL = 150Ω 2.4 RO Output Resistance AVCL = 1, f = 1MHz 2.5 IS Supply Current ts 2 7 V Deg Ω 9 mA LT1224 ELECTRICAL CHARACTERISTICS VS = ±5V, TA = 25°C, RL = 1k, VCM = 0V unless otherwise noted. SYMBOL PARAMETER CONDITIONS VOS Input Offset Voltage (Note 2) IOS Input Offset Current IB Input Bias Current MIN Input Voltage Range + TYP MAX 1 4 mV 100 400 nA 4 8 µA 2.5 UNITS 4 Input Voltage Range – V –3 – 2.5 V CMRR Common-Mode Rejection Ratio VCM = ±2.5V 86 98 dB AVOL Large-Signal Voltage Gain VOUT = ±2.5V, RL = 500Ω VOUT = ±2.5V, RL = 150Ω 2.5 7 3 V/mV V/mV VOUT Output Swing RL = 500Ω RL = 150Ω ±3.0 ±3.0 ±3.7 ±3.3 IOUT Output Current VOUT = ±3V 20 40 mA SR Slew Rate AVCL = –2, (Note 3) 250 V/µs Full Power Bandwidth 3V Peak, (Note 4) 13.3 MHz GBW Gain-Bandwidth f = 1MHz 34 MHz tr, tf Rise Time, Fall Time AVCL = 1, 10% to 90%, 0.1V 7 ns Overshoot AVCL = 1, 0.1V 20 % Propagation Delay 50% VIN to 50% VOUT 7 ns ts Settling Time –2.5V to 2.5V, 0.1% 90 IS Supply Current V V ns 7 ELECTRICAL CHARACTERISTICS 9 mA 0°C ≤ TA ≤ 70°C, RL = 1k, VCM = 0V unless otherwise noted. SYMBOL PARAMETER CONDITIONS VOS Input Offset Voltage VS = ±15V, (Note 2) VS = ±5V, (Note 2) MIN Input VOS Drift TYP MAX 1 2 4 5 UNITS mV mV µV/°C 25 IOS Input Offset Current VS = ±15V and VS = ±5V IB Input Bias Current VS = ±15V and VS = ±5V CMRR Common-Mode Rejection Ratio VS = ±15V, VCM = ±12V and VS = ±5V, VCM = ±2.5V 83 98 dB PSRR Power Supply Rejection Ratio VS = ±5V to ±15V 73 84 dB AVOL Large-Signal Voltage Gain VS = ±15V, VOUT = ±10V, RL = 500Ω VS = ±5V, VOUT = ±2.5V, RL = 500Ω 2.5 2.0 7 7 V/mV V/mV VOUT Output Swing VS = ±15V, RL = 500Ω VS = ±5V, RL = 500Ω or 150Ω ±12.0 ±3.0 ±13.3 ±3.3 IOUT Output Current VS = ±15V, VOUT = ±12V VS = ±5V, VOUT = ±3V 24 20 40 40 SR Slew Rate VS = ±15V, AVCL = –2, (Note 3) 250 400 IS Supply Current VS = ±15V and VS = ±5V Note 1: A heat sink may be required to keep the junction temperature below absolute maximum when the output is shorted indefinitely. Note 2: Input offset voltage is tested with automated test equipment in