LT1225CN8#PBF

LT1225CN8#PBF

  • 厂商:

    AD(亚德诺)

  • 封装:

    DIP-8

  • 描述:

    LT1225CN8#PBF

  • 数据手册
  • 价格&库存
LT1225CN8#PBF 数据手册
LT1225 Very High Speed Operational Amplifier U DESCRIPTIO FEATURES ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ Gain of 5 Stable 150MHz Gain Bandwidth 400V/µs Slew Rate 20V/mV DC Gain, RL = 500Ω 1mV Maximum Input Offset Voltage ±12V Minimum Output Swing into 500Ω Wide Supply Range: ± 2.5V to ±15V 7mA Supply Current 90ns Settling Time to 0.1%, 10V Step Drives All Capacitive Loads The LT1225 is a very high speed operational amplifier with excellent DC performance. The LT1225 features reduced input offset voltage and higher DC gain than devices with comparable bandwidth and slew rate. The circuit is a single gain stage with outstanding settling characteristics. The fast settling time makes the circuit an ideal choice for data acquisition systems. The output is capable of driving a 500Ω load to ±12V with ±15V supplies and a 150Ω load to ± 3V on ± 5V supplies. The circuit is also capable of driving large capacitive loads which makes it useful in buffer or cable driver applications. UO APPLICATI ■ ■ ■ ■ ■ ■ S The LT1225 is a member of a family of fast, high performance amplifiers that employ Linear Technology Corporation’s advanced bipolar complementary processing. Wideband Amplifiers Buffers Active Filters Video and RF Amplification Cable Drivers Data Acquisition Systems UO TYPICAL APPLICATI Gain of 5 Pulse Response 20MHz,AV = 50 Instrumentation Amplifier + LT1225 – 1k + 250Ω 200pF VIN – 10k 1k 1k 250Ω 1k + LT1225 VOUT – 10k – LT1225 TA02 LT1225 + LT1225 TA01 1 LT1225 PACKAGE/ORDER I FOR ATIO U W W W Total Supply Voltage (V + to V –) .............................. 36V Differential Input Voltage ......................................... ±6V Input Voltage ............................................................±VS Output Short Circuit Duration (Note 1) ............ Indefinite Operating Temperature Range LT1225C ................................................ 0°C to 70°C Maximum Junction Temperature Plastic Package .............................................. 150°C Storage Temperature Range ................. – 65°C to 150°C Lead Temperature (Soldering, 10 sec.)................. 300°C ELECTRICAL CHARACTERISTICS U RATI GS W AXI U U ABSOLUTE ORDER PART NUMBER TOP VIEW NULL 1 8 NULL –IN 2 7 V+ +IN 3 6 OUT V– 4 5 NC LT1225CN8 LT1225CS8 N8 PACKAGE S8 PACKAGE 8-LEAD PLASTIC DIP 8-LEAD PLASTIC SOIC S8 PART MARKING 1225 LT1225 PO01 TJ MAX = 15O°C, θJA = 130°C/ W (N8) TJ MAX = 15O°C, θJA = 220°C/ W (S8) VS = ±15V, TA = 25°C, VCM = 0V unless otherwise noted. SYMBOL PARAMETER CONDITIONS VOS Input Offset Voltage (Note 2) IOS Input Offset Current IB Input Bias Current en Input Noise Voltage f = 10kHz in Input Noise Current f = 10kHz RIN Input Resistance VCM = ±12V Differential CIN Input Capacitance Input Voltage Range + MIN TYP MAX UNITS 0.5 1.0 mV 100 400 nA 4 8 µA 7.5 nV/√Hz 1.5 pA/√Hz 24 40 70 MΩ kΩ 2 pF 12 14 V Input Voltage Range – –13 –12 V CMRR Common-Mode Rejection Ratio VCM = ±12V 94 115 dB PSRR Power Supply Rejection Ratio VS = ±5V to ±15V 86 95 dB AVOL Large Signal Voltage Gain VOUT = ±10V, RL = 500Ω 12.5 20 V/mV VOUT Output Swing RL = 500Ω ±12.0 ±13.3 IOUT Output Current VOUT = ±12V 24 40 mA SR Slew Rate (Note 3) 250 400 V/µs Full Power Bandwidth 10V Peak, (Note 4) 6.4 MHz GBW Gain Bandwidth f = 1MHz 150 MHz tr, tf Rise Time, Fall Time AVCL = 5, 10% to 90%, 0.1V 7 Overshoot AVCL = 5, 0.1V 20 % Propagation Delay 50% VIN to 50% VOUT 7 ns Settling Time 10V Step, 0.1%, AV = – 5 90 ns Differential Gain f = 3.58MHz, AV = 5, RL = 150Ω 1.0 % Differential Phase f = 3.58MHz, AV = 5, RL = 150Ω 1.7 Deg RO Output Resistance AVCL = 5, f = 1MHz 4.5 IS Supply Current ts 2 7 V ns Ω 9 mA LT1225 ELECTRICAL CHARACTERISTICS VS = ±5V, TA = 25°C, VCM = 0V unless otherwise noted. SYMBOL PARAMETER CONDITIONS VOS Input Offset Voltage (Note 2) IOS Input Offset Current IB Input Bias Current MIN Input Voltage Range + TYP MAX UNITS 1.0 2.0 mV 100 400 nA 4 8 µA 2.5 4 Input Voltage Range – V –3 – 2.5 V CMRR Common-Mode Rejection Ratio VCM = ±2.5V 94 115 dB AVOL Large-Signal Voltage Gain VOUT = ±2.5V, RL = 500Ω VOUT = ±2.5V, RL = 150Ω 10 15 13 V/mV V/mV VOUT Output Voltage RL = 500Ω RL = 150Ω ±3.0 ±3.0 ±3.7 ±3.3 IOUT Output Current VOUT = ±3V 20 40 mA SR Slew Rate (Note 3) 250 V/µs Full Power Bandwidth 3V Peak, (Note 4) 13.3 MHz GBW Gain Bandwidth f = 1MHz 100 MHz tr, tf Rise Time, Fall Time AVCL = 5, 10% to 90%, 0.1V 9 ns Overshoot AVCL = 5, 0.1V 10 % Propagation Delay 50% VIN to 50% VOUT 9 ns ts Settling Time – 2.5V to 2.5V, 0.1%, AV = – 4 70 IS Supply Current V V ns 7 ELECTRICAL CHARACTERISTICS 9 mA 0°C ≤ TA ≤ 70°C, VCM = 0V unless otherwise noted. SYMBOL PARAMETER CONDITIONS VOS Input Offset Voltage VS = ±15V, (Note 2) VS = ±5V, (Note 2) MIN Input VOS Drift TYP MAX UNITS 0.5 1.0 1.5 2.5 mV mV µV/°C 10 IOS Input Offset Current VS = ±15V and VS = ± 5V IB Input Bias Current CMRR Common-Mode Rejection Ratio VS = ±15V and VS = ± 5V VS = ±15V, VCM = ±12V and VS = ± 5V, VCM = ± 2.5V 93 100 600 nA 4 9 µA 115 dB PSRR Power Supply Rejection Ratio VS = ±5V to ±15V 85 95 AVOL Large Signal Voltage Gain VS = ±15V, VOUT = ±10V, RL = 500Ω VS = ±5V, VOUT = ±2.5V, RL = 500Ω 10 8 12.5 10 V/mV V/mV VOUT Output Swing VS = ±15V, RL = 500Ω VS = ±5V, RL = 500Ω or 150Ω ±12.0 ±3.0 ±13.3 ±3.3 V V IOUT Output Current VS = ±15V, VOUT = ±12V VS = ±5V, VOUT = ±3V 24 20 40 40 SR Slew Rate VS = ±15V, (Note 3) 250 400 IS Supply Current VS = ±15V and VS = ± 5V Note 1: A heat sink may be required to keep the junction temperature below absolute maximum when the output is shorted indefinitely. Note 2: Input offset voltage is tested with automated test equipment in 10VP-P 1MHz + 100pF VIN1 – RIN VIN2 LT1225 VOUT + RIN VINn 1.5k LT1225 TA05 RIN = nRF 4 Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of circuits as described herein will not infringe on existing patent rights. LT1225 TA06 7 LT1225 W W SI PLIFIED SCHE ATIC V+ 7 NULL 1 8 BIAS 1 3 +IN 2 –IN BIAS 2 6 V– OUT 4 LT1224 • TA10 U PACKAGE DESCRIPTIO Dimensions in inches (millimeters) unless otherwise noted. N8 Package 8-Lead Plastic DIP 0.300 – 0.320 (7.620 – 8.128) 0.045 – 0.065 (1.143 – 1.651) 0.130 ± 0.005 (3.302 ± 0.127) 8 7 +0.025 0.325 –0.015 +0.635 8.255 –0.381 0.100 ± 0.010 (2.540 ± 0.254) 0.125 (3.175) MIN 0.020 (0.508) MIN 1 2 0.010 – 0.020 × 45° (0.254 – 0.508) N8 0392 0.189 – 0.197 (4.801 – 5.004) 8 0.053 – 0.069 (1.346 – 1.752) 7 6 5 0.004 – 0.010 (0.101 – 0.254) 0.008 – 0.010 (0.203 – 0.254) 0.014 – 0.019 (0.355 – 0.483) 0.050 (1.270) BSC 0.228 – 0.244 (5.791 – 6.197) 0.150 – 0.157 (3.810 – 3.988) 1 8 4 3 0.018 ± 0.003 (0.457 ± 0.076) S8 Package 8-Lead Plastic SOIC 0°– 8° TYP 5 0.250 ± 0.010 (6.350 ± 0.254) 0.045 ± 0.015 (1.143 ± 0.381) ) 0.016 – 0.050 0.406 – 1.270 6 0.065 (1.651) TYP 0.009 – 0.015 (0.229 – 0.381) ( 0.400 (10.160) MAX Linear Technology Corporation 2 3 4 SO8 0392 LT/GP 1092 5K REV A 1630 McCarthy Blvd., Milpitas, CA 95035-7487 (408) 432-1900 ● FAX: (408) 434-0507 ● TELEX: 499-3977  LINEAR TECHNOLOGY CORPORATION 1992
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