LT1959CS8#PBF

LT1959 4.5A, 500kHz Step-Down Switching Regulator U FEATURES ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ DESCRIPTIO The LT ®1959 is a 500kHz monolithic buck mode switching regulator functionally identical to the LT1506 but optimized for lower output voltage applications. It will operate down to 1.21V output compared to 2.42V for the LT1506. A 4.5A switch is included on the die along with all the necessary oscillator, control and logic circuitry. High switching frequency allows a considerable reduction in the size of external components. The topology is current mode for fast transient response and good loop stability. Operates with Input as Low as 4V Output Range Down to 1.21V Constant 500kHz Switching Frequency Uses All Surface Mount Components Inductor Size Reduced to 1.8µH Saturating Switch Design: 0.07Ω Shutdown Current: 15µA Easily Synchronizable Cycle-by-Cycle Current Limiting 4.5A Switch Current Mode Control A special high speed bipolar process and new design techniques achieve high efficiency at high switching frequency. Efficiency is maintained over a wide output current range by keeping quiescent supply current to 3.8mA and by utilizing a supply boost capacitor to saturate the power switch. U APPLICATIO S ■ ■ ■ ■ ■ ■ ■ Portable Computers Battery-Powered Systems Battery Chargers Distributed Power 5V to 3.3V Conversion 5V to 2.5V Conversion 5V to 1.8V Conversion The LT1959 fits into standard 7-pin DD and fused lead SO-8 packages. Full cycle-by-cycle short-circuit protection and thermal shutdown are provided. Standard surface mount external parts are used, including the inductor and capacitors. There is the optional function of shutdown or synchronization. A shutdown signal reduces supply current to 15µA. Synchronization allows an external logic level signal to increase the internal oscillator from 580kHz to 1MHz. , LTC and LT are registered trademarks of Linear Technology Corporation. U TYPICAL APPLICATION Efficiency vs Load Current 5V to 1.8V Down Converter 90 VOUT = 3.3V VIN = 5V L = 10µH D2 1N914 INPUT 5V C3 10µF TO 50µF CERAMIC BOOST VIN + OPEN OR HIGH = ON 85 L1 5µH OUTPUT 1.8V 4A VSW R1 1.21k LT1959 SHDN GND FB VC CC 1.5nF D1 MBRS330T3 R2 2.49k + C1 100µF, 10V SOLID TANTALUM EFFICIENCY (%) C2 0.68µF 80 75 70 0 1959 TA01 0.5 1.0 1.5 2.0 2.5 3.0 LOAD CURRENT (A) 3.5 4.0 1959 TA02 1 LT1959 U W W W ABSOLUTE MAXIMUM RATINGS (Note 1) Input Voltage .......................................................... 16V BOOST Voltage ........................................................ 30V BOOST Pin Above Input Voltage ............................. 15V SHDN Pin Voltage ..................................................... 7V FB Pin Voltage ....................................................... 3.5V FB Pin Current ....................................................... 1mA SYNC Pin Voltage ..................................................... 7V Operating Junction Temperature Range LT1959C ................................................ 0°C to 125°C LT1959I ........................................... – 40°C to 125°C Storage Temperature Range ................ – 65°C to 150°C Lead Temperature (Soldering, 10 sec)................. 300°C U W U PACKAGE/ORDER INFORMATION ORDER PART NUMBER FRONT VIEW TAB IS GND 7 6 5 4 3 2 1 FB BOOST VIN GND VSW SHDN VC LT1959CR LT1959IR VIN 1 TJMAX = 150°C, θJA = 30°C/W WITH PACKAGE SOLDERED TO 0.5 SQUARE INCH COPPER AREA OVER BACKSIDE GROUND PLANE OR INTERNAL POWER PLANE. θJA CAN VARY FROM 20°C/W TO > 40°C/W DEPENDING ON MOUNTING TECHNIQUES 8 VSW BOOST 2 7 SYNC FB 3 6 SHDN GND** 4 R PACKAGE 7-LEAD PLASTIC DD ORDER PART NUMBER TOP VIEW LT1959CS8 LT1959IS8 5 VC S8 PACKAGE 8-LEAD PLASTIC SO S8 PART MARKING TJMAX = 150°C, θJA = 80°C/W **WITH (FUSED GND) GROUND PIN CONNECTED TO GROUND PLANE OR LARGE LANDS 1959 1959I ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C, TJ = 25°C, VIN = 5V, VC = 1.5V, Boost = VIN + 5V, switch open, unless otherwise noted. PARAMETER Feedback Voltage (Adjustable) Reference Voltage Line Regulation Feedback Input Bias Current Error Amplifier Voltage Gain Error Amplifier Transconductance CONDITIONS All Conditions 4.3V ≤ VIN ≤ 15V ● ● (Note 2) ∆I (VC) = ±10µA ● VC Pin to Switch Current Transconductance Error Amplifier Source Current Error Amplifier Sink Current VC Pin Switching Threshold VC Pin High Clamp Switch Current Limit Slope Compensation 2 MIN 1.19 –0.5 200 1500 1000 VFB = 1.05V VFB = 1.35V Duty Cycle = 0 ● ● 140 140 VC Open, VFB = 1.05V, DC ≤ 50% DC = 80% ● 4.5 TYP 1.21 0.01 0 400 2000 5.3 225 225 0.9 2.1 6 0.8 MAX 1.23 0.03 0.5 UNITS V %/ V µA 2700 3100 µMho µMho A/ V µA µA V V A A 320 320 8.5 LT1959 ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C, TJ = 25°C, VIN = 5V, VC = 1.5V, Boost = VIN + 5V, switch open, unless otherwise noted. PARAMETER Switch On Resistance (Note 7) CONDITIONS ISW = 4.5A MIN TYP 0.07 90 86 460 440 93 93 500 ● Maximum Switch Duty Cycle VFB = 1.05V ● Switch Frequency VC Set to Give 50% Duty Cycle ● Switch Frequency Line Regulation Frequency Shifting Threshold on FB Pin Minimum Input Voltage (Note 3) Minimum Boost Voltage (Note 4) Boost Current (Note 5) Input Supply Current (Note 6) Shutdown Supply Current 4.3V ≤ VIN ≤ 15V ∆f = 10kHz ● ● 0.5 ● ISW ≤ 4.5A ISW = 1A ISW = 4.5A ● ● ● ● VSHDN = 0V, VSW = 0V, VC Open 0 0.7 4.0 2.3 20 90 3.8 15 ● Lockout Threshold Shutdown Thresholds VC Open VC Open Device Shutting Down Device Starting Up Synchronization Threshold Synchronizing Range SYNC Pin Input Resistance Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: Gain is measured with a VC swing equal to 200mV above the switching threshold level to 200mV below the upper clamp level. Note 3: Minimum input voltage is not measured directly, but is guaranteed by other tests. It is defined as the voltage where internal bias lines are still regulated so that the reference voltage and oscillator frequency remain constant. Actual minimum input voltage to maintain a regulated output will depend on output voltage and load current. See Applications Information. ● ● ● 2.3 0.13 0.25 ● 2.38 0.37 0.45 1.5 580 40 MAX 0.1 0.13 540 560 0.15 1.0 4.3 3.0 35 140 5.4 50 75 2.46 0.60 0.7 2.2 1000 UNITS Ω Ω % % kHz kHz %/ V V V V mA mA mA µA µA V V V V kHz kΩ Note 4: This is the minimum voltage across the boost capacitor needed to guarantee full saturation of the internal power switch. Note 5: Boost current is the current flowing into the boost pin with the pin held 5V above input voltage. It flows only during switch on time. Note 6: Input supply current is the bias current drawn by the input pin with switching disabled. Note 7: Switch on resistance is calculated by dividing VIN to VSW voltage by the forced current (4.5A). See Typical Performance Characteristics for the graph of switch voltage at other currents. 3 LT1959 U W TYPICAL PERFORMANCE CHARACTERISTICS Feedback Pin Voltage Switch Peak Current Limit 4.7 6.5 4.5 6.0 4.3 4.1 3.9 3.7 1.215 TYPICAL FEEDBACK VOLTAGE (V) SWITCH PEAK CURRENT (A) INPUT VOLTAGE (V) Minimum Input Voltage with 3.3V Output 5.5 5.0 MINIMUM 4.5 4.0 3.5 3.5 3.0 3.3 10 100 LOAD CURRENT (mA) 1 0 1000 20 60 40 DUTY CYCLE (%) 80 0 25 50 75 125 100 TEMPERATURE (°C) 1959 G03 Lockout and Shutdown Thresholds –500 Shutdown Supply Current 25 2.40 VSHDN = 0V AT 0.37V SHUTDOWN THRESHOLD. AFTER SHUTDOWN, CURRENT DROPS TO A FEW µA – 300 – 200 –8 AT 2.38V LOCKOUT THRESHOLD –4 INPUT SUPPLY CURRENT (µA) LOCKOUT SHUTDOWN PIN VOLTAGE (V) – 400 –25 1959 G02 Shutdown Pin Bias Current CURRENT (µA) 1.205 – 50 100 1959 G01 2.36 2.32 0.8 START-UP 0.4 20 15 10 5 SHUTDOWN 0 –50 –25 50 25 75 0 TEMPERATURE (°C) 100 0 –50 –25 125 0 50 100 25 75 0 JUNCTION TEMPERATURE (°C) 1959 G04 0 125 Error Amplifier Transconductance 2500 3000 2000 2500 VIN = 10V 30 20 PHASE GAIN (µMho) 40 200 1500 1000 500 150 GAIN 2000 100 VC ( ) ROUT 200k COUT 12pF 1500 VFB 2 × 10–3 1000 ERROR AMPLIFIER EQUIVALENT CIRCUIT 50 0 10 RLOAD = 50Ω 0 0 0.1 0.2 0.3 SHUTDOWN VOLTAGE (V) 0.4 1959 G07 4 0 50 0 75 100 25 –50 –25 JUNCTION TEMPERATURE (°C) 125 1959 G08 500 100 1k 10k 100k FREQUENCY (Hz) 1M –50 10M 1959 G09 PHASE (DEG) TRANSCONDUCTANCE (µMho) 50 15 1959 G06 Error Amplifier Transconductance 60 5 10 INPUT VOLTAGE (V) 1959 G05 Shutdown Supply Current 70 INPUT SUPPLY CURRENT (µA) 1.210 LT1959 U W TYPICAL PERFORMANCE CHARACTERISTICS 500 SWITCHING FREQUENCY 400 Maximum Load Current at VOUT = 5V Switching Frequency 550 4.4 540 4.2 L= 10µH 530 300 200 100 FEEDBACK PIN CURRENT 0 0 0.4 0.6 0.8 1.0 0.2 FEEDBACK PIN VOLTAGE (V) 510 500 490 480 2.8 0 25 50 75 100 5 4.0 L= 3µH 3.6 3.4 L= 1.8µH 3.2 DUTY CYCLE = 100% 70 60 50 40 30 5 4 3 2 MOS LOAD 1 0 0 1 INPUT VOLTAGE (V) 3 2 4 SWITCH CURRENT (A) 0 5 0 20 40 60 80 100 OUTPUT VOLTAGE (%) 1959 G15 1959 G14 VC Pin Shutdown Threshold 1959 G16 Switch Voltage Drop 1.4 500 SHUTDOWN 450 1.2 125°C 400 SWITCH VOLTAGE (mV) THRESHOLD VOLTAGE (V) POSSIBLE UNDESIRED CURRENT STABLE POINT FOR SOURCE CURRENT SOURCE LOAD LOAD* RESISTOR LOAD 20 14 12 FOLDBACK CHARACTERISTICS 6 80 10 3.0 15 13 Current Limit Foldback 7 OUTPUT CURRENT (A) BOOST PIN CURRENT (mA) L= 5µH 10 11 9 INPUT VOLTAGE (V) 90 4.2 8 7 1959 G13 BOOST Pin Current 100 L= 10µH LOAD CURRENT (A) 2.6 125 1959 G11 4.4 3.8 L= 1.8µH TEMPERATURE (°C) Maximum Load Current at VOUT = 3.3V 6 3.2 460 –25 L= 3µH 3.4 470 1959 • G10 4 3.8 3.6 3.0 450 – 50 1.2 L= 5µH 4.0 520 LOAD CURRENT (A) FREQUENCY (kHz) SWITCHING FREQUENCY (kHz) OR CURRENT (µA) Frequency Foldback 1.0 0.8 0.6 350 25°C 300 250 – 40°C 200 150 100 50 0.4 –50 –25 0 25 50 75 100 JUNCTION TEMPERATURE (°C) 125 1959 G17 0 0 1 2 4 3 SWITCH CURRENT (A) 5 1959 G18 *See “More Than Just Voltage Feedback” in the Applications Information section. 5 LT1959 U U U PIN FUNCTIONS FB: The feedback pin is used to set output voltage using an external voltage divider that generates 1.21V at the pin with the desired output voltage. Three additional functions are performed by the FB pin. When the pin voltage drops below 0.8V, switch current limit is reduced. Below 0.7V the external sync function is disabled and switching frequency is reduced. See Feedback Pin Function section in Applications Information for details. BOOST: The BOOST pin is used to provide a drive voltage, higher than the input voltage, to the internal bipolar NPN power switch. Without this added voltage, the typical switch voltage loss would be about 1.5V. The additional boost voltage allows the switch to saturate and voltage loss approximates that of a 0.07Ω FET structure, but with much smaller die area. Efficiency improves from 75% for conventional bipolar designs to > 89% for these new parts. VIN: This is the collector of the on-chip power NPN switch. This pin powers the internal circuitry and internal regulator. At NPN switch on and off, high dI/dt edges occur on this pin. Keep the external bypass and catch diode close to this pin. All trace inductance on this path will create a voltage spike at switch off, adding to the VCE voltage across the internal NPN. GND: The GND pin connection needs consideration for two reasons. First, it acts as the reference for the regulated output, so load regulation will suffer if the “ground” end of the load is not at the same voltage as the GND pin of the IC. This condition will occur when load current or other currents flow through metal paths between the GND pin and the load ground point. Keep the ground path short between the GND pin and the load and use a ground plane when possible. The second consideration is EMI caused by GND pin current spikes. Internal capacitance between the VSW pin and the GND pin creates very narrow (100MHz oscilloscope must be used, and waveforms should be observed on the leads of the package. This switch off spike will also cause the SW node to go below ground. The LT1959 has special circuitry inside which RISE AND FALL WAVEFORMS ARE SUPERIMPOSED (PULSE WIDTH IS NOT 120ns) 5V/DIV 20ns/DIV 1375/76 F07 Figure 7. Switch Node Resonance 5V/DIV SWITCH NODE VOLTAGE INDUCTOR CURRENT 100mA/DIV 20ns/DIV 1375/76 F11 0.5µs/DIV 1375/76 F08 Figure 8. Discontinuous Mode Ringing 16 mitigates this problem, but negative voltages over 1V lasting longer than 10ns should be avoided. Note that 100MHz oscilloscopes are barely fast enough to see the details of the falling edge overshoot in Figure 7. A second, much lower frequency ringing is seen during switch off time if load current is low enough to allow the inductor current to fall to zero during part of the switch off time (see Figure 8). Switch and diode capacitance resonate with the inductor to form damped ringing at 1MHz to 10 MHz. This ringing is not harmful to the regulator and it has not been shown to contribute significantly to EMI. Any attempt to damp it with a resistive snubber will degrade efficiency. INPUT BYPASSING AND VOLTAGE RANGE Input Bypass Capacitor Step-down converters draw current from the input supply in pulses. The average height of these pulses is equal to load current, and the duty cycle is equal to VOUT/ VIN. Rise and fall time of the current is very fast. A local bypass capacitor across the input supply is necessary to ensure proper operation of the regulator and minimize the ripple current fed back into the input supply. The capacitor also forces switching current to flow in a tight local loop, minimizing EMI. Do not cheat on the ripple current rating of the Input bypass capacitor, but also don’t get hung up on the value in microfarads. The input capacitor is intended to absorb all the switching current ripple, which can have an RMS value as high as one half of load current. Ripple current ratings on the capacitor must be observed to ensure reliable operation. In many cases it is necessary to parallel two capacitors to obtain the required ripple rating. Both capacitors must be of the same value and manufacturer to guarantee power sharing. The actual value of the capacitor in microfarads is not particularly important because at 500kHz, any value above 5µF is essentially resistive. RMS ripple current rating is the critical parameter. Actual RMS current can be calculated from: ( ) IRIPPLE(RMS) = IOUT VOUT VIN − VOUT / VIN 2 LT1959 U W U U APPLICATIONS INFORMATION The term inside the radical has a maximum value of 0.5 when input voltage is twice output, and stays near 0.5 for a relatively wide range of input voltages. It is common practice therefore to simply use the worst-case value and assume that RMS ripple current is one half of load current. At maximum output current of 4.5A for the LT1959, the input bypass capacitor should be rated at 2.25A ripple current. Note however, that there are many secondary considerations in choosing the final ripple current rating. These include ambient temperature, average versus peak load current, equipment operating schedule, and required product lifetime. For more details, see Application Notes 19 and 46, and Design Note 95. Input Capacitor Type Some caution must be used when selecting the type of capacitor used at the input to regulators. Aluminum electrolytics are lowest cost, but are physically large to achieve adequate ripple current rating, and size constraints (especially height), may preclude their use. Ceramic capacitors are now available in larger values, and their high ripple current and voltage rating make them ideal for input bypassing. Cost is fairly high and footprint may also be somewhat large. Solid tantalum capacitors would be a good choice, except that they have a history of occasional spectacular failures when they are subjected to large current surges during power-up. The capacitors can short and then burn with a brilliant white light and lots of nasty smoke. This phenomenon occurs in only a small percentage of units, but it has led some OEM companies to forbid their use in high surge applications. The input bypass capacitor of regulators can see these high surges when a battery or high capacitance source is connected. Several manufacturers have developed a line of solid tantalum capacitors specially tested for surge capability (AVX TPS series for instance, see Table 3), but even these units may fail if the input voltage surge approaches the maximum voltage rating of the capacitor. AVX recommends derating capacitor voltage by 2:1 for high surge applications. Larger capacitors may be necessary when the input voltage is very close to the minimum specified on the data sheet. Small voltage dips during switch on time are not normally a problem, but at very low input voltage they may cause erratic operation because the input voltage drops below the minimum specification. Problems can also occur if the input-to-output voltage differential is near minimum. The amplitude of these dips is normally a function of capacitor ESR and ESL because the capacitive reactance is small compared to these terms. ESR tends to be the dominate term and is inversely related to physical capacitor size within a given capacitor type. SYNCHRONIZING The SYNC pin, is used to synchronize the internal oscillator to an external signal. The SYNC input must pass from a logic level low, through the maximum synchronization threshold with a duty cycle between 10% and 90%. The input can be driven directly from a logic level output. The synchronizing range is equal to initial operating frequency up to 1MHz. This means that minimum practical sync frequency is equal to the worst-case high self-oscillating frequency (560kHz), not the typical operating frequency of 500kHz. Caution should be used when synchronizing above 700kHz because at higher sync frequencies the amplitude of the internal slope compensation used to prevent subharmonic switching is reduced. This type of subharmonic switching only occurs at input voltages less than twice output voltage. Higher inductor values will tend to eliminate this problem. See Frequency Compensation section for a discussion of an entirely different cause of subharmonic switching before assuming that the cause is insufficient slope compensation. Application Note 19 has more details on the theory of slope compensation. At power-up, when VC is being clamped by the FB pin (see Figure 2, Q2), the sync function is disabled. This allows the frequency foldback to operate in the shorted output condition. During normal operation, switching frequency is controlled by the internal oscillator until the FB pin reaches 0.7V, after which the SYNC pin becomes operational. THERMAL CALCULATIONS Power dissipation in the LT1959 chip comes from four sources: switch DC loss, switch AC loss, boost circuit current, and input quiescent current. The following 17 LT1959 U U W U APPLICATIONS INFORMATION formulas show how to calculate each of these losses. These formulas assume continuous mode operation, so they should not be used for calculating efficiency at light load currents. Die temperature is highest at low input voltage, so use lowest continuous input operating voltage for thermal calculations. ( ) (VOUT ) + 24ns(I )(V )(f) OUT IN VIN RSW IOUT 2 Boost current loss: 2 PBOOST = FREQUENCY COMPENSATION ( VOUT IOUT / 50 ) VIN Quiescent current loss: ( ) PQ = VIN 0.001 + VOUT ( ) 2   VOUT  0.002   0.005 + VIN ( ) RSW = Switch resistance (≈ 0.07) 24ns = Equivalent switch current/voltage overlap time f = Switch frequency Example: with VIN = 10V, VOUT = 5V and IOUT = 3A: (0.07)(3) (5) +  24 • 10  (3)(10) 500 • 10  =     10 2 PSW With the SO-8 package (θJA = 80°C/W), at an ambient temperature of 50°C, TJ = 50 + 80 (0.87) = 120°C Switch loss: PSW = TJ = TA + θJA (PTOT) −9 3 = 0.32 + 0.36 = 0.68W (5) (3 / 50) = 0.15W = Loop frequency compensation of switching regulators can be a rather complicated problem because the reactive components used to achieve high efficiency also introduce multiple poles into the feedback loop. The inductor and output capacitor on a conventional stepdown converter actually form a resonant tank circuit that can exhibit peaking and a rapid 180° phase shift at the resonant frequency. By contrast, the LT1959 uses a “current mode” architecture to help alleviate phase shift created by the inductor. The basic connections are shown in Figure 9. Figure 10 shows a Bode plot of the phase and gain of the power section of the LT1959, measured from the VC pin to the output. Gain is set by the 5.3A/V transconductance of the LT1959 power section and the effective complex impedance from output to ground. Gain rolls off smoothly above the 600Hz pole frequency set by the 100µF output capacitor. Phase drop is limited to about 70°. Phase recovers and gain levels off at the zero frequency (≈16kHz) set by capacitor ESR (0.1Ω). 2 PBOOST LT1959 10 CURRENT MODE POWER STAGE gm = 5.3A/V (5) (0.002) = 0.04W = 10(0.001) + 5(0.005) + 2 10 – PQ Total power dissipation is 0.68 + 0.15 + 0.04 = 0.87W. 18 + Thermal resistance for LT1959 package is influenced by the presence of internal or backside planes. With a full plane under the SO package, thermal resistance will be about 80°C/W. No plane will increase resistance to about 120°C/W. To calculate die temperature, use the proper thermal resistance number for the desired package and add in worst-case ambient temperature: VSW ERROR AMPLIFIER OUTPUT R1 FB ESR 1.21V + VC GND CF RC C1 R2 CC 1959 F09 Figure 9. Model for Loop Response LT1959 U W U U APPLICATIONS INFORMATION 20 40 0 –40 PHASE –20 –80 200 PHASE 2500 150 GAIN 2000 1500 100 ( VC ) ROUT 200k VFB 2 × 10–3 1000 COUT 12pF 50 ERROR AMPLIFIER EQUIVALENT CIRCUIT PHASE (DEG) 0 3000 GAIN (µMho) GAIN VIN = 10V VOUT = 5V IOUT = 2A PHASE: VC PIN TO OUTPUT (DEG) GAIN: VC PIN TO OUTPUT (dB) 40 0 RLOAD = 50Ω –40 10 100 1k 10k FREQUENCY (Hz) 100k 500 100 –120 1M 1k 10k 100k FREQUENCY (Hz) 1959 F10 1595 F11 Figure 10. Response from VC Pin to Output Figure 11. Error Amplifier Gain and Phase Analog experts will note that around 4.4kHz, phase dips very close to the zero phase margin line. This is typical of switching regulators, especially those that operate over a wide range of loads. This region of low phase is not a problem as long as it does not occur near unity-gain. In practice, the variability of output capacitor ESR tends to dominate all other effects with respect to loop response. Variations in ESR will cause unity-gain to move around, but at the same time phase moves with it so that adequate phase margin is maintained over a very wide range of ESR (≥ ±3:1). 80 200 GAIN LOOP GAIN (dB) 60 150 40 100 PHASE 20 50 VIN = 10V VOUT = 5V, IOUT = 2A COUT = 100µF, 10V, AVX TPS CC = 1.5nF, RC = 0, L = 10µH 0 –20 10 100 1k 10k FREQUENCY (Hz) LOOP PHASE (DEG) Error amplifier transconductance phase and gain are shown in Figure 11. The error amplifier can be modeled as a transconductance of 2000µMho, with an output impedance of 200kΩ in parallel with 12pF. In all practical applications, the compensation network from VC pin to ground has a much lower impedance than the output impedance of the amplifier at frequencies above 500Hz. This means that the error amplifier characteristics themselves do not contribute excess phase shift to the loop, and the phase/gain characteristics of the error amplifier section are completely controlled by the external compensation network. In Figure 12, full loop phase/gain characteristics are shown with a compensation capacitor of 1.5nF, giving the error amplifier a pole at 530Hz, with phase rolling off to 90° and staying there. The overall loop has a gain of 74dB at low frequency, rolling off to unity-gain at 100kHz. Phase shows a two-pole characteristic until the ESR of the output capacitor brings it back above 10kHz. Phase margin is about 60° at unity-gain. –50 10M 1M 0 100k –50 1M 1595 F12 Figure 12. Overall Loop Characteristics What About a Resistor in the Compensation Network? It is common practice in switching regulator design to add a “zero” to the error amplifier compensation to increase loop phase margin. This zero is created in the external network in the form of a resistor (RC) in series with the compensation capacitor. Increasing the size of this resistor generally creates better and better loop stability, but there are two limitations on its value. First, the combination of output capacitor ESR and a large value for RC may cause loop gain to stop rolling off altogether, creating a gain margin problem. An approximate formula for RC where gain margin falls to zero is: ( ) (G MP)(G MAVOUT )(ESR)(1.21) R C Loop Gain = 1 = 19 LT1959 U W U U APPLICATIONS INFORMATION GMP = Transconductance of power stage = 5.3A/V GMA = Error amplifier transconductance = 2(10–3) ESR = Output capacitor ESR 1.21 = Reference voltage With VOUT = 5V and ESR = 0.03Ω, a value of 6.5k for RC would yield zero gain margin, so this represents an upper limit. There is a second limitation however which has nothing to do with theoretical small signal dynamics. This resistor sets high frequency gain of the error amplifier, including the gain at the switching frequency. If switching frequency gain is high enough, output ripple voltage will appear at the VC pin with enough amplitude to muck up proper operation of the regulator. In the marginal case, subharmonic switching occurs, as evidenced by alternating pulse widths seen at the switch node. In more severe cases, the regulator squeals or hisses audibly even though the output voltage is still roughly correct. None of this will show on a theoretical Bode plot because Bode is an amplitude insensitive analysis. Tests have shown that if ripple voltage on the VC is held to less than 100mVP-P, the LT1959 will be well behaved. The formula below will give an estimate of VC ripple voltage when RC is added to the loop, assuming that RC is large compared to the reactance of CC at 500kHz. VC (RIPPLE) = (RC )(G MA)(VIN − VOUT )(ESR)(1.21) (VIN)(L)(f) GMA = Error amplifier transconductance (2000µMho) If a computer simulation of the LT1959 showed that a series compensation resistor of 6k gave best overall loop response, with adequate gain margin, the resulting VC pin ripple voltage with VIN = 10V, VOUT = 5V, ESR = 0.1Ω, L = 10µH, would be: 6k)(2 • 10−3 )(10 − 5)(0.1)(1.21) ( VC (RIPPLE) = = 0.144V − 6 3 (10)(10 • 10 )(500 • 10 ) This ripple voltage is high enough to possibly create subharmonic switching. In most situations a compromise value (< 2k in this case) for the resistor gives acceptable phase margin and no subharmonic problems. In other 20 cases, the resistor may have to be larger to get acceptable phase response, and some means must be used to control ripple voltage at the VC pin. The suggested way to do this is to add a capacitor (CF) in parallel with the RC /CC network on the VC pin. Pole frequency for this capacitor is typically set at one-fifth of switching frequency so that it provides significant attenuation of switching ripple, but does not add unacceptable phase shift at loop unity-gain frequency. With RC = 6k, CF = 5 (2π)(f)(RC ) = ( 5 )( ) 2π 500 × 103 6k = 275pF How Do I Test Loop Stability? The “standard” compensation for LT1959 is a 1.5nF capacitor for CC, with RC = 0. While this compensation will work for most applications, the “optimum” value for loop compensation components depends, to various extent, on parameters which are not well controlled. These include inductor value (±30% due to production tolerance, load current and ripple current variations), output capacitance (±20% to ±50% due to production tolerance, temperature, aging and changes at the load), output capacitor ESR (±200% due to production tolerance, temperature and aging), and finally, DC input voltage and output load current . This makes it important for the designer to check out the final design to ensure that it is “robust” and tolerant of all these variations. I check switching regulator loop stability by pulse loading the regulator output while observing transient response at the output, using the circuit shown in Figure 13. The regulator loop is “hit” with a small transient AC load current at a relatively low frequency, 50Hz to 1kHz. This causes the output to jump a few millivolts, then settle back to the original value, as shown in Figure 14. A well behaved loop will settle back cleanly, whereas a loop with poor phase or gain margin will “ring” as it settles. The number of rings indicates the degree of stability, and the frequency of the ringing shows the approximate unity-gain frequency of the loop. Amplitude of the signal is not particularly important, as long as the amplitude is not so high that the loop behaves nonlinearly. LT1959 U W U U APPLICATIONS INFORMATION RIPPLE FILTER 470Ω SWITCHING REGULATOR ADJUSTABLE INPUT SUPPLY + ADJUSTABLE DC LOAD 100µF TO 1000µF 3300pF TO X1 OSCILLOSCOPE PROBE 4.7k 330pF 50Ω TO OSCILLOSCOPE SYNC 100Hz TO 1kHz 100mV TO 1VP-P 1595 F13 Figure 13. Loop Stability Test Circuit VOUT AT IOUT = 500mA BEFORE FILTER VOUT AT IOUT = 500mA AFTER FILTER 10mV/DIV VOUT AT IOUT = 50mA AFTER FILTER LOAD PULSE THROUGH 50Ω f ≈ 780Hz 5A/DIV 0.2ms/DIV 1375/76 F14 Figure 14. Loop Stability Check The output of the regulator contains both the desired low frequency transient information and a reasonable amount of high frequency (500kHz) ripple. The ripple makes it difficult to observe the small transient, so a two-pole, 100kHz filter has been added. This filter is not particularly critical; even if it attenuated the transient signal slightly, this wouldn’t matter because amplitude is not critical. After verifying that the setup is working correctly, I start varying load current and input voltage to see if I can find any combination that makes the transient response look suspiciously “ringy.” This procedure may lead to an adjustment for best loop stability or faster loop transient response. Nearly always you will find that loop response looks better if you add in several kΩ for RC. Do this only if necessary, because as explained before, RC above 1k may require the addition of CF to control VC pin ripple. If everything looks OK, I use a heat gun and cold spray on the circuit (especially the output capacitor) to bring out any temperature-dependent characteristics. Keep in mind that this procedure does not take initial component tolerance into account. You should see fairly clean response under all load and line conditions to ensure that component variations will not cause problems. One note here: according to Murphy, the component most likely to be changed in production is the output capacitor, because that is the component most likely to have manufacturer variations (in ESR) large enough to cause problems. It would be a wise move to lock down the sources of the output capacitor in production. A possible exception to the “clean response” rule is at very light loads, as evidenced in Figure 14 with ILOAD = 50mA. Switching regulators tend to have dramatic shifts in loop response at very light loads, mostly because the inductor current becomes discontinuous. One common result is very slow but stable characteristics. A second possibility is low phase margin, as evidenced by ringing at the output with transients. The good news is that the low phase margin at light loads is not particularly sensitive to component variation, so if it looks reasonable under a transient test, it will probably not be a problem in production. Note that frequency of the light load ringing may vary with component tolerance but phase margin generally hangs in there. CURRENT SHARING MULTIPHASE SUPPLY The circuit in Figure 15 uses multiple LT1959s to produce a 2.5V, 12A power supply. There are several advantages to using a multiple switcher approach compared to a single larger switcher. The inductor size is considerably reduced. Three 4A inductors store less energy (LI2/2) than one 12A coil so are far smaller. In addition, synchronizing three 21 LT1959 U W U U APPLICATIONS INFORMATION converters 120° out of phase with each other reduces input and output ripple currents. This reduces the ripple rating, size and cost of filter capacitors. Synchronized Ripple Currents A ring counter generates three synchronization signals at 600kHz, 33% duty cycle phased 120° apart. The sync input will operate over a wide range of duty cycles, so no further pulse conditioning is needed. Each device’s maximum input ripple current is a 4A square wave at 600kHz. When synchronously added together, the ripple remains at 4A but frequency increases to 1.8MHz. Likewise, the output ripple current is a 1.8MHz triangular waveform, with maximum amplitude of 350mA at 5V VIN. Interestingly, at 7.6V and 15V VIN, the theoretical summed output ripple current cancels completely. To reduce board space and ripple voltage, C1 and C3 are ceramic capacitors. Loop compensation C4 must be adjusted when using ceramic output capacitors due to the lack of effective series resistance. The typical tantalum compensation of 1.5nF is increased to 22nF (× 3) for the ceramic output capacitor. If synchronization is not used and the internal oscillators free run, the circuit will operate correctly, but ripple cancellation will not occur. Input and output capacitors must be ripple rated for the total output current. Current Sharing/Split Input Supplies Current sharing is accomplished by joining the VC pins to a common compensation capacitor. The output of the error amplifier is a gm stage, so any number of devices can be connected together. The effective gm of the composite error amplifier is the multiple of the individual devices. In Figure 15, the compensation capacitor C4 has been increased by ×3. Tolerances in the reference voltages result in small offset currents to flow between the VC pins. The overall effect is that the loop regulates the output at a voltage between the minimum and maximum reference of the devices used. Switch current matching between devices will be typically better than 300mA. The negative temperature coefficient of the VC to switch current transconductance prevents current hogging. A common VC voltage forces each LT1959 to operate at the same switch current, not duty cycle. Each device operates at the duty cycle defined by its respective input voltage. In Figure 15, the input could be split and each device operated at a different voltage. The common VC ensures loading is shared between inputs. C1, C3: MARCON THCS50E1E106Z D1: ROHM RB051L-40 D2: 1N914 L1: DO3316P-682 3-BIT RING COUNTER 1.8MHz INPUT 4.3V TO 15V LT1959 LT1959 LT1959 VC SYNC SW GND VIN BOOST FB VC SYNC SW GND VIN BOOST FB VC SYNC SW GND VIN BOOST FB R1 2.67k 1% + + C3A 10µF 25V + D2A C3B 10µF 25V D2B C4 68nF 25V + D1B D1A L1B 6.8µH D2C R2 2.49k 1% D1C C2B 330nF 10V + C2A 330nF 10V C3C 10µF 25V + + L1A 6.8µH + L1C 6.8µH C2C 330nF 10V 1959 F15 Figure 15. Current Sharing 12A Supply 22 2.5V 12A C1 10µF 25V LT1959 U U W U APPLICATIONS INFORMATION Redundant Operation The circuit shown in Figure 15 is fault tolerant when operating at less than 8A of output current. If one device fails, the output will remain in regulation. The feedback loop will compensate by raising the voltage on the VC pin, increasing switch current of the two remaining devices. BUCK CONVERTER WITH ADJUSTABLE SOFT START Large capacitive loads can cause high input currents at start-up. Figure 16 shows a circuit that limits the dv/dt of the output at start-up, controlling the capacitor charge rate. The buck converter is a typical configuration with the addition of R3, R4, CSS and Q1. As the output starts to rise, Q1 turns on, regulating switch current via the VC pin to maintain a constant dv/dt at the output. Output rise time is controlled by the current through CSS defined by R4 and Q1’s VBE. Once the output is in regulation, Q1 turns off and the circuit operates normally. R3 is transient protection for the base of Q1. RiseTime = (R4)(CSS )(VOUT ) (VBE ) Using the values shown in Figure 16, RiseTime = (47 • 103 )(15 • 10–9 )(2.5) = 2.5ms 0.7 output current is unchanged. Variants of this circuit can be used for sequencing multiple regulator outputs. Dual Output SEPIC Converter The circuit in Figure 17 generates both positive and negative 5V outputs with a single piece of magnetics. The two inductors shown are actually just two windings on a standard B H Electronics inductor. The topology for the 5V output is a standard buck converter. The – 5V topology would be a simple flyback winding coupled to the buck converter if C4 were not present. C4 creates a SEPIC (Single-Ended Primary Inductance Converter) topology whicn improves regulation and reduces ripple current in L1. Without C4, the voltage swing on L1B compared to L1A would vary due to relative loading and coupling losses. C4 provides a low impedance path to maintain an equal voltage swing in L1B, improving regulation. In a flyback converter, during switch on time, all the converter’s energy is stroed in L1A only, since no current flows in L1B. At switch off, energy is transferred by magnetic coupling into L1B, powering the – 5V rail. C4 pulls L1B positive during switch on time, causing current to flow, and energy to build in L1B and C4. At switch off, the energy stored in both L1B and C4 supply the –5V rail. This reduces the current in L1A and changes L1B current waveform from square to triangular. For details on this circuit see Design Note 100. D2 1N914 The ramp is linear and rise times in the order of 100ms are possible. Since the circuit is voltage controlled, the ramp rate is unaffected by load characteristics and maximum C2 0.27µF D2 1N914 LT1959 SHDN GND L1 5µH BOOST + C3 10µF OUTPUT 5V VSW VIN C2 0.33µF INPUT 12V L1* 6.8µH BOOST INPUT 6V TO 15V VIN VSW D1 LT1959 SHDN GND C1 100µF FB R1 2.67k VC CC 1.5nF Q1 CSS R3 15nF 2k R2 2.49k 1959 F16 R4 47k Figure 16. Buck Converter with Adjustable Soft Start + OUTPUT 2.5V 4A C3 10µF 25V CERAMIC FB R1 7.87k VC CC 1.5nF + C1** 100µF 10V TANT R2 2.49k D1 GND C4** 4.7µF + * L1 IS A SINGLE CORE WITH TWO WINDINGS BH ELECTRONICS #501-0726 ** TOKIN IE475ZY5U-C304 † IF LOAD CAN GO TO ZERO, AN OPTIONAL PRELOAD OF 1k TO 5k MAY BE USED TO IMPROVE LOAD REGULATION D1, D3: MBRD340 L1* C5** 100µF 10V TANT + OUTPUT –5V† D3 1959 F17 Figure 17. Dual Output SEPIC Converter Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 23 LT1959 U PACKAGE DESCRIPTION Dimensions in inches (millimeters) unless otherwise noted. R Package 7-Lead Plastic DD Pak (LTC DWG # 05-08-1462) 0.256 (6.502) 0.060 (1.524) TYP 0.060 (1.524) 0.390 – 0.415 (9.906 – 10.541) 0.165 – 0.180 (4.191 – 4.572) 0.045 – 0.055 (1.143 – 1.397) 15° TYP 0.060 (1.524) 0.183 (4.648) 0.059 (1.499) TYP 0.330 – 0.370 (8.382 – 9.398) ( +0.008 0.004 –0.004 +0.203 0.102 –0.102 ) 0.095 – 0.115 (2.413 – 2.921) 0.075 (1.905) 0.300 (7.620) ( +0.012 0.143 –0.020 +0.305 3.632 –0.508 BOTTOM VIEW OF DD PAK HATCHED AREA IS SOLDER PLATED COPPER HEAT SINK ) 0.050 (1.27) 0.026 – 0.036 BSC (0.660 – 0.914) 0.050 ± 0.012 (1.270 ± 0.305) 0.013 – 0.023 (0.330 – 0.584) R (DD7) 1098 S8 Package 8-Lead Plastic Small Outline (Narrow 0.150) (LTC DWG # 05-08-1610) 0.189 – 0.197* (4.801 – 5.004) 0.010 – 0.020 × 45° (0.254 – 0.508) 0.008 – 0.010 (0.203 – 0.254) 0.053 – 0.069 (1.346 – 1.752) 0°– 8° TYP 0.016 – 0.050 (0.406 – 1.270) 0.014 – 0.019 (0.355 – 0.483) TYP *DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE **DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE 8 7 6 5 0.004 – 0.010 (0.101 – 0.254) 0.050 (1.270) BSC 0.150 – 0.157** (3.810 – 3.988) 0.228 – 0.244 (5.791 – 6.197) 1 3 2 4 SO8 1298 RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LT1074/LT1076 Step-Down Switching Regulators 40V Input, 100kHz, 5A and 2A LTC 1148/LTC1149 High Efficiency Synchronous Step-Down Switching Regulator External FET Switches LT1370 High Efficiency DC/DC Converter 42V, 6A, 500kHz Switch LT1371 High Efficiency DC/DC Converter 35V, 3A, 500kHz Switch LT1372/LT1377 500kHz and 1MHz High Efficiency 1.5A Switching Regulators Boost Topology LT1374 High Efficiency Step-Down Switching Regulator 25V, 4.5A, 500kHz Switch LT1506 High Efficiency Step-Down Switching Regulator 15V, 4.5A, 500kHz Switch LT1624 N-Channel Switching Regulator Controller SO-8 Package LT1625 NoRSENSETM Step Down-Switching Regulator Controller Step-Down, Synchronous LT1628 2-Phase Synchronous Step-Down Switching Regulator Controller High Efficiency, Low Ripple ® LTC1735 High Efficiency Step-Down Converter Drives External MOSFETs LT1775 High Power NoRSENSE Switching Regulator Controller Step-Down, Synchronous, Current Mode No RSENSE is a trademark of Linear Technology Corporation 24 Linear Technology Corporation 1959fs, sn1959 LT/TP 0500 4K • PRINTED IN 1630 McCarthy Blvd., Milpitas, CA 95035-7417 USA (408)432-1900 FAX: (408) 434-0507 www.linear-tech.com  LINEAR TECHNOLOGY CORPORATION 2000 ● ●