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LT3797ELXE#PBF

LT3797ELXE#PBF

  • 厂商:

    AD(亚德诺)

  • 封装:

    LQFP-48_7X7MM-EP

  • 描述:

    IC LED DRIVER CTRLR 52QFN

  • 数据手册
  • 价格&库存
LT3797ELXE#PBF 数据手册
LT3797 Triple Output LED Driver Controller DESCRIPTION FEATURES n n n n n n n n n n n n n n n n Three Independent LED Driver Channels Wide Input Voltage Range: 2.5V to 40V VIN Transient Ride-Through Up to 60V Rail-to-Rail LED Current Sense: 0V to 100V 3000:1 PWM Dimming TG Drivers for PMOS LED Disconnection Operates in Boost, Buck Mode, Buck-Boost Mode, SEPIC or Flyback Topology Open-LED Protection Short-Circuit Protected Boost Capable Fault Flags for Independent Channels Programmable VIN Undervoltage and Overvoltage Lockout Adjustable Switching Frequency: 100kHz to 1MHz Synchronizeable to an External Clock CTRL Pins Provide Analog Dimming Programmable Soft-Start Low Profile 52-Lead 7mm x 8mm QFN and 48-Lead Exposed Pad LQFP The LT®3797 is a triple output DC/DC controller designed to drive three strings of LEDs. The fixed frequency, current mode architecture results in stable operation over a wide range of supply and output voltages. The LT3797 includes an integrated DC/DC converter to produce a regulated 7.5V supply for the N-channel MOSFET gate drivers of the three channels. This high efficiency converter enables the part to operate from a wide input voltage range from 2.5V to 40V. The LT3797 is designed so that each converter can use the most suitable configuration to drive its LED load, whether step-up, step-down or a combination. Two key features enable this flexibility: first the LT3797 can sense output current at the high side of the LED string; and second, the voltage feedback pin, FBH, is referred to the ISP current sensing input. The CTRL inputs provide output current analog dimming capability. The TG drivers level shift the PWM signals to drive the gates of external LED-disconnect P-channel MOSFETs, allowing high PWM dimming range, and providing LED overcurrent protection and short-circuit protected boost capability. APPLICATIONS Automotive and Industrial Lighting n RGB Lighting n Billboards and Large Displays All registered trademarks and trademarks are the property of their respective owners. Protected by U.S. Patents, including 7199560, 7321203, 7746300. n TYPICAL APPLICATION VIN 2.5V TO 40V (60V TRANSIENT, 41V INTERNAL OVLO PROTECTION) Triple Boost LED Driver 4.7µF ×3 10µH 10µH 4.7µF 100V ×3 ISP1 250mΩ 10µH ISP2 250mΩ ISN1 GATE1 SENSEP1 SENSEN1 TG1 VIN 1µF ISP3 250mΩ 1A 50V 8mΩ GATE2 SENSEP2 SENSEN2 TG2 100k 8mΩ GATE3 SENSEP3 SENSEN3 TG3 1A 50V ISN1-3 ISP1-3 23.2k LT3797 EN/UVLO 105k 4.7µF 100V ×3 ISN3 ISN2 1A 50V 8mΩ 4.7µF 100V ×3 FBH1-3 OVLO VREF CTRL1-3 PWM1-3 VIN RT SYNC SS1-3 47.5k 310kHz 1M FLT1-3 SW1 SW2 BOOST 0.1µF 140k 47µH INTVCC GND 10µF 0.1µF VC1-3 3.9k 1M 6.8nF 3797 TA01 Rev C Document Feedback For more information www.analog.com 1 LT3797 ABSOLUTE MAXIMUM RATINGS (Note 1) VIN, EN/UVLO.............................................................60V INTVCC, SYNC, OVLO, PWM1, PWM2, PWM3.............8V ISN1........................................................ISP1-1.5V, 100V ISN2........................................................ISP2-1.5V, 100V ISN3........................................................ISP3-1.5V, 100V FBH1....................................................... ISP1 ±6V, 100V FBH2....................................................... ISP2 ±6V, 100V FBH3....................................................... ISP3 ±6V, 100V VC1, VC2, VC3, VREF, SS1, SS2, SS3...........................3V CTRL1, CTRL2, CTRL3, FLT1, FLT2, FLT3...................12V RT.............................................................................1.5V SENSEP1, SENSEP2, SENSEP3, SENSEN1, SENSEN2, SENSEN3,..............................................±0.3V SW1, SW2, BOOST, TG1, TG2, TG3, GATE1, GATE2, GATE3 ................................................... (Note 2) Operating Ambient Temperature Range (Note 3)....................................................... –40 to 125°C Maximum Junction Temperature........................... 125°C Storage Temperature Range................... –65°C to 150°C PIN CONFIGURATION TOP VIEW OVLO ENUVLO VIN SW1 BOOST SW2 INTVCC INTVCC GATE3 SENSEP3 SENSEN3 SS3 SS3 SENSEN3 SENSEP3 GATE3 INTVCC INTVCC SW2 BOOST SW1 VIN EN/UVLO OVLO TOP VIEW 52 51 50 49 48 47 46 45 44 43 42 41 FLT1 1 48 47 46 45 44 43 42 41 40 39 38 37 40 VC3 FLT2 2 FLT3 3 38 FBH3 PWM1 4 37 ISP3 PWM2 5 36 ISN3 PWM3 6 35 TG3 VREF 7 53 GND CTRL1 8 33 TG2 CTRL2 9 32 ISN2 CTRL3 10 31 ISP2 RT 11 30 FBH2 SYNC 12 FLT1 1 FLT2 2 FLT3 3 PWM1 4 PWM2 5 PWM3 6 VREF 7 CTRL1 8 CTRL2 9 CTRL3 10 RT 11 SYNC 12 49 GND 36 35 34 33 32 31 30 29 28 27 26 25 VC3 FBH3 ISP3 ISN3 TG3 NC TG2 ISN2 ISP2 FBH2 VC2 SS2 28 VC2 SENSEN2 SENSEP2 GATE2 GATE1 SENSEP1 SENSEN1 VC1 SS1 ISN1 FBH1 19 20 21 22 23 24 25 26 ISP1 15 16 17 TG1 13 ISN1 14 ISP1 15 FBH1 16 VC1 17 SS1 18 SENSEN1 19 SENSEP1 20 GATE1 21 GATE2 22 SENSEP2 23 SENSEN2 24 27 SS2 TG1 14 UKG PACKAGE VARIATION: UKG52(47) 52-LEAD (7mm × 8mm) PLASTIC QFN LXE PACKAGE 48-LEAD (7mm × 7mm) PLASTIC LQFP θJA = 19°C/W EXPOSED PAD (PIN 49) IS GND, MUST BE SOLDERED TO PCB θJA = 28°C/W EXPOSED PAD (PIN 53) IS GND, MUST BE SOLDERED TO PCB Rev C 2 For more information www.analog.com LT3797 ORDER INFORMATION http://www.linear.com/product/LT3797#orderinfo LEAD FREE FINISH TAPE AND REEL (QFN)/TRAY (LXE) PART MARKING* PACKAGE DESCRIPTION LT3797EUKG#PBF LT3797EUKG#TRPBF LT3797UKG 52-Lead (7mm × 8mm) Plastic QFN 1 –40°C to 125°C LT3797IUKG#PBF LT3797IUKG#TRPBF LT3797UKG 52-Lead (7mm × 7mm) Plastic QFN 1 –40°C to 125°C LT3797ELXE#PBF LT3797ELXE#PBF LT3797LXE 48-Lead (7mm × 7mm) Plastic eLQFP 3 –40°C to 125°C LT3797ILXE#PBF LT3797ILXE#PBF LT3797LXE 48-Lead (7mm × 7mm) Plastic eLQFP 3 –40°C to 125°C MSL RATING TEMPERATURE RANGE Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/. Some packages are available in 500 unit reels through designated sales channels with #TRMPBF suffix. ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VIN = 24V; EN/UVLO = 24V; CTRL1, CTRL2, CTRL3, PWM1, PWM2, PWM3 = 2V; SENSEN1, SENSEN2, SENSEN3 = 0V, OVLO = 0V, unless otherwise noted. PARAMETER CONDITIONS VIN Minimum Operation Voltage MIN TYP MAX 2.5 V 40 41 1 42.5 V V 0.1 1 15 µA µA l UNITS VIN Overvoltage Lockout Rising VIN Falling Hysteresis VIN Shutdown IQ EN/UVLO = 0V EN/UVLO = 1.15V VIN Operating IQ (Not Switching) PWM1, PWM2, PWM3 = 0V, INTVCC = 8V 0.5 0.75 mA INTVCC Operating IQ (Not Switching) PWM1, PWM2, PWM3 = 0V, INTVCC = 8V 2.4 3 mA VREF Voltage 0µA ≤ IVREF ≤ 450µA, INTVCC = 8V 2.00 2.04 VREF Line Regulation 2.5V ≤ VIN ≤ 40V, INTVCC = 8V SENSEP1-SENSEN1, SENSEP2-SENSEN2, SENSEP2-SENSEN2 Current Limit Threshold l l 1.955 0.001 l 100 110 V %/V 120 mV SENSEP1, SENSEP2, SENSEP3 Input Bias Current Current Out of Pin, SENSEP1, SENSEP2, SENSEP3 = 0V 55 μA SENSEN1, SENSEN2, SENSEN3 Input Bias Current Current Out of Pin 210 μA Integrated INTVCC Power Supply (Note 7) INTVCC Regulation Voltage l INTVCC Undervoltage Lockout Threshold Falling INTVCC Hysteresis INTVCC Line Regulation (ΔVINTVCC/ΔVIN) 2.5V < VIN < 40V 7.15 7.5 7.75 V 5.15 5.25 0.4 5.4 V V 0.001 0.02 % Error Amplifiers LED Current Sense Threshold (ISP1-ISN1, ISP2-ISN2, ISP3-ISN3) ISP1, ISP2, ISP3, FBH1, FBH2, FBH3 = 48V ISN1, ISN2, ISN3, FBH1, FBH2, FBH3 = 0V l l 243 238 250 250 257 272 mV mV 8/10th LED Current Sense Threshold (ISP1-ISN1, ISP2-ISN2, ISP3-ISN3) CTRL1, CTRL2, CTRL3=1.1V, ISP1, ISP2, ISP3 = 48V CTRL1, CTRL2, CTRL3=1.1V, ISN1, ISN2, ISN3 = 0V l l 194.5 192 200 200 203.5 218 mV mV 1/10th LED Current Sense Threshold (ISP1-ISN1, ISP2-ISN2, ISP3-ISN3) CTRL1, CTRL2, CTRL3=0.3V, ISP1, ISP2, ISP3 = 48V CTRL1, CTRL2, CTRL3=0.3V, ISN1, ISN2, ISN3 = 0V l l 17 15 25 25 29 34 mV mV l 0.2 1.2 V 50 100 nA 150 20 170 mV mV CTRL1, CTRL2, CTRL3 Range for Linear Current Sense Threshold Adjustment CTRL1, CTRL2, CTRL3 Input Bias Current Current Out of Pin, CTRL1, CTRL2, CTRL3 = 0.3V CTRL1, CTRL2, CTRL3 Idle Mode Threshold Falling Hysteresis 135 Rev C For more information www.analog.com 3 LT3797 ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VIN = 24V; EN/UVLO = 24V; CTRL1, CTRL2, CTRL3, PWM1, PWM2, PWM3 = 2V; SENSEN1, SENSEN2, SENSEN3 = 0V, OVLO = 0V, unless otherwise noted. PARAMETER CONDITIONS LED Current Sense Amplifier Input Common Mode Range (ISN1, ISN2, ISN3) MIN l TYP 0 MAX UNITS 100 V LED Overcurrent Protection Threshold (ISP1-ISN1, ISP2-ISN2, ISP3-ISN3) ISP1, ISP2, ISP3, FBH1, FBH2, FBH3 = 12V 1000 mV ISP1, ISP2, ISP3 Input Bias Current (Active) ISP1, ISP2, ISP3, ISN1, ISN2, ISN3 = 48V ISP1, ISP2, ISP3, ISN1, ISN2, ISN3 = 0V 630 –100 µA nA ISP1, ISP2, ISP3 Input Bias Current (Idle) PWM1, PWM2, PWM3=0V , ISP1, ISP2, ISP3, ISN1, ISN2, ISN3 = 48V 2 µA PWM1, PWM2, PWM3, ISP1, ISP2, ISP3, ISN1, ISN2, ISN3 = 0V –40 nA ISN1, ISN2, ISN3 Input Bias Current (Active) ISP1, ISP2, ISP3, ISN1, ISN2, ISN3 = 48V ISP1, ISP2, ISP3, ISN1, ISN2, ISN3 = 0V 20 –100 µA nA ISN1, ISN2, ISN3 Input Bias Current (Idle) PWM1, PWM2, PWM3=0V , ISP1, ISP2, ISP3, ISN1, ISN2, ISN3 = 48V 0 PWM1, PWM2, PWM3, ISP1, ISP2, ISP3, ISN1, ISN2, ISN3 = 0V LED Current Sense Amplifier gm FBH1, FBH2, FBH3 Pin Input Bias Current –20 ISP1-ISN1, ISP2-ISN2, ISP3-ISN3 = 250mV FBH1, FBH2, FBH3 Regulation Voltage “FBH(REG)” ISP1, ISP2, ISP3, ISN1, ISN2, ISN3 = 48V (|ISP1-FBH1, ISP2-FBH2, ISP3-FBH3|) FBH1, FBH2, FBH3 Amplifier gm |ISP1-FBH1|, |ISP2-FBH2|, |ISP3-FBH3| = 1.25V Rising (Note 4) ISP1, ISP2, ISP3, ISN1, ISN2, ISN3 = 48V 1.250 1.280 V 2 40 2.4 100 3 nA µA 480 μS FBH(REG) FBH(REG) FBH(REG) – 0.07 – 0.05 – 0.04 V 20 Rising (Note 4) ISP1, ISP2, ISP3, ISN1, ISN2, ISN3 = 48V mV FBH(REG) FBH(REG) FBH(REG) + 0.05 + 0.06 + 0.085 Hysteresis 25 VC1, VC2, VC3 Output Impedance VC1, VC2, VC3 Standby Input Bias Current μS 1.225 Hysteresis FBH1, FBH2, FBH3 Overvoltage Threshold (|ISP1-FBH1|, |ISP2-FBH2|, |ISP3-FBH3|) Voltage –20 –20 VC1, VC2, VC3 Current Mode Gain –ΔVVC/ΔVSENSE V mV 10 PWM1, PWM2, PWM3 = 0V CTRL1, CTRL2, CTRL3 = 0V µA nA 250 l ISP1-FBH1, ISP2-FBH2, ISP3-FBH3 = 1.25V ISP1-FBH1, ISP2-FBH2, ISP3-FBH3 = –1.25V FBH1, FBH2, FBH3 Open-LED Threshold (|ISP1-FBH1|, |ISP2-FBH2|, |ISP3-FBH3|) Voltage 1 MΩ 20 20 nA nA 4 V/V 10.5 µA VC1, VC2, VC3 Source Current ISP1, ISP2, ISP3, ISN1, ISN2, ISN3, FBH1, FBH2, FBH3 = 48V, Current Out of Pin VC1, VC2, VC3 Sink Current ISP1, ISP2, ISP3, FBH1, FBH2, FBH3 = 48V, ISN1, ISN2, ISN3 = 47.7V 12 µA ISP1, ISP2, ISP3, ISN1, ISN2, ISN3 = 48V, FBH1, FBH2, FBH3 = 46.7V 32 µA Oscillator Switching Frequency RT = 154kΩ RT = 35.7kΩ RT = 12.4kΩ l RT Voltage 95 375 950 100 400 1000 107 425 1050 kHz kHz kHz 200 270 ns 220 300 ns 0.4 V 1.05 GATE1, GATE2, GATE3 Minimum Off-Time CGATE = 3300pF GATE1, GATE2, GATE3 Minimum On-Time CGATE = 3300pF SYNC Input Low l V Rev C 4 For more information www.analog.com LT3797 ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VIN = 24V; EN/UVLO = 24V; CTRL1, CTRL2, CTRL3, PWM1, PWM2, PWM3 = 2V; SENSEN1, SENSEN2, SENSEN3 = 0V, OVLO = 0V, unless otherwise noted. PARAMETER CONDITIONS MIN SYNC Input High l TYP MAX 1.5 SYNC Resistance to GND UNITS V 200 kΩ Logic Inputs/Outputs EN/UVLO Threshold Voltage Falling l 1.180 EN/UVLO Rising Hysteresis 1.255 20 EN/UVLO Input Low Voltage IVIN Drops Below 1µA EN/UVLO Pin Bias Current Low EN/UVLO = 1.15V EN/UVLO Pin Bias Current High EN/UVLO = 1.33V l 1.5 Rising Hysteresis l PWM1, PWM2, PWM3 Input High Voltage l PWM1, PWM2, PWM3 Input Low Voltage l 0.4 V 2 2.6 µA 100 nA 20 100 nA 1.225 1.250 125 1.280 V mV 1.1 1.4 0.6 0.9 PWM1, PWM2, PWM3 Resistance to GND IFLT =1mA SS1, SS2, SS3 Sourcing Current SS1, SS2, SS3 = 1V, Current Out of Pin V V 200 FLT1, FLT2, FLT3 Output Low V mV 40 OVLO Pin Input Bias Current OVLO Threshold Voltage 1.220 kΩ 300 28 mV µA SS1, SS2, SS3 Sinking Current SS1, SS2, SS3 = 1V, OVLO =1.3V 2.8 µA SS1, SS2, SS3 Soft-Start Reset Threshold Falling, Measured on SS1, SS2, SS3 Hysteresis 160 30 mV mV SS1, SS2, SS3 Fault Reset Threshold Measured on SS1, SS2, SS3 1.7 V GATE1, GATE2, GATE3 Output Rise Time (tr) CGATE = 3300pF (Note 5) 25 ns GATE1, GATE2, GATE3 Output Fall Time (tf) CGATE = 3300pF (Note 5) 25 ns NMOS Gate Drivers Gate Output Low (VOL) 0.1 Gate Output High (VOH) INTVCC – 0.05 V V PMOS Gate Drivers TG1, TG2, TG3 Turn-On Time CTG = 1000pF, ISP1, ISP2, ISP3, FBH1, FBH2, FBH3 = 48V (Note 6) 200 ns TG1, TG2, TG3 Turn-Off Time CTG = 1000pF, ISP1, ISP2, ISP3, FBH1, FBH2, FBH3 = 48V (Note 6) 70 ns PMOS Gate On Voltage (ISP1-TG1, ISP2-TG2, ISP3-TG3) ISP1, ISP2, ISP3, FBH1, FBH2, FBH3 = 48V 6.5 V PMOS Gate Off Voltage (ISP1-TG1, ISP2-TG2, ISP3-TG3) ISP1, ISP2, ISP3, FBH1, FBH2, FBH3 = 48V Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: Do not apply a positive or negative voltage or current source to SW1, SW2, GATE1, GATE2, GATE3, TG1, TG2, TG3 pins, otherwise permanent damage may occur. Note 3: The LT3797E is guaranteed to meet performance specifications from the 0°C to 125°C junction temperature. Specifications over the –40°C to 125°C operating junction temperature range are assured by 0.3 V design, characterization and correlation with statistical process controls. The LT3797I is guaranteed over the full –40°C to 125°C operating junction temperature range. Note 4: FBH(REG) denotes the regulation voltage (|ISP-FBH|) of the corresponding FBH pin. Note 5: Rise and fall times are measured at 10% and 90% levels. Note 6: Gate turn-on/turn-off time is measured from 50% level of PWM voltage to 90% level of gate on/off voltage. Note 7: The INTVCC regulation voltage is tested in an open loop. Closed loop operation is guaranteed by design and process controls. Rev C For more information www.analog.com 5 LT3797 TYPICAL PERFORMANCE CHARACTERISTICS VISP-ISN Threshold vs VCTRL 200 150 100 50 254 254 253 253 V(ISP-ISN) THRESHOLD (mV) V(ISP-ISN) THRESHOLD (mV) 250 VISP-ISN THRESHOLD (mV) VISP-ISN Full-Scale Threshold vs Temperature VISP-ISN Threshold vs VISP 300 0 TA = 25°C unless otherwise noted. 252 251 250 249 248 0.2 0.4 0.6 0.8 1.0 VCTRL (V) 1.2 1.4 246 1.6 0 20 40 60 VISP (V) 80 3797 G01 203 700 198 ISP 600 500 400 300 200 100 197 –50 –25 50 25 75 0 TEMPERATURE (°C) 100 248 300 0 125 V(ISP-ISN) THRESHOLD (mV) ISP, ISN BIAS CURRENT (µA) VISP-ISN THRESHOLD (mV) 199 249 75 50 25 TEMPERATURE (°C) 0 ISN 0 20 40 60 VISP, VISN (V) 80 3797 F04 2.04 1.260 125 VISP = 48V 250 200 150 100 50 0 100 VISP-ISN Threshold vs V|ISP-FBH| 1.1 1.15 1.2 V|ISP-FBH| (V) 1.25 1.3 3797 G06 3797 G05 |ISP-FBH| Regulation Voltage vs Temperature, VISP 100 3797 G03 800 200 250 246 –50 –25 100 ISP/ISN Input Bias Current vs VISP, VISN 201 251 3797 G02 VISP-ISN Threshold at CTRL = 0.7V vs Temperature 202 252 247 247 0 VISP = 48V VREF Voltage vs Temperature VREF Voltage vs VIN 2.010 2.03 2.02 VISP = 48V 2.005 2.01 VREF (V) V|ISP-FBH| (V) VISP = 4.5V 1.250 VISP = 100V IREF = 0µA 2.00 IREF = 450µA 1.99 1.245 VREF (V) 1.255 2.000 1.995 1.98 1.97 1.240 –50 –25 75 0 25 50 TEMPERATURE (°C) 100 125 1.96 –50 –25 75 50 25 TEMPERATURE (°C) 0 100 125 3797 G08 3797 G07 1.990 0 5 10 15 20 25 VIN (V) 30 35 40 3797 G09 Rev C 6 For more information www.analog.com LT3797 TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C unless otherwise noted. Switching Frequency vs Temperature RT vs Switching Frequency VIN, INTVCC Quiescent Current vs VIN 420 VIN, INTVCC QUIESCENT CURRENT (mA) 2.5 SWITCHING FREQUENCY (kHz) 415 RT (kΩ) 100 410 405 400 395 390 385 10 380 –50 –25 0 100 200 300 400 500 600 700 800 900 1000 SWITCHING FREQUENCY (kHz) 75 50 25 TEMPERATURE (°C) 100 0 3797 G10 1.19 1.17 1.15 1.23 EN/UVLO RISING THRESHOLD 1.22 EN/UVLO FALLING THRESHOLD 1.21 OVLO FALLING THRESHOLD 1.20 1.11 –25 0 25 50 75 TEMPERATURE (°C) 100 125 1.19 –50 –25 50 25 75 0 TEMPERATURE (°C) 10 15 20 25 VIN (V) 30 35 100 2.0 1.8 1.6 –50 125 –25 75 0 25 50 TEMPERATURE (°C) 100 SENSE Current Limit Threshold vs Duty Cycle 115 2.5 125 3797 G15 SENSE Current Limit Threshold vs Temperature EN/UVLO Current vs Voltage 40 2.2 3797 G14 3797 G13 115 114 2.0 1.5 1.0 0.5 V(SENSEP-SENSEN) (mV) 113 V(SENSEP-SENSEN) (mV) EN/UVLO CURRENT (µA) 5 2.4 EN/UVLO HYSTERESIS CURRENT (µA) EN/UVLO (V) OVLO (V) 1.21 0 EN/UVLO Hysteresis Current vs Temperature 1.24 OVLO RISING THRESHOLD 1.09 –50 IVIN 0.5 3797 G12 1.25 1.13 1.0 EN/UVLO Falling/Rising Threshold vs Temperature 1.27 1.23 1.5 3797 G11 OVLO Threshold vs Temperature 1.25 IINTVCC 2.0 0 125 PWM = 0V 112 111 110 109 108 107 0 110 105 100 106 –0.5 0.122 105 –50 1.22 12.2 EN/UVLO VOLTAGE (V) 3797 G16 –25 50 25 0 75 TEMPERATURE (°C) 100 125 3797 G17 95 0 20 60 40 DUTY CYCLE 80 100 3797 G18 Rev C For more information www.analog.com 7 LT3797 TYPICAL PERFORMANCE CHARACTERISTICS INTVCC vs Temperature, VIN INTVCC CURRENT LIMIT IINTVCC_LMT (mA) INTVCC (V) VIN = 24V 7.500 VIN = 40V 7.475 –25 75 0 25 50 TEMPERATURE (°C) 100 125 225 L = 47µH 1200 800kHz 700kHz >900kHz 200 175 600kHz 150 500kHz 400kHz 125 300kHz 100 75 200kHz 50 800 FALL TIME 600 400 200 RISE TIME 100kHz 25 0 1000 TIME (ns) 250 7.525 7.450 –50 Top Gate (PMOS) Rise/Fall Time vs Capacitance INTVCC Current Limit vs VIN, fSW 7.550 VIN = 2.5V TA = 25°C unless otherwise noted. 0 3 6 9 12 15 18 21 24 27 30 33 36 39 VIN (V) 3739 G20 3797 G19 0 0 1 2 3 4 5 6 7 CAPACITANCE (nF) 8 9 10 3797 G21 PIN FUNCTIONS FLT1, FLT2, FLT3 (Pins 1, 2, 3): Open-Collector PullDowns on FLT Pins Report The Fault Conditions: 1. VIN > 41V (typical) 2. Overtemperature (TJ > 165°C) 3. INTVCC < 5.2V (typical) 4. OVLO > 1.25V (typical) 5. LED Overcurrent 6. Open LED 7. Output Overvoltage PWM1, PWM2, PWM3 (Pins 4, 5, 6): Pulse Width Modulated Input Pins. Signal low causes the respective converter to go into idle mode which means it stops switching, the TG pin transitions high, the quiescent currents are reduced, and the VC becomes high impedance. If not used, connect to the REF pin. VREF (Pin 7): Reference Output Pin. Can supply up to 450µA. This pin drives a resistor divider for the CTRL1, CTRL2, CTRL3 pins, either for analog dimming or for temperature limit/compensation of LED loads. The normal output voltage is 2V. CTRL1, CTRL2, CTRL3 (Pins 8, 9, 10): Current Sense Threshold Adjustment Pins. Sets voltage across external sense resistor between ISP and ISN pins of the respective converter: VISP-ISN = 0V, when VCTRL < 0.2V VISP-ISN = (VCTRL – 0.2V)/4, when 0.2V < VCTRL < 1.2V VISP-ISN = 250mV, when VCTRL >1.2V Connect CTRL pins to VREF for the 250mV default threshold. When VCTRL < 150mV (typical), the respective converter goes into idle mode, which is the same as PWM pin being pulled low. Do not leave these pins open. RT (Pin 11): Switching Frequency Adjustment Pin. Set the frequency using a resistor to GND. Do not leave the RT pin open. SYNC (Pin 12): The SYNC pin is used to synchronize the internal oscillator to an external logic-level signal. The RT resistor should be chosen to program an internal switching frequency 20% slower than the SYNC pulse frequency. Gate turn-on occurs at a 0.2µs (typical) delay after the rising edge of SYNC. Tie SYNC to GND if not used. Rev C 8 For more information www.analog.com LT3797 PIN FUNCTIONS (QFN/LQFP) TG1, TG2, TG3 (Pins 14, 33, 35/Pins 13, 30, 32): Top Gate Driver Output Pins for Driving LED Loads Disconnect P-Channel MOSFETs (PMOSs). One for each channel. An inverted PWM signal drives an external PMOS gate of the respective converter between VISP and (VISP – 6.5V). Leave TG pins unconnected if not used. ISN1, ISN2, ISN3 (Pins 15, 32, 36/Pins 14, 29, 33): Connection Points for the Negative Terminals of the Current Feedback Resistors. ISP1, ISP2, ISP3 (Pins 16, 31, 37/Pins 15, 28, 34): Connection Points for the Positive Terminals of the Current Feedback Resistors. Also serves as positive rails for TG pin drivers and the reference point for FBH. FBH1, FBH2, FBH3 (Pins 17, 30, 38/Pins 16, 27, 35): Voltage Loop Feedback Pins. The output feedback voltage V FB is measured between the ISP pin and the FBH pin (absolute value): VFB = |ISP – FBH|. The FBH pin is intended for constantvoltage regulation or for LED protection/open-LED detection for each channel. In an open-LED event, the internal amplifier with output VC regulates VFB to 1.25V (typical) through the respective converter. If VFB is above the overvoltage threshold (typical 1.3V), the TG pin of the same channel is driven high to disconnect the external PMOS to protect the LEDs from an overvoltage event. Either openLED or overvoltage event signals a fault condition. Do not leave the FBH pins open. It requires ISP to be no less than 4.5V to maintain an accurate VFB1 voltage sense. If ISP falls below 4.5V, the voltage regulation is deactivated and the ISP-ISN current regulation dominates regardless of the |ISP-FBH| value. If not used, connect the FBH pin to the ISP pin of the same channel. VC1, VC2, VC3 (Pins 19, 28, 40/Pins 17, 26, 36): Error Amplifier Compensation Pins. Connect a series RC from each VC pin to GND. In each channel, the VC pin is high impedance when the PWM pin is low, or the CTRL pin is below 150mV. This feature allows the VC pin to store the demand current state variable for the next PWM or CTRL high transition. SS1, SS2, SS3 (Pins 20, 27, 41/Pins 18, 25, 37): SoftStart Pins. Each SS pin modulates compensation VC pin voltage of the respective channel. Each of the soft-start intervals is set with an external capacitor. SENSEN1, SENSEN2, SENSEN3 (Pins 21, 26, 42/Pins 19, 24, 38): The Negative Current Sense Inputs for the Control Loops. Kelvin connect the SENSEN pin to the negative terminal of the switch current sense resistor (which connects to the GND plane) of the respective converter. SENSEP1, SENSEP2, SENSEP3 (Pins 22, 25, 43/Pins 20, 23, 39): The Positive Current Sense Inputs for the Control Loops. Kelvin connect the SENSEP pin to the positive terminal of the switch current sense resistor in the source of the external N-channel MOSFET (NMOS) switch of the respective converter. GATE1, GATE2, GATE3 (Pins 23, 24, 44/Pins 21, 22, 40): N-Channel MOSFET Gate Driver Outputs. Switch between INTVCC and GND. Driven to GND during shutdown, fault or idle states. INTVCC (Pins 45, 46/Pins 41, 42): INTVCC pins are the integrated power supply output voltage nodes that provide supply for control circuits and NMOS gate drivers. The two INTVCC pins are internally shorted. Must be bypassed with a 10µF ceramic capacitor placed close to the pins. SW2 (Pin 47/Pin 43): Integrated Power Supply Switch Node. Connect this pin to one side of the integrated power supply inductor. BOOST (Pin 48/Pin 44): Connect this pin to SW1 pin through a 0.1µF ceramic capacitor. SW1 (Pin 49/Pin 45): Integrated Power Supply Switch Node. Connect this pin to the other side of the integrated power supply inductor, and to the BOOST pin with a 0.1µF ceramic capacitor. VIN (Pin 50/Pin 46): Input Supply Pin. If VIN is over 41V (typical), the integrated INTVCC power supply is turned off. All three channels are also turned off (including pulling the GATE pins to GND and TG pins to ISP) and the soft-starts are reset. Must be locally bypassed with low ESR capacitors placed close to the pin. Rev C For more information www.analog.com 9 LT3797 PIN FUNCTIONS (QFN/LQFP) EN/UVLO (Pin 51/Pin 47): Enable and Undervoltage Lockout Pin. An accurate 1.22V falling threshold with externally programmable hysteresis detects when power is OK to enable the integrated INTVCC power supply and each channel switching. Rising hysteresis is generated by the external resistor divider and an accurate internal 2μA pull-down current. Above the 1.24V (typical) rising threshold (but below 2.5V), EN/UVLO input bias current is sub-μA. Below the 1.22V (typical) falling threshold, a 2μA pull-down current is enabled so the user can define the hysteresis with the external resistor selection. An undervoltage condition turns off the integrated INTVCC power supply and all the three channels and resets the soft-starts. Tie to 0.4V, or less, to disable the device and reduce VIN quiescent current below 1μA. OVLO (Pin 52/Pin 48): Overvoltage Lockout Pin. An accurate 1.25V rising threshold with 125mV hysteresis detects an overvoltage condition. An overvoltage condition turns off all three channels (including pulling the GATE pins to GND and TG pins to ISP) and resets the soft-starts. Tie OVLO to GND if not used. GND (Exposed Pad Pin 53/Exposed Pad Pin 49): Ground. Solder the exposed pad directly to ground plane. Rev C 10 For more information www.analog.com LT3797 BLOCK DIAGRAM D1 VOUT R6 RSW_SEN R5 – VFB1 + ISN1 FBH1 ISP1 |ISP1 – FBH1| TG1 A7 PWMON 1.3V A16 – + CH1 SOFT-START AND FAULT PROTECTION OVFB 12µA S1 CC 1.2V – + + A8 A9 1.25V – + A11 150mV + – CTRL1 SS1 12µA AT A9+ = A9– + – G1 R S G2 O GATE1 M1 SET 25µA 1mA VISENSE1 A13 + – A14 + – 2.5µA 110mV SENSEP1 CSEN (OPTIONAL) SENSEN1 RSW_SEN REPLICATED FOR EACH CHANNEL VIN OVLO + – SHDN FLT1 FAULT PROTECTION AND REPORT CH1 FLT CH2 FLT CH3 FLT INTVCC UVLO Q2 FLT3 A3 EN/UVLO 1.22V IS1 2µA + – A1 2V + – A2 SET VIN VIN RAMP 5.7V 100kHz TO 1MHz OSCILLATOR INTVCC SET 1.05V + – VIN CVIN1 BOOST CBOOST SW1 RAMP GENERATOR Q3 VIN SHDN 41V 165°C THERMAL SHUTDOWN + – Q1 FLT2 R2 INTVCC SR1 A12 CSS R1 CTRL_ON S2 CTRL_ON CVIN2 PROTECTION 3V Q4 L1 PWMON CH1 FLT 12µA AT A8+ = A8– VIN ISP1-6.5V G3 VC1 RC COUT PWM1 OVI x4 + 0.2V 3V G4 ISP1 PWM1 SS1 SHDN + – A6 LED STRING M2 INTEGRATED POWER SUPPLY LPWR SW2 INTVCC A5 CVCC GND A4 – + 1.25V OVLO VREF RT SYNC SHARED COMPONENTS R4 R3 3797 F01 VIN RT Figure 1. LT3797 Block Diagram Working in Boost Configuration (for Simplicity, Only Channel 1 Is Shown) Rev C For more information www.analog.com 11 LT3797 OPERATION The LT3797 uses a fixed frequency, current mode control scheme to provide excellent line and load regulation. It contains three independent switching regulators. Operation can be best understood by referring to the Block Diagram in Figure 1. The oscillator, internal power supply etc., are shared among the three converters. The LED current control circuitry, gate drivers etc., are replicated for each of the three converters. For simplicity, Figure 1 shows the shared circuits and the channel specific circuits for converter 1. The LED current regulation can be understood by following the operation of converter 1. The start of each oscillator cycle sets the SR latch SR1 and turns on the external power MOSFET switch M1 through gate driver G2 (the three converters share the same oscillator, which means if all the three channels are enabled the GATE pins of all the three channels transition high at the same instant). The switch current flows through the external current sensing resistor RSW_SEN1 and generates a voltage proportional to the switch current. This current sense voltage (amplified by A14) is added to a stabilizing slope compensation ramp and the resulting sum VISENSE1 is fed into the negative terminal of the PWM comparator A12. The current in the external inductor L1 increases steadily during the time the switch is on. When VISENSE1 exceeds the level at the negative input of A12 (VC1), SR1 is reset, turning off the power switch. During the switch-off phase, L1 current decreases. Through this repetitive action, the PWM control algorithm establishes a switch duty cycle to regulate a current in the LED string. The VC1 voltage is set by the error amplifier A8 and is an amplified version of the difference between the LED current sense voltage, measured between ISP1 and ISN1, and the target difference voltage set by the CTRL1 pin. In this manner, the error amplifier sets the correct switch peak current level to keep the LED current in regulation. The LT3797 has a switch current limit function. The switch current sense signal is input to the current limit comparator A13. If the current sense voltage is higher than the sense current limit threshold, VSENSE(MAX) (typical 110mV), A13 will reset SR1 and turn off M1 immediately. The LT3797 provides the constant voltage regulation mode to allow the users to accurately program the output regulation voltage in an open-LED event. In voltage regulation mode, the operation is similar to that described above, except the VC1 voltage is set by A9 and is an amplified version of the difference between the internal reference of 1.25V (typical) and the output feedback voltage, VFB1, which is measured between ISP1 and FBH1 (the absolute value): VFB1 = |ISP1-FBH1| The LED current sense feedback interacts with the FBH1 voltage feedback so that the sense voltage between ISP1 and ISN1 does not exceed the threshold set by the CTRL1 pin, and VFB1 does not exceed 1.25V (typical). For accurate current or voltage regulation, it is necessary to be sure that under normal operating conditions, the appropriate loop is dominant. To deactivate the voltage loop entirely, FBH1 can be connected to ISP1. To deactivate the LED current loop entirely, the ISP1 and ISN1 should be tied together and the CTRL1 input tied to VREF. It requires ISP to be no less than 4.5V to maintain an accurate VFB1 voltage sense. If ISP falls below 4.5V, the voltage regulation is deactivated and the current regulation dominates regardless of the |ISP1-FBH1| value. Two LED driver specific functions featured on the LT3797 are controlled by the voltage feedback pin FBH1. First, when the VFB1 exceeds a voltage 50mV lower (–4%) than the VFB1 regulation voltage (typical 1.25V), it indicates that the LED may be disconnected and the constantvoltage feedback loop is taking control of the switching regulator. FLT1 is pulled low to report a fault condition. Second, when VFB1 exceeds the VFB1 regulation voltage by 60mV (5% typical), it indicates an output overvoltage fault. In this condition, TG1 pin is driven high by G3 and G4, turning off the external PMOS M2. This action disconnects the LED load from the power path, preventing excessive current from damaging the LEDs. FLT1 is kept low to report the fault condition. Rev C 12 For more information www.analog.com LT3797 APPLICATIONS INFORMATION Switching Frequency and Synchronization The RT frequency adjust pin allows the user to program the switching frequency (fSW) from 100kHz to 1MHz to optimize efficiency/performance or external component size. Higher frequency operation yields smaller component size but increases switching losses and gate driving current, and may not allow sufficiently high or low duty cycle operation. Lower frequency operation gives higher efficiency, achieves higher maximum duty cycle or lower minimum duty cycle at the cost of larger external component size. An external resistor from the RT pin to GND is required—do not leave this pin open. For an appropriate RT resistor value see Table 1. Table 1. Switching Frequency (fSW) vs RT Value fSW (kHz) RT (kΩ) fSW (kHz) RT (kΩ) 100 154 600 22.6 150 102 650 20.5 200 75.0 700 17.4 250 59.0 750 19.1 300 48.7 800 16.2 350 41.2 850 15.0 400 35.7 900 14.0 450 31.6 950 13.3 500 28.0 1000 12.4 550 24.9 The operating frequency of the LT3797 can be synchronized to an external clock source. By providing a digital clock signal into the SYNC pin, the LT3797 will operate at the SYNC clock frequency. If this feature is used, an RT resistor should be chosen to program a switching frequency 20% slower than SYNC pulse frequency. Tie the SYNC pin to GND if this feature is not used. Duty Cycle Considerations Switching duty cycle is a key variable defining converter operation, therefore, its limits must be considered when programming the switching frequency for a particular application. The minimum duty cycle of the switch is limited by the fixed minimum on-time (200ns maximum) and the switching frequency (fSW). The maximum duty cycle of the switch is limited by the fixed minimum off-time (200ns maximum) and fSW. The following equations express the minimum/maximum duty cycle: Minimum Duty Cycle = 200ns • fSW Maximum Duty Cycle = 1 – 200ns • fSW Besides the limitation by the minimum off-time, it is also recommended to choose the maximum duty cycle below 95%. PWM Dimming Control The LED of each channel can be dimmed with pulse width modulation using the PWM pin. Figure 1 shows the channel 1 driver. If the PWM1 pin is pulled high, M2 is turned on by G3 and G4. Converter 1 operates normally. G4 limits ISP1-TG1 to 6.5V to protect the gate of M2. If the PWM1 pin is pulled low, the external NMOS M1 is turned off through G1 etc, and converter 1 stops operating. M2 is turned off through the TG1 pin, disconnecting LED1 and stopping current drawing from output capacitor, COUT. The VC1 pin is also disconnected from the internal circuitry through S1. The capacitors CC and COUT store the state of the LED string current until PWM1 is pulled up again. This leads to a highly linear relationship between PWM duty cycle and output light (brightness), and allows for a large and accurate dimming range. The PWM dimming range can be maximized by using the PWM pin for dimming and the CTRL pin for linearly adjusting the current sense threshold. In the applications where the operation frequency of the LT3797 is synchronized to an external clock source applied to the SYNC pin, it is recommended to synchronize the rising edge of the external clock and the rising edge of the PWM signal of each of the three channels, as shown in Figure 2. SYNC PIN INPUT SIGNAL PWM PIN INPUT SIGNAL 3797 F02 Figure 2. Synchronize the SYNC Pin Input Signal and the PWM Pin Input Signal Rev C For more information www.analog.com 13 LT3797 APPLICATIONS INFORMATION Besides analog dimming, the CTRL pin can also be used for PWM dimming control. Refer to Figure 1 for channel 1 operation. If CTRL1 falls below 150mV, the CTRL_ON signal is pulled low by comparator A11. Since CTRL_ON is connected to one of G3’s inputs, channel 1 has the same operation as PWM1 being pulled low (such as disconnecting LED1 from COUT and disconnecting CC from VC1, etc). Therefore, the CTRL pin can be used for a combination of linear and PWM dimming control if it is connected to a PWM signal whose low level is below 150mV and high level is between 0.2V and 1.3V. Connect the PWM pins to the VREF pin if the CTRL pins are used for PWM dimming or no PWM dimming is used. Do not use a low VTH PMOS for LED disconnection. The PMOS with a minimum VTH of –1V to –2V is recommended. In the applications where accurate PWM dimming is not required, the P-channel MOSFETs can be omitted to reduce cost. In these conditions, the TG pins should be left open. When the CTRL pin voltage is between 1.1V and 1.3V the LED current varies with CTRL, but departs from the equation above by an increasing amount as CTRL voltage increases. Ultimately, above CTRL = 1.3V the LED current no longer varies with CTRL. The typical (ISP-ISN) threshold vs CTRL voltage when CTRL is close to 1.2V is listed in Table 2. Table 2. (ISP-ISN) Threshold vs CTRL When CTRL Is Close to 1.2V VCRTL (V) (ISP-ISN) THRESHOLD (mV) 1.1 225 1.15 236 1.2 244.5 1.25 248.5 1.3 250 When CTRL is higher than 1.3V, the LED current is regulated to: I LED = 250mV R LED _ SEN Programming the LED Current The LED current of each channel is programmed by connecting an external sense resistor, RLED_SEN, in series with the LED load, and setting the voltage regulation threshold across RLED_SEN using CTRL input. The ISP and ISN sense node traces should run parallel to each other to a Kelvin connection on the positive and negative terminals of RLED_SEN. Typically, sensing of the current should be done at the top of the LED string. If this option is not available, then the current may be sensed at the bottom of the LED string. The CTRL pin should be tied to a voltage higher than 1.3V to get the full-scale 250mV (typical) threshold across the sense resistor. The CTRL pin can also be used to dim the LED current from full scale to zero, although relative accuracy decreases with the decreasing voltage sense threshold. When the CTRL pin voltage is less than 1.1V and higher than 0.2V, the LED current is: The LED current is regulated to 0A when CTRL is lower than 200mV (typical). V – 200mV I LED = CTRL R LED _ SEN • 4 The CTRL pin should not be left open (tie to VREF if not used). The CTRL pin can also be used in conjunction with a thermistor to provide overtemperature protection for the LED load, or with a resistor divider to VIN to reduce output power and limit peak switching current when VIN is low. The presence of a time varying differential voltage signal (ripple) across ISP and ISN at the switching frequency is expected. The amplitude of this signal is increased by high LED load current, low switching frequency and/ or a smaller value output filter capacitor. Some level of ripple signal is acceptable: the compensation capacitor on the VC pin filters the signal so the average difference between ISP and ISN is regulated to the user-programmed value. Ripple voltage amplitude (peak-to-peak) in excess of 50mV should not cause misoperation, but may lead to noticeable offset between the average value and the user-programmed value. Rev C 14 For more information www.analog.com LT3797 APPLICATIONS INFORMATION Programming Output Regulation Voltage for the Open-LED Event ISP1 LT3797 The output voltage of each channel in the open-LED event can be programmed by selecting two external sense resistors. Figure 3 shows the sense resistor connection of channel 1. In the open-LED event, VFB1 is regulated to 1.25V, therefore the output regulation voltage can be set according to the following equation: VOUT = 1.25V • FBH1 R5 + 2µA • R6 Under normal operating conditions, the LED current regulation loop is dominant. Therefore, the output regulation voltage (VOUT) in the open-LED event should be programmed so that VFB1 (VFB1 = |ISP1-FBH1|) should never exceed 1.1V when LED1 is connected. The only way for VFB1 to be within 50mV of the regulation voltage (1.25V) is for an open-LED event to occur. RLED_SEN1 ISN1 ISN1 ISN1 TG1 TG1 COUT1 VOUT TG1 M2 R6 LED1+ LED1 LED1– R5 R5 + R6 + R5 – Figure 3. Output Voltage Sense Resistor Connection R5 + R6 Typically, the current sense resistor RLED_SEN1 and disconnect PMOS M2 are connected to the top of the LED string (LED1+), as shown in Figure 3. If this option is not available (for example some multi-string LED modules are built with a common anode configuration), then the current may be sensed at the bottom of the LED string as shown in Figure 4. In this configuration, the FBH pin draws 2µA (typical) current. Therefore, the output regulation voltage in the open-LED event can be set according to the following equation: – VFB1 3797 F03 Since the output voltage is directly measured between ISP1 and LED1–, the Figure 3 approach works well for the converter topologies where LED1– is connected to GND (such as boost, SEPIC, flyback), as well as the topologies where LED1– is connected to an inductor (such as buck mode, buck-boost mode LED drivers). VOUT = 1.25V • + 2µA FBH1 LT3797 ISP1 + – R6 + LED1+ LED1 VOUT VFB1 R5 LED1– – COUT1 RLED_SEN1 ISN1 TG1 M2 3797 F04 Figure 4. Output Voltage Sense Resistor Connection When RLED_SEN1 and M2 Are Connected to the Bottom of the LED String Programming Enable and Undervoltage Lockout with the EN/UVLO Pin EN/UVLO pin controls whether the LT3797 is enabled or is in shutdown state. As shown in Figure 1, a 1.22V reference, a comparator, A1, and a controllable current source, IS1, allow the user to accurately program the supply voltage at which the IC turns on and off. The falling value can be accurately set by the resistor divider R1 and R2. When EN/UVLO is above 0.4V and below the 1.22V threshold, the small pull-down current source, IS1 (typical 2µA), is active. The purpose of this current is to allow the user to program the rising hysteresis. The falling threshold voltage and rising threshold voltage can be calculated by the following equations: VIN(FALLING) = 1.22V • R1+ R2 R2 VIN(RISING) = VIN(FALLING) + 2µA • R1 Rev C For more information www.analog.com 15 LT3797 APPLICATIONS INFORMATION For applications where the EN/UVLO pin is to be used only as a logic input, the EN/UVLO pin can be connected directly to the input voltage, VIN, for “always on” operation. Programming Overvoltage Lockout Threshold with the OVLO Pin The LT3797 provides an OVLO pin that allows user-programmable overvoltage lockout. A 1.25V (typical) rising threshold with 125mV hysteresis detects the overvoltage condition. The OVLO pin can be used to monitor VIN or other voltages against overvoltage conditions. Figure 1 shows OVLO connecting to VIN through a voltage divider to protect against VIN overvoltage. The rising threshold voltage and falling threshold voltage can be calculated by the following equations: VOV(RISING) = 1.25V • R3 + R4 VOV(FALLING) = 1.125V • R4 R3 + R4 input voltage and temperature. Application Note 76 is a good reference for loop compensation. Soft-Start and Fault Protection The LT3797 has identical soft-start and fault protection functions for each channel. The soft-start feature is designed to limit peak switch currents and output voltage (VOUT) overshoot during start-up or recovery from a fault condition. Figure 4 shows the state diagram of the softstart and fault protection of channel 1. Also refer to Figure 1for channel 1 operation. In soft-start mode, the softstart capacitor is charged up by the 25µA current source. The SS1 pin gradually increases the peak switch current allowed in M1 by clamping the VC1 voltage through Q4. In this way the SS1 pin allows the output capacitor, COUT, voltage to be charged gradually toward its final value while limiting M1 current overshoot. The soft-start interval is set by the soft-start capacitor selection according to the following equation: R4 An overvoltage condition turns off all three channels (including pulling the GATE pins to GND and TG pins to ISP) and resets the soft-starts. Loop Compensation Loop compensation determines the stability and transient performance. The LT3797 uses current mode control to regulate the output which simplifies loop compensation. The optimum values depend on the converter topology, the component values and the operating conditions (including the input voltage, LED current switching frequency). To compensate the feedback loop of the LT3797, a series resistor-capacitor network is usually connected from the VC pin to GND. Figure 1 shows the typical VC compensation network. For most applications, the capacitor should be in the range of 2.2nF to 22nF, and the resistor should be in the range of 2k to 25k. A practical approach to designing the compensation network is to start with one of the circuits in this data sheet that is similar to your application, and tune the compensation network to optimize the performance. Stability should then be checked across all operating conditions, including LED current, t SS = 1.2V 25µA • C SS The discharge time of the soft-start capacitor is controlled by a 2.5µA current source. Therefore, the SS1 pin is also used as an adjustable timer in the FAULT2 protection modes (see Figure 5) to prevent thermal runaway problems on the external components and/or the LEDs. In some fault conditions, the soft-start capacitor is charged and discharged repetitively, referred to as the hiccup mode operation. A typical hiccup mode operation occurs when an LT3797 LED driver has an output short-circuit fault. Figure 5 shows that if an output short-circuit fault causes LT3797 overcurrent (sensed by ISP1-ISN1) in the normal operation mode, the LT3797 moves to FAULT2 protection mode, where TG1 is pulled high, turning off the external PMOS and isolating the output. As a result, the overcurrent condition is cleared. When SS1 is discharged below 200mV, the LT3797 moves to soft-start mode, where TG1 is pulled low to turn on the external PMOS. If the short-circuit fault still exists, the LT3797 senses an overcurrent fault again and moves to FAULT2 protection mode: SS1 charged up and a new cycle starts. In this manner, the soft-start capacitor is kept charging and discharging between 200mV and 1.7V until the short-circuit fault is cleared. Rev C 16 For more information www.analog.com LT3797 APPLICATIONS INFORMATION EN/UVLO < 1.22V (TYPICAL) OR VIN < 2.2V (TYPICAL) SHUTDOWN MODE • • • • INTEGRATED INTVCC POWER SUPPLY OFF GATE1 LOW TG1 HIGH IQ < 1µA EN/UVLO > 1.22V (TYPICAL) AND VIN > 2.2V (TYPICAL) FAULT1 INTEGRATED INTVCC POWER SUPPLY START-UP MODE • • • • • SS1 PULLED LOW BY A 1mA CURRENT SOURCE FLT1 LOW TG1 HIGH GATE1 LOW INTEGRATED INTVCC POWER SUPPLY ENABLED AND INTVCC CHARGED UP FAULT1 CLEARED FAULT1 PROTECTION MODE • • • • INTEGRATED INTVCC POWER SUPPLY OFF FLT1 LOW TG1 HIGH GATE1 LOW INTVCC > 5.7V (TYPICAL) AND CTRL1 > 0.2V (TYPICAL) AND PWM1 = HIGH AND SS1 < 0.2V AND OVLO < 1.25V FAULT2 PROTECTION MODE: SS1 CHARGED UP SOFT-START MODE • SS1 CHARGED UP BY THE 25µA CURRENT SOURCE • FLT1 HIGH • TG1 LOW • GATE1 SWITCHING TO RAMP UP OUTPUT LED CURRENT FAULT2 • SS1 CHARGED UP BY THE 25µA CURRENT SOURCE • FLT1 LOW • TG1 HIGH • GATE1 LOW SS1 > 1.7V (TYPICAL) FAULT2 PROTECTION MODE: SS1 DISCHARGED CONDITION1 • • • • SS1 DISCHARGED BY A 2.5µA CURRENT SOURCE FLT1 LOW TG1 HIGH GATE1 LOW 3797 F05 SS1 > 1.7V (TYPICAL) NORMAL OPERATION MODE FAULT2 • NORMAL OPERATION NOTES: FAULT1 = VIN > 41V (TYPICAL) OR OVER TEMPERATURE (TJ > 165°C) FAULT2 = VIN > 41V (TYPICAL) OR OVER TEMPERATURE (TJ > 165°C) OR INTVCC < 5.2V (TYPICAL) OR OVLO > 1.25V OR OUTPUT OVER CURRENT CONDITION1 = FAULT2 CLEARED AND CTRL1 > 0.2V (TYPICAL) AND PWM1 = HIGH AND SS1 < 0.2V Figure 5. State Diagram of the Soft-Start and Fault Protection of Channel 1 Rev C For more information www.analog.com 17 LT3797 APPLICATIONS INFORMATION The LT3797 fault protection can be configured as the latch-off mode by connecting a 470k resistor between the SS pin and VREF pin. The FAULT2 conditions (see Figure 4) cause the LT3797 latch off. The LT3797 does not retry a soft-start even if the fault condition is cleared, since the SS pin is not able to fall below 0.2V by the 2.5µA pulldown current to reset the latch, due to the pulling up of the 470k resistor. The latch-off can only be cleared by toggling the EN/UVLO pin low to high. The open-LED fault and the output overvoltage fault are not included in FAULT2 in Figure 5. These two faults do not affect the soft-start status. The open-LED fault in channel 1 causes FLT1 low. The output overvoltage fault in channel  1 causes FLT1 low and TG1 high to disconnect the LED load from power path. of different topologies in continuous conduction mode (CCM) are: V –V DBOOST = LED IN VLED V DBUCK = LED VIN DBUCK-BOOST = VLED VLED + VIN VLED D SEPIC = VLED + VIN The maximum duty cycle (DMAX) occurs when the converter has the minimum input voltage (VIN(MIN)). APPLICATION CIRCUIT DESIGN GUIDELINE Inductor Selection The LT3797 contains three independent switching regulators. The following sections describe the LT3797 LED driver design guideline for the key parameters calculation and external components selection. The design guideline applies to each of the switching regulators. Figure 6 shows a typical inductor current waveform when the LED driver has maximum output current at the minimum input voltage. ∆IL and IL_AVG(MAX) denote the inductor ripple current and the maximum average inductor current respectively. Switch Duty Cycle The LT3797 can be configured with different topologies. The boost LED driver is used for the applications where the LED voltage is higher than the input voltage. The LT3797 can be configured as a buck mode LED driver for the applications where the LED voltage is lower than the input voltage. The buck-boost mode and the SEPIC LED driver allow for the input voltage to be higher, equal to or lower than the LED voltage. The switch duty cycles ∆IL IL IL_AVG(MAX) IL(PEAK) t 3739 F06 Figure 6. A Typical Inductor Waveform Rev C 18 For more information www.analog.com LT3797 APPLICATIONS INFORMATION The IL_AVG(MAX) of boost, buck mode, and buck-boost mode LED drivers in CCM are: IL _ AVG(MAX)_ BUCK = ILED(MAX) IL _ AVG(MAX)_ BOOST = ILED(MAX) • 1 1– DMAX IL _ AVG(MAX)_ BUCK-BOOST = ILED(MAX) • 1 1– DMAX The user should choose an appropriate ∆IL based on the trade-offs to optimize the LED driver performance. It is recommended that the ripple current percentage fall within the range of 20% to 60% at DMAX. Given an operating input voltage range, and having chosen the operating frequency, f, and ripple current ∆IL in the inductor, the inductor values of the boost, buck mode, and buck-boost mode LED drivers can be determined using the following equations: The primary and secondary maximum average inductor current of the SEPIC LED driver are: I L1_ AVG(MAX)_ SEPIC = ILED(MAX) • L BUCK = DMAX VLED ∆IL • f L BOOST = 1– DMAX I L2 _ AVG(MAX)_ SEPIC = ILED(MAX) ( • 1– DMAX) VIN(MIN) ∆IL • f L BUCK-BOOST = ) • DMAX VIN(MIN) ∆IL • f • DMAX where ILED(MAX) is the maximum LED current. The inductor ripple current ∆IL has a direct effect on the choice of the inductor value. Choosing smaller values of ∆IL requires large inductances and reduces the current loop gain (the converter will approach voltage mode). Accepting larger values of ∆IL provides fast transient response and allows the use of low inductances, but results in higher input current ripple and greater core losses. The primary and secondary inductor values of the SEPIC LED driver are: The inductor ripple percentage of the boost, buck mode, and buck-boost mode LED drivers is: IL(MAX) For the SEPIC converter, ∆IL of the primary inductor is equal to ∆IL of the secondary inductor. The inductor ripple percentage can be calculated as: 2 • ∆IL IL1(MAX) + IL2(MAX) VIN(MIN) ∆IL • f • DMAX By making L1 = L2, and winding them on the same core, the value of inductance in the preceding equation is replaced by 2L, due to mutual inductance: ∆IL L1= L2 = L= VIN(MIN) 2 • ∆IL • f • DMAX The inductor peak current and RMS current in continuous mode operation can be calculated based on IL(MAX) and ∆IL. IL(PEAK) = IL(MAX) + 0.5 • ∆IL IL(RMS) ≈ IL(MAX) Based on the preceding equations, the user should choose the inductors having sufficient saturation and RMS current ratings. Rev C For more information www.analog.com 19 LT3797 APPLICATIONS INFORMATION Switch Current Sense Resistors Selection Sense Voltage Ripple Verification The LT3797 measures each channel’s power N-channel MOSFET current by using a sense resistor (see RSW_SEN in Figure 1) between GND and the MOSFET source. Figure 7 shows a typical waveform of the sense voltage (VSW_ SENSE) across the sense resistor in CCM. The placement of the sense resistor RSW_SEN should be close to the source of the MOSFET and GND. The SENSEP and SENSEN sense node traces should run parallel to each other to a Kelvin connection on the positive and negative terminals of RSW_SEN. After the inductor ripple current and the switch current sense resistor value have been selected according to the previous sections, the sense voltage ripple ∆VSW_SENSE (refer to Figure 7) of the boost, buck, and buck-boost LED drivers can be determined using the following equation: Due to the current limit function of the power switch current control, RSW_SEN should be selected to guarantee that the peak current sense voltage VSW_SENSE(PEAK) during steady-state normal operation is lower than the SENSE current limit threshold (100mV minimum). It is recommended to give a 20% margin and set VSW_SENSE(PEAK) to be 80mV. Then, the switch current sense resistor value can be calculated as: R SW _ SEN = 80mV ISW(PEAK) where ISW(PEAK) is the peak switch current. ISW(PEAK) of the boost, buck mode and buck-boost mode LED driver is: ∆VSW_SENSE = ∆IL • RSW_SEN ∆VSW_SENSE of the SEPIC LED driver can be determined using the following equation: ∆VSW_SENSE = 2 • ∆IL • RSW_SEN The LT3797 has internal slope compensation to stabilize the control loop against sub-harmonic oscillation. When the LT3797 operates at a duty cycle greater than 0.66 in CCM, the sense voltage ripple, ∆VSW_SENSE (refer to Figure 7), needs to be limited to ensure the internal slope compensation is sufficient to stabilize the control loop. Figure 8 shows the maximum ∆VSW_SENSE over the duty cycle. It is recommended to check and ensure ∆VSW_ SENSE is below this curve at the highest duty cycle. If ∆VSW_SENSE is above the maximum ∆VSW_SENSE curve at the highest duty cycle, the ∆IL needs to be reduced and the parameters in the previous two sections need to be recalculated until the optimized values are obtained. ISW(PEAK) = IL(PEAK) 110 100 ISW(PEAK) of the SEPIC LED driver is: 90 MAX ∆VSW_SENSE (mV) ISW(PEAK) = IL1(PEAK) + IL2(PEAK) ∆VSW_SENSE VSW_SENSE 80 70 60 50 40 30 20 10 VSW_SENSE(PEAK) 0 0.5 0.55 0.6 0.65 0.7 0.75 0.8 0.85 0.9 0.95 DUTY CYCLE t D/f 3797 F07 1/f Figure 7. The Sense Voltage Across the Sense Resistor in CCM 3797 F08 Figure 8. The Maximum Sense Voltage Ripple vs Duty Cycle for CCM Rev C 20 For more information www.analog.com LT3797 APPLICATIONS INFORMATION Power MOSFET Selection The selection criteria for the power MOSFET includes the drain-source breakdown voltage (BVDSS), the threshold voltage (VGS(TH)), the on-resistance (RDS(ON)), the total gate charge (QG), the maximum drain current (ID(MAX)) and the MOSFET ’s thermal resistances (RθJC and RθJA), etc. The required power MOSFET BVDSS rating of different topologies can be estimated using the following equations. Add a diode forward voltage, and any additional ringing across its drain-to-source during its off-time. BVDSS_BOOST > VLED BVDSS_BUCK > VIN(MAX) BVDSS_BUCK-BOOST > VIN(MAX) + VLED BVDSS_SEPIC > VIN(MAX) + VLED The power dissipated by the MOSFET in a boost, buck mode, or buck-boost mode LED driver is: PFET = IL(MAX)2 • RDS(ON) • DMAX + 2 • VSW(PEAK) • IL(MAX) • CRSS • f/1.5A The power dissipated by the MOSFET in a SEPIC LED driver is: PFET = (IL1(MAX) + IL2(MAX))2 • RDS(ON) • DMAX + 2 • VSW(PEAK) • (IL1(MAX) + IL2(MAX)) • CRSS • f/1.5A The first terms in the preceding equations represent the conduction losses in the devices, and the second terms, the switching losses. CRSS is the reverse transfer capacitance, which is usually specified in the MOSFET characteristics. For maximum efficiency, RDS(ON) and QG should be minimized. From a known power dissipated in the power MOSFET, its junction temperature can be obtained using the following equation: TJ = TA + PFET • θJA = TA + PFET • (θJC + θCA) TJ must not exceed the MOSFET maximum junction temperature rating. It is recommended to measure the MOSFET temperature in steady state to ensure that absolute maximum ratings are not exceeded. Schottky Rectifier Selection The power Schottky diode conducts current during the interval when the switch is turned off. In an LT3797 LED driver, the Schottky diode should have the same voltage rating as the power N-channel MOSFET in the same channel. Refer to the power MOSFET BVDSS rating in the previous section for the peak reverse voltage rating selection. If using the PWM feature for dimming, it is important to consider diode leakage, which increases with the temperature, from the output during the PWM low interval. Choose a Schottky diode with sufficiently low leakage current. The power dissipated by the diode in a boost, buck, or buck-boost converter in CCM is: PD = IL_AVG(MAX) • VD • (1 – DMAX) where VD is the diode forward voltage drop. The power dissipated by the diode in a SEPIC converter is: PD = (IL1_AVG(MAX) + IL2_AVG(MAX)) • VD • (1 – DMAX) and the diode junction temperature is: TJ = TA + PD • (θJC + θCA) TJ must not exceed the diode maximum junction temperature rating. Rev C For more information www.analog.com 21 LT3797 APPLICATIONS INFORMATION High Side PMOS Disconnect Switch Selection Output Capacitor Selection A PMOS with a minimum VGS(TH) of –1V to –2V is recommended for the high side disconnect switch in most LT3797 applications to improve the PWM dimming ratio and protect the LED array from excessive heating during fault conditions. The PMOS BVDSS rating must be higher than the open-LED regulation voltage set by the FBH pin. The maximum continuous drain current ID(MAX) rating should be higher than the maximum LED current. The output filter capacitors should be sized to attenuate the LED current ripple. Use of X5R or X7R type ceramic capacitors is recommended. To achieve the same LED ripple current, the required filter capacitor is smaller in the buck mode applications than that in the boost, buck-boost mode and SEPIC applications. This is due to the fact that, in the buck converter, the inductor is in series with the output and the ripple current flowing through the output capacitor is continuous. Lower operating frequencies will require proportionately higher capacitor values. Input Capacitor Selection The input capacitor CIN supplies the AC ripple current to the power inductor of the converter and must be placed and sized according to the transient current requirements. The switching frequency, output current and tolerable input voltage ripple are key inputs to estimating the required capacitor value. The X5R or X7R type ceramic capacitors are usually good choices since they have small variation with temperature and DC bias. Typically, the boost or SEPIC converter requires a lower value input capacitor than the buck mode or buck-boost mode converter, due to the fact that its inductor is in series with the input, and the input current waveform is continuous. The input capacitor value can be estimated based on the inductor ripple ∆IL (refer to Inductor Selection section), the switching frequency, and the acceptable input voltage ripple ∆VIN on CIN. CIN value of the boost and SEPIC converter can be calculated by: CIN = 0.125 • ∆IL ( VLED • VIN(MIN) – VLED VIN(MIN)2 • ∆VIN • f The DC voltage rating of the DC coupling capacitor, CDC, connected between the primary and secondary inductors should be larger than the maximum input voltage: VCDC > VIN(MAX) CDC has nearly a rectangular current waveform in CCM. During the switch off-time, the current through CDC is IVIN, while approximately –ILED flows during the on-time. The CDC voltage ripple causes distortions on the primary and secondary inductor current waveforms. The CDC should be sized to limit its voltage ripple. The power loss on the CDC ESR reduces the LED driver efficiency. Therefore, the sufficient low ESR ceramic capacitors should be selected. The X5R or X7R ceramic capacitor is recommended for CDC. Integrated INTVCC Power Supply ∆VIN • f CIN value of the buck mode and buck-boost mode LED driver can be calculated by: CIN = ILED • The DC Coupling Capacitor Selection for SEPIC LED Driver ) The LT3797 includes an internal switch mode DC/DC converter to generate a regulated 7.5V INTVCC power supply to power the NMOS gate drivers of the three channels (IDRIVE). This INTVCC power supply can also be used to drive external circuits (IEXT). This INTVCC power supply Rev C 22 For more information www.analog.com LT3797 APPLICATIONS INFORMATION • CVCC is a 10μF/10V ceramic capacitor used to bypass INTVCC to GND immediately adjacent to the pins. • CBOOST is a 0.1μF/10V ceramic capacitor connected between the BOOST pin and the SW1 pin. • Select a 47µH inductor with the saturation current rating of 0.6A or greater and RMS current rating of 0.4A or greater for LPWR. The INTVCC power supply has an output current limit function to protect itself from excessive electrical and thermal stress. Figure 9 shows the INTVCC output limit (IINTVCC_ LMT) vs VIN and switching frequency. Make sure the sum of the IDRIVE and IEXT is always lower than the IINTVCC_LMT across the whole VIN range of the application circuit: IDRIVE + IEXT < IINTVCC_LMT where: 250 INTVCC CURRENT LIMIT IINTVCC_LMT (mA) has two major advantages over the traditional internal LDO regulators. It is able to generate 7.5V INTVCC voltage from a VIN voltage as low as 2.5V, allowing the LT3797 to drive high threshold MOSFETs in the low VIN applications. It is also able to deliver large current from a VIN voltage as high as 40V without overheating the package, due to its high efficiency (over 70% at full load). This integrated DC/DC converter requires three external components (CVCC, CBOOST and LPWR) for operation, as shown in Figure 1. Select these three components based on the following guidelines: 800kHz 700kHz >900kHz 225 200 175 600kHz 150 500kHz 400kHz 125 300kHz 100 75 200kHz 50 100kHz 25 0 0 3 6 9 12 15 18 21 24 27 30 33 36 39 VIN (V) 3739 F09 Figure 9. INTVCC Current Limit vs VIN, fSW Board Layout The high speed operation of the LT3797 demands careful attention to board layout and component placement. The exposed pad of the package is the only GND terminal of the IC, and is important for thermal management of the IC. Therefore, it is crucial to achieve a good electrical and thermal contact between the exposed pad and the ground planes of the board. For the LT3797 to deliver its full output power, it is imperative that a good thermal path be provided to dissipate the heat generated within the package. It is recommended that multiple vias in the printed circuit board be used to conduct heat away from the IC and into copper planes with as much area as possible. IDRIVE = (QG_CH1 + QG_CH2 + QG_CH3) • fSW QG_CH1-3 is the total gate charge of the NMOS of the three channels at VGS = 0V to 7.5V. Rev C For more information www.analog.com 23 LT3797 APPLICATIONS INFORMATION Due to the highly compact integration of the three switching channels within the LT3797, careful consideration must be given to possible noise coupling between channels. To reduce noise coupling, the compensation network components connected to the VC1-3 pins and the DC control signal components connected to the SS1-3, RT, EN/UVLO, and CTRL1-3 pins must be connected to signal ground (SGND). The signal ground (SGND) and power ground (PGND) connection should only occur at the LT3797 exposed GND pad. Further, board traces for high impedance signals such as FBH1-3 and VC1-3 should be kept to the shortest length possible to avoid unwanted noise pick up. Also, the decoupling capacitors that connect VIN to PGND and INTVCC to PGND should be physically located close to their respective pins. Finally, for high voltage and/or high current applications, an effective approach to attenuate possible switch noise coupling into each channel’s control loop is to add a small footprint size 0.1µF ceramic capacitor between each SENSEP pin and the corresponding SENSEN pin. When used, these noise filtering capacitors should be physically located near their respective pins. Figure 10 provides an example of a PCB layout of the LT3797 (QFN), decoupling capacitors, compensation networks and ground separation. To reduce electromagnetic interference (EMI) and high frequency resonance problems, proper layout of the LT3797 LED driver power stage is essential, especially the power paths with high di/dt. Figure 11-14 show the simplified power stage circuits of boost, buck mode, buck-boost mode and SEPIC topologies with the high di/dt loops highlighted. The high di/dt loops of different topologies should be kept as tight as possible to reduce inductive ringing. Figure 15-16 shows the examples of the high di/dt loop layout of the different topologies shown in Figure 11-14. VIN PGND C C RSW_SEN3 SS3 PGND C SGND C 3 SENSEP3 2 SENSEN3 1 INTVCC VIN INTVCC 52 51 50 49 48 47 46 45 44 43 42 41 40 VC3 R C R C 38 37 4 5 36 53 EXPOSED PAD GND 6 35 7 30 14 15 16 17 SS1 12 SENSEN2 11 RT SENSEP2 31 SENSEP1 32 10 SENSEN1 33 VC1 R SGND 8 9 28 VC2 27 SS2 19 20 21 22 23 24 25 26 C 3797 F10 C SGND C R RSW_SEN1 C RSW_SEN2 C SGND Figure 10. Decoupling Capacitors and Ground Separation Rev C 24 For more information www.analog.com LT3797 APPLICATIONS INFORMATION L D SW L1 M + – SW2 D M + – C VIN R L2 VIN 3797 F11 LED STRING 3797 F14 PGND Figure 11. The Simplified Boost LED Driver Power Stage with the High di/dt Loop Highlighted Figure 14. The Simplified SEPIC LED Driver Power Stage with the High di/dt Loop Highlighted LED STRING SW L SW C1 R LED STRING PGND D C2 SW1 D M M + – VIN C R PGND R C 3797 F12 3797 F15 Figure 12. The Simplified Buck Mode LED Driver Power Stage with the High di/dt Loop Highlighted PGND Figure 15. A Layout Example of the High di/dt Loop of the Boost, Buck Mode, Buck-Boost Mode LED Drivers LED STRING SW2 SW1 C2 L D SW D M + – M C VIN R R C1 3797 F13 PGND Figure 13. The Simplified Buck-Boost Mode LED Driver Power Stage with the High di/dt Loop Highlighted 3797 F16FF PGND Figure 16. A Layout Example of the High di/dt Loop of the SEPIC Drivers Rev C For more information www.analog.com 25 LT3797 APPLICATIONS INFORMATION Check the stress on the power MOSFETs by measuring the drain-to-source voltage directly across the terminals of each device (reference the ground of a single scope probe directly to the source pad on the PC board). Beware of inductive ringing, which can exceed the maximum specified voltage rating of the MOSFET. If this ringing cannot be avoided, and exceeds the maximum rating of the device, either choose a higher voltage device or specify an avalanche rated power MOSFET. The LT3797 LED driver circuit can be implemented in a 2-layer PCB board. However, a well designed 4-layer or 6-layer PCB board provides extra ground plane shielding and larger area of electrical and thermal conduction path, therefore provides better electrical and thermal performance. Recommended Component Manufacturers Some of the recommended component manufacturers are listed in Table 3. Table 3. Recommended Component Manufacturers VENDOR COMPONENTS WEB ADDRESS AVX Capacitors avx.com BH Electronics Inductors, Transformers bhelectronics.com Central Semiconductor Diodes centralsemi.com Coilcraft Inductors coilcraft.com Coiltronics Inductors cooperindustries.com Diodes, Inc MOSFETs, Diodes diodes.com Fairchild MOSFETs, Diodes fairchildsemi.com International Rectifier MOSFETs, Diodes irf.com IRC Sense Resistors irctt.com Kemet Capacitors kemet.com Murata Inductors, Capacitors murata.com Nichicon Capacitors nichicon.com On Semiconductor MOSFETs, Diodes onsemi.com Panasonic, Industrial Capacitors, Resistors panasonic.com Sumida Inductors sumida.com Taiyo Yuden Inductors, Capacitors t-yuden.com TDK Inductors, Capacitors component.tdk.com United Chemicon Electrolytic Capacitors chemi-con.com Vishay MOSFETs, Diodes, Inductors, Capacitors, Sense Resistors vishay.com Würth-Midcom Inductors katalog.we-online.de Rev C 26 For more information www.analog.com LT3797 TYPICAL APPLICATIONS Triple Boost LED Driver VIN 2.5V TO 40V (60V TRANSIENT, 41V INTERNAL OVLO PROTECTION) CIN1-3 4.7µF ×3 L1 10µH L2 10µH D1 COUT1 4.7µF 100V ×3 ISP1 R2 250mΩ L3 10µH D2 ISP2 R4 250mΩ ISN1 M2 D4* VLED1+ R7 100k CIN3 1µF GATE1 SENSEP1 VIN 1A 50V SENSEN1 TG1 0.1µF (OPTIONAL) GATE2 SENSEP2 M5 1A 50V R3 8mΩ SENSEN2 TG2 GATE3 SENSEP3 VIN 1M SYNC RT 47.5k 310kHz 140k SS1-3 FLT1-3 SS1-3 CSS1-3 0.1µF SW1 SW2 FLT1-3 100k ISN1-3 ISP1-3 R9-R11 23.2k GND VC1-3 INTVCC CVCC 10µF CBST 0.1µF RC1-3 3.9k CC1-3 6.8nF R12-R14 1M *D4-6: OPTIONAL FOR SHORT LED PROTECTION **RSS1-3: OPTIONAL FOR FAULT LATCHOFF 1.4 1.2 OUTPUT CURRENT 1.0 70 0.8 65 0.6 60 0.4 55 0.2 20 25 VIN (V) 30 35 OUTPUT CURRENT (A) 85 15 PWM 5V/DIV 1.6 80 10 INTVCC 500:1 PWM Dimming at 120Hz 1.8 EFFICIENCY 5 BOOST 2.0 90 EFFICIENCY (%) SENSEN3 TG3 3797 TA02 VREF PWM1-3 = 2V 75 LPWR 47µH INTVCC RSS1-3** 470k Efficiency and Output Current vs VIN 0 1A 50V R5 8mΩ FBH1-3 CTRL1-3 PWM1-3 RT OVLO VREF D1-D3: DIODES INC. PDS360 D4-D6: VISHAY SILICONIX ES1B L1-L3: COILTRONICS HC9-100-R LPWR: COILTRONICS SD25-470 M1, M3, M5: INFINEON BSC039N06NS M2, M4, M6: VISHAY SILICONIX Si7113DN 50 0.1µF (OPTIONAL) EN/UVLO VREF 95 ISN3 M6 D6* VLED3+ LT3797 R8 105k 100 R6 250mΩ M3 R1 8mΩ COUT3 4.7µF 100V ×3 ISP3 ISN2 M4 D5* VLED2+ M1 0.1µF (OPTIONAL) D3 COUT2 4.7µF 100V ×3 IL 5A/DIV ILED 1A/DIV VIN = 12V 5µs/DIV 3797 TA02c 0 40 3797 TA02b Fault (Short LED) Protection without RSS1-3: Hiccup Mode Fault (Short LED) Protection with RSS1-3: Latchoff Mode SS1-3 2V/DIV SS1-3 2V/DIV IM2,4,6 10A/DIV IM2,4,6 10A/DIV VLED1-3+ 50V/DIV VLED1-3+ 100V/DIV FLT1-3 10V/DIV FLT1-3 10V/DIV 50ms/DIV 3797 TA02d 50ms/DIV 3797 TA02e Rev C For more information www.analog.com 27 LT3797 TYPICAL APPLICATIONS 3V to 5V Input, Triple Boost LED Driver VIN 3V TO 5V CIN1-3 47µF ×3 L1 1.0µH L2 1.0µH D1 L3 1.0µH D2 COUT1 22µF ISP1 ISP2 0.125Ω ISN1 0.1µF (OPTIONAL) CIN4 10µF GATE1 SENSEP1 VIN ISP3 ISN2 M3 0.1µF (OPTIONAL) R1 0.01Ω GATE2 SENSEP2 59k ISN3 M6 M5 2A 8V 0.1µF (OPTIONAL) R3 0.01Ω SENSEN2 TG2 GATE3 SENSEP3 TG3 ISN1-3 ISP1-3 SENSEN3 80.6k LT3797 FBH1-3 OVLO VREF CTRL1-3 PWM1-3 RT SYNC RT 12.4k 1MHz 22.6k D1-D3: VISAHY SILICONIX 30BQ015 L1-L3: VISAHY SILICONIX IHLP-2525CZ-01 LPWR: COILTRONICS SD25-470 M1, M3, M5: INFINEON BSC050N03LSG M2, M4, M6: VISHAY SILICONIX Si7619DN SS1-3 FLT1-3 SW1 SW2 INTVCC GND VC1-3 499k 4.7k 10µF 0.1µF 10nF 3797 TA03 1000:1 PWM Dimming at 120Hz CTRL1-3 = 2V PWM1-3 = 2V 95 BOOST LPWR 47µH 0.1µF Efficiency vs VIN 100 EFFICIENCY (%) 2A 8V R5 0.01Ω EN/UVLO 30.1k COUT3 22µF 0.125Ω M4 2A 8V SENSEN1 TG1 COUT2 22µF 0.125Ω M2 M1 D3 PWM 5V/DIV 90 IL 5A/DIV 85 ILED 2A/DIV 80 75 70 2µs/DIV 3 3.5 4 VIN (V) 4.5 3797 TA03c 5 3797 TA03b Rev C 28 For more information www.analog.com LT3797 TYPICAL APPLICATIONS Triple Buck Mode LED Driver PVIN 24V TO 80V CIN1-3 4.7µF ×3 ISP1 1M 0.25Ω OVLO 14.3k CIN4 4.7µF COUT1 4.7µF 20k 348k FBH1 M1 GATE1 SENSEP1 VIN TG3 LED1+ 1A 20V 1A 20V COUT2 4.7µF 20k 348k FBH2 D2 D1 0.068Ω L2 33µH SENSEN1 M5 0.1µF (OPTIONAL) SENSEN2 0.1µF (OPTIONAL) SENSEP2 GATE2 GATE3 SENSEP3 SENSEN3 TG1-3 ISN1-3 LT3797 ISP1-3 FBH1-3 OVLO VREF CTRL1-3 PWM1-3 OVLO D1-D3: VISHAY SILICONIX VS-10BQ100 L1-L3: WÜRTH 74437349330 LPWR: COILTRONICS SD25-470 M1, M3, M5: VISHAY SILICONIX Si4100DY M2, M4, M6: VISHAY SILICONIX Si7113DN RT SYNC SS1-3 35.7k 400kHz FLT1-3 SW1 SW2 LPWR 47µH 0.1µF BOOST 0.1µF INTVCC GND VC1-3 10k 10µF 10nF 3797 TA04 Efficiency vs PVIN 1000:1 PWM Dimming at 120Hz CTRL1-3 = 2V PWM1-3 = 2V 95 D3 0.068Ω EN/UVLO 100 COUT3 4.7µF 20k 348k FBH1 L3 22µH M3 0.068Ω 200k 43.2k EFFICIENCY (%) M6 LED1+ 1A 20V 12V TG2 M4 LED1+ 0.1µF (OPTIONAL) ISN3 ISN2 M2 L1 33µH 0.25Ω 0.25Ω ISN1 TG1 ISP3 ISP2 PWM 5V/DIV 90 IL1 1A/DIV 85 ILED 1A/DIV 80 75 70 VIN = 48V 20 30 40 50 60 PVIN (V) 70 2µs/DIV 3797 TA04c 80 3797 TA04b Rev C For more information www.analog.com 29 LT3797 TYPICAL APPLICATIONS Triple Buck Mode LED Driver for Common Anode LEDs CIN1-3 22µF ×6 LED1 RED 34k FBH1 VIN –15V TO –9V* 5A ISP3 0.05Ω TG1 ISN2 COUT2 22µF ×2 M4 0.1µF (OPTIONAL) CIN4 10µF ISN3 COUT3 22µF ×2 M6 TG3 L3 4.7µH L2 4.7µH D1 D2 0.01Ω M5 M3 0.1µF (OPTIONAL) 0.01Ω VIN GATE1 SENSEP1 VIN 0.05Ω TG2 L1 4.7µH M1 5A 20k ISP2 0.05Ω ISN1 COUT1 22µF ×2 M2 75k FBH3 20k ISP1 LED3 BLUE FBH2 20k 5A LED2 GREEN 75k 0.1µF (OPTIONAL) 0.01Ω VIN SENSEN1 VIN SENSEN2 SENSEP2 GATE2 GATE3 SENSEP3 SENSEN3 LT3797 ISP1-3 EN/UVLO 18.7k FBH1-3 OVLO CTRL1-3 VREF PWM1-3 RT SYNC SS1-3 35.7k 400kHz 17.3k 8.45k VIN TG1-3 ISN1-3 200k VIN D3 SW1 SW2 LPWR 47µH 0.1µF 10k RT1 NTC 10k BOOST INTVCC GND VC1-3 4.7k INTVCC 10nF 10µF 0.1µF 3797 TA05 Q1 VIN INTVCC FLT1-3 VIN 10k PWMIN1-3 VIN D1-D3: ON SEMICONDUCTOR MBRB2515L L1-L3: WÜRTH 7443310470 LED1-LED3: LUMINUS PT39 LPWR: COILTRONICS SD25-470 M1, M3, M5: VISHAY SILICONIX Si4174DY M2, M4, M6: INFINEON BSC130P03LS Q1: DIODES INC. FMMTL718 RT1: MURATA NCP15XH103J03RC *NEGATIVE INPUT VOLTAGE IS NECESSARY BECAUSE THE COMMON ANODES OF THE LEDS OF THIS APPLICATION NEED TO BE CONNECTED TO GND Efficiency vs VIN 100 1000:1 PWM Dimming at 120Hz PWMIN1-3 = 5V PWM 5V/DIV EFFICIENCY (%) 95 90 IL1 5A/DIV 85 ILED 5A/DIV 80 75 70 –15 VIN = –12V –14 –13 –12 –11 VIN (V) –10 5µs/DIV 3797 TA05c –9 3797 TA05b Rev C 30 For more information www.analog.com LT3797 TYPICAL APPLICATIONS Wide Input Range, Triple Buck-Boost LED Driver VIN 2.5V TO 40V (60V TRANSIENT, 41V INTERNAL OVLO PROTECTION) 4.7µF ×3 L1 22µH 1A L2 24V 22µH 1A L3 24V 22µH 562k 562k 4.7µF M2 FBH1 4.7µF M4 1µF 1µF M3 SENSEN1 ISP3 1µF 0.1µF (OPTIONAL) M5 0.1µF (OPTIONAL) 0.015Ω SENSEP1 GATE1 SENSEN2 0.1µF (OPTIONAL) 0.015Ω SENSEP2 GATE2 SENSEN3 VIN SENSEP3 GATE3 TG1-3 ISN1-3 47.5k 1µF 0.25Ω D3 ISP2 ISP1 M1 TG3 ISN3 24.9k 0.25Ω D2 4.7µF M6 FBH3 TG2 ISN2 24.9k 0.25Ω D1 562k FBH2 TG1 ISN1 24.9k 0.015Ω 1A 24V LT3797 ISP1-3 EN/UVLO 49.9k FBH1-3 OVLO VREF CTRL1-3 PWM1-3 VIN 357k RT SYNC SS1-3 RT 35.7k 400kHz 75k FLT1-3 SW1 SW2 LPWR 47µH 0.1µF BOOST 0.1µF INTVCC GND 10µF VC1-3 2k 10nF 3797 TA06 D1-D3: DIODES INC. PDS5100 L1-L3: COILTRONICS HC9-220R LPWR: COILTRONICS SD25-470 M1, M3, M5: INFINEON BSC160N10NS3G M2, M4, M6: VISHAY SILICONIX Si4401BDY Efficiency and Output Current vs VIN 100 2.2 PWM1-3 = 2V EFFICIENCY 1.4 80 OUTPUT CURRENT 70 1.0 60 0.6 0 5 10 15 20 25 PWM 5V/DIV 1.8 30 35 40 OUTPUT CURRENT (A) EFFICIENCY (%) 90 50 1000:1 PWM Dimming at 120Hz IL1 1A/DIV ILED 1A/DIV VIN = 24V 2µs/DIV 3797 TA06c 0.2 VIN (V) 3797 TA06b Rev C For more information www.analog.com 31 LT3797 TYPICAL APPLICATIONS Triple SEPIC LED Driver L1A CDC1 4.7µF 50V • COUT1 4.7µF L2A • ×2 ISP1 D1 CDC2 4.7µF 50V 0.25Ω L1B COUT2 4.7µF ×2 ISP2 D2 • CIN1-3 4.7µF ×3 0.25Ω L3B ISN3 M6 M5 • M3 SENSEN1 COUT3 4.7µF ×2 ISP3 D3 M4 M1 CIN4 1µF • ISN2 M2 1A 24V 0.015Ω 0.1µF (OPTIONAL) CDC3 4.7µF 50V 0.25Ω L2B ISN1 0.015Ω L3A • VIN 2.5V TO 40V (60V TRANSIENT, 41V INTERNAL OVLO PROTECTION) SENSEP1 GATE1 TG1 1A 24V 0.1µF (OPTIONAL) SENSEN2 SENSEP2 GATE2 TG2 1A 24V 0.1µF (OPTIONAL) 0.015Ω SENSEN1 VIN SENSEP1 GATE1 TG1 ISN1-3 ISP1-3 47.5k LT3797 24.9k EN/UVLO 49.9k FBH1-3 VREF CTRL1-3 PWM1-3 OVLO VIN RT SYNC SS1-3 RT 35.7k 400kHz 487k FLT1-3 0.1µF SW1 SW2 LPWR 47µH BOOST 0.1µF INTVCC GND VC1-3 2k 10µF 562k 10nF 75k 3797 TA07 D1-D3: ON SEMICONDUCTOR MBRS3100 L1-L3: WÜRTH ELEKTRONIK 744870220 LPWR: COILTRONICS SD25-470 M1, M3, M5: INFINEON BSC160N10NS3G M2, M4, M6: VISHAY SILICONIX Si4401BDY Efficiency and Output Current vs VIN 100 2.00 PWM1-3 = 2V 95 1.75 EFFICIENCY EFFICIENCY (%) 85 1.25 OUTPUT CURRENT 1.00 75 0.75 70 0.50 65 0.25 60 0 5 10 15 20 25 30 35 40 PWM 5V/DIV OUTPUT CURRENT (A) 1.50 90 80 1000:1 PWM Dimming at 120Hz IL1A+IL1B 2A/DIV ILED 1A/DIV VIN = 24V 2µs/DIV 3797 TA07c 0 VIN (V) 3797 TA07b Rev C 32 For more information www.analog.com LT3797 PACKAGE DESCRIPTION Please refer to http://www.linear.com/product/LT3797#packaging for the most recent package drawings. UKG Package Variation UKG52(47) 52-Lead Plastic QFN (7mm × 8mm) (Reference LTC DWG # 05-08-1874 Rev Ø) 7.50 ±0.05 6.10 ±0.05 5.50 REF 52 41 0.70 ±0.05 40 1 5.70 ±0.05 6.50 REF 7.10 ±0.05 8.50 ±0.05 4.70 ±0.05 27 14 PACKAGE OUTLINE 15 26 0.25 ±0.05 0.50 BSC RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED TOP VIEW 52 51 50 49 7.00 ± 0.10 48 47 46 45 44 43 42 41 0.75 ± 0.05 0.00 – 0.05 PIN 1 TOP MARK (SEE NOTE 6) 1 41 R = 0.115 TYP 5.50 REF 52 0.40 ± 0.10 40 40 1 2 8.00 ± 0.10 3 38 4 37 5 36 6 35 7 8 33 9 32 10 31 11 30 PIN 1 NOTCH R = 0.30 TYP OR 0.35 × 45°C CHAMFER 5.70 ±0.10 6.50 REF 12 4.70 ±0.10 28 27 14 27 R = 0.10 TYP 0.200 REF 0.00 – 0.05 0.75 ± 0.05 15 16 17 19 20 21 22 23 24 25 14 26 15 0.25 ± 0.05 0.50 BSC BOTTOM VIEW—EXPOSED PAD (UKG52(47)) QFN REV Ø 0410 26 SIDE VIEW NOTE: 1. DRAWING IS NOT A JEDEC PACKAGE OUTLINE 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.20mm ON ANY SIDE, IF PRESENT 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE Rev C For more information www.analog.com 33 LT3797 PACKAGE DESCRIPTION Please refer to http://www.linear.com/product/LT3797#packaging for the most recent package drawings. LXE Package 48-Lead Plastic Exposed Pad LQFP (7mm × 7mm) (Reference LTC DWG #05-08-1927 Rev A) Exposed Pad Variation AA 7.15 – 7.25 5.50 REF 1 48 37 36 0.50 BSC C0.30 5.50 REF 7.15 – 7.25 0.20 – 0.30 4.15 ±0.05 4.15 ±0.05 12 13 PACKAGE OUTLINE 24 25 1.30 MIN RECOMMENDED SOLDER PAD LAYOUT APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED 9.00 BSC 7.00 BSC 48 4.15 ±0.10 37 SEE NOTE: 3 1 48 37 36 36 1 C0.30 9.00 BSC 7.00 BSC 4.15 ±0.10 A A 12 25 25 12 C0.30 – 0.50 13 24 13 BOTTOM OF PACKAGE—EXPOSED PAD (SHADED AREA) 24 11° – 13° 1.35 – 1.45 R0.08 – 0.20 1.60 MAX GAUGE PLANE 0.25 0° – 7° LXE48 (AA) LQFP 0416 REV A 11° – 13° 0.09 – 0.20 1.00 REF 0.50 BSC 0.17 – 0.27 0.05 – 0.15 SIDE VIEW 0.45 – 0.75 SECTION A – A NOTE: 1. DIMENSIONS ARE IN MILLIMETERS 2. DIMENSIONS OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.25mm (10 MILS) BETWEEN THE LEADS AND ON ANY SIDE OF EXPOSED PAD, MAX 0.50mm (20 MILS) AT CORNER OF EXPOSED PAD, IF PRESENT 3. PIN-1 INDENTIFIER IS A MOLDED INDENTATION, 0.50mm DIAMETER 4. DRAWING IS NOT TO SCALE Rev C 34 For more information www.analog.com LT3797 REVISION HISTORY REV DATE DESCRIPTION A 11/16 Clarified schematic Clarified Electrical Characteristics 5 9 Added LQFP Package Option Clarified VREF, LED Overcurrent Protection Electrical Characteristics Clarified EN/ULVO and OVLO Threshold Electrical Characteristics Clarified Pin Functions for LQFP Package Option C 05/18 3, 4, 5 Clarified SENSEN1 and SENSEP1 Pin Functions Clarified Typical Application schematics 09/17 1 Added Note 7 Clarified Applications Information B PAGE NUMBER 24 28 to 33, 36 1,2 3 4 9,10 Clarified Pin Numbers on Block Drawing 11 Added LQFP Package Option to Applications Information 24 Added LQFP Package Option Package Drawing 34 Corrected Block Diagram Oscillator Frequency Minimum Value from 50kHz to 100kHz 11 Rev C Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license For is granted implication or otherwise under any patent or patent rights of Analog Devices. more by information www.analog.com 35 LT3797 TYPICAL APPLICATION Dual Buck Mode LED Driver with a Boost Pre-Regulator L1 10µH VIN 2.5V TO 40V (60V TRANSIENT, 41V INTERNAL OVLO PROTECTION) VOUT1 REGULATED AT 20V WHEN VIN < 20V FOLLOWS VIN WHEN VIN > 20V D1 CIN 4.7µF 50V ×2 COUT1 4.7µF 50V ×4 ISP2 ISP3 0.25Ω 0.25Ω ISN2 TG2 M3 TG3 LED1+ COUT2 4.7µF 1A 50V 16V ×2 20k 274k L2 22µH FBH2 D2 ISN3 M5 COUT3 1A 4.7µF 16V 50V ×2 274k L3 22µH Efficiency and Output Current vs VIN 20k FBH3 D3 100 M2 0.012Ω 301k 0.068Ω VREF FBH1 0.1µF (OPTIONAL) 0.1µF (OPTIONAL) 0.1µF (OPTIONAL) EFFICIENCY 90 0.068Ω N/C CIN4 1µF GATE1 SENSEP1 VIN SENSEN1 TG1 ISP1 ISN1 PWM1 CTRL1 SENSEN2 SENSEP2 GATE2 GATE3 SENSEP3 SENSEN3 LT3797 ISP2-3 EN/UVLO 49.9k OVLO TG1-3 ISN2-3 49.9k 1.8 PWM1-3 = 2V M4 EFFICIENCY (%) 20k 1.4 OUTPUT CURRENT 80 1.0 70 0.6 OUTPUT CURRENT (A) M1 FBH1-3 VREF VIN CTRL2-3 PWM2-3 357k RT SYNC SS1-3 35.7k 400kHz 75k FLT1-3 SW1 SW2 0.1µF L4 47µH BOOST 0.1µF INTVCC GND 10µF VC1-3 4.7k 60 0 5 10 15 10nF 20 25 VIN (V) 30 35 40 0.2 3797 TA08b 3797 TA08 D1: VISHAY SILICONIX 12CWQ06FN D2, D3: VISHAY SILICONIX 30BQ060 L1: COILTRONICS HC9-100 L2, L3: WURTH 74437349220 L4: COILTRONICS SD25-470 M1: INFINEON BSC110N06NS3-G M2, M4: VISHAY SILICONIX Si4850EY M3, M5: VISHAY SILICONIX Si7415DN RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LT3476 Quad Output 1.5A, 2MHz High Current LED Driver with 1000:1 Dimming VIN: 2.8V to 16V, VOUT(MAX) = 36V, PWM Dimming =1000:1, ISD < 10μA, 5mm × 7mm QFN-10 Package LT3492 60V, 2.1MHz 3-Channel (ILED = 600mA) Full-Featured LED Driver VIN: 3V to 30V (40VMAX), VOUT(MAX) = 45V, PWM Dimming = 3000:1, ISD < 1μA, 4mm × 5mm QFN-28 and TSSOP Package LT3496 45V, 2.1MHz 3-Channel (ILED = 750mA) Full-Featured LED Driver VIN: 3V to 30V (40VMAX), VOUT(MAX) = 45V, PWM Dimming = 3000:1, ISD < 1μA, 4mm × 5mm QFN-28 and TSSOP Package LT3795 110V LED Controller with Spread Spectrum Frequency Modulation VIN: 4.5V to 110V, VOUT(MAX) = 110V, ISD < 10μA, TSSOP-28E Package LT3595 45V, 2MHz 16-Channel Full-Featured LED Driver VIN: 4.5V to 55V, VOUT(MAX) = 45V PWM Dimming = 5000:1, ISD < 1μA, 5mm × 9mm QFN-56 Package LT3596 60V Step-Down LED Driver VIN: 6V to 60V, PWM Dimming = 10000:1, ISD < 1μA, 5mm × 8mm QFN-52 Package LT3598 44V, 1.5A, 2.5MHz Boost 6-Channel LED Driver VIN: 3V to 30V (40VMAX), VOUT(MAX) = 44V, PWM Dimming = 1000:1, ISD < 1μA, 4mm × 4mm QFN-24 Package LT3599 2A Boost Converter with Internal 4-String 150mA LED Ballaster VIN: 3V to 30V, VOUT(MAX) = 44V, PWM Dimming = 1000:1, ISD < 1μA, 5mm × 5mm QFN-32 and TSSOP-28 Packages LT3754 16-Channel × 50mA LED Driver with 60V Boost Controller and PWM Dimming VIN: 6V to 40V, VOUT(MAX) = 45V, PWM Dimming = 3000:1, ISD < 1μA, 5mm × 5mm QFN-32 Package Rev C 36 D16874-0-5/18(C) www.analog.com For more information www.analog.com  ANALOG DEVICES, INC. 2013 to 2018
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