LT3840EFE#PBF

LT3840 Wide Input Range Synchronous Regulator Controller with Accurate Current Limit Description Features The LT®3840 is a high voltage synchronous step-down switching regulator controller capable of operating from a 2.5V to 60V supply. Wide Input Range: 2.5V to 60V n Integrated Buck-Boost Supply for 7.5V MOSFET Gate Drive n Programmable Constant-Current Operation with Current Monitor Output n Low I : 75µA, 12V to 3.3V Q IN OUT n Selectable Low Output Ripple Burst Mode® Operation n V OUT Up to 60V n Adjustable and Synchronizable: 50kHz to 1MHz n Internal OVLO Protects for Input Transients Up to 80V n Accurate Input Overvoltage and Undervoltage Threshold n Programmable Soft-Start with Voltage Tracking n Power Good and Output OVP n 28-Lead TSSOP and 38-Lead 4mm × 6mm QFN Packages n The LT3840’s low quiescent current, when configured for user selectable Burst Mode operation, helps extend run time in battery-powered systems by increasing efficiency at light loads. The LT3840 uses a constant frequency, current mode architecture. High current applications are possible with large N-channel gate drivers capable of driving multiple low RDS(ON) MOSFETs. An integrated buck-boost switching regulator generates a 7.5V bias supply voltage for MOSFET gate drive and IC power allowing higher efficiency operation over the entire input voltage range and eliminating the need for an external bias voltage. An accurate current limit set point regulates the maximum output current. A current monitor reports the average output current. Applications Automotive Supplies Industrial Systems n Distributed DC Power Systems n L, LT, LTC, LTM, Linear Technology, Burst Mode, and the Linear logo are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. n Typical Application High Efficiency Synchronous Step-Down Converter VIN 4V TO 60V 1µF 68µF ×2 12VIN to 3.3VOUT Efficiency 33µH 100 95 AUXSW2 INTVCC VIN AUXVIN UVLO LT3840 90 4.7µF BOOST 1µF OVLO TG PG SW SYNC BG 1.5µH MODE 49.9k 20k 1500pF RT SENSE+ VC SENSE– FB TK/SS 100pF IMON ICOMP EFFICIENCY (%) AUXBST AUXSW1 EN GND ICTRL 2m 85 80 75 70 65 VOUT 3.3V 20A 60 330µF ×2 50 55 0 5 10 15 LOAD CURRENT (A) 20 3840 TA01b 16.9k 10k 2200pF 7.68k 470pF 3840 TA01a 3840fa For more information www.linear.com/LT3840 1 LT3840 Absolute Maximum Ratings (Note 1) AUXVIN, VIN, EN and UVLO........................ –0.3V to 80V PG............................................................... –0.3V to 25V MODE............................................................ –0.3V to 9V SENSE+ and SENSE–................................... –0.3V to 60V SENSE+ to SENSE–............................................–1V to 1V OVLO, VC, FB, SYNC, TK/SS and ICTRL........ –0.3V to 6V Junction Temperature Range LT3840E (Note 2)............................... –40°C to 125°C LT3840I.............................................. –40°C to 125°C LT3840H............................................. –40°C to 150°C LT3840MP.......................................... –55°C to 150°C Lead Temperature (Soldering, 10 sec) TSSOP Only........................................................... 300°C Storage Temperature............................. –65°C to 150°C Pin Configuration AUXVIN 3 4 RT 5 24 BGRTN TK/SS 6 23 BOOST FB 7 VC 8 PG 9 20 SENSE– MODE 10 19 SENSE+ OVLO 11 18 ICOMP UVLO 12 NC 31 NC NC 2 25 BG 29 GND AUXSW2 38 37 36 35 34 33 32 AUXVIN 1 26 INTVCC SYNC NC 27 AUXSW2 AUXBST 28 AUXBST 2 AUXSW1 1 PGND PGND AUXSW1 NC TOP VIEW TOP VIEW 30 INTVCC 29 BG SYNC 3 28 BGRTN RT 4 27 NC NC 5 22 TG TK/SS 6 21 SW 26 BOOST 39 GND FB 7 25 TG VC 8 24 SW PG 9 23 NC NC 10 22 SENSE– 17 ICTRL MODE 11 21 SENSE+ EN 13 16 IMON OVLO 12 VIN 14 15 GND 20 ICOMP θJA = 30°C/W, θJC = 10°C/W EXPOSED PAD (PIN 29) IS GND, MUST BE SOLDERED TO PCB ICTRL IMON GND NC VIN FE PACKAGE 28-LEAD PLASTIC TSSOP EN UVLO 13 14 15 16 17 18 19 UFE PACKAGE 38-LEAD (4mm × 6mm) PLASTIC QFN θJA = 38°C/W, θJC = 4°C/W EXPOSED PAD (PIN 39) IS GND, MUST BE SOLDERED TO PCB Order Information LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE LT3840EFE#PBF LT3840EFE#TRPBF LT3840FE 28-Lead Plastic TSSOP –40°C to 125°C LT3840IFE#PBF LT3840IFE#TRPBF LT3840FE 28-Lead Plastic TSSOP –40°C to 125°C LT3840HFE#PBF LT3840HFE#TRPBF LT3840FE 28-Lead Plastic TSSOP –40°C to 150°C LT3840MPFE#PBF LT3840MPFE#TRPBF LT3840FE 28-Lead Plastic TSSOP –55°C to 150°C LT3840EUFE#PBF LT3840EUFE#TRPBF 3840 38-Lead (4mm × 6mm) Plastic QFN –40°C to 125°C LT3840IUFE#PBF LT3840IUFE#TRPBF 3840 38-Lead (4mm × 6mm) Plastic QFN –40°C to 125°C Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. Consult LTC Marketing for information on nonstandard lead based finish parts. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ 3840fa 2 For more information www.linear.com/LT3840 LT3840 Electrical Characteristics The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. PARAMETER CONDITIONS MIN TYP MAX UNITS Input Supply VIN Minimum Operating Voltage VIN Supply Current VIN Burst Mode Current VIN Shutdown Current AUXVIN Minimum Operating Voltage AUXVIN Overvoltage Lockout AUXVIN Supply Current AUXVIN Burst Mode Current AUXVIN Shutdown Current EN Enable Threshold (Rising) EN Hysteresis EN Pin Bias Current UVLO Enable Threshold (Rising) UVLO Hysteresis UVLO Pin Bias Current OVLO Threshold (Rising) OVLO Hysteresis OVLO Pin Bias Current l VMODE = 0V VEN = 0.3V 20 20 0.1 l l l (Note 3) VMODE = 0V VEN = 0.3V 60 2.5 30 1 2.5 300 0.1 0.1 1 V µA µA µA V V µA µA µA l 1.20 1.25 30 2 1.30 V mV nA l 1.20 1.25 45 1 1.30 V mV nA l 1.20 1.25 125 1 1.30 V mV nA V VEN = 1.25V VUVLO = 1.25V VOVLO = 1.25V Voltage Regulation Regulated FB Voltage E- and I-Grade l 1.237 1.250 1.263 Regulated FB Voltage MP- and H-Grade l 1.232 1.250 1.263 V FB Overvoltage Protection % Above FB Voltage l 8 12 16 % FB Overvoltage Protection Hysteresis 2.5 FB Input Bias Current FB Voltage Line Regulation 2.5V ≤ VIN ≤ 60V % 5 20 nA 0.002 0.02 %/V FB Error Amp Transconductance 300 µS FB Error Amp Sink/Source Current ±25 µA Peak Current Limit Sense Voltage 0% Duty Cycle Peak Current Limit Sense Voltage 100% Duty Cycle 80 TK/SS Charge Current 95 110 mV 60 mV 9 µA Current Regulation Sense Common Mode Range l 0 60 V Average Current Limit Sense Voltage VICTRL = Open VICTRL = 800mV l 47.5 50 40 52.5 mV mV IMON Voltage VSENSE = 50mV VSENSE = 20mV l 0.95 1.00 0.4 1.05 V V ICTRL Current VICTRL = 1V Reverse Protect Sense Voltage VMODE = 7.5V Reverse Current Sense Voltage Offset VMODE = VFB or VMODE = 0V Sense Input Current SENSE+ = SENSE– = 12V 7 µA –50 mV 5 mV 300 µA Oscillator Switching Frequency RT = 49.9k RT = 348k RT = 13.7k SYNC Threshold l 280 300 50 1000 1.2 320 kHz kHz kHz V 3840fa For more information www.linear.com/LT3840 3 LT3840 Electrical Characteristics The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. PARAMETER CONDITIONS MIN TYP MAX 90 93 UNITS Power Good PG Threshold as a Percentage of VFB VFB Rising l 87 % 2.5 PG Hysteresis as a Percentage of VFB PG Leakage VPG = 5V PG Sink Current VPG = 0.3V 0.1 1 µA 65 µA Non-Overlap Time TG to BG 75 ns Non-Overlap Time BG to TG 75 ns TG Minimum On Time 150 ns TG Minimum Off Time 240 ns 99 % l 35 % MOSFET Gate Drivers TG Maximum Duty Cycle RT = 49.9k TG, BG Drive On Voltage 7.5 TG, BG Drive Off Voltage 5 mV 20 ns TG, BG Drive Rise Time CTG = CBG = 3300pF TG, BG Drive Fall Time CTG = CBG = 3300pF BOOST UVLO (Rising) VBOOST - VSW 4.5 BOOST UVLO Hysteresis V 20 ns 5.3 V 350 mV Internal Auxiliary Supply INTVCC Regulation Voltage l INTVCC UVLO Threshold (Rising) 7.25 6.25 INTVCC UVLO Hysteresis 7.5 7.75 6.5 6.75 300 INTVCC Current in Shutdown VEN = 0.3V INTVCC Output Current 2.5V ≤ VIN ≤ 60V (Note 4) INTVCC Burst Mode Current VMODE = 0V Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The LT3840E is guaranteed to meet performance specifications from 0°C to 125°C junction temperature. Specifications over the –40°C to 125°C operating junction temperature range are assured by design, characterization, and correlation with statistical process controls. The LT3840I is guaranteed over the –40°C to 125°C operating junction 6 l 100 V V mV µA mA 60 µA temperature range. The LT3840H is guaranteed over the full –40°C to 150°C operating junction temperature range. The LT3840MP is 100% tested and guaranteed over the –55°C to 150°C temperature range. High junction temperatures degrade operating lifetimes; Operating lifetime is derated for junction temperatures greater than 125°C. Note 3: Supply current specification does not include switch drive currents. Actual supply currents will be higher. Note 4: Specification is not tested but is guaranteed by design, characterization and correlation with statistical process controls. 3840fa 4 For more information www.linear.com/LT3840 LT3840 Typical Performance Characteristics 1.40 1.40 1.35 1.35 1.30 1.25 1.20 EN FALLING 1.15 1.10 1.05 UVLO FALLING 1.15 1.10 1.05 95 95 0 UVLO RISING 1.20 1.00 0 1600 6 VIN 4 AUXVIN 2 0 –50 –25 0 SENSE+ + SENSE– BIAS CURRENT (µA) INTVCC REGULATION VOLTAGE (V) SHUTDOWN CURRENT (µA) 18 8 7.6 7.5 7.4 7.3 7.2 7.1 7.0 –50 –25 25 50 75 100 125 150 TEMPERATURE (°C) 0 3840 G04 –400 25 50 75 100 125 150 TEMPERATURE (°C) 3840 G07 0 3 1 2 4 COMMON MODE SENSE VOLTAGE (V) 10 9 8 6 –50 –25 5 1.28 7 0 0 3840 G06 REGULATED FEEDBACK VOLTAGE (V) 280 270 –50 –25 400 Regulated FB Voltage vs Temperature 11 TK/SS CURRENT (µA) SWITCHING FREQUENCY (kHz) 320 290 ISENSE+ + ISENSE– vs VSENSE(CM) 800 –800 25 50 75 100 125 150 TEMPERATURE (°C) 12 RT = 49.9k 300 25 50 75 100 125 150 TEMPERATURE (°C) 1200 Soft-Start (TK/SS) Current vs Temperature 310 0 3840 G05 Switching Frequency vs Temperature 330 1.00 3840 G03 7.7 10 1.05 INTVCC Regulation Voltage vs Temperature 20 12 1.10 3840 G02 Shutdown Current vs Temperature 14 OVLO FALLING 1.15 0.90 –50 –25 25 50 75 100 125 150 TEMPERATURE (°C) 3840 G01 16 1.20 0.95 90 –50 –25 25 50 75 100 125 150 TEMPERATURE (°C) OVLO RISING 1.25 1.25 1.00 90 –50 –25 OVLO Threshold vs Temperature 1.30 1.30 EN RISING UVLO PIN VOLTAGE (V) EN PIN VOLTAGE (V) UVLO Threshold Voltage vs Temperature OVLO PIN VOLTAGE (V) EN Threshold Voltage vs Temperature TA = 25°C, unless otherwise noted. 0 25 50 75 100 125 150 TEMPERATURE (°C) 3840 G08 1.27 1.26 1.25 1.24 1.23 1.22 –50 –25 0 25 50 75 100 125 150 TEMPERATURE (°C) 3840 G09 3840fa For more information www.linear.com/LT3840 5 LT3840 Typical Performance Characteristics TA = 25°C, unless otherwise noted. UVLO Pin Current vs UVLO Voltage Enable Pin Current vs Enable Voltage 1.6 Average Current Sense Voltage vs Temperature 55 AVERAGE CURRENT SENSE VOLTAGE (mV) 5 1.2 UVLO PIN CURRENT (nA) ENABLE PIN CURRENT (µA) 1.4 1.0 0.8 0.6 0.4 4 3 2 1 0.2 0 10 20 40 30 50 ENABLE PIN VOLTAGE (V) 0 60 0 10 20 40 30 UVLO PIN VOLTAGE (V) 3840 G10 VSENSE = 50mV IMON VOLTAGE (V) 0.9 0.8 0.7 0.6 0.5 VSENSE = 25mV 0.4 0.3 0.2 –50 –25 0 25 50 75 100 125 150 TEMPERATURE (°C) 3840 G13 35 30 ICTRL = 500mV 25 20 15 0 25 50 75 100 125 150 TEMPERATURE (°C) 3840 G12 Power Good Threshold vs Temperature POWER GOOD THRESHOLD (V) 1.0 40 3840 G11 Current Monitor (IMON) Voltage vs Temperature 1.1 45 10 –50 –25 60 50 FB Overvoltage Threshold vs Temperature 1.4 1.6 1.3 1.5 FB RISING FB THRESHOLD (V) 0.0 ICTRL = FLOAT 50 1.2 PG RISING 1.1 PG FALLING 1.0 0.9 0.8 –50 –25 1.4 FB FALLING 1.3 1.2 1.1 0 25 50 75 100 125 150 TEMPERATURE (°C) 3840 G14 1.0 –50 –25 0 25 50 75 100 125 150 TEMPERATURE (°C) 3840 G15 3840fa 6 For more information www.linear.com/LT3840 LT3840 Pin Functions (TSSOP/QFN) AUXSW1 (Pin 1/Pin 36): AUXSW1 is a switching node of the auxiliary bias supply. Connect the pin to the auxiliary bias supply inductor. PGND (Pin 2/Pin 38): PGND is the high current ground return for the auxiliary bias supply. Connect PGND to the negative terminal of the INTVCC decoupling capacitor and to system ground. AUXVIN (Pin 3/Pin 1): AUXVIN is the supply pin to the auxiliary bias supply. Bypass the pin with a low ESR capacitor placed close to the pin and referenced to PGND. SYNC (Pin 4/Pin 3): SYNC allows the LT3840 switching frequency to be synchronized to an external clock. Set the RT resistor such that the internal oscillator frequency is 15% below the minimum external clock frequency. If unused connect the SYNC pin to GND. RT (Pin 5/Pin 4): An external resistor on RT sets the switching frequency of the synchronous controller and auxiliary bias supply. TK/SS (Pin 6/Pin 6): TK/SS is the LT3840 external tracking and soft-start input. The LT3840 regulates the VFB voltage to the smaller of the internal reference or the voltage on the TK/SS pin. An internal pull-up current source is connected to this pin. A capacitor (CSS) to ground sets the ramp rate. Alternatively, a resistor divider on another voltage supply connected to this pin allows the LT3840 output to track another supply during start-up. Leave the pin open if the tracking and soft-start functions are unused. FB (Pin 7/Pin 7): The regulator output voltage is set with a resistor divider connected to FB. FB is also the input for the output overvoltage and power good comparators. VC (Pin 8/Pin 8): VC is the compensation node for the output voltage regulation control loop. PG (Pin 9/Pin 9): PG is a power good pin and is the opendrain output of an internal comparator. MODE (Pin 10/Pin 11): MODE is used to enable or disable Burst Mode operation. Connect MODE to ground for Burst Mode operation. Connect the pin to FB for pulse-skipping mode. Connect MODE to INTVCC for continuous mode. OVLO (Pin 11/Pin 12): OVLO has a precision threshold with hysteresis to implement an accurate overvoltage lockout (OVLO). Controller switching is disabled during an overvoltage lockout (OVLO) event. INTVCC regulation is maintained during an OVLO event. Connect the pin to GND to disable the function. UVLO (Pin 12/Pin 13): UVLO has a precision threshold with hysteresis to implement an accurate undervoltage lockout (UVLO). UVLO enables the controller switching. Connect the pin to VIN to disable the function. EN (Pin 13/Pin 14): EN has a precision IC enable threshold with hysteresis. EN enables the auxiliary bias supply and controller switching. Connect the pin to VIN to disable the function. EN also has a lower threshold to put the LT3840 into a low current shutdown mode where all internal circuitry is disabled. VIN (Pin 14/Pin 15): VIN provides an internal DC bias rail and should be decoupled to GND with a low value (0.1µF), low ESR capacitor located close to the pin. GND (Pin 15, Exposed Pad Pin 29/Pin 17, Exposed Pad Pin 39): Ground. Solder GND and the exposed pad directly to the PCB ground plane. IMON (Pin 16/Pin 18): The voltage on IMON represents the average output current of the converter. A small value capacitor filters the ripple voltage associated with the inductor ripple current. ICTRL (Pin 17/Pin 19): The maximum average output current is programmed with a voltage applied to ICTRL. If unused, leave floating. ICOMP (Pin 18/Pin 20): A capacitor and resistor connected to ICOMP compensates the average current limit circuit. SENSE+ (Pin 19/Pin 21): SENSE+ is the positive input for the differential current sense comparator. SENSE– (Pin 20/Pin 22): SENSE– is the negative input for the differential current sense comparator. SW (Pin 21/Pin 24): SW is the high current return path of the TG MOSFET driver and is externally connected to the negative terminal of the BOOST capacitor. 3840fa For more information www.linear.com/LT3840 7 LT3840 Pin Functions (TSSOP/QFN) TG (Pin 22/Pin 25): TG is the high current gate drive for the top N-channel MOSFET. BOOST (Pin 23/Pin 26): BOOST is the supply for the bootstrapped TG gate drive and is externally connected to a low ESR ceramic capacitor referenced to SW. BGRTN (Pin 24/Pin 28): BGRTN is the high current return path of the BG MOSFET driver and is externally connected to the negative terminal of the INTVCC capacitor. BG (Pin 25/Pin 29): BG is the high current gate drive for the bottom N-channel MOSFET. INTVCC (Pin 26/Pin 30): INTVCC is the auxiliary bias supply output. Bypass the pin with a low ESR capacitor placed close to the pin. INTVCC provides supply for LT3840 internal bias and MOSFET gate drivers. The INTVCC pin cannot be back driven with a separate supply. AUXSW2 (Pin 27/Pin 33): AUXSW2 is a switching node of the auxiliary supply and is connected to the auxiliary bias supply inductor. AUXBST (Pin 28/Pin 35): AUXBST provides drive voltage for the auxiliary supply and is connected to a low ESR capacitor referenced to AUXSW1. 3840fa 8 For more information www.linear.com/LT3840 LT3840 Operation Overview The externally compensated VC voltage generates a threshold for the differential current sense comparator. During normal operation, the LT3840 internal oscillator runs at the programmed frequency. At the beginning of each oscillator cycle, the TG switch drive is turned on. The TG switch drive stays enabled until the sensed inductor current exceeds the VC derived threshold of the current sense comparator. The LT3840 provides a solution for a high efficiency, general purpose DC/DC converter. It is a wide input voltage range switching regulator controller IC that uses a programmable fixed frequency, peak current mode architecture. An internal switching regulator efficiently provides an auxiliary bias supply to drive multiple, large N-channel MOSFET switches. The LT3840 includes functions such as average output current control and monitoring, micro-power operation with low output ripple, soft-start, output voltage tracking, power good and a handful of protection features. If the current comparator threshold is not reached for the entire oscillator cycle, the switch driver stays on for up to eight cycles. If after eight cycles the TG switch driver is still on, it is turned off to regenerate the BOOST bootstrapped supply. Voltage Control Loop When the load current increases, the FB voltage decreases relative to the reference causing the EA to increase the VC voltage until the average inductor current matches the new load current. Refer to Figure 1 for a block diagram of the LT3840 voltage control loop. The LT3840 uses peak current mode control to regulate the supply output voltage. The error amplifier (EA) generates an error voltage (VC) based on the difference between the feedback (FB) voltage and an internal reference. BOOST VIN INTVCC TG DRIVER SW ANTI SHOOT THRU VOUT INTVCC DRIVER BG BGRTN OSCILLATOR SYNC RT + – SENSE+ SENSE– FB – VC EA + Q S R EXTERNAL COMPONENTS VREF 3840 BD Figure 1. Peak Current Mode Voltage Control Functional Block Diagram 3840fa For more information www.linear.com/LT3840 9 LT3840 Operation Light Load Operation (Burst Mode Operation, Pulse-Skipping Mode or Continuous Mode) The LT3840 is capable of operating in Burst Mode, pulseskipping mode, or continuous mode. Connect the MODE pin to GND for Burst Mode operation, to the FB pin for pulse-skipping mode, or to INTVCC for continuous mode. In Burst Mode operation the LT3840 forces a minimum peak inductor current via an internal clamp on the VC pin. If the average inductor current is greater than the load current the output voltage will begin to increase and the error amplifier, EA, will attempt to decrease the VC voltage. When the internal voltage clamp on VC is engaged and the FB voltage increases slightly, the LT3840 goes into sleep mode. In sleep mode, both external MOSFETs are turned off and much of the internal circuitry is turned off, reducing the quiescent current. The load current is supplied by the output capacitor. As the output voltage decreases, the LT3840 comes out of sleep mode and the controller resumes normal operation by turning on the TG MOSFET on the next cycle of the internal oscillator. The output voltage increases and the controller goes back to sleep. This cycle repeats until the average load current is greater than the minimum forced peak inductor current. When Burst Mode operation is selected, the inductor current is not allowed to go negative. A reverse current comparator turns off the BG MOSFET just before the inductor current reaches zero, preventing it from reversing and going negative. Thus, the controller operates in discontinuous operation. In pulse-skipping mode, during light loads, the supply operates in discontinuous mode where the inductor current is not allowed to reverse direction. Output voltage regulation is maintained by skipping TG on pulses. At light loads pulse-skipping mode is more efficient than forced continuous mode, but not as efficient as Burst Mode operation. In continuous operation the inductor current is allowed to reverse direction at light loads or under large transient conditions. The reverse current comparator protects the BG MOSFET by turning it off if the reverse current exceeds the maximum reverse current sense threshold voltage. Constant Current Operation For applications requiring a regulated current source the LT3840 has a control loop to accurately regulate the average output current. A current monitor function provides output current information for telemetry and diagnostics. The current through the sense resistor, RSENSE, produces a voltage applied to the SENSE pins. The differential sense voltage is amplified by 20x, buffered and output to the IMON pin. The capacitor on the IMON pin filters the ripple component to average the signal. The 20x amplified differential sense voltage is also applied to an internal GM amplifier and compared against either 1V or ICTRL voltage, whichever is smaller. A voltage applied to ICTRL reduces the maximum average current sense threshold. When the 20× amplified differential sense voltage exceeds the 1V internal reference or the ICTRL voltage the ICOMP node is driven high and VC is pulled 3840fa 10 For more information www.linear.com/LT3840 LT3840 Operation low. The VC voltage is the DC control node that sets the peak inductor current. A resistor and capacitor on ICOMP compensate the current control loop. Figure 2 includes the block diagram of the average current control loop and transfer functions showing the relationship between VSENSE, ICTRL and IMON. age regulator to provide the gate drive voltage from VIN. This approach is limited by power dissipation at high input voltage and dropout at low voltage. The LT3840 bias regulator efficiently generates a 7.5V bias voltage, capable of adequately driving large multiple MOSFETs, at input voltages as low as 2.5V and as high as 60V. Auxiliary Bias Supply The auxiliary bias supply is a monolithic buck-boost, peak current mode topology. The switching frequency is fixed and synchronized with the LT3840 synchronous buck controller. The switching regulator is internally compensated The LT3840 wide input voltage range is made possible with the auxiliary bias supply switching regulator. Other switching regulator controllers typically use a linear volt- RSENSE SW + + VC GM ICOMP – – 20x 1V ICTRL – + – SENSE+ VOUT COUT SENSE– IMON MAXIMUM AVERAGE CURRENT CONTROL 50 1000 900 800 TRANSFER FUNCTION MAX. AVG. SENSE VOLTAGE vs ICTRL TRANSFER FUNCTION IMON vs AVG. SENSE VOLTAGE 700 VIMON (mV) VSENSE (mV) 40 30 20 600 500 400 300 200 10 100 0 0 100 200 300 400 500 600 700 800 900 1000 VICTRL (mV) 0 0 10 20 30 VSENSE (mV) 40 50 3840 F02 Figure 2. Average Output Current Limit Functional Block Diagram and Transfer Curves 3840fa For more information www.linear.com/LT3840 11 LT3840 Operation exceeds its precision voltage threshold the auxiliary bias switching regulator is activated and the INTVCC voltage is regulated. Figure 4 is a functional block diagram of the auxiliary bias supply start-up. and current limited. Figure 3 is a functional block diagram of the auxiliary bias supply. Auxiliary Bias Supply Start-Up and Shutdown The LT3840 auxiliary bias supply is enabled with the enable (EN) pin. When the EN pin voltage exceeds a diode threshold the LT3840 comes out of the low quiescent current shutdown mode and turns on the internal reference (VREF) and internal bias (VREG). When the EN pin voltage The auxiliary bias supply has its own enable pin to allow the INTVCC to be activated independent of the controller. INTVCC may be used to drive other circuitry in the application such as an LDO. AUXVIN AUXBST – + CAUXBST LPWR INTVCC AUXSW2 EXTERNAL COMPONENTS AUXSW1 CINTVCC R Q S VIN > 18V – VREF 3840 F03 + INTERNAL COMPENSATION Figure 3. Auxiliary Bias Supply Functional Block Diagram VIN – EN + AUXVIN INTERNAL REFERENCE VREF LINEAR REGULATOR VREG AUXILIARY BIAS SUPPLY INTVCC OSCILLATOR + 3840 F04 VREF – Figure 4. Auxiliary Bias Supply Start-Up Functional Block Diagram 3840fa 12 For more information www.linear.com/LT3840 LT3840 Operation Soft-Start/Output Voltage Tracking The soft-start function controls the slew rate of the power supply output voltage during start-up. A controlled output voltage ramp minimizes output voltage overshoot, reduces inrush current from the VIN supply, and facilitates supply sequencing. TK/SS is an additional input to the error amplifier (EA). The voltage control loop regulates the output via the FB pin to whichever pin is lower, VREF or TK/SS. An internal current source and a capacitor on the pin program the output voltage ramp time. Drive the pin with a voltage to use the output voltage tracking function for supply sequencing. The TK/SS voltage is clamped to a diode above the FB voltage, therefore, during a short-circuit the TK/SS voltage is pulled low because the FB voltage is low. Once the short has been removed the FB voltage starts to recover. The soft-start circuit takes control of the output voltage slew rate once the FB voltage has exceeded the slowly ramping TK/ SS voltage, reducing the output voltage overshoot through a short-circuit recovery. During a fault condition such as UVLO, OVLO or overtemperature, the soft-start capacitor is discharged. If unused, the pin can be left open and the internal current source will pull the pin voltage above the soft-start operating range. Figure 5 is a functional block diagram of the LT3840 soft-start/tracking function. Power Good and Output Overvoltage Protection When FB is within range of its regulated value an internal N-channel MOSFET, on the PG pin, is turned off allowing an external resistor to pull PG high. Power Good is valid when the LT3840 is enabled with the EN pin and the VIN voltage is above 2.5V. The LT3840 output overvoltage protection feature disables the synchronous buck controller switching when the FB pin exceeds its regulated value by a given amount (see Electrical Specification table). When this event occurs the PG pin voltage is pulled low. Input Overvoltage Lockout The LT3840 is capable of withstanding input voltage transients up to 80V. When the voltage on the AUXVIN pin exceeds 60V the auxiliary bias switching regulator is disabled. 1.3 1.2 1.1 VOUT FB 1.0 ISOFT-START VREF + + – 0.9 VC EA FB(V) TK/SS 0.8 TRANSFER FUNCTION FB vs TK/SS 0.7 0.6 0.5 0.4 FAULT 0.3 0.2 0.1 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 1.3 1.4 TK/SS (V) 3840 F05 Figure 5. Soft-Start and Output Voltage Tracking Functional Block Diagram and Transfer Curve 3840fa For more information www.linear.com/LT3840 13 LT3840 Applications Information Switching Frequency Inductor Selection The choice of switching frequency is a trade-off between converter efficiency and component size. Low frequency operation improves efficiency by reducing MOSFET switching losses and gate charge losses. However, lower frequency operation requires more inductance for a given amount of ripple current, resulting in larger inductor size. Increasing the ripple current requires additional output capacitance to maintain the same output ripple voltage. The critical parameters for the selection of an inductor are minimum inductance value, saturation current and RMS current. For a given ΔIL, the inductance value is calculated as follows: For converters with extremely high or low step-down VIN to VOUT ratios, another consideration is the minimum on and off times of the LT3840. A final consideration for operating frequency is in noise-sensitive systems where it is often desirable to keep the switching noise out of a sensitive frequency band. The LT3840 uses a constant frequency architecture programmable with a single resistor (RT) over a 50kHz to 1MHz range. The value of RT for a given operating frequency can be chosen from Table 1 or from the following equation: RT(kΩ) = 2.32 • 104 • fSW(–1.08) Table 1. Recommended 1% Standard Values RT (kΩ) 50 158 100 76.8 200 49.9 300 36.5 400 28.0 500 23.2 600 19.1 700 16.5 800 14.3 900 13.7 1000 VIN(MAX) – VOUT fSW • VIN(MAX) • ΔIL The typical range of values for ΔIL is (0.2 • IOUT(MAX)) to (0.5 • IOUT(MAX)), where IOUT(MAX) is the maximum load current of the supply. Using ΔIL = 0.3 • IOUT(MAX) yields a good design compromise between inductor performance versus inductor size and cost. A value of ΔIL = 0.3 • IOUT(MAX) produces a ±15% of IOUT(MAX) ripple current around the DC output current of the supply. Lower values of ΔIL require larger and more costly magnetics. Higher values of ΔIL will increase the peak currents, requiring more filtering on the input and output of the supply. If ΔIL is too high, the slope compensation circuit is ineffective and current mode instability may occur at duty cycles greater than 50%. To satisfy slope compensation requirements the minimum inductance is calculated as follows: fSW (kHz) 348 L ≥ VOUT • LMIN > VOUT • 2DCMAX – 1 RSENSE • 30 • DCMAX fSW Magnetics vendors specify the saturation current, the RMS current or both. When selecting an inductor based on inductor saturation current, use the peak current through the inductor, IOUT(MAX) + ΔIL/2. The inductor saturation current specification is the current at which the inductance, measured at zero current, decreases by a specified amount, typically 30%. When selecting an inductor based on RMS current rating, use the average current through the inductor, IOUT(MAX). The RMS current specification is the RMS current at which the part has a specific temperature rise, typically 40°C, above 25°C ambient. After calculating the minimum inductance value, the saturation current and the RMS current for your design, select an off-the-shelf inductor. Contact the Applications Group at Linear Technology for further support. For more detailed information on selecting an inductor, please see the Inductor Selection section of Linear Technology Application Note 44. 3840fa 14 For more information www.linear.com/LT3840 LT3840 Applications Information MOSFET Selection Two external N-channel MOSFETs are used with the LT3840 controller, one top (main) switch, and one bottom (synchronous) switch. The gate drive levels are set by the INTVCC voltage. Therefore, standard or logic level threshold MOSFETs can be used. Selection criteria for the power MOSFETs include breakdown voltage (BVDSS), maximum current (IOUTMAX), onresistance (RDSON) and gate charge. First select a MOSFET with a BVDSS greater than VIN. Next consider the package and current rating of the device. The maximum current rating of the device typically corresponds to a particular package. The RMS current of each device is calculated below: Top Switch Duty Cycle (DC TOP ) = Bottom Switch RMS Current = DCBOT • IOUTMAX Select a device that has a continuous current rating greater than the calculated RMS current. Lastly, consider the RDSON and gate charge of the MOSFET. These two parameters are considered together because they are typically inversely proportional to one another. The RDSON determines the conduction losses of the MOSFET and the gate charge determines the switching losses. The switching and conduction losses of each MOSFET can be calculated as follows: VOUT •RDS(ON) VIN V –V PCOND(BOT) =IOUT(MAX)2 • IN OUT •RDS(ON) VIN QGSW IDRIVE where QGSW can be found in the MOSFET specification or calculated by: QGSW = QGD + QGS 2 and IDRIVE = 1A PTOP(TOTAL) = PCOND(TOP) + PTRAN(TOP) V –V Bottom Switch Duty Cycle (DCBOT ) = IN OUT VIN PCOND(TOP) =IOUT(MAX)2 • PTRAN(TOP) = VIN •IOUT • fSW • The total maximum power dissipations of the MOSFET are: VOUT VIN Top Switch RMS Current = DC TOP • IOUTMAX Note that RDSON has a large positive temperature dependence. The MOSFET manufacturer’s data sheet contains a curve, RDSON vs Temperature. In the main MOSFET, transition losses are proportional to VIN2 and can be considerably large in high voltage applications (VIN > 20V). Calculate the maximum transition losses: PBOT(TOTAL) = PCOND(BOT) Complete a thermal analysis to ensure that the MOSFET’s junction temperatures are not exceeded. TJ = TA + P(TOTAL) • θJA where θJA is the package thermal resistance and TA is the ambient temperature. Keep the calculated TJ below the maximum specified junction temperature, typically 150°C. Note that when VIN is high and fSW is high, the transition losses may dominate. A MOSFET with higher RDSON and lower gate charge may provide higher efficiency. MOSFETs with a higher voltage BVDSS specification usually have higher RDSON and lower gate charge. A Schottky diode can be inserted in parallel with the synchronous MOSFET to conduct during the dead time between the conduction of the two power MOSFETs. This prevents the body diode of the bottom MOSFET from turning on, storing charge during the dead time and requiring a reverse recovery period. Input Capacitor Selection A local input bypass capacitor is required for buck converters because the input current is pulsed with fast rise and fall times. The input capacitor selection criteria are based on 3840fa For more information www.linear.com/LT3840 15 LT3840 Applications Information the bulk capacitance and RMS current capability. The bulk capacitance will determine the supply input ripple voltage. The RMS current capability is used to prevent overheating the capacitor. The bulk capacitance is calculated based on maximum input ripple, ΔVIN: CIN(BULK) = IOUT(MAX) • VOUT ΔVIN is typically chosen at a level acceptable to the user. A good starting point is 100mV to 200mV. Aluminum electrolytic capacitors are a good choice for high voltage, bulk capacitance due to their high capacitance per unit area. The capacitor’s RMS current is: 1  ∆VOUT = ∆IL • ESR+ •C 8 • f ( )  SW OUT  The maximum ESR required to meet a ΔVOUT design requirement can be calculated by: ΔVIN • fSW • VIN(MIN) ICIN(RMS) =IOUT requirements. ΔVOUT is a function of ΔIL and the COUT ESR. It is calculated by: VOUT (VIN – VOUT ) (VIN )2 If applicable, calculate it at the worst-case condition, VIN = 2VOUT. The RMS current rating of the capacitor is specified by the manufacturer and should exceed the calculated ICIN(RMS). Due to their low ESR (equivalent series resistance), ceramic capacitors are a good choice for high voltage, high RMS current handling. Note that the ripple current ratings from aluminum electrolytic capacitor manufacturers are based on 2000 hours of life. This makes it advisable to further derate the capacitor or to choose a capacitor rated at a higher temperature than required. The combination of aluminum electrolytic capacitors and ceramic capacitors is an economical approach to meeting the input capacitor requirements. The capacitor voltage rating must be rated greater than maximum VIN voltage. Multiple capacitors may also be paralleled to meet size or height requirements in the design. Locate the capacitor very close to the MOSFET switch and use short, wide PCB traces to minimize parasitic inductance. Use a small (0.1μF to 1μF) bypass capacitor between the chip VIN pin and GND, placed close to the LT3840. Output Capacitor Selection The output capacitance, COUT, selection is based on the design’s output voltage ripple, ΔVOUT and transient load ESR(MAX)= ( ∆VOUT )(L )( fSW ) V   VOUT • 1– OUT  V IN(MAX)  Worst-case ΔVOUT occurs at the highest input voltage. Use paralleled multiple capacitors to meet the ESR requirements. Increasing the inductance is an option to lower the ESR requirements. For extremely low ΔVOUT, an additional LC filter stage can be added to the output of the supply. Linear Technology’s Application Note 44 has some good tips on sizing an additional output filter. Output Voltage Programming A resistive divider sets the DC output voltage according to the following formula: R2 =R1  VOUT  –1 1.250V  The external resistor divider is connected to the output of the converter as shown in Figure 6. L1 VOUT R2 COUT FB R1 3840 F06 Figure 6. Output Voltage Feedback Divider Tolerance of the feedback resistors will add additional error to the output voltage. The VFB pin input bias current is typically 5nA, so use of extremely high value feedback resistors results in a converter output that is slightly 3840fa 16 For more information www.linear.com/LT3840 LT3840 Applications Information higher than expected. Bias current error at the output can be estimated as: short-circuit load condition, a diode and resistor connected from VOUT to the ICTRL pin is recommended (see Figure 7). DVOUT(BIAS) = 5nA • R2 VOUT Great care should be taken to route the VFB line away from noise sources, such as the inductor or the SW node. R1 D1 Output Current Programming and Monitoring The average current control loop of the LT3840 accurately regulates the maximum output current of the switching regulator. The default maximum differential sense voltage, VSENSE(MAX), is 50mV, but a voltage applied to the ICTRL pin will program it lower. A 0V to 1V range on the ICTRL pin corresponds to 0mV to 50mV differential sense voltage. A way to provide the ICTRL programming voltage is to connect a linear regulator or voltage divider to the INTVCC pin. Once the maximum differential sense voltage is determined the RSENSE current sense resistor is calculated as follows: RSENSE = VSENSE(MAX) IOUT(MAX) Select a current sense resistor where the maximum power dissipation rating is greater than the calculated power dissipation: PD(RSENSE) = RSENSE • IOUT(MAX)2 The average current control loop is compensated at the ICOMP pin with a resistor and capacitor connected to GND. The IMON pin is an accurate output current monitor pin. The LT3840 outputs a voltage that is 20 times the differential sense voltage. A 0mV to 50mV differential sense voltage corresponds to a 0V to 1V IMON voltage. A capacitor on the pin filters the voltage ripple due to the inductor ripple current. Typical capacitor values on the pin range from 1000pF to 0.1µF. The larger the capacitor value, the lower the ripple. The capacitor does not affect the average current control loop. Output Short-Circuit Current Foldback The LT3840 defaults to a straight line current limit where the short-circuit current is the same as the drop out current. For applications that require current foldback in a ICTRL 3840 F07 Figure 7. Output Short-Circuit Foldback Current Circuit The foldback current in short-circuit, IOUT(SC), is calculated as follows: (VF(D1) + 7µA • R1) IOUT(SC) = 20 • RSENSE where VF is the forward voltage on the diode D1 at ~7uA current. Internal Power Supply The internal auxiliary supply requires three external components (CINTVCC, CAUXBST and LPWR) for operation, as shown in Figure 3. CINTVCC, a 4.7μF/10V ceramic capacitor, bypasses INTVCC. CAUXBST, a 1μF/10V ceramic capacitor, connected between the AUXBST pin and the AUXSW1 pin, provides bootstrapped drive to the internal switch. A 33µH inductor with a saturation current greater than 0.6A is recommended for most applications. The Coilcraft ME3220-333 is a good fit. CBOOST Capacitor Selection The recommended value of the BOOST capacitor, CBOOST, is at least 100 times greater than the total gate capacitance of the topside MOSFET. Typical values for most applications range from 0.1μF to 1μF. Soft-Start and Voltage Tracking The desired soft-start time (tSS) is programmed via the CSS capacitor as follows: CSS = tSS • 9µA 1.75 3840fa For more information www.linear.com/LT3840 17 LT3840 Applications Information The soft-start capacitor is reset under fault conditions including UVLO, EN, OVLO, overtemperature shutdown and INTVCC UVLO. The soft-start pin is clamped through a diode to the VFB pin. Therefore, the soft-start pin is reset during a short-circuit minimizing overshoot upon recovery. EN, UVLO and OVLO EN has a precision voltage threshold with hysteresis to enable the LT3840 auxiliary bias supply and synchronous controller. The pin is typically connected to VIN through a resistor divider, however, it can be directly connected to VIN. A lower voltage threshold on the EN pin is used to put the LT3840 into a low quiescent current shutdown mode. UVLO has a precision voltage threshold with hysteresis to enable the LT3840 synchronous controller. The pin is typically connected to VIN through a resistor divider, however, it can be directly connected to VIN. OVLO has a precision voltage threshold with hysteresis to disable the LT3840 synchronous controller. The pin is typically connected to VIN through a resistor divider. OVLO can be directly connected to GND to disable the function. RB Layout Considerations Checklist The following is a list of recommended layout considerations: • Locate the VIN, AUXVIN, INTVCC, AUXBST and BOOST pin bypass capacitors in close proximity to the LT3840. • Create a solid GND plane, preferably on layer two of the PCB. • Minimize the hot loop. (See Figure 9) • Use short wide traces for the MOSFET gate drivers (TG and BG), as well as, gate drive supply and return (INTVCC and BOOST, BGRTN and SW). • Connect the FB pin directly to the feedback resistors, independent of any other nodes (i.e. SENSE+). • Route the SENSE– and SENSE+ traces close together and keep as short as possible. EN, UVLO OR OVLO PIN • Solder the LT3840 exposed pad to the PCB. Add multiple vias to connect the exposed pad to the GND plane. 3840 F08 Figure 8. Precision EN, UVLO and OVLO Resistor Divider Resistors are chosen by first selecting RB. Then calculate RA with the following formula: The oscillator can be synchronized to an external clock. Set the RT resistor 15% below the lowest synchronized frequency. The rising edge of the SYNC pin waveform triggers the discharge of the internal oscillator capacitor. If unused, connect the SYNC pin to GND. • Locate the feedback resistors in close proximity to the LT3840 FB pin. VIN RA Switching Frequency Synchronization • Per the manufacturer’s specification, add a sufficient PCB pad around MOSFETs and inductor to dissipate heat. VIN V  R A = RB • THRESHOLD – 1  1.25V  CIN VTHRESHOLD is the VIN referred voltage at which the supply is enabled (UVLO and EN) or disabled (OVLO). TG HOT LOOP SW BG 3840 F09 Figure 9. Hot Loop Layout for Synchronous Buck Regulator 3840fa 18 For more information www.linear.com/LT3840 LT3840 Typical Applications Wide Input Range, High Power Output, 15V to 60V Input to 12V, 20A Output VIN 15V TO 60V 1µF CIN 68µF ×2 887k L2, 33µH AUXBST AUXSW1 VIN AUXSW2 INTVCC AUXVIN EN 60.4k LT3840 UVLO INTVCC 174k 20k 4.7µF 1N4448 BOOST 1µF OVLO TG PG SW SYNC BG M1 ×2 M2 ×2 L1, 5.6µH D1 RSENSE 2.5mΩ COUT1 560µF MODE RT SENSE+ VC SENSE– FB TK/SS 20k 49.9k 2200pF 0.01µF 100pF IMON ICOMP 2200pF 7.68k GND ICTRL VOUT 12V COUT2 20A 22µF ×4 86.6k 10k 100pF 470pF M1: INFINEON, BSC160N10NS3 M2: INFINEON, BSC070N1ONS3 L1: VISHAY, IHLP6767GZER5R6MA1 L2: COILCRAFT, ME3220-333KL CIN: SUNCON 100CE68FS COUT1: SANYO, 16SVPF560M COUT2: TAIYO YUDEN, EMK325BJ226MM-T D1: DIODES INC. PDS5100H 3840 TA02 3840fa For more information www.linear.com/LT3840 19 LT3840 Typical Applications Low Part Count Application, 6V to 60V Input to 5V, 10A Output VIN 6V TO 60V 1µF CIN 68µF ×2 L2, 33µH AUXBST AUXSW1 VIN AUXSW2 INTVCC AUXVIN EN 1N4448 BOOST LT3840 UVLO 4.7µF 1µF OVLO TG PG SW SYNC BG M1 L1, 5.6µH RSENSE 5mΩ VOUT 5V 10A COUT 270µF M2 MODE RT SENSE+ VC SENSE– 20k IMON 2200pF 49.9k 301k FB TK/SS GND ICTRL ICOMP 100k M1: INFINEON, BSC160N10NS3 M2: INFINEON, BSC070N1ONS3 L1: VISHAY, IHLP5050 L2: COILCRAFT, ME3220-333KL CIN: SUNCON 100CE68FS COUT: SANYO, 16SVPC270M 470pF 3840 TA03 Low Voltage, High Current Output, 4V to 60V Input to 3.3V, 20A VIN 4V TO 60V 1µF CIN 68µF ×2 887k L2, 33µH AUXBST AUXSW1 VIN AUXSW2 INTVCC AUXVIN EN 60.4k LT3840 UVLO INTVCC 174k 20k 4.7µF 1N4448 BOOST 1µF OVLO TG PG SW SYNC BG M1 ×2 M2 ×2 L1, 1.7µH D1 RSENSE 2.5mΩ COUT1 560µF MODE RT SENSE+ VC SENSE– FB TK/SS 20k 49.9k 2200µF 0.01µF 100pF GND IMON ICOMP 2200pF ICTRL VOUT 3.3V COUT2 20A 22µF ×4 16.9k 10k 7.68k 470pF M1: INFINEON, BSC160N10NS3 M2: INFINEON, BSC070N1ONS3 L1: WÜRTH, 7443556130 L2: COILCRAFT, ME3220-333KL CIN: SUNCON 100CE68FS COUT1: SANYO, 16SVPF560M COUT2: TAIYO YUDEN, EMK325BJ226MM-T D1: DIODES INC. PDS5100H 3840 TA04 3840fa 20 For more information www.linear.com/LT3840 LT3840 Package Description Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. FE Package 28-Lead Plastic TSSOP (4.4mm) (Reference LTC DWG # 05-08-1663 Rev K) Exposed Pad Variation EA 9.60 – 9.80* (.378 – .386) 7.56 (.298) 7.56 (.298) 28 2726 25 24 23 22 21 20 19 18 1716 15 6.60 ±0.10 4.50 ±0.10 3.05 (.120) SEE NOTE 4 0.45 ±0.05 EXPOSED PAD HEAT SINK ON BOTTOM OF PACKAGE 6.40 3.05 (.252) (.120) BSC 1.05 ±0.10 0.65 BSC RECOMMENDED SOLDER PAD LAYOUT 4.30 – 4.50* (.169 – .177) 0.09 – 0.20 (.0035 – .0079) 0.50 – 0.75 (.020 – .030) NOTE: 1. CONTROLLING DIMENSION: MILLIMETERS 2. DIMENSIONS ARE IN MILLIMETERS (INCHES) 3. DRAWING NOT TO SCALE 1 2 3 4 5 6 7 8 9 10 11 12 13 14 0.25 REF 1.20 (.047) MAX 0° – 8° 0.65 (.0256) BSC 0.195 – 0.30 (.0077 – .0118) TYP 0.05 – 0.15 (.002 – .006) FE28 (EA) TSSOP REV K 0913 4. RECOMMENDED MINIMUM PCB METAL SIZE FOR EXPOSED PAD ATTACHMENT *DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.150mm (.006") PER SIDE 3840fa For more information www.linear.com/LT3840 21 LT3840 Package Description Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. UFE Package 38-Lead Plastic QFN (4mm × 6mm) (Reference LTC DWG # 05-08-1750 Rev B) 0.70 ±0.05 4.50 ±0.05 3.10 ±0.05 2.40 REF 2.65 ±0.05 4.65 ±0.05 PACKAGE OUTLINE 0.20 ±0.05 0.40 BSC 4.40 REF 5.10 ±0.05 6.50 ±0.05 RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED 4.00 ±0.10 0.75 ±0.05 R = 0.10 TYP PIN 1 NOTCH R = 0.30 OR 0.35 × 45° CHAMFER 2.40 REF 37 38 0.40 ±0.10 PIN 1 TOP MARK (NOTE 6) 1 2 4.65 ±0.10 6.00 ±0.10 4.40 REF 2.65 ±0.10 (UFE38) QFN 0708 REV B 0.200 REF 0.00 – 0.05 R = 0.115 TYP 0.20 ±0.05 0.40 BSC BOTTOM VIEW—EXPOSED PAD NOTE: 1. DRAWING IS NOT A JEDEC PACKAGE OUTLINE 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 3840fa 22 For more information www.linear.com/LT3840 LT3840 Revision History REV DATE DESCRIPTION A 8/14 Changed PG hysteresis PAGE NUMBER 4 Modified schematic 20 3840fa Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representaFor more information www.linear.com/LT3840 tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. 23 LT3840 Typical Application Inverting Application, 24V Input to –15V, 10A VIN 18V TO 36V 1µF CIN 68µF ×2 1M L2, 33µH AUXBST AUXSW1 VIN AUXSW2 INTVCC AUXVIN EN 80.6k LT3840 UVLO 4.7µF 1N4448 BOOST 1µF OVLO TG PG SW SYNC BG M1 M2 MODE RT SENSE+ VC SENSE– FB TK/SS 39.2k 2200pF 49.9k 33nF 100pF GND IMON ICOMP 2200pF ICTRL L1, 15µH D1 RSENSE 5mΩ COUT1 10µF ×2 COUT2 330µF ×2 VOUT –15V 10A 110k 10k 7.68k M1: INFINEON, BSC160N10NS3 M2: INFINEON, BSC070N1ONS3 L1: WÜRTH, 7443631500 L2: COILCRAFT, ME3220-333KL D1: DIODES INC. PDS5100H 470pF VOUT –15V 3840 TA05 Related Parts PART NUMBER DESCRIPTION COMMENTS LT3845A 60V, Low IQ, Single Output Synchronous Step-Down DC/DC Controller Synchronizable Fixed Frequency 100kHz to 600kHz, 4V ≤ VIN ≤ 60V, 1.23V ≤ VOUT ≤ 36V, IQ = 120µA, TSSOP-16 Package LT3844 60V, Low IQ, Single Output Step-Down DC/DC Controller Synchronizable Fixed Frequency 50kHz to 600kHz, 4V ≤ VIN ≤ 60V, 1.23V ≤ VOUT ≤ 36V, IQ = 120µA, TSSOP-16 Package LTC3864 60V, Low IQ, Step-Down DC/DC Controller 100% Duty Cycle Capability Selectable Fixed Frequency 200kHz to 600kHz, 3.5V ≤ VIN ≤ 60V, 0.8V ≤ VOUT ≤ VIN, IQ = 40µA, MSOP-10E Package LTC3891 60V, Low IQ, Synchronous Step-Down DC/DC Controller Phase-Lockable Fixed Frequency 50kHz to 900kHz, 4V ≤ VIN ≤ 60V, 0.8V ≤ VOUT ≤ 24V, IQ = 50µA LTC3890/ LTC3890-1/ LTC3890-2 60V, Low IQ, Dual 2-Phase Synchronous Step-Down DC/DC Controller Phase-Lockable Fixed Frequency 50kHz to 900kHz, 4V ≤ VIN ≤ 60V, 0.8V ≤ VOUT ≤ 24V, IQ = 50µA LTC3859A Low IQ, Triple Output Buck/Buck/Boost Synchronous DC/DC Controller All Outputs Remain in Regulation Through Cold Crank, 2.5V ≤ VIN ≤ 38V, VOUT(BUCKS) Up to 24V, VOUT(BOOST) Up to 60V, IQ = 27µA LT8705 30V VIN and VOUT Synchronous 4-Switch Buck-Boost Controller Synchronizable Fixed Frequency 100kHz to 400kHz, 2.8V ≤ VIN ≤ 80V, 1.3V ≤ VOUT ≤ 30V, Four Regulation Loops 3840fa 24 Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, CA 95035-7417 For more information www.linear.com/LT3840 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com/LT3840 LT 0814 REV A • PRINTED IN USA  LINEAR TECHNOLOGY CORPORATION 2014