LT6376HDF#PBF

LT6376 ±230V Common Mode Voltage G = 10 Difference Amplifier FEATURES DESCRIPTION ±230V Common Mode Voltage Range nn 105nV/√Hz Input Referred Noise (Resistor Divider = 3.1) nn 90dB Minimum CMRR nn 0.0075% (75ppm) Maximum Gain Error nn 1ppm/°C Maximum Gain Error Drift nn 2ppm Maximum Gain Nonlinearity nn Wide Supply Voltage Range: 3.3V to 50V nn Rail-to-Rail Output nn 350µA Supply Current nn Selectable Internal Resistor Divider Ratio nn 200µV Maximum Input Offset Voltage nn 300kHz –3dB Bandwidth (Resistor Divider = 3.1) nn 160kHz –3dB Bandwidth (Resistor Divider = 10.3) nn –40°C to 125°C Specified Temperature Range nn Low Power Shutdown: 20μA (DFN Package Only) nn Space-Saving MSOP and DFN Packages The LT®6376 is a gain of 10 difference amplifier which combines excellent DC precision, a very high input common mode range and a wide supply voltage range. It includes a precision op amp and a highly-matched thin film resistor network. It features excellent CMRR, extremely low gain error and extremely low gain drift. APPLICATIONS The LT6376 is specified over the –40°C to 125°C temperature range and is available in space-saving MSOP16 and DFN14 packages. nn High Side or Low Side Current Sensing Bidirectional Wide Common Mode Range Current Sensing nn High Voltage to Low Voltage Level Translation nn Precision Difference Amplifier nn Replacement for Isolation Circuits nn nn Comparing the LT6376 to existing difference amplifiers with high common mode voltage range, the gain of 10 and selectable resistor divider ratios of the LT6376 offer superior system performance by allowing the user to achieve low input referred noise with maximum precision and speed. The op amp at the core of the LT6376 has Over-The-Top® protected inputs which allow for robust operation in environments with unpredictable voltage conditions. See the Applications Information section for more details. All registered trademarks and trademarks are the property of their respective owners. TYPICAL APPLICATION Precision Wide Voltage Range, Bidirectional Current Monitor Typical Distribution of CMRR 25V –REFB –REFC 19k 38k 23.75k VSOURCE+ = –230V TO 230V 76k –IN RSENSE 1Ω RC 1Ω 638 UNITS FROM TWO RUNS 100 DF14(12) 760k – 76k +IN 120 V+ OUT VOUT = ±10mV/mA + REF LOAD 19k 38k +REFA +REFB 23.75k +REFC 760k SHDN V– –25V 6376 TA01a NUMBER OF UNITS –REFA VS = ±25V VIN = ±230V DIV = 10.3 80 60 40 20 0 –40 –30 –20 –10 0 10 20 CMRR (µV/V = ppm) 30 40 6376 TA01b 6376f For more information www.linear.com/LT6376 1 LT6376 ABSOLUTE MAXIMUM RATINGS (Note 1) Supply Voltages (V+ to V–)...............................................................60V +IN, –IN, (Note 2) Each Input..........................................................±240V Differential.........................................................±480V +REFA, –REFA, +REFB, –REFB, +REFC, –REFC, REF, SHDN (Note 2)................. (V+ + 0.3V) to (V– –0.3V) Output Current (Continuous) (Note 6).....................50mA Output Short-Circuit Duration (Note 3) Thermally Limited Temperature Range (Notes 4, 5) LT6376I................................................–40°C to 85°C LT6376H............................................. –40°C to 125°C Storage Temperature Range................... –65°C to 150°C MSOP Lead Temperature (Soldering, 10 sec)......... 300°C PIN CONFIGURATION TOP VIEW +IN +REFA TOP VIEW 14 –IN 1 3 – 12 –REFA +REFA 3 11 –REFB 5 6 7 8 +REFB 4 +REFC 5 10 –REFC REF 6 9 V+ SHDN 7 8 OUT 15 V +IN 1 +REFB +REFC REF V– 14 –REFA –REFB –REFC V+ OUT 12 11 10 9 MS PACKAGE VARIATION: MS16 (12) 16-LEAD PLASTIC MSOP TJMAX = 150°C, qJA = 130°C/W DF PACKAGE 14(12)-LEAD (4mm × 4mm) PLASTIC DFN TJMAX = 150°C, qJA = 43°C/W, qJC = 4°C/W EXPOSED PAD (PIN 15) IS V–, MUST BE SOLDERED TO PCB ORDER INFORMATION 16 –IN http://www.linear.com/product/LT6376#orderinfo TUBE TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE LT6376IDF#PBF LT6376IDF#TRPBF 6376 14-Lead (4mm × 4mm) Plastic DFN –40°C to 85°C LT6376HDF#PBF LT6376HDF#TRPBF 6376 14-Lead (4mm × 4mm) Plastic DFN –40°C to 125°C LT6376IMS#PBF LT6376IMS#TRPBF 6376 16-Lead Plastic MSOP –40°C to 85°C LT6376HMS#PBF LT6376HMS#TRPBF 6376 16-Lead Plastic MSOP –40°C to 125°C *The temperature grade is identified by a label on the shipping container. Consult ADI Marketing for parts specified with wider operating temperature ranges. Parts ending with PBF are RoHS and WEEE compliant. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/. Some packages are available in 500 unit reels through designated sales channels with #TRMPBF suffix. 6376f 2 For more information www.linear.com/LT6376 LT6376 The l denotes the specifications which apply over the full operating ELECTRICAL CHARACTERISTICS temperature range, –40°C < TA < 85°C for I-grade parts, –40°C < TA < 125°C for H-grade parts, otherwise specifications are at TA = 25°C, V+ = 15V, V– = –15V, VCM = VOUT = VREF = 0V. VCMOP is the common mode voltage of the internal op amp. For Resistor Divider Ratio = 3.1, ±REFA = ± REFC = OPEN, ±REFB = 0V. For Resistor Divider Ratio = 8.3, ±REFA = ±REFC = 0V, ±REFB = OPEN. For Resistor Divider Ratio = 10.3, ±REFA = ±REFB = ±REFC = 0V. SYMBOL PARAMETER CONDITIONS G Gain VOUT = ±10V ∆G Gain Error, MS16 Package VOUT = ±10V Gain Error, DF14 Package VOUT = ±10V ∆G/∆T Gain Drift vs Temperature (Note 6) VOUT = ±10V GNL Gain Nonlinearity VOUT = ±10V ∆G MIN TYP Input Offset Voltage V– < VCMOP < V+ –1.75V Resistor Divider Ratio = 3.1 Resistor Divider Ratio = 3.1 Resistor Divider Ratio = 8.3 Resistor Divider Ratio = 8.3 Resistor Divider Ratio = 10.3 Resistor Divider Ratio = 10.3 % % ±0.002 ±0.0085 ±0.0095 % % ±0.2 ±1 ppm/°C ±1 ±2 ±3 ppm ppm 50 200 600 500 1600 600 2000 l 120 l 160 l ∆VOS/∆T Input Offset Voltage Drift (Note 6) V– < VCMOP < V+ –1.75V Resistor Divider Ratio = 3.1 Resistor Divider Ratio = 10.3 l l RIN Input Impedance (Note 8) Common Mode Resistor Divider Ratio = 3.1 Resistor Divider Ratio = 8.3 Resistor Divider Ratio = 10.3 Differential l l l l CMRR Common Mode Rejection Ratio, MS16 Package 4 12 µV/°C µV/°C 47 36 35 128 56 43 42 152 65 50 49 176 kΩ kΩ kΩ kΩ 90 88 98 l dB dB 90 88 98 l dB dB 90 88 98 l dB dB 88 86 95 l dB dB 88 86 95 l dB dB 88 86 95 l dB dB Resistor Divider Ratio = 10.3, VCM = ±150V, VS = ±25V, TA = –40°C to 125°C 90 86 96 l dB dB Resistor Divider Ratio = 10.3, VCM = ±230V, VS = ±25V, TA = –40°C to 85°C 90 89 96 l dB dB l –230 l l l 105 98 96 Resistor Divider Ratio = 3.1, VCM = ±28V Resistor Divider Ratio = 10.3, VCM = ±28V Common Mode Rejection Ratio, DF14 Package Resistor Divider Ratio = 3.1, VCM = ±28V Resistor Divider Ratio = 8.3, VCM = ±28V Resistor Divider Ratio = 10.3, VCM = ±28V VCM Input Voltage Range (Note 7) PSRR Power Supply Rejection Ratio (Input Referred) VS = ±1.65V to ±25V, VCM = VOUT = Mid-Supply Resistor Divider Ratio = 3.1 Resistor Divider Ratio = 8.3 Resistor Divider Ratio = 10.3 Input Referred Noise Voltage Density f = 1kHz Resistor Divider Ratio = 3.1 Resistor Divider Ratio = 10.3 eni µV µV µV µV µV µV 1.5 5 Resistor Divider Ratio = 8.3, VCM = ±28V CMRR V/V ±0.0075 ±0.0085 l l UNITS ±0.002 l l VOS MAX 10 230 V 120 110 107 dB dB dB 105 245 nV/√Hz nV/√Hz 6376f For more information www.linear.com/LT6376 3 LT6376 The l denotes the specifications which apply over the full operating ELECTRICAL CHARACTERISTICS temperature range, –40°C < TA < 85°C for I-grade parts, –40°C < TA < 125°C for H-grade parts, otherwise specifications are at TA = 25°C, V+ = 15V, V– = –15V, VCM = VOUT = VREF = 0V. VCMOP is the common mode voltage of the internal op amp. For Resistor Divider Ratio = 3.1, ±REFA = ± REFC = OPEN, ±REFB = 0V. For Resistor Divider Ratio = 8.3, ±REFA = ±REFC = 0V, ±REFB = OPEN. For Resistor Divider Ratio = 10.3, ±REFA = ±REFB = ±REFC = 0V. SYMBOL PARAMETER CONDITIONS Input Referred Noise Voltage f = 0.1Hz to 10Hz Resistor Divider Ratio = 3.1 Resistor Divider Ratio = 10.3 VOL Output Voltage Swing Low (Referred to V–) No Load ISINK = 5mA l l 5 280 50 500 mV mV VOH Output Voltage Swing High (Referred to V+) No Load ISOURCE = 5mA l l 5 400 20 750 mV mV ISC Short-Circuit Output Current 50Ω to V+ 50Ω to V– l l 10 10 SR Slew Rate ∆VOUT = ±5V l 2.2 BW Small Signal –3dB Bandwidth Resistor Divider Ratio = 3.1 Resistor Divider Ratio = 8.3 Resistor Divider Ratio = 10.3 tS Settling Time Resistor Divider Ratio = 3.1 0.01%, ∆VOUT = 10V 0.1%, ∆VOUT = 10V 0.01%, ∆VCM = 10V, ∆VDIFF = 0V 41 26 15 µs µs µs Resistor Divider Ratio = 10.3 0.01%, ∆VOUT = 10V 0.1%, ∆VOUT = 10V 0.01%, ∆VCM = 10V, ∆VDIFF = 0V 26 16 5 µs µs µs VS MIN Supply Voltage tON Turn-On Time VIL SHDN Input Logic Low (Referred to V+) l VIH SHDN Input Logic High (Referred to V+) l ISHDN SHDN Pin Current Supply Current MAX 4 10 l IS TYP µVP-P µVP-P 28 30 mA mA 4.1 V/µs 300 190 160 kHz kHz kHz 3 3.3 50 50 16 l Active, VSHDN ≥ V+ –1.2V Active, VSHDN ≥ V+ –1.2V Shutdown, VSHDN ≤ V+ –2.5V Shutdown, VSHDN ≤ V+ –2.5V V V µs –2.5 –1.2 V V –10 –15 µA 350 400 600 25 70 µA µA µA µA l 20 l UNITS 6376f 4 For more information www.linear.com/LT6376 LT6376 The l denotes the specifications which apply over the full operating ELECTRICAL CHARACTERISTICS temperature range, –40°C < TA < 85°C for I-grade parts, –40°C < TA < 125°C for H-grade parts, otherwise specifications are at TA = 25°C, V+ = 5V, V– = 0V, VCM = VOUT = VREF = Mid-Supply. VCMOP is the common mode voltage of the internal op amp. For Resistor Divider Ratio = 3.1, ±REFA = ±REFC = OPEN, ±REFB = Mid-Supply. For Resistor Divider Ratio = 8.3, ±REFA = ±REFC = Mid-Supply, ±REFB = OPEN. For Resistor Divider Ratio = 10.3, ±REFA = ±REFB = ±REFC = Mid-Supply. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS G Gain VOUT = 1V to 4V 10 ∆G Gain Error, MS16 Package VOUT = 1V to 4V ±0.002 ±0.01 ±0.012 % % Gain Error, DF14 Package VOUT = 1V to 4V ±0.002 ±0.012 ±0.013 % % ∆G/∆T Gain Drift vs Temperature (Note 6) VOUT = 1V to 4V ±0.2 ±1 GNL Gain Nonlinearity VOUT = 1V to 4V VOS Input Offset Voltage 0 < VCMOP < V+ –1.75V Resistor Divider Ratio = 3.1 Resistor Divider Ratio = 3.1 Resistor Divider Ratio = 8.3 Resistor Divider Ratio = 8.3 Resistor Divider Ratio = 10.3 Resistor Divider Ratio = 10.3 ∆G ∆VOS/∆T RIN CMRR CMRR PSRR eni l l l ±1 50 l 120 l 160 l Input Offset Voltage Drift (Note 6) 0 < VCMOP < V+ –1.75V Resistor Divider Ratio = 3.1 Resistor Divider Ratio = 10.3 l l Input Impedance (Note 8) Common Mode Resistor Divider Ratio = 3.1 Resistor Divider Ratio = 8.3 Resistor Divider Ratio = 10.3 Differential l l l l Resistor Divider Ratio = 3.1 VCM = –5.25V to +4.825V Common Mode Rejection Ratio, MS16 Package Common Mode Rejection Ratio, DF14 Package Power Supply Rejection Ratio (Input Referred) Input Referred Noise Voltage Density Input Referred Noise Voltage V/V ppm/°C ppm 200 600 500 1600 600 2000 µV µV µV µV µV µV 1.5 5 4 12 µV/°C µV/°C 47 36 35 128 56 43 42 152 65 50 49 176 kΩ kΩ kΩ kΩ 90 87 97 l dB dB Resistor Divider Ratio = 8.3 VCM = –18.25V to +8.725V 90 87 97 l dB dB Resistor Divider Ratio = 10.3 VCM = –23.25V to +10.225V 90 87 97 l dB dB Resistor Divider Ratio = 3.1 VCM = –5.25V to +4.825V 86 85 94 l dB dB Resistor Divider Ratio = 8.3 VCM = –18.25V to +8.725V 86 85 94 l dB dB Resistor Divider Ratio = 10.3 VCM = –23.25V to +10.225V 86 85 94 l dB dB VS = ±1.65V to ±25V, VCM = VOUT = Mid-Supply Resistor Divider Ratio = 3.1 Resistor Divider Ratio = 8.3 Resistor Divider Ratio = 10.3 l l l 105 98 96 120 110 107 dB dB dB f = 1kHz Resistor Divider Ratio = 3.1 Resistor Divider Ratio = 10.3 105 245 nV/√Hz nV/√Hz f = 0.1Hz to 10Hz Resistor Divider Ratio = 3.1 Resistor Divider Ratio = 10.3 4 10 µVP-P µVP-P VOL Output Voltage Swing Low (Referred to V–) No Load ISINK = 5mA l l 5 280 50 500 mV mV VOH Output Voltage Swing High (Referred to V+) No Load ISOURCE = 5mA l l 5 400 20 750 mV mV 6376f For more information www.linear.com/LT6376 5 LT6376 The l denotes the specifications which apply over the full operating ELECTRICAL CHARACTERISTICS temperature range, –40°C < TA < 85°C for I-grade parts, –40°C < TA < 125°C for H-grade parts, otherwise specifications are at TA = 25°C, V+ = 5V, V– = 0V, VCM = VOUT = VREF = Mid-Supply. VCMOP is the common mode voltage of the internal op amp. For Resistor Divider Ratio = 3.1, ±REFA = ±REFC = OPEN, ±REFB = Mid-Supply. For Resistor Divider Ratio = 8.3, ±REFA = ±REFC = Mid-Supply, ±REFB = OPEN. For Resistor Divider Ratio = 10.3, ±REFA = ±REFB = ±REFC = Mid-Supply. SYMBOL PARAMETER CONDITIONS ISC Short-Circuit Output Current 50Ω to V+ 50Ω to V– MIN TYP l l 10 10 27 25 mA mA SR Slew Rate ∆VOUT = 3V BW Small Signal –3dB Bandwidth Resistor Divider Ratio = 3.1 Resistor Divider Ratio = 8.3 Resistor Divider Ratio = 10.3 l 1.9 3 V/µs 300 190 160 kHz kHz kHz tS Settling Time Resistor Divider Ratio = 3.1 0.01%, ∆VOUT = 2V 0.1%, ∆VOUT = 2V 0.01%, ∆VCM = 2V, ∆VDIFF = 0V 34 20 10 µs µs µs Resistor Divider Ratio = 10.3 0.01%, ∆VOUT = 2V 0.1%, ∆VOUT = 2V 0.01%, ∆VCM = 2V, ∆VDIFF = 0V 40 16 5 µs µs µs VS Supply Voltage l tON Turn-On Time VIL SHDN Input Logic Low (Referred to V+) l VIH SHDN Input Logic High (Referred to V+) l ISHDN SHDN Pin Current IS Supply Current 3 3.3 MAX 50 50 22 l Active, VSHDN ≥ V+ –1.2V Active, VSHDN ≥ V+ –1.2V Shutdown, VSHDN ≤ V+ –2.5V Shutdown, VSHDN ≤ V+ –2.5V Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: See Common Mode Voltage Range in the Applications Information section of this data sheet for other considerations when taking +IN/–IN pins to ±240V. All other pins should not be taken more than 0.3V beyond the supply rails. Note 3: A heat sink may be required to keep the junction temperature below absolute maximum. This depends on the power supply, input voltages and the output current. Note 4: The LT6376I is guaranteed functional over the operating temperature range of –40°C to 85°C. The LT6376H is guaranteed functional over the operating temperature range of –40°C to 125°C. V V µs –2.5 –1.2 V V –10 –15 µA 330 370 525 20 40 µA µA µA µA l 15 l UNITS Note 5: The LT6376I is guaranteed to meet specified performance from –40°C to 85°C. The LT6376H is guaranteed to meet specified performance from –40°C to 125°C. Note 6: This parameter is not 100% tested. Note 7: Input voltage range is guaranteed by the CMRR test at VS = ±25V and all REF pins at ground (Resistor Divider Ratio = 10.3). For the other voltages, this parameter is guaranteed by design and through correlation with the ±25V test. See Common Mode Voltage Range in the Applications Information section to determine the valid input voltage range under various operating conditions. Note 8: Input impedance is tested by a combination of direct measurement and correlation to the CMRR and gain error tests. 6376f 6 For more information www.linear.com/LT6376 LT6376 TYPICAL PERFORMANCE CHARACTERISTICS Typical Distribution of CMRR VS = ±25V VIN = ±230V DIV = 10.3 599 UNITS FROM TWO RUNS 100 MS16(12) NUMBER OF UNITS 80 60 40 20 Typical Distribution of CMRR 80 60 40 30 0 –40 –30 –20 –10 0 10 20 CMRR (µV/V = ppm) 40 1387 UNITS FROM FOUR RUNS BOTH PACKAGES 350 80 60 40 30 0 –40 –30 –20 –10 0 10 20 CMRR (µV/V = ppm) 40 6376 G02 Typical Distribution of Gain Error 400 Typical Distribution of Gain Error 664 UNITS 175 FROM TWO RUNS MS16(12) VS = ±15V VOUT = ±10V 300 Typical Distribution of Gain Error 685 UNITS 175 FROM TWO RUNS DF14(12) VS = ±15V VOUT = ±10V 125 100 75 125 100 75 100 50 50 50 25 25 0 –70 –50 –30 –10 10 30 GAIN ERROR (ppm) 50 0 –70 70 –50 –30 –10 10 30 GAIN ERROR (ppm) 50 Typical Distribution of Gain Nonlinearity 250 1452 UNITS 225 FROM FOUR RUNS BOTH PACKAGES 200 125 NUMBER OF UNITS 1393 UNITS FROM FOUR RUNS BOTH PACKAGES 150 100 75 50 25 0 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 GAIN NONLINEARITY (ppm) 2 6376 G07 –50 –30 –10 10 30 GAIN ERROR (ppm) 50 70 6376 G06 Typical Distribution of Input Offset Voltage VS = ±15V VOUT = ±10V 175 0 –70 70 6376 G05 6376 G04 200 VS = ±15V VOUT = ±10V 150 NUMBER OF UNITS NUMBER OF UNITS 150 40 200 150 200 30 6376 G03 200 250 VS = ±15V VIN = ±28V DIV = 3.1 20 6376 G01 NUMBER OF UNITS 599 UNITS FROM TWO RUNS 100 DF14(12) VS = ±15V VIN = ±28V DIV = 3.1 20 0 –40 –30 –20 –10 0 10 20 CMRR (µV/V = ppm) NUMBER OF UNITS 120 Typical Distribution of Input Offset Voltage 250 DIV = 3.1 225 200 175 NUMBER OF UNITS NUMBER OF UNITS 638 UNITS FROM TWO RUNS 100 DF14(12) Typical Distribution of CMRR 120 NUMBER OF UNITS 120 TA = 25°C, VS = ±15V, unless otherwise noted. 150 125 100 75 150 125 100 75 50 25 25 6376 G08 DIV = 8.3 175 50 0 –200 –150 –100 –50 0 50 100 150 200 OFFSET VOLTAGE (µV) 1452 UNITS FROM FOUR RUNS BOTH PACKAGES 0 –500 –375 –250 –125 0 125 250 375 500 OFFSET VOLTAGE (µV) 6376 G09 6376f For more information www.linear.com/LT6376 7 LT6376 TYPICAL PERFORMANCE CHARACTERISTICS Typical Distribution of Input Offset Voltage 300 DIV = 10.3 240 175 150 125 100 75 300 180 240 150 120 90 180 150 120 90 60 60 25 30 30 –5 –4 –3 –2 –1 0 1 2 PSRR (µV/V) 3 6376 G10 210 1452 UNITS FROM FOUR RUNS BOTH PACKAGES 180 150 120 90 60 30 0 –15 –12 –9 –6 –3 0 3 6 PSRR (µV/V) 9 120 12 15 80 60 40 20 DIV = 3.1 DIV = 8.3 DIV = 10.3 10 100 1k 10k 100k FREQUENCY (Hz) 1M 6376 G13 10M 250 200 150 50 0 –50 –100 –150 –200 –250 –300 VS = ±10V VS = ±15V VS = ±12V VS = ±10V –20 –16 –12 –8 –4 0 4 8 12 16 20 OUTPUT VOLTAGE (V) 6376 G16 10 15 20 25 30 35 40 POWER SUPPLY VOLTAGE (±V) 45 VS = ±5V, RL = 10kΩ OUTPUT ERROR (2mV/DIV) VS = ±12V 5 Typical Gain Error for Low Supply Voltages (Curves Offset for Clarity) Typical Gain Error for RL = 2kΩ (Curves Offset for Clarity) OUTPUT ERROR (2mV/DIV) OUTPUT ERROR (2mV/DIV) VS = ±15V 0 6376 G15 VS = ±18V VS = ±18V DIV = 3.1 DIV = 4.3 DIV = 5.1 DIV = 6.3 DIV = 7.1 DIV = 8.3 DIV = 10.3 OPAMP IN OTT REGION 100 6376 G14 Typical Gain Error for RL = 10kΩ (Curves Offset for Clarity) 10 300 100 0 8 Common Mode Voltage Range vs Power Supply Voltage COMMON MODE OPERATING RANGE (V) 240 VS = ±1.65V to ±25V DIV = 10.3 6 6376 G12 CMRR vs Frequency COMMON MODE REJECTION RATIO (dB) 270 0 –10 –8 –6 –4 –2 0 2 4 PSRR (µV/V) 5 6376 G11 Typical Distribution of PSRR (Input Referred) 300 4 1452 UNITS FROM FOUR RUNS BOTH PACKAGES 210 50 0 VS = ±1.65V to ±25V DIV = 8.3 270 1452 UNITS FROM FOUR RUNS BOTH PACKAGES 210 0 –600 –450 –300 –150 0 150 300 450 600 OFFSET VOLTAGE (µV) NUMBER OF UNITS Typical Distribution of PSRR (Input Referred) VS = ±1.65V to ±25V DIV = 3.1 270 NUMBER OF UNITS NUMBER OF UNITS 1452 UNITS 225 FROM FOUR RUNS BOTH PACKAGES 200 Typical Distribution of PSRR (Input Referred) NUMBER OF UNITS 250 TA = 25°C, VS = ±15V, unless otherwise noted. VS = ±5V, RL = 2kΩ VS = ±5V, RL = 1kΩ VS = ±2.5V, RL = 1kΩ –20 –16 –12 –8 –4 0 4 8 12 16 20 OUTPUT VOLTAGE (V) 6376 G17 –5 –4 –3 –2 –1 0 1 2 OUTPUT VOLTAGE (V) 3 4 5 6376 G18 6376f 8 For more information www.linear.com/LT6376 LT6376 TYPICAL PERFORMANCE CHARACTERISTICS Gain Nonlinearity Gain Nonlinearity 100 20 0 –20 60 GAIN ERROR (ppm) 4 ERROR (ppm) 2 0 –2 –4 –60 –6 –80 –8 –10 –5 0 5 OUTPUT VOLTAGE (V) 10 –10 –15 15 –10 –5 0 5 OUTPUT VOLTAGE (V) 6376 G19 30 OUTPUT VOLTAGE (V) 0 –10 –20 –30 5 130°C 85°C 25°C –45°C 0 –5 –10 –15 –50 –75 –50 –25 0 25 50 75 100 125 150 175 TEMPERATURE (°C) –20 0 5 10 15 20 25 OUTPUT CURRENT (mA) 6376 G22 40 30 30 20 GAIN (dB) –10 –20 –80 0.001 –6 –80 –8 6376 G21 DIV = 3.1 DIV = 4.3 DIV = 5.1 DIV = 6.3 DIV = 7.1 DIV = 8.3 DIV = 10.3 0.01 0.1 1 FREQUENCY (MHz) 3 2 1 MS16(12) θJA = 130°C/W 0 –60 –40 –20 0 20 40 60 80 100 120 140 160 AMBIENT TEMPERATURE (°C) 6376 G24 500 DIV = 3.1 0 –10 –20 –30 –40 –50 10 6376 G25 DF14(12) θJA = 43°C/W 4 Input Referred Noise Density vs Frequency 10 0 –70 –4 –60 –10 –100 –75 –50 –25 0 25 50 75 100 125 150 175 TEMPERATURE (°C) 30 20 10 –60 –2 –40 Frequency Response vs Capacitive Load 40 –50 0 6376 G23 Gain vs Frequency –40 0 5 10 –40 –30 2 Maximum Power Dissipation vs Temperature 15 10 4 –20 20 20 6 20 Output Voltage vs Load Current Vs = ±15V 20 UNITS DIV = 3.1 40 15 8 6376 G20 CMRR vs Temperature 50 10 40 MAXIMUM POWER DISSIPATION (W) –100 –15 VOLTAGE NOISE DENSITY (nV/√Hz) ERROR (ppm) 40 10 VS = ±15V G = 10 VOUT = ±10V 10 UNITS DIV = 3.1 80 –60 0.001 0nF 0.5nF 1nF 1.5nF 2nF 3nF 5nF 0.01 0.1 1 FREQUENCY (MHz) 10 6376 G26 450 400 350 300 DIV = 10.3 250 200 150 DIV = 3.1 100 50 0 1 10 100 1k FREQUENCY (Hz) 10k 100k 6376 G27 6376f For more information www.linear.com/LT6376 GAIN ERROR (m%) 60 VS = ±15V 8 R = 1MΩ L 6 –40 CMRR (µV/V) Gain Error vs Temperature 100 10 VS = ±15V 80 R = 100kΩ L GAIN (dB) TA = 25°C, VS = ±15V, unless otherwise noted. 9 LT6376 TYPICAL PERFORMANCE CHARACTERISTICS 0.1Hz to 10Hz Noise (Input Referred) Positive PSRR vs Frequency 6 POWER SUPPLY REJECTION RATIO (dB) DIV = 3.1 DIV = 10.3 4 NOISE (µV) 2 0 –2 –4 –6 –8 –10 140 130 120 110 100 90 80 70 60 50 40 30 20 10 0 DIV = 3.1 DIV = 8.3 DIV = 10.3 10 TIME (10s/DIV) 100 1k 10k FREQUENCY (Hz) Slew Rate vs Temperature 70 60 50 40 30 20 10 10 100 1k 10k FREQUENCY (Hz) 3 2 100k 6376 G30 Small-Signal Step Response DIV = 3.1 CL = 1000pF RL = 2kΩ VOLTAGE (25mV/DIV) VOLTAGE (5V/DIV) SLEW RATE (V/µs) 4 0V 0V RL = 10kΩ VOUT = ±5V 0 –75 –50 –25 0 25 50 75 100 125 150 175 TEMPERATURE (°C) TIME (4µs/DIV) TIME (4µs/DIV) 6376 G31 140 DIV = 3.1 120 R = 2kΩ L 100 6376 G33 6376 G32 Small-Signal Step Response vs Capacitive Load Large-Signal Step Response Small-Signal Step Response DIV = 10.3 CL = 1000pF RL = 2kΩ 20pF 560pF 1000pF VOLTAGE (5V/DIV) 60 40 20 0 –20 DIV = 10.3 CL = 1000pF RL = 2kΩ VOLTAGE (25mV/DIV) 80 VOLTAGE (mV) 80 DIV = 3.1 C L = 1000pF R L = 2kΩ 5 1 90 Large-Signal Step Response Rising Falling 6 100 0 100k DIV = 3.1 DIV = 8.3 DIV = 10.3 110 6376 G29 6376 G28 7 Negative PSRR vs Frequency 120 POWER SUPPLY REJECTION RATIO (dB) 10 8 TA = 25°C, VS = ±15V, unless otherwise noted. 0V –40 0V –60 –80 –100 0 5 10 15 20 25 TIME (µs) 30 35 40 6376 G34 TIME (4µs/DIV) TIME (4µs/DIV) 6376 G35 6376 G36 6376f 10 For more information www.linear.com/LT6376 LT6376 TYPICAL PERFORMANCE CHARACTERISTICS Small-Signal Step Response vs Capacitive Load DIV = 10.3 120 R = 2kΩ L 100 Settling Time 20pF 560pF 1000pF 3.0 ERROR VOLTAGE (mV) 0 –20 –40 –60 40 –4 –6 –2.0 –8 2 0 0 –3.0 –2 –3.5 –4 –4.0 –2.5 DIV = 3.1 INPUT OFFSET VOLTAGE (µV) OUTPUT 1V/DIV INPUT COMMON MODE 40V/DIV TIME (4µs/DIV) 6376 G40 –14 –16 TIME (10µs/DIV) Quiescent Current vs Temperature 550 DIV = 3.1 20 UNITS 300 –12 6376 G39 Input Offset Voltage vs Temperature 400 –10 OUTPUT VOLTAGE 6376 G38 Input Common Mode Step Response 0 –1.5 0.5 6376 G37 2 –1.0 4 TIME (10µs/DIV) ERROR VOLTAGE 4 –2 1.0 ERROR VOLTAGE DIV = 3.1 –0.5 6 –1.0 35 10 8 –80 30 0 1.5 –100 15 20 25 TIME (µs) 0.5 12 2.0 –0.5 10 14 10 UNITS 500 QUIESCENT CURRENT (µA) VOLTAGE (mV) 20 1.0 OUTPUT VOLTAGE (V) 40 OUTPUT VOLTAGE 2.5 16 OUTPUT VOLTAGE (V) 60 5 DIV = 3.1 3.5 80 0 Settling Time 4.0 ERROR VOLTAGE (mV) 140 TA = 25°C, VS = ±15V, unless otherwise noted. 200 100 0 –100 –200 450 400 350 300 –300 250 –400 –60 –40 –20 0 20 40 60 80 100 120 140 TEMPERATURE (°C) 200 –75 –50 –25 0 25 50 75 100 125 150 175 TEMPERATURE (°C) 6376 G42 6376 G41 Quiescent Current vs Supply Voltage Thermal Shutdown Hysteresis 600 600 500 500 QUIESCENT CURRENT (µA) SUPPLY CURRENT (µA) TA = 150°C 400 300 200 100 0 145 150 155 160 165 TEMPERATURE (°C) 170 400 300 200 TA = –55°C 100 PARAMETRIC SWEEP IN ~25°C INCREMENTS 0 0 6376 G43 10 20 30 40 SUPPLY VOLTAGE (V) 50 6376 G44 6376f For more information www.linear.com/LT6376 11 LT6376 TYPICAL PERFORMANCE CHARACTERISTICS Quiescent Current vs SHDN Voltage 40 25°C –40°C –55°C 550 VSHDN = 0V 150°C 125°C 85°C 500 QUIESCENT CURRENT (µA) QUIESCENT CURRENT (µA) 150°C 125°C 85°C 30 20 10 450 Minimum Supply Voltage 150 25°C –40°C –55°C CHANGE IN INPUT OFFSET VOLTAGE (µV) Shutdown Quiescent Current vs Supply Voltage 50 TA = 25°C, VS = ±15V, unless otherwise noted. VS = ±15V 400 350 300 250 200 150 100 50 0 0 10 20 30 40 SUPPLY VOLTAGE (V) 50 6376 G45 0 0 5 10 SHDN VOLTAGE (V) 15 6376 G46 DIV = 3.1 100 50 TA = 125°C 0 –50 TA = 25°C –100 TA = –45°C –150 0 1 2 3 4 TOTAL SUPPLY VOLTAGE (V) 5 6376 G47 6376f 12 For more information www.linear.com/LT6376 LT6376 PIN FUNCTIONS (DFN/MSOP) V+ (Pin 9/Pin 10):Positive Supply Pin. V– (Exposed Pad Pin 15/Pin 8):Negative Supply Pin. OUT (Pin 8/Pin 9):Output Pin. +IN (Pin 1/Pin 1):Noninverting Input Pin. Accepts input voltages from 230V to –230V. +REFA (Pin 3/Pin 3):Reference Pin A. Sets the input common mode range and the output noise and offset. +REFB (Pin 4/Pin 5):Reference Pin B. Sets the input common mode range and the output noise and offset. +REFC (Pin 5/Pin 6):Reference Pin C. Sets the input common mode range and the output noise and offset. –REFA (Pin 12/Pin 14):Reference Pin A. Sets the input common mode range and the output noise and offset. –REFB (Pin 11/Pin 12):Reference Pin B. Sets the input common mode range and the output noise and offset. –REFC (Pin 10/Pin 11):Reference Pin C. Sets the input common mode range and the output noise and offset. REF (Pin 6/Pin 7):Reference Input. Sets the output level when the difference between the inputs is zero. SHDN (Pin 7) DFN Only:Shutdown Pin. Amplifier is active when this pin is tied to V+ or left floating. Pulling the pin >2.5V below V+ causes the amplifier to enter a low power state. –IN (Pin 14/Pin 16):Inverting Input Pin. Accepts input voltages from 230V to –230V. 6376f For more information www.linear.com/LT6376 13 LT6376 BLOCK DIAGRAM –REFA 19k –REFB 38k V+ –REFC 23.75k 760k –IN 76k +IN 76k – OUT + REF 760k V+ 19k +REFA 38k +REFB 23.75k +REFC 10µA SHDN V– 6376 BD APPLICATIONS INFORMATION TRANSFER FUNCTION The LT6376 is a gain of 10 difference amplifier with the transfer function: VOUT = 10 • (V+IN – V–IN) + VREF The voltage on the REF pin sets the output voltage when the differential input voltage (VDIFF = V+IN – V–IN) is zero. This reference is used to shift the output voltage to the desired input level of the next stage of the signal chain. BENEFITS OF SELECTABLE RESISTOR DIVIDER RATIOS The LT6376 offers smaller package size, better gain accuracy and better noise performance than existing high common mode voltage range difference amplifiers. Additionally, the LT6376 allows users to maximize system performance by selecting the resistor divider ratio (DIV) appropriate to their input common mode voltage range. A higher resistor divider ratio (DIV) enables a higher common mode voltage range at the input pins, but it also increases output noise and output offset/drift and decreases the –3dB bandwidth. Therefore, a tradeoff exists between input range and DC, AC, and drift performance of the part. It is recommended to use the lowest resistor divider ratio that achieves the required input common mode voltage range of the application in order to maximize the system SNR, precision and speed. Table 1 shows the noise, offset/drift, and –3dB bandwidth of the LT6376 in gain of 10 configurations. COMMON MODE VOLTAGE RANGE The wide common mode voltage range of the LT6376 is enabled by both a resistor divider at the input of the op amp and by an internal op amp that can withstand high input voltages. The internal resistor network of the LT6376 divides down the input common mode voltage. The resulting voltage at the op amp inputs determines the op amp’s operating region. In the configuration shown in Figure 1, a resistor divider is created at both op amp inputs by the 76k input resistor and the resistance from each input to ground, which is ~36.19k. The resistance to ground is formed by the 38k (REFB resistors) in parallel with the 760k (feedback/REF resistor). The result is a divide by 3.1 of the input voltage. As shown in Tables 1 to 5, different connections to reference pins (i.e. pins +REFA, –REFA, 6376f 14 For more information www.linear.com/LT6376 LT6376 APPLICATIONS INFORMATION Table 1. LT6376 Performance at Different Resistor Divider Ratios RESISTOR DIVIDER OPTIONS RESISTOR INPUT NOISE +REFA AND +REFB AND +REFC AND DIVIDER DIFFERENTIAL AT 1kHz –REFB –REFC REF RATIO (DIV) –REFA GAIN (nV/√Hz) 19k 38k 23.75k MAXIMUM INPUT OFFSET (µV) MAXIMUM INPUT OFFSET DRIFT (µV/°C) –3dB BANDWIDTH (kHz) 760k OPEN GND OPEN REF 3.1 10 105 200 4 300 OPEN OPEN GND REF 4.3 10 130 250 5.5 275 GND OPEN OPEN REF 5.1 10 145 300 6.5 245 OPEN GND GND REF 6.3 10 170 380 7.5 225 GND GND OPEN REF 7.1 10 185 420 8.5 200 GND OPEN GND REF 8.3 10 210 500 10 190 GND GND GND REF 10.3 10 245 600 12 160 +REFB, –REFB, +REFC, –REFC) result in different resistor divider ratios (DIV) and different attenuation of the LT6376’s input common mode voltage. The internal op amp of LT6376 has two operating regions: a) If the common mode voltage at the inputs of the internal op amp (VCMOP) is between V– and V+ –1.75V, the op amp operates in its normal region; b) If VCMOP is between V+ –1.75V and V– +76V, the op amp continues to operate, but in its Over-The-Top region with degraded performance (see Over-The-Top operation section of this data sheet for more detail). V+ V– The valid input common mode range changes depending on the voltages chosen for reference pins. Table 4 lists the valid input common mode voltage range for an LT6376 when the part is used with a single power supply, and REF and the other reference pins are connected to mid-supply. If, as shown in Table 5, the REF pin remains connected to mid-supply, while the other reference pins are connected to ground, the result is a higher positive input range at the expense of a more restricted negative input range. VS+ V–IN V+IN –REFB –REFC 19k 38k 23.75k –IN 76k +IN 76k 760k – OUT + REF 19k 38k +REFA +REFB 760k 23.75k +REFC SHDN Table 3 lists the valid input common mode voltage range for an LT6376 that results in the internal op amp operating in its Over-The-Top region. The reference pins can be connected to ground (as in Tables 2 and 3) or to any reference voltage. In order to achieve the specified gain accuracy and CMRR performance of the LT6376, this reference must have a very low impedance over the entire bandwidth of interest. As needed, ensure there are quality high frequency ceramic or film capacitors and low frequency electrolytic capacitors, from the reference to ground. Table 2 lists the valid input common mode voltage range for an LT6376 with different configurations of the reference pins when used with dual power supplies. Using –REFA the voltage ranges in this table ensures that the internal op amp is operating in its normal (and best) region. The figure entitled Common Mode Voltage Range vs Power Supply Voltage, in the Typical Performance Characteristics section of this data sheet, illustrates the information in Table 2 graphically. VOUT 6376 F01 VS+ VS– Figure 1. Basic Connections for Dual-Supply Operation (Resistor Divider Ratio = 3.1) 6376f For more information www.linear.com/LT6376 15 LT6376 APPLICATIONS INFORMATION Table 2. Common Mode Voltage Operating Range with Dual Power Supplies (Normal Region) Table 5. Common Mode Voltage Operating Range with a Single Power Supply, References to GND (Normal Region) INPUT RANGE (REF = GND) INPUT RANGE (REF = VS/2) +REFA +REFB +REFC VS = ±2.5V AND AND AND –REFA –REFB –REFC DIV HIGH LOW VS = ±15V HIGH VS = ±25V LOW HIGH LOW +REFA +REFB +REFC VS = 5V AND AND AND –REFA –REFB –REFC DIV HIGH LOW VS = 30V VS = 50V HIGH LOW HIGH LOW OPEN GND OPEN 3.1 2.325 –7.75 41.075 –46.5 72.075 –77.5 OPEN GND OPEN 3.1 9.825 –0.25 86.075 –1.5 147.075 –2.5 OPEN OPEN GND 4.3 3.225 –10.75 56.975 –64.5 99.975 –107.5 OPEN OPEN GND 4.3 13.725 –0.25 119.975 –1.5 204.975 –2.5 GND OPEN OPEN 5.1 3.825 –12.75 67.575 –76.5 118.575 –127.5 GND OPEN OPEN 5.1 16.325 –0.25 142.575 –1.5 230 –2.5 OPEN GND GND 6.3 4.725 –15.75 83.475 –94.5 146.475 –157.5 OPEN GND GND 6.3 20.225 –0.25 176.475 –1.5 230 –2.5 GND GND OPEN 7.1 5.325 –17.75 94.075 –106.5 165.075 –177.5 GND OPEN 7.1 22.825 –0.25 199.075 –1.5 230 –2.5 GND OPEN GND 8.3 6.225 –20.75 109.975 –124.5 192.975 –207.5 GND OPEN GND 8.3 26.725 –0.25 230 –1.5 230 –2.5 GND GND 10.3 7.725 –25.75 136.475 –154.5 GND GND 10.3 33.225 –0.25 230 –1.5 230 –2.5 GND 230 –230 Table 3. Common Mode Voltage Operating Range with Dual Power Supplies (Over-The-Top Region) INPUT RANGE (REF = GND) +REFA +REFB +REFC VS = ±2.5V VS = ±15V VS = ±25V AND AND AND –REFA –REFB –REFC DIV HIGH LOW HIGH LOW HIGH LOW OPEN GND OPEN 3.1 227.85 –7.75 189.1 –46.5 158.1 –77.5 OPEN OPEN GND 4.3 230 –10.75 230 –64.5 219.3 –107.5 GND OPEN OPEN 5.1 230 –12.75 230 –76.5 230 –127.5 –94.5 230 –157.5 OPEN GND GND 6.3 230 –15.75 230 GND GND OPEN 7.1 230 –17.75 230 –106.5 230 –177.5 GND OPEN GND 8.3 230 –20.75 230 –124.5 230 –207.5 GND GND 10.3 230 –25.75 230 –154.5 230 GND –230 Table 4. Common Mode Voltage Operating Range with a Single Power Supply, References to Mid-Supply (Normal Region) INPUT RANGE (REF = VS/2) +REFA +REFB +REFC VS = 5V AND AND AND –REFA –REFB –REFC DIV HIGH LOW VS = 30V HIGH VS = 50V LOW HIGH VS/2 OPEN OPEN 5.1 6.325 –10.25 82.575 –61.5 143.575 –102.5 VS/2 VS/2 6.3 7.225 –13.25 98.475 –79.5 171.475 –132.5 VS/2 OPEN 7.1 7.825 –15.25 109.075 –91.5 190.075 –152.5 VS/2 OPEN VS/2 8.3 8.725 –18.25 124.975 –109.5 217.975 –182.5 VS/2 VS/2 VS/2 10.3 10.225 –23.25 151.475 –139.5 230 GND The LT6376 will not operate correctly if the common mode voltage at its input pins goes below the range specified in above tables, but the part will not be damaged as long as the lowest common mode voltage at the inputs of the internal op amp (VCMOP) is always greater than V– –25V. Also, the voltage at LT6376 input pins should never be higher than 230V or lower than –230V under any circumstances. SHUTDOWN The LT6376 in the DFN14 package has a shutdown pin (SHDN). Under normal operation this pin should be tied to V+ or allowed to float. Driving this pin to at least 2.5V below V+ will cause the part to enter a low power state. The supply current is reduced to less than 25µA and the op amp output becomes high impedance. LOW OPEN VS/2 OPEN 3.1 4.825 –5.25 56.075 –31.5 97.075 –52.5 OPEN OPEN VS/2 4.3 5.725 –8.25 71.975 –49.5 124.975 –82.5 OPEN VS/2 GND –230 SUPPLY VOLTAGE The positive supply pin of the LT6376 should be bypassed with a small capacitor (typically 0.1µF) as close to the supply pin as possible. When driving heavy loads an additional 4.7µF electrolytic capacitor should be added. When using split supplies, the same is true for the V– supply pin. 6376f 16 For more information www.linear.com/LT6376 LT6376 APPLICATIONS INFORMATION ACCURATE CURRENT MEASUREMENTS The LT6376 can be used in high side, low side and bidirectional wide common mode range current sensing. Figure 2 shows the LT6376 sensing current by measuring the voltage across RSENSE. The added sense resistors create a CMRR error and a gain error. For RSENSE greater than 0.5Ω the source resistance mismatch degrades the CMRR. Adding a resistor equal in value to RSENSE in series with the +IN terminal (RC) eliminates this mismatch. Using an RSENSE greater than 4.7Ω will cause the gain error to exceed the 0.0075% specification of the LT6376. This is due to the loading effects of the LT6376. VOUT = 10 • ILOAD • RSENSE • 76k/(76k + RSENSE) Increasing RSENSE and RC slightly to RSENSE' removes the gain error. RSENSE' = RSENSE • 76k/(76k – RSENSE). NOISE AND FILTERING The noise performance of the LT6376 can be optimized both by appropriate choice of its internal attenuation setting and by the addition of a filter to the amplifier output (Figure 3). For applications that do not require the full bandwidth of the LT6376, the addition of an output filter will lower system noise. Table 6 shows the output noise for different internal resistor divider ratios and output filter bandwidths. VS+ = 15V –REFA –REFB –REFC 19k 38k 23.75k V+ 760k VSOURCE+ = 110V RSENSE RC –IN 76k +IN 76k – OUT VOUT ≅ 10 • RSENSE • ILOAD + ILOAD REF 19k 38k +REFA +REFB 760k 23.75k +REFC SHDN VS+ VREF V– VS– = –15V LOAD VS+ = 15V –REFA –REFB –REFC 19k 38k 23.75k ILOAD RSENSE RC –IN 76k +IN 76k V+ 760k – OUT VOUT ≅ 10 • RSENSE • ILOAD + REF VSOURCE– = –110V 19k 38k +REFA +REFB 760k 23.75k +REFC SHDN VREF V– 6376 F02 VS+ VS– = –15V Figure 2. Wide Voltage Range Current Sensing 6376f For more information www.linear.com/LT6376 17 LT6376 APPLICATIONS INFORMATION VS+ V–IN V+IN –REFA –REFB –REFC 19k 38k 23.75k V+ 760k – 76k –IN – 76k +IN C2 OUT R1 + 38k +REFA +REFB 760k 23.75k +REFC VOUT + C1 REF 19k LT6015 R2 VREF V– SHDN 6376 F03 VS+ VS– Figure 3. Output Filtering with 2-Pole Butterworth Filter Table 6. Output Noise (VP-P) for 2-Pole Butterworth Filter for Different Internal Resistor Divider Ratios Table 7. Component Values for Different 2-Pole Butterworth Filter Bandwidths Corner Frequency Corner Frequency 3.1 4.3 5.1 6.3 7.1 8.3 10.3 No Filter 548µV 606µV 638µV 678µV 707µV 747µV 809µV 100kHz 328µV 394µV 434µV 488µV 523µV 572µV 649µV 10kHz 107µV 131µV 146µV 168µV 183µV 204µV 239µV 1kHz 33µV 41µV 46µV 53µV 57µV 64µV 75µV 100Hz 12µV 15µV 17µV 19µV 21µV 24µV 28µV R1 R2 C1 C2 100kHz 11kΩ 11.3kΩ 100pF 200pF 10kHz 11kΩ 11.3kΩ 1nF 2nF 1kHz 11kΩ 11.3kΩ 10nF 20nF 100Hz 11kΩ 11.3kΩ 0.1µF 0.2µF 15V –REFA –REFB –REFC 19k 38k 23.75k VSOURCE+ = 80V RSENSE 1Ω RC, 1Ω –IN 76k +IN 76k V+ 760k – OUT + 1A LOAD VOUT REF 19k 38k +REFA +REFB 23.75k +REFC 760k V– SHDN 6376 F04 –15V Figure 4. Current Measurement Application 6376f 18 For more information www.linear.com/LT6376 LT6376 APPLICATIONS INFORMATION ERROR BUDGET ANALYSIS Figure 4 shows the LT6376 in a current measurement application. The error budget for this application is shown in Table 8. The resistor divider ratio is set to 6.3 to divide the 80V input common mode voltage down to 12.7V at the op amp inputs. The 1A current and 1Ω sense resistor produce an output full-scale (FS) voltage of 10V (in the LT6376) and 1V (in all the other listed parts). Table 8 shows the error sources in parts per million (ppm) of the output full-scale voltage across the temperature range of 25°C to 85°C. Different sources of error contribute to the maximum accuracy that can be achieved in an application. Gain error, offset voltage and common mode rejection error combine to set the initial error. Additionally, the gain error and offset voltage drift across the temperature range. The excellent gain accuracy, low offset voltage, high CMRR, low offset voltage drift and low gain error drift of the LT6376 all combine to enable extremely accurate measurements. Over-The-Top OPERATION When the input common mode voltage of the internal op amp (VCMOP) in the LT6376 is biased near or above the V+ supply, the op amp is operating in the Over-The-Top region. The op amp continues to operate with an input common mode voltage of up to 76V above V– (regardless of the positive power supply voltage V+), but its performance is degraded. The op amp’s input bias currents change from under ±2nA to 14µA. The op amp’s input offset current rises to ±50nA which adds ±3.8mV to the input offset voltage. In addition, when operating in the Over-The-Top region, the differential input impedance decreases from 1MΩ in normal operation to approximately 3.7kΩ in Over-The-Top operation. This resistance appears across the summing nodes of the internal op amp and boosts noise and offset while decreasing speed. Noise and offset will increase by between 66% and 83% depending on the resistor divider ratio setting. The bandwidth will be reduced by between 40% to 45%. For more detail on Over-The-Top operation, consult the LT6015 data sheet. OUTPUT The output of the LT6376 can typically swing to within 5mV of either rail with no load and is capable of sourcing and sinking approximately 25mA. The LT6376 is internally compensated to drive at least 1nF of capacitance under any output loading conditions. A 0.22µF capacitor in series with a 150Ω resistor between the output and ground will compensate the amplifier to drive capacitive loads greater than 1nF. Additionally, the LT6376 has more gain and phase margin as the resistor divider ratio is increased. Table 8. Error Budget Analysis ERROR, ppm of OUTPUT FS LT6376 (DIV = 6.3) LT6375 (DIV = 7) AD629B COMPETITOR Differential Gain (V/V) 10 1 1 1 Output FS Voltage (V) 10 1 1 1 0.0075% FS 0.006% FS 0.03% FS 0.02% FS 75 60 300 200 3800µV 450µV 500µV 1100µV 380 450 500 1100 10 • (80V/90dB) = 25300µV 80V/89dB = 2839µV 80V/86dB = 4009µV 80V/90dB = 2530µV 2530 2839 4009 2530 2985 3349 4809 3830 10ppm/°C ×60°C 60 60 600 600 15µV/°C ×60°C 450 720 600 900 ERROR SOURCE LT6376 LT6375 AD629B COMPETITOR Accuracy, TA = 25°C Initial Gain Error Output Offset Voltage Common Mode Total Accuracy Error Temperature Drift Gain 1ppm/°C ×60°C 1ppm/°C ×60°C 10ppm/°C ×60°C Output Offset Voltage 75µV/°C ×60°C 12µV/°C ×60°C 10µV/°C ×60°C Total Drift Error 510 780 1200 1500 Total Error 3495 4129 6009 5330 6376f For more information www.linear.com/LT6376 19 LT6376 APPLICATIONS INFORMATION DISTORTION The LT6376 features excellent distortion performance when the internal op amp is operating within the supply rails. Operating the LT6376 with input common mode voltages that go from normal to Over-The-Top operation will significantly degrade the LT6376’s linearity as the op amp must transition between two different input stages. POWER DISSIPATION CONSIDERATIONS Because of the ability of the LT6376 to operate on power supplies up to ±25V, to withstand very high input voltages and to drive heavy loads, there is a need to ensure the die junction temperature does not exceed 150°C. The LT6376 is housed in DF14 (qJA = 43°C/W, qJC = 4°C/W) and MS16 (qJA = 130°C/W) packages. In general, the die junction temperature (TJ) can be estimated from the ambient temperature (TA), and the device power dissipation (PD): TJ = TA + PD • qJA Power is dissipated by the amplifier’s quiescent current, by the output current driving a resistive load and by the input current driving the LT6376’s internal resistor network. PD = ((VS+ – VS–) • IS) + POD + PRESD For a given supply voltage, the worst-case output power dissipation POD(MAX) occurs with the output voltage at half of either supply voltage. POD(MAX) is given by: POD(MAX) = (VS/2)2/RLOAD The power dissipated in the internal resistors (PRESD) depends on the input voltage, the resistor divider ratio (DIV), the output voltage and the voltage on REF and the other reference pins. The following equations and Figure 5 show different components of PRESD corresponding to different groups of LT6376’s internal resistors (assuming that LT6376 is used with a dual supply configuration with REF and all reference pins at ground). PRESDA = (V+IN)2/(76k + 76k/(DIV – 1)) PRESDB = (V–IN – V+IN/DIV)2/(76k) PRESDC = (V+IN/DIV)2/(76k/(DIV – 1.1)) PRESDD = (V+IN/DIV – VOUT)2/(760k) PRESD = PRESDA + PRESDB + PRESDC + PRESDD PRESD simplifies to: PRESD = 2(V+IN2((DIV – 1)/DIV – VOUT/(10 • V+IN)) + 0.055 • VOUT2)/76k In general, PRESD increases with higher input voltage, higher resistor divider ratio (DIV), and lower output, REF and reference pin voltages. VS+ = 25V –REFA –REFB –REFC 19k 38k 23.75k PRESDC V+ PRESDD 760k PRESDB V–IN = 230V – VOUT/10 = 228.75V V+IN = 230V –IN 76k +IN 76k – PRESDA OUT VOUT = 12.5V + REF 19k 38k +REFA +REFB 23.75k +REFC 760k SHDN V– VS_ = –25V 6376 F05 Figure 5. Power Dissipation Example 6376f 20 For more information www.linear.com/LT6376 LT6376 APPLICATIONS INFORMATION Example: An LT6376 in a DFN package mounted on a PC board has a thermal resistance of 43°C/W. Operating on ±25V supplies and driving a 2.5kΩ load to 12.5V with V+IN = 230V and DIV = 10.3, the total power dissipation is given by: PD = (50 • 0.6mA) + 12.52/2.5k + 2302/84.17k + (228.75 – 230/10.3)2/76k + (230/10.3)2/8.26k + (230/10.3 – 12.5)2/760k = 1.342W Assuming a thermal resistance of 43°C/W, the die temperature will experience a 57.7°C rise above ambient. This implies that the maximum ambient temperature the LT6376 should operate under the above conditions is: TA =150°C – 57.7°C = 92.3°C REF offset signal. These configurations allow the LT6376 to be used as a versatile precision gain block with essentially no external components besides the supply decoupling. In most cases, only a single positive supply will be required. In Table 9, connections are identified as NC (no connect), INPUT (refers to both inputs driven, +signal to +pins,–signal to –pins), CROSS (refers to inputs crosscoupled, +signal to –pins, –signal to +pins), OUT (refers to the output fed back to –pins), or REF (refers to connecting the REF pin to +pins). The same configurations provide inverting gains by grounding any pins intended for the +signal source. The differential input resistance is also tabulated as well as the amplification factor of the internal gain section involved (noise-gain, which helps to estimate the error-budget of the configuration). The MSOP package has no exposed pad and a higher thermal resistance (qJA = 130°C/W). It should not be used in applications which have a high ambient temperature, require driving a heavy load, or require an extreme input voltage. Single-ended noninverting gains are also available as shown in Table 10, including many that operate as buffers (loaded only by the op amp input bias). A rich option set exists by using the REF pin as an additional variable. In Table 10, connections are identified as NC (no connect), INPUT (driven by the input), OUT (fed back from the output), or GROUND (grounded). Table 10 also includes tabulations of the internal resistor divider (DIV), noise gain (re-amplification), and the input loading presented by the circuit. THERMAL SHUTDOWN USE AS PRECISION AC GAIN BLOCK For safety, the LT6376 will enter shutdown mode when the die temperature rises to approximately 163°C. This thermal shutdown has approximately 9°C of hysteresis requiring the die temperature to cool 9°C before enabling the amplifier again. In AC-coupled applications operating from a single power supply, it is useful to set the output voltage near midsupply to maximize dynamic range. The LT6376 readily supports this with no additional biasing components by connecting specific pins to the V+ and V– potentials and AC-coupling the signal paths. Table 11 shows the available inverting gains and also tabulates the load resistances presented at the input. In Table 11, connections are identified as NC (no connect), AC IN (AC-coupled to the input) OUT (fed back from the output), tied to V+, tied to V–, or AC GND (AC- grounded). All pins that require an AC ground can share a single bypass capacitor. Likewise, all pins driven from the source signal may share a coupling capacitor as well. The output should also connect to the load circuitry using a coupling capacitor to block the midsupply DC voltage. Keep in mind that the DFN package has an exposed pad which can be used to lower the qJA of the package. The more PCB metal connected to the exposed pad, the lower the thermal resistance. USE AT OTHER PRECISION DC GAINS The array of resistors within the LT6376 provides numerous configurable connections that provide precision gains other than the G = 10 differential gain options described previously. Note that only the +IN and –IN pins can operate outside of the supply window. Since most of these alternate configurations involve driving the REFx pins, as well as the +IN and –IN pins, the input signals must be less than the supply voltages. Fully differential gains are available as shown in Table 9, and may be output-shifted with a 6376f For more information www.linear.com/LT6376 21 LT6376 APPLICATIONS INFORMATION The LT6376 may also be used for single-supply noninverting AC gains by employing a combination of input attenuation and re-amplification. With numerous choices of attenuation and re-amplification, several hundred overall gain combinations are possible, ranging from 0.1 to 73. The combinations are more plentiful than the DC configurations because there is no constraint on matching internal source resistances to minimize offset. The input attenuator section dedicates some pins to establishing a bias point and with the remaining pins, provides several choices of input signal division factors as shown in Table 12. The bias point varies between 20% and 49% of the supply voltage depending on the configuration. Swapping V+ and V– will bias the circuit closer to V+. The high attenuations that only use +IN for the signal path can accept waveform peaks that significantly exceed the supply range. Table 12 also includes tabulations of the resulting AC load resistance presented to the signal source. Here again, all pins that require an AC-ground connection may share a single bypass capacitor, and all AC signal connections may share a coupling capacitor. The single-supply AC-coupled noninverting circuit is completed by configuring the post-attenuator amplification factor. Table 13 shows the available re-amplification factors. Once again, all pins that require an AC-ground connection may share a single bypass capacitor, and the output should use a coupling capacitor to its load destination as well. Table 9. Configurations for Precision Differential Gains LT6376 DIFFERENTIAL AND INVERTING PRECISION DC GAINS GAIN ±IN ±REFA ±REFB ±REFC REF DIFF RIN (k) NOISE GAIN 2 CROSS NC CROSS INPUT REF 24.52 63 8 NC INPUT NC CROSS REF 21.11 73 10 INPUT NC NC NC REF 152 11 12 NC NC CROSS INPUT REF 29.23 53 18 INPUT INPUT NC CROSS REF 18.54 83 20 NC NC INPUT NC REF 76 21 22 CROSS NC NC INPUT REF 36.19 43 30 INPUT NC INPUT NC REF 50.67 31 32 NC NC NC INPUT REF 47.50 33 40 NC INPUT NC NC REF 38 41 42 INPUT NC NC INPUT REF 36.19 43 50 INPUT INPUT NC NC REF 30.40 51 52 NC NC INPUT INPUT REF 29.23 53 60 NC INPUT INPUT NC REF 25.33 61 62 INPUT NC INPUT INPUT REF 24.52 63 70 INPUT INPUT INPUT NC REF 21.71 71 72 NC INPUT NC INPUT REF 21.11 73 82 INPUT INPUT NC INPUT REF 18.54 83 92 NC INPUT INPUT INPUT REF 16.52 93 102 INPUT INPUT INPUT INPUT REF 14.90 103 6376f 22 For more information www.linear.com/LT6376 LT6376 APPLICATIONS INFORMATION Table 10. Configurations for Precision Noninverting Gains LT6376 NONINVERTING PRECISION DC GAINS GAIN FEATURE 1 10 11 +REFB +REFC REF –IN –REFA –REFB –REFC NOISE GAIN DIV RIN (k) GROUND NC NC NC INPUT GROUND NC NC NC 11 11 836 INPUT NC NC NC GROUND GROUND NC NC NC 11 1.10 836 INPUT NC NC NC INPUT GROUND NC NC NC 11 1 Hi-Z INPUT NC INPUT NC GROUND GROUND NC GROUND NC 31 1.03 785.33 BUFFER INPUT NC INPUT NC INPUT GROUND NC GROUND NC 31 1 Hi-Z NC NC NC INPUT GROUND NC NC NC GROUND 33 1.03 783.75 32 40 41 +REFA BUFFER 30 31 +IN BUFFER NC INPUT NC NC GROUND NC GROUND NC NC 41 1.03 779 NC INPUT NC NC INPUT NC GROUND NC NC 41 1 Hi-Z 42 INPUT NC NC INPUT GROUND GROUND NC NC GROUND 43 1.02 778.10 50 INPUT INPUT NC NC GROUND GROUND GROUND NC NC 51 1.02 775.20 INPUT INPUT NC NC INPUT GROUND GROUND NC NC 51 1 Hi-Z 51 BUFFER 52 NC NC INPUT INPUT GROUND NC NC GROUND GROUND 53 1.02 774.62 60 NC INPUT INPUT NC GROUND NC GROUND GROUND NC 61 1.02 772.67 NC INPUT INPUT NC INPUT NC GROUND GROUND NC 61 1 Hi-Z 61 BUFFER 62 INPUT NC INPUT INPUT GROUND GROUND NC GROUND GROUND 63 1.02 772.26 70 INPUT INPUT INPUT NC GROUND GROUND GROUND GROUND NC 71 1.01 770.86 72 NC INPUT NC INPUT GROUND NC GROUND NC GROUND 73 1.01 770.56 82 INPUT INPUT NC INPUT GROUND GROUND GROUND NC GROUND 83 1.01 769.27 BUFFER INPUT INPUT NC INPUT INPUT GROUND GROUND NC GROUND 83 1 Hi-Z NC INPUT INPUT INPUT GROUND NC GROUND GROUND GROUND 93 1.01 768.26 BUFFER NC INPUT INPUT INPUT INPUT NC GROUND GROUND GROUND 93 1 Hi-Z INPUT INPUT INPUT INPUT GROUND GROUND GROUND GROUND GROUND 103 1.01 767.45 INPUT INPUT INPUT INPUT INPUT GROUND GROUND GROUND GROUND 103 1 Hi-Z 83 92 93 102 103 BUFFER 6376f For more information www.linear.com/LT6376 23 LT6376 APPLICATIONS INFORMATION Table 11. Configurations for Single-Supply AC-Coupled Inverting Gains LT6376 SINGLE-SUPPLY INVERTING AC GAINS GAIN –IN –REFA –REFB –REFC +IN +REFA +REFB +REFC REF AC RIN (k) –10 AC IN NC NC NC V– AC GND V– V+ V– 76 NC V– AC GND V– V+ V– 38 AC GND V– V+ V– 25 AC GND V– V+ V– 24 V+ V– 19 –20 NC NC AC IN –30 AC IN NC AC IN NC V– –32 NC NC NC AC IN V– NC V– AC GND V– AC GND V– V+ V– 18 AC GND V– V+ V– 15 V+ V– 15 –40 NC AC IN NC –42 AC IN NC NC AC IN V– –50 AC IN AC IN NC NC V– AC GND V– AC GND V– V+ V– 13 V+ V– 12 –52 NC NC AC IN AC IN V– –60 NC AC IN AC IN NC V– AC IN V– AC GND V– AC GND V– V+ V– 11 AC GND V– V+ V– 11 V+ V– 9 –62 AC IN NC AC IN –70 AC IN AC IN AC IN NC V– –72 NC AC IN NC AC IN V– AC GND V– AC GND V– V+ V– 8 AC GND V– V+ V– 7 –82 AC IN AC IN NC AC IN V– –92 NC AC IN AC IN AC IN V– AC IN V– –102 AC IN AC IN AC IN Table 12. Configurations for Single-Supply AC-Coupled Input Attenuations LT6376 SINGLE-SUPPLY AC ATTENUATOR CONFIGURATIONS DIV DC BIAS +IN +REFA +REFB +REFC REF AC RIN (k) 1.41 0.33 V+ AC IN V– AC IN AC IN 36 0.33 V+ AC IN V– AC IN NC 36 1.43 0.35 V+ AC IN V– AC IN V+ 35 1.69 0.24 V+ AC IN AC IN V– AC IN 31 1.70 0.24 V+ AC IN AC IN V– NC 31 1.72 0.26 V+ AC IN AC IN V– V+ 30 0.33 V+ AC IN V– NC AC IN 44 1.75 0.33 V+ AC IN V– NC NC 44 1.78 0.35 V+ AC IN V– NC V+ 44 0.33 V+ NC V– AC IN AC IN 48 1.94 0.33 V+ NC V– AC IN NC 49 1.94 0.20 V+ V– AC IN AC IN AC IN 30 1.96 0.20 V+ V– AC IN AC IN NC 30 1.97 0.35 V+ NC V– AC IN V+ 48 0.22 V+ V– AC IN AC IN V+ 30 AC IN V+ V– AC IN 30 1.42 1.73 1.91 1.98 2.02 0.38 AC IN 6376f 24 For more information www.linear.com/LT6376 LT6376 APPLICATIONS INFORMATION Table 12. Configurations for Single-Supply AC-Coupled Input Attenuations (continued) LT6376 SINGLE-SUPPLY AC ATTENUATOR CONFIGURATIONS DIV DC BIAS +IN +REFA +REFB +REFC REF AC RIN (k) 2.04 0.38 AC IN AC IN V+ V– NC 30 AC IN V+ V– V+ 30 V– 2.06 0.40 AC IN 2.27 0.38 NC AC IN V+ AC IN 33 2.30 0.38 NC AC IN V+ V– NC 34 2.33 0.40 NC AC IN V+ V– V+ 33 V– 2.51 0.48 V+ AC IN V+ AC IN 31 2.55 0.48 V+ AC IN V+ V– NC 31 2.58 0.49 V+ AC IN V+ V– V+ 31 3.12 0.43 V+ V– V+ AC IN AC IN 34 3.19 0.43 V+ V– V+ AC IN NC 35 3.22 0.44 V+ V– V+ AC IN V+ 34 3.32 0.44 AC IN V– AC IN V+ AC IN 35 3.40 0.44 AC IN V– AC IN V+ NC 36 3.43 0.45 AC IN V– AC IN V+ V+ 36 0.20 V+ V– AC IN NC AC IN 51 3.50 0.20 V+ V– AC IN NC NC 53 3.55 0.22 V+ V– AC IN NC V+ 53 0.49 V– V+ AC IN V– AC IN 45 5.10 0.49 V– V+ AC IN V– NC 47 5.15 0.48 V– V+ AC IN V– V– 47 V– 3.38 4.90 5.73 0.38 AC IN NC V+ AC IN 84 6.20 0.38 AC IN NC V+ V– NC 91 6.30 0.40 AC IN NC V+ V– V+ 90 AC GND V+ AC IN 77 AC GND V+ NC 84 84 9.36 0.44 AC IN V– 10.20 0.44 AC IN V– 10.30 0.45 AC IN V– AC GND V+ V+ 31 0.33 V+ NC V– NC AC IN 785 43 0.24 V+ NC NC V– AC IN 778 51 0.20 V+ V– NC NC AC IN 775 53 0.38 NC NC V+ V– AC IN 775 61 0.33 NC V– V+ NC AC IN 773 63 0.48 V+ NC V+ V– AC IN 772 71 0.43 V+ V– V+ NC AC IN 771 73 0.44 NC V– NC V+ AC IN 771 83 0.49 V– V+ NC V– AC IN 769 0.43 NC V+ V– V– AC IN 768 0.49 V+ V+ V– V– AC IN 767 93 103 6376f For more information www.linear.com/LT6376 25 LT6376 APPLICATIONS INFORMATION Table 13. Configurations for Single-Supply AC-Coupled Re-Amplications LT6376 NONINVERTING AC RE-AMPLIFICATIONS GAIN –IN –REFA –REFB –REFC 11 AC GND NC NC NC 21 NC NC AC GND NC 31 AC GND NC AC GND NC 33 NC NC NC AC GND 41 NC AC GND NC NC 43 AC GND NC NC AC GND 51 AC GND AC GND NC NC 53 NC NC AC GND AC GND 61 NC AC GND AC GND NC 63 AC GND NC AC GND AC GND 71 AC GND AC GND AC GND NC 73 NC AC GND NC AC GND 83 AC GND AC GND NC AC GND 93 NC AC GND AC GND AC GND 103 AC GND AC GND AC GND AC GND 6376f 26 For more information www.linear.com/LT6376 LT6376 TYPICAL APPLICATIONS 40.2dB Audio Gain Stage VS = 3.3V TO 50V 2.2µF VIN –REFA –REFB –REFC 19k 38k 23.75k 76k –IN 760k – 76k +IN V+ 2.2µF OUT VOUT + VOUT VIN REF 19k 38k +REFA +REFB 23.75k +REFC = –102 760k SHDN V– 2.2µF 6376 TA02 6376f For more information www.linear.com/LT6376 27 LT6376 PACKAGE DESCRIPTION Please refer to http://www.linear.com/product/LT6376#packaging for the most recent package drawings. DF Package 14(12)-Lead Plastic DFN (4mm × 4mm) (Reference LTC DWG # 05-08-1963 Rev Ø) 1.00 BSC 3.00 REF 0.70 ±0.05 4.50 ±0.05 3.10 ±0.05 1.70 ±0.05 3.38 ±0.05 PACKAGE OUTLINE 0.25 ±0.05 0.50 BSC RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED 3.00 REF 4.00 ±0.10 (4 SIDES) 8 1.00 BSC 14 0.40 ±0.10 3.38 ±0.10 1.70 ±0.10 PIN 1 NOTCH 0.35 × 45° CHAMFER PIN 1 TOP MARK (NOTE 6) (DF14)(12) DFN 1113 REV 0 0.200 REF 7 R = 0.115 TYP 0.75 ±0.05 1 0.25 ±0.05 0.50 BSC BOTTOM VIEW—EXPOSED PAD 0.00 – 0.05 NOTE: 1. PACKAGE OUTLINE DOES NOT CONFORM TO JEDEC MO-229 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 6376f 28 For more information www.linear.com/LT6376 LT6376 PACKAGE DESCRIPTION Please refer to http://www.linear.com/product/LT6376#packaging for the most recent package drawings. MS Package 16 (12)-Lead Plastic MSOP with 4 Pins Removed (Reference LTC DWG # 05-08-1847 Rev B) 1.0 (.0394) BSC 5.10 (.201) MIN 0.889 ±0.127 (.035 ±.005) 3.20 – 3.45 (.126 – .136) 4.039 ±0.102 (.159 ±.004) (NOTE 3) 16 14 121110 9 0.50 (.0197) BSC 0.305 ±0.038 (.0120 ±.0015) TYP RECOMMENDED SOLDER PAD LAYOUT 0.254 (.010) 0.280 ±0.076 (.011 ±.003) REF 3.00 ±0.102 (.118 ±.004) (NOTE 4) 4.90 ±0.152 (.193 ±.006) DETAIL “A” 0° – 6° TYP 1 GAUGE PLANE 0.53 ±0.152 (.021 ±.006) DETAIL “A” 0.18 (.007) SEATING PLANE 1.10 (.043) MAX 0.17 – 0.27 (.007 – .011) TYP 0.50 (.0197) BSC 3 567 8 1.0 (.0394) BSC 0.86 (.034) REF 0.1016 ±0.0508 (.004 ±.002) MSOP (MS12) 0213 REV B NOTE: 1. DIMENSIONS IN MILLIMETER/(INCH) 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX 6376f Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. For more information www.linear.com/LT6376 29 LT6376 TYPICAL APPLICATION Bidirectional Full Range Current Monitor VS = 5V (OR 2V GREATER THAN VMON) –REFA –REFB –REFC 19k 38k 23.75k V+ 760k VMON = 0V TO 3V RSENSE –IN 76k +IN 76k RSENSE – OUT VOUT = VREF + 102 • (VSENSE) + REF LOAD 19k 38k +REFA +REFB 23.75k +REFC 760k SHDN VREF = 1.25V V– 6376 TA03 NOTE: OPERATES OVER FULL RANGE OF LOAD VOLTAGE RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LT6375 ±270V Input Range Difference Amplifier 3.3V to 50V Operation, CMRR > 90dB, Input Voltage = ±270V, G = 1 LT1990 ±250V Input Range Difference Amplifier 2.7V to 36V Operation, CMRR > 70dB, Input Voltage = ±250V, G = 1 AND 10 LT1997-3 Precision, Wide Voltage Range Gain Selectable Amplifier 3.3V to 50V Operation, CMRR > 90dB, Input Voltage = ±160V, G = 1, 3 and 9 LT1999-10/ LT1999-20/ LT1999-50 High Voltage, Bidirectional Current Sense Amplifier Input Voltage = –5V to 80V, 750µV VOS, CMRR 80dB at 100kHz, Gain: 10V/V, 20V/V, 50V/V LT1991 Precision, 100µA Gain Selectable Amplifier 2.7V to 36V Operation, 50μV Offset, CMRR > 75B, Input Voltage = ±60V LT1996 Precision, 100µA Gain Selectable Amplifier Micropower, Pin Selectable Up to Gain = 118 LTC6090 140V Operational Amplifier 50pA IB, 1.6mV VOS, 9.5V to 140V VS, 4.5mA IS, RR Output LT6108 High Side Current Sense Amplifier with Reference and Comparator with Shutdown 2.7V to 60V, 125µV, Resistor Set Gain, ±1.25% Threshold Error LT1787/ LT1787HV Precision, Bidirectional High Side Current Sense Amplifier 2.7V to 60V Operation, 75μV Offset, 60μA Current Draw LTC6101/ LTC6101HV High Voltage High Side Current Sense Amplifier 4V to 60V/5V to 100V Operation, External Resistor Set Gain, SOT23 LTC6102/ LTC6102HV Zero Drift High Side Current Sense Amplifier 4V to 60V/5V to 100V Operation, ±10μV Offset, 1μs Step Response, MSOP8/DFN Packages LTC6104 Bidirectional, High Side Current Sense 4V to 60V, Gain Configurable, 8-Pin MSOP Package LT6015/LT6016/ LT6017 Single, Dual, and Quad, Over-The-Top Precision Op Amp 3.2MHz, 0.8V/µs, 50µV VOS, 3V to 50V VS, 0.335mA IS, RRIO AD629 High Common-Mode Voltage Difference Amplifier 5V to 36V Operation, CMRR > 86dB, Input Voltage = ±270V, G = 1 6376f 30 LT 1217 • PRINTED IN USA www.linear.com/LT6376  ANALOG DEVICES, INC. 2017