LT8316
560VIN Micropower No-Opto
Isolated Flyback Controller
FEATURES
DESCRIPTION
Wide Input Voltage Range: 16V to 560V (600V max)
n No Opto-Isolator Required for Regulation
n Quasi-Resonant Boundary Mode Operation
n Constant-Current and Constant-Voltage Regulation
n Low-Ripple Light Load Burst Mode® Operation
n Low Quiescent Current: 75μA
n Programmable Current Limit and Soft-Start
n TSSOP Package with High-Voltage Spacing
n Available in 20(15)-Lead Package with Extended
Creepage Distance
n AEC-Q100 Compliant with Exception
n HBM ESD Classification Level 1C
The LT®8316 is a micropower, high voltage flyback controller. No opto-isolator is needed for regulation. The
device samples the output voltage from the isolated flyback waveform appearing across a third winding on the
transformer. Quasi-resonant boundary mode operation
improves load regulation, reduces transformer size, and
maintains high efficiency.
APPLICATIONS
The LT8316 operates from a wide range of input supply
voltages and can deliver up to 100W of power. It is available in a thermally enhanced 20-pin TSSOP package with
additional pins removed for high-voltage spacing.
n
At start-up, the LT8316 charges its INTVCC capacitor via
a high voltage current source. During normal operation,
the current source turns off and the device draws its
power from a third winding on the transformer minimizing standby power dissipation.
Isolated Telecom, Automotive, Industrial, Medical
Power Supplies
n Isolated Off-Line Housekeeping Power Supplies
n Electric Vehicles and Battery Stacks
n Multioutput Isolated Power Supplies for Inverter
Gate Drives
n
All registered trademarks and trademarks are the property of their respective owners.
TYPICAL APPLICATION
16VIN to 560VIN Isolated 12VOUT Supply
VIN
16V TO 560V
Efficiency
8:1:1
VIN
47pF
EN/UVLO
SMODE
540µH
108k
TC
GATE
VC
100nF
8.44µH
FB
LT8316
20k
44.2k
DCM
INTVCC
4.7µF
10k
BIAS
VOUT+
12V
8.44µH
VOUT–
UP TO 800mA (VIN = 20V)
UP TO 3A (VIN = 80V)
UP TO 4A (VIN = 160V TO 560V)
4.99k
M1
GND
85
80
VIN = 20V
VIN = 80V
VIN = 160V
VIN = 320V
VIN = 560V
75
SENSE
IREG/SS
90
1300µF
EFFICIENCY (%)
4.7µF
95
70
40mΩ
61.9k
0
1
2
3
4
LOAD CURRENT (A)
5
6
8316 TA01b
8316 TA01a
Rev. B
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1
LT8316
ABSOLUTE MAXIMUM RATINGS
(Note 1)
VIN (Note 2) .............................................................600V
BIAS, EN/UVLO..........................................................40V
INTVCC.......................................................................15V
SMODE................................................................ INTVCC
SENSE, TC, FB, VC, IREG/SS........................................4V
DCM.................................................................... ±100mA
Operating Junction Temperature (Note 3)
LT8316E, LT8316I............................... −40°C to 125°C
LT8316H............................................. −40°C to 150°C
Storage Temperature Range................... −65°C to 150°C
Lead Temperature (Soldering, 10 sec).................... 300°C
PIN CONFIGURATION
TOP VIEW
VIN 1
VIN 2
VIN 3
21
GND
INTVCC 8
BIAS 9
DCM 10
TOP VIEW
20
19
18
17
16
15
14
13
12
11
GND
GATE
SENSE
EN/UVLO
SMODE
GND
IREG/SS
VC
FB
TC
VIN 1
VIN 2
20
19
18
17
16
15
14
13
12
11
INTVCC 8
BIAS 9
DCM 10
FE PACKAGE
20(16)-LEAD PLASTIC TSSOP
θJA = 38°C/W, θJC = 10°C/W
EXPOSED PAD (PIN 21) IS GND, MUST BE SOLDERED TO PCB
F PACKAGE
20(15)-LEAD PLASTIC TSSOP
θJA = 88°C/W
ELECTROSTATIC DISCHARGE RATINGS
LT8316 20(16), 20(15)-Lead Plastic TSSOP
GND
GATE
SENSE
EN/UVLO
SMODE
GND
IREG/SS
VC
FB
TC
(Note 4)
ESD CAUTION
ESD MODEL
WITHSTAND THRESHOLD (V)
CLASS
HBM*
±1000
1C
FICDM
±1250
C3
ESD (electrostatic discharge) sensitive device.
Charged devices and circuit boards can discharge
without detection. Although this product features
patented or proprietary protection circuity, damage
may occur on devices subjected to high energy ESD.
Therefore, proper ESD precautions should be taken to
avoid performance degradtion or loss of functionality
*All pins with the exception of VIN pins pass up to ±4000V Class 3A.
ORDER INFORMATION
LEAD FREE FINISH
TAPE AND REEL
PART MARKING*
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LT8316EFE#PBF
LT8316EFE#TRPBF
LT8316FE
20-Lead Plastic TSSOP
–40°C to 125°C
LT8316IFE#PBF
LT8316IFE#TRPBF
LT8316FE
20-Lead Plastic TSSOP
–40°C to 125°C
LT8316HFE#PBF
LT8316HFE#TRPBF
LT8316FE
20-Lead Plastic TSSOP
–40°C to 150°C
LT8316IF#PBF
LT8316IF#TRPBF
LT8316F
20-Lead Plastic TSSOP
–40°C to 125°C
2
Rev. B
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LT8316
ORDER INFORMATION
LEAD FREE FINISH
TAPE AND REEL
PART MARKING*
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LT8316EFE#WPBF
LT8316EFE#WTRPBF
LT8316FE
20-Lead Plastic TSSOP
–40°C to 125°C
LT8316IFE#WPBF
LT8316IFE#WTRPBF
LT8316FE
20-Lead Plastic TSSOP
–40°C to 125°C
LT8316IF#WPBF
LT8316IF#WTRPBF
LT8316F
20-Lead Plastic TSSOP
–40°C to 125°C
AUTOMOTIVE PRODUCTS**
Contact the factory for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Tape and reel specifications. Some packages are available in 500 unit reels through designated sales channels with #TRMPBF suffix.
**Versions of this part are available with controlled manufacturing to support the quality and reliability requirements of automotive applications. These
models are designated with a #W suffix. Only the automotive grade products shown are available for use in automotive applications. Contact your
local Analog Devices account representative for specific product ordering information and to obtain the specific Automotive Reliability reports for
these models.
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. BIAS = 30V, VEN/UVLO = 30V unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
9.5
BIAS
Chip Bias Voltage Supply Range
After Startup
IQ
BIAS Quiescent Current
Burst Mode Operation
Active
ICLAMP(MAX)
BIAS Clamp Maximum Current
VCLAMP
BIAS Clamping Voltage
ICLAMP = 200µA
ICLAMP = 15mA
ISHDN
VIN Shutdown Current
VEN/UVLO < 0.3V, BIAS = Floating
TYP
MAX
UNITS
75
470
150
700
μA
μA
V
15
mA
34
35
12
VIN(MIN)
Minimum Input Voltage for Startup
BIAS = Floating
l
ISTARTUP
Startup Current Out of INTVCC
VIN = 16V, BIAS = Floating
l
VUVLO
EN/UVLO Threshold
EN/UVLO Hysteresis
INTVCC UVLO Rising Threshold
38
39
V
V
20
μA
16
V
100
300
VEN/UVLO Falling
VEN/UVLO Rising
1.18
30
1.22
65
1.26
120
V
mV
Startup Current through Depletion FET
11.1
12
13.1
V
7.6
8.1
8.6
V
9.5
10
10.5
V
INTVCC UVLO Falling Threshold
INTVCC Regulation Voltage
Drawing 20mA from INTVCC
μA
INTVCC LDO Dropout Voltage
Drawing 20mA from INTVCC
Gate Driver Rise Time
CGATE = 3.3nF, 10% to 90%
30
1
ns
V
Gate Driver Fall Time
CGATE = 3.3nF, 90% to 10%
8
ns
VREG
FB Regulation Voltage
GM
Voltage Error Amplifier Transconductance
VFB = 1.22V ± 5mV
VTC
TC Voltage
TC Voltage Temperature Coefficient
TA = 25°C
ITC
TC Sinking/Sourcing Current
IIREG/SS
IREG/SS Current
Current Out-of-Pin
IDCM
Flyback Collapse Detection Threshold
Resonant Valley Detection Threshold
IDCM Rising
IDCM Falling
VSENSE(MIN)
Minimum Current Voltage Threshold
14
20
26
mV
VSENSE(MAX)
Maximum Current Voltage Threshold
90
100
110
mV
SENSE Input Bias Current
l
1.18
1.22
1.25
V
245
350
455
μS
1.22
+4.1
V
mV/°C
±100
Current Out-of-Pin
9.7
μA
10
10.3
−170
−85
35
μA
μA
μA
µA
Rev. B
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3
LT8316
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. BIAS = 30V, VEN/UVLO = 30V unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
FSW(MIN)
Minimum Switching Frequency
Burst Mode
Standby Mode
3
187
3.5
220
4
250
kHz
Hz
FSW(MAX)
Maximum Switching Frequency
138
140
142
kHz
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: Absolute maximum voltage at the VIN pin is 600V for transient
operation and 560V for continuous operation.
Note 3: The LT8316E is guaranteed to meet performance specifications
from 0°C to 125°C junction temperature. Specifications over the −40°C
to 125°C operating junction temperature range are assured by design
characterization and correlation with statistical process controls. The
LT8316I is guaranteed over the full −40°C to 125°C operating junction
temperature range. LT8316H is guaranteed to meet performance
specifications over the full −40°C to 150°C operating temperature range
High junction temperatures degrade operating lifetimes. Operating lifetime
is derated at junction temperatures greater than 125°C.
Note 4: Human body model (HBM) per ANSI/ESDA/JEDEC JS-001. Field
induced charged device model (FICDM) per ANSI/ESDA/JEDEC JS-002.
TYPICAL PERFORMANCE CHARACTERISTICS
Load and Line Regulation
Output Voltage vs Temperature
12.2
FRONT PAGE APPLICATION
OUTPUT VOLTAGE (V)
OUTPUT VOLTAGE (V)
12.4
12.2
12.0
11.8
VIN = 20V
VIN = 80V
VIN = 160V
VIN = 320V
VIN = 560V
11.6
11.4
0
1
2
3
4
LOAD CURRENT (A)
5
6
FRONT PAGE APPLICATION
VIN = 320V
12.0
11.9
11.8
–50 –25
IOUT = 100mA
IOUT = 1A
IOUT = 4A
0
25 50 75 100 125 150
TEMPERATURE (°C)
FREQUENCY (kHz)
9
VIN = 320V
RIREG/SS = 61.9kΩ
6
3
0
0
1
8316 G02
Switching Frequency
2
3
4
LOAD CURRENT (A)
5
6
8316 G03
Boundary Mode Waveforms
FRONT PAGE APPLICATION
80
VSW
200V/DIV
60
VSENSE
100mV/DIV
40
VOUT
AC COUPLED
50mV/DIV
VIN = 20V
VIN = 80V
VIN = 160V
VIN = 320V
VIN = 560V
20
0
FRONT PAGE APPLICATION
12
12.1
8316 G01
100
CV/CC Operation
15
OUTPUT VOLTAGE (V)
12.6
TA = 25°C, unless otherwise noted.
0
1
2
3
4
LOAD CURRENT (A)
5
5µs/DIV
6
8316 G05
FRONT PAGE APPLICATION
VIN = 320V, IOUT = 4A
8316 G04
4
Rev. B
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LT8316
TYPICAL PERFORMANCE CHARACTERISTICS
Discontinuous Mode Waveforms
TA = 25°C, unless otherwise noted.
Burst Mode Waveforms
VSW
200V/DIV
VSW
200V/DIV
VSENSE
100mV/DIV
VSENSE
100mV/DIV
VOUT
AC COUPLED
50mV/DIV
VOUT
AC COUPLED
50mV/DIV
8316 G06
5µs/DIV
8316 G07
100µs/DIV
FRONT PAGE APPLICATION
VIN = 320V, IOUT = 30mA
FRONT PAGE APPLICATION
VIN = 320V, IOUT = 2A
Load Transient Response
Startup Waveforms
VIN
320V/DIV
VOUT
AC COUPLED
200mV/DIV
VBIAS
10V/DIV
VINTVCC
10V/DIV
IOUT
2A/DIV
VOUT
10V/DIV
8316 G08
10ms/DIV
8316 G09
50ms/DIV
FRONT PAGE APPLICATION
VIN = 320V, ROUT= 3Ω
VIN Pin Shutdown Current
BIAS Pin Quiescent Current
Depletion Startup Current
160
VIN = 100V
VIN = 560V
1.6
150°C
25°C
–55°C
1.4
45
30
15
120
1.2
IINTVCC (mA)
QUIESCENT CURRENT (μA)
SHUTDOWN CURRENT (μA)
60
80
40
1.0
0.8
0.6
0.4
0.2
0
–50 –25
0
25 50 75 100 125 150
TEMPERATURE (°C)
0
–50 –25
0
25 50 75 100 125 150
TEMPERATURE (°C)
8316 G10
8316 G11
0
0
3
6
9
VINTVCC (V)
12
15
8316 G12
Rev. B
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5
LT8316
TYPICAL PERFORMANCE CHARACTERISTICS
ULVO Threshold
FB Regulation Voltage
TC Pin Voltage
1.240
EN/UVLO Rising
EN/UVLO Falling
1.80
1.235
1.30
1.25
1.20
1.60
1.230
TC VOLTAGE (V)
FB REGULATION VOLTAGE (V)
ENABLE THRESHOLD (V)
1.35
TA = 25°C, unless otherwise noted.
1.225
1.220
1.215
1.210
1.40
1.20
1.00
1.205
1.15
–50 –25
0
1.200
–50 –25
25 50 75 100 125 150
TEMPERATURE (°C)
0
IREG/SS Pin Current
Switching Frequency Limit
110
10.4
145
105
135
FREQUENCY (kHz)
10.0
9.9
9.8
130
125
5
4
3
9.7
MINIMUM SWITCHING FREQUENCY
90
85
25
20
10
1
5
9.5
–50 –25
0
–50 –25
25 50 75 100 125 150
TEMPERATURE (°C)
0
Minimum Switch-Off Time
350
850
300
800
250
750
OFF TIME (ns)
900
150
100
DCM Pin Threshold
–20
–40
700
650
25 50 75 100 125 150
TEMPERATURE (°C)
8316 G19
500
–50 –25
–60
–80
RESONANT VALLEY DETECT
–100
–120
–140
–160
FLYBACK COLLAPSE DETECT
–180
550
0
25 50 75 100 125 150
TEMPERATURE (°C)
0
600
50
0
8316 G18
DCM CURRENT (µA)
Minimum Switch-On Time
0
–50 –25
0
–50 –25
25 50 75 100 125 150
TEMPERATURE (°C)
8316 G17
400
200
MINIMUM CURRENT LIMIT
15
2
0
MAXIMUM CURRENT LIMIT
95
9.6
8316 G16
6
100
MAXIMUM SWITCHING FREQUENCY
SENSE VOLTAGE (mV)
140
10.3
IREG/SS CURRENT (μA)
Switch Current Limit
150
10.1
25 50 75 100 125 150
TEMPERATURE (°C)
8316 G15
10.5
10.2
0
8316 G14
8316 G13
MINIMUM ON TIME (ns)
0.80
–50 –25
25 50 75 100 125 150
TEMPERATURE (°C)
–200
0
25 50 75 100 125 150
TEMPERATURE (°C)
8316 G20
–220
–50 –25
0
25 50 75 100 125 150
TEMPERATURE (°C)
8315 G21
Rev. B
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LT8316
PIN FUNCTIONS
VIN (Pins 1, 2, 3): Drain of the 560V Internal Startup
FET. During startup, an internal depletion MOSFET draws
power from this pin to charge the INTVCC capacitor.
INTVCC (Pin 8): Internal Gate Driver Bias Voltage. During
start-up, current from the VIN pin charges this pin to 12V.
During operation, a linear regulator from BIAS maintains
this voltage at 10V. Bypass locally with a ≥2.2μF ceramic
≥15V rated capacitor.
BIAS (Pin 9): Unregulated Input Voltage for the IC. This
pin derives power from a third winding on the transformer to provide power to INTVCC. Bypass locally with
a ≥100nF capacitor.
DCM (Pin 10): Discontinuous Conduction Mode Detector.
This pin detects the dV/dt of the switching waveform,
ensuring accurate output voltage sampling and quasiresonant boundary-mode switching. Connect a capacitor
with series resistance from this pin to the third winding.
See Boundary Mode Detection section.
TC (Pin 11): Temperature Compensation Pin. This pin
presents a proportional-to-absolute-temperature (PTAT)
voltage, which is equal to the internal 1.22V reference
voltage at 25°C and rises with temperature by 4.1mV/°C,
to compensate for the output rectifier diode. Connect an
appropriate resistor from this pin to FB.
FB (Pin 12): Feedback Pin. The voltage appearing on this
pin is sampled and regulated to equal the internal 1.22V
reference voltage. Connect this pin to a resistor divider
from the third winding to regulate the output voltage.
VC (Pin 13): Loop Compensation Pin. An internal GM
transconductance amplifier feeds this pin with an error
current depending on the sampled FB voltage. The
resulting voltage determines the switching frequency
and peak current limit for power delivery. Connect a
series R-C network to stabilize the regulator. See Loop
Compensation section.
IREG/SS (Pin 14): Current Regulation/Soft-Start Pin. A
10μA current flows out of this pin. The resulting voltage
sets the output current regulation point, as determined by
an internal current regulation loop. Program the current
with a resistor to GND, or connect a capacitor to implement soft-start.
SMODE (Pin 16): Standby Mode Pin. Connect this pin to
INTVCC to enable Standby Mode, which reduces the minimum switching frequency to 220Hz for ultralow quiescent
power consumption. Connect to GND to disable.
EN/UVLO (Pin 17): Enable/Undervoltage Lockout Pin. The
chip will operate only if the voltage on this pin is greater
than the internal 1.22V reference voltage. Connect to a
resistor divider as desired, or connect to BIAS or INTVCC
if UVLO functionality is not desired.
SENSE (Pin 18): Current Sense Pin. The voltage appearing on this pin is used for peak current-mode control and
current limiting. Connect a current-sensing resistor from
the main power MOSFET to GND to program the current
limit. Utilize a compact layout with the transformer and
input capacitor to reduce EMI and voltage spikes.
GATE (Pin 19): Gate Driver Output. Connect this pin to the
gate of the main power MOSFET for the flyback converter.
GND (Pins 15, 20): Ground.
Exposed Pad (Pin 21, LT8316FE Only): Ground. Solder
the exposed pad to a ground plane for heat sinking.
Rev. B
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7
LT8316
BLOCK DIAGRAM
DOUT
NPS :1
VIN
CIN
ZSNUB
DSNUB
LPRI
•
•
VOUT +
LSEC
COUT
VOUT –
9
VIN
1, 2, 3
BIAS
CBIAS
36V
LDO
–
10V
DEPLETION
FET
+
VUVLO
M2
DBIAS
+
8
17
EN/UVLO
MASTER
LATCH
BIAS/REF
CONTROL
TSD
CDRV
16
–
INTVCC
SMODE
S
Q
GATE
DRIVER
19
M1
R
CDCM
:NTS
•
RDCM
10
RFB2
12
LTER
RFB1
DCM
BOUNDARY
DETECT
FB
×1
VOLTAGE
CONTROLLED
OSCILLATOR
SENSE
CURRENT
COMPARATOR
+
RSNS
×10
GND
15, 20, 21
–
S&H
18
RTC
11
TC
×1
+4.1mV/°C
CURRENT
ERROR AMP
VOLTAGE
ERROR AMP
–
GM
1.22V
1.25×(1–D)
–
+
10µA
+
13
VC
RC
14
IREG/SS
8316 BD
RIREG
CC
8
Rev. B
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LT8316
OPERATION
The LT8316 is a high-voltage current-mode switching
controller designed for the isolated flyback topology. The
problem normally encountered in such circuits is that
information relating to the output voltage on the isolated
secondary side of the transformer must be communicated
to the primary side in order to achieve regulation. This is
often performed by opto-isolator circuits, which waste
output power, require extra components that increase the
cost and physical size of the power supply, and exhibit
trouble due to limited dynamic response, nonlinearity,
unit-to-unit variation, and aging over their life.
The LT8316 does not need an opto-isolator because it
derives information about the isolated output voltage by
examining the flyback pulse waveform appearing on a
tertiary winding on the transformer. The output voltage is
easily programmed with two resistors.
Boundary Mode Operation
Boundary mode is a variable frequency, current-mode
switching scheme. The external N-channel MOSFET turns
on and the inductor current increases until it reaches the
limit determined by the voltage on the VC pin and the
sense resistor’s value. After the MOSFET turns off, the
voltage on the tertiary winding rises to the output voltage
multiplied by the transformer tertiary-to-secondary turns
ratio. After the current through the output diode falls to
zero, the voltage on the tertiary winding falls. A boundary
mode detection comparator on the DCM pin detects the
negative dV/dt associated with the falling voltage and triggers the sample-and-hold circuit to sample the FB voltage.
When the tertiary voltage reaches its minimum and stops
falling, the boundary mode comparator turns the internal
MOSFET back on for minimal switching energy loss.
The LT8316 features a boundary mode control method
(also called critical conduction mode), where the part
operates at the boundary between continuous conduction mode and discontinuous conduction mode. Due
to boundary mode operation, the output voltage can be
determined from the tertiary winding’s voltage when the
secondary current is almost zero. This method improves
load regulation without extra resistors and capacitors.
Boundary mode operation returns the secondary current
to zero every cycle, so parasitic resistive voltage drops
do not cause load regulation errors. Boundary mode also
allows the use of a smaller transformer compared to continuous conduction mode and does not exhibit subharmonic oscillation.
The Block Diagram shows an overall view of the system.
Many of the blocks are similar to those found in traditional
switching regulators, including a current comparator,
internal reference, LDO, logic, timers and a MOSFET gate
driver. The novel sections include a special sampling error
amplifier, a temperature compensation circuit, an output
current regulator, and a depletion-mode startup FET.
As the load gets lighter, the peak switch current decreases.
Maintaining boundary mode requires the switching frequency to increase. An excessive switching frequency
increases switching and gate charge losses. To limit these
losses, the LT8316 features an internal oscillator which
limits the maximum switching frequency to 140kHz. Once
the switching frequency hits this limit, the part starts to
reduce its switching frequency and operates in discontinuous conduction mode.
Depletion Startup FET
The LT8316 features an internal depletion mode MOSFET.
At startup, this transistor charges the INTVCC capacitor
so that the LT8316 has power to begin switching. This
removes the need for an external bleeder resistor or other
components.
Discontinuous Conduction Mode Operation
Low Ripple Burst Mode Operation
Unlike traditional flyback converters, the MOSFET has
to turn on and off to generate a flyback pulse in order
to update the sampled output voltage. The duration of a
well-formed flyback pulse must exceed the minimum-off
time for proper sampling. To this end, a minimum switch
turn-off current is necessary to ensure a flyback pulse of
sufficient duration.
Rev. B
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9
LT8316
OPERATION
As the load gets very light, the LT8316 reduces switching
frequency while maintaining the minimum current limit in
order to reduce current delivery while still properly sampling the output voltage. Because flyback pulses must be
generated to regulate the output, a minimum switching
frequency of 3.5kHz is enforced. The minimum switching frequency determines how often the output voltage is
sampled and introduces a minimum load requirement of
approximately 1% of the maximum load power.
Tying the SMODE pin to INTVCC enables Standby Mode,
which reduces the minimum switching frequency to
220Hz, reducing the minimum load requirement at the
expense of a longer period between samples.
CV/CC Regulation
Like a traditional voltage regulator, the LT8316 implements
a GM transconductance amplifier that regulates the output
voltage. In addition, the LT8316 includes a current
regulation loop which regulates the estimated output
current to a point set by the voltage on the IREG/SS pin.
Below the current setpoint, the output voltage is regulated
for constant-voltage (CV) regulation. Below the voltage
setpoint, the the output current is regulated for constantcurrent (CC) regulation.
APPLICATIONS INFORMATION
The LT8316 is designed to be an easy-to-use, yet fullyfeatured flyback controller. With proper technique, it is
simple to build an efficient and robust power solution.
However, the voltage and power levels involved can be
lethal. Milliamperes from a high voltage power supply
can cause heart fibrillation and death. Never touch conductive nodes while the circuit is active, and keep one
hand behind your back while probing.
Depletion Startup FET
The LT8316 features an internal depletion-mode FET,
which has a negative threshold voltage and is therefore
normally on. At startup, this FET charges the INTVCC
capacitor to 12V so that the LT8316 has power to begin
switching. This removes the need for an external bleeder
resistor or other startup components. Once INTVCC is
charged, the depletion-mode FET turns off.
The depletion FET is current-limited to avoid destructive
power levels. To ensure start-up, do not load INTVCC or
BIAS with excessive current while the chip is starting.
ENABLE and Undervoltage Lockout (UVLO)
A resistive divider from VIN to the EN/UVLO pin implements undervoltage lockout (UVLO). The EN/UVLO pin
threshold is set at 1.22V. Upon startup, the EN/UVLO
pin exhibits a ~65mV hysteresis voltage to prevent
oscillations.
The EN/UVLO pin can also be driven with logic levels and
set by the output pin of a digital controller. Otherwise,
EN/UVLO can also be tied to BIAS or INTVCC to keep the
chip enabled.
Output Voltage
The output voltage is programmed by the RFB1 and RFB2
resistors depicted in the Block Diagram. The LT8316
operates similarly to traditional current-mode switchers,
except in its use of a unique sample-and-hold error amplifier, which regulates the isolated output voltage from the
sampled flyback pulse.
Operation is as follows: when the power switch M1 turns
off, the voltage across the tertiary winding rises. The
amplitude of the flyback pulse is given as:
VFLBK = (VOUT + VF + ISEC • ESR) • NTS,
10
Rev. B
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LT8316
APPLICATIONS INFORMATION
where
where
VF = Output diode (DOUT) forward-biased voltage
VOUT = Desired output voltage
ISEC = Transformer secondary current
VF = Output diode (DOUT) forward voltage ≈ 300mV
ESR = Parasitic resistance of secondary circuit
NTS = Transformer tertiary-to-secondary turns ratio
NTS = Transformer tertiary-to-secondary turns ratio
Power up the application with the final power components
installed and the starting RFB2 value, and measure the
regulated output voltage, VOUT(MEAS). The final RFB2 value
can be adjusted to:
The voltage divider formed by RFB1 and RFB2 feeds a
scaled version of the flyback pulse to the FB pin, where
it is sampled and fed to the error amplifier. Because the
sample-and-hold circuit samples the voltage when the
secondary current is nearly zero, the (ISEC • ESR) term in
the VFLBK equation can be ignored.
The internal 1.22V reference voltage feeds the non-inverting input of the error amplifier. The high gain of the overall
loop causes the FB voltage to be nearly equal to the reference voltage. The resulting flyback voltage VFLBK can be
expressed as:
⎛ R ⎞
VFLBK = ⎜1+ FB2 ⎟ • 1.22V
⎝ RFB1 ⎠
Combining with the previous VFLBK equation and solving
for VOUT yields:
⎛ R ⎞ 1.22V
VOUT = ⎜1+ FB2 ⎟ •
− VF
RFB1 ⎠ NTS
⎝
Due to the fast nature of the flyback pulse, it is recommended to keep RFB1 between 1kΩ and 10kΩ in order to
preserve the resistor divider’s dynamic response.
Selecting the RFB2 Resistor Value
The LT8316 uses a unique sampling scheme to regulate
the isolated output voltage. Due to its sampling nature,
the scheme exhibits repeatable delays and error sources,
which will affect the output voltage and force a re-evaluation of the resistor values.
With a fixed value for RFB1 (such as 10kΩ) chosen, rearrangement of the expression for VOUT yields the starting
value for RFB2:
RFB2(FINAL) ≈ (RFB2 +RFB1) •
VOUT
VOUT(MEAS)
−RFB1
Once the final RFB2 value is selected, the regulation accuracy from board to board for a given application will be
very consistent, typically within ±5% when including
device variation of all the components in the system
(assuming resistor tolerances and transformer windings
matching within ±1%). However, if the transformer or
the output diode is changed, or the layout is dramatically
altered, there may be some change in VOUT.
Example: Consider a 12V output supply with an output
diode whose forward voltage at nearly zero current is
300mV at room temperature. If the tertiary-to-secondary
ratio NTS is 1 and RFB1 is 10kΩ, then RFB2 is calculated
as 90.9kΩ. The application is powered up and the output
is slightly high at 12.2V, so RFB2 is adjusted to 88.7kΩ.
Output Diode Temperature Compensation
Reiterating the equation for VOUT,
⎛ R ⎞ 1.22V
VOUT = ⎜1+ FB2 ⎟ •
− VF
RFB2 ⎠ NTS
⎝
The first term in the VOUT equation is insensitive to temperature, but the output diode forward voltage VF has
a significant negative temperature coefficient (from
−1mV/°C to −2mV/°C). Such a temperature coefficient
produces approximately 200mV to 400mV output voltage
variation across operating temperature.
⎛V +V
⎞
RFB2 = RFB1 • ⎜ OUT F • NTS − 1⎟
⎝ 1.22V
⎠
Rev. B
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11
LT8316
APPLICATIONS INFORMATION
At higher output voltages, the resulting variation may
be unimportant as it represents a small fraction of the
total output. However, for lower output voltages, the
diode temperature coefficient accounts for a large output
voltage error.
To correct this error, the TC pin provides a buffered
proportional-to-absolute-temperature (PTAT) voltage. At
room temperature, this voltage is equal to the internal
1.22V reference, and it has a +4.1mV/°C temperature
coefficient.
The output diode’s temperature coefficient TCF can easily
be found experimentally by applying a uniform temperature to both the output diode and the LT8316. First, RFB1
and RFB2 are adjusted to give the desired output voltage
at room temperature. The temperature is then raised or
lowered by a known amount to a new temperature, and
the diode temperature coefficient is found as:
TCF =
VOUT(25°C) − VOUT(TNEW)
TNEW − 25°C
With the output diode’s temperature coefficient known,
a resistor RTC is then attached from the TC pin to the FB
pin. Its value can be calculated as:
RTC =
−RFB2 • 4.1mV / °C
TCF • NTS
Example: If the output diode’s temperature coefficient TCF
is found experimentally to be –1.9mV/°C, then with RFB2
= 88.7kΩ, a RTC value of 191kΩ will yield a temperatureinvariant output voltage.
Sense Resistor Selection
The resistor RSNS between the power MOSFET and GND
should be selected to provide an adequate switch current
to drive the application without exceeding the current limit
threshold.
At maximum current delivery, current limit occurs when
the SENSE pin voltage is 100mV. In boundary mode, the
maximum output current will depend on the duty cycle D
and is given by:
where
IOUT(MAX) ≈
100mV
• (1−D) • NPS
2 • RSNS
VOUT(25°C) = VOUT measured at room temperature
VOUT(TNEW) = VOUT measured at new temperature
where
TNEW = New temperature in Celsius
NPS = Transformer primary-to-secondary turns ratio
Alternatively, TCF can be found more accurately by
measuring VOUT at two extremes of temperature and
computing:
TCF = –
( VOUT + VF ) • NPS
( VOUT + VF ) • NPS + VIN
VIN = Power supply voltage.
ΔVOUT
ΔT
It should be noted that for this measurement, it is critical
that the entire board be heated or cooled uniformly, for
example by an oven. A heat gun or freeze spray will not
suffice, since the heating and cooling will not be uniform,
and dramatic temperature mismatch between the LT8316
and the output diode will cause significant error.
If no method is available to apply uniform heat or cooling,
extrapolating data from the diode’s data sheet or assuming a nominal TCF value (such as −1.5mV/°C) may yield
a satisfactory result.
12
D≈
It should be noted that the worst-case occurs at minimum
VIN, so DVIN(MIN) should be calculated assuming VIN =
VIN(MIN). Solving for the sense resistor value:
RSNS =
1−DVIN(MIN)
IOUT(MAX)
• 50mV • NPS • 80%
A factor of 80% is introduced to compensate for system
delays and tolerances, but it may need adjustment for the
final application.
Rev. B
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LT8316
APPLICATIONS INFORMATION
Example: A 12V output voltage is generated from a
VIN = 400V input that can drop as low as VIN(MIN) = 250V.
If a transformer with primary-to-secondary turns ratio
NPS = 10 is selected to supply a maximum output current
IOUT(MAX) = 2A, then the duty cycle is DVIN(MIN) ≈ 33% and
the sense resistor is calculated RSNS = 133mΩ. A 120mΩ
resistor is selected.
A more accurate value for RSNS can be obtained by finding
D experimentally with an oscilloscope and electronic load.
Output Power
Compared with a buck or a boost converter, a flyback converter has a complicated relationship between the input
and output currents. Boost converters have relatively constant maximum input current regardless of input voltage,
while buck converters have relatively constant maximum
output current regardless of input voltage, owing to the
fact that they have continuous input and output currents
respectively. A flyback converter, however, has both discontinuous input and output currents. The duty cycle
affects both input and output currents, making it hard to
predict maximum output power.
The following equation calculates output power:
where
η = Efficiency ≈ 80%
D≈
( VOUT + VF ) • NPS
( VOUT + VF ) • NPS + VIN
ISW(MAX) = Max. switch current limit = 100mV/RSNS
The calculated power is approximate, and does not take
into account timing variations caused by circuit parasitics.
The actual output power must be evaluated on the bench.
Example: Consider a 12V output converter with a VIN(MIN)
of 250V and a VIN(MAX) of 500V. With a ten-to-one primaryto-secondary winding ratio (NPS = 10) and a sense resistor RSNS = 120mΩ, the maximum power output is 33W
at VIN(MAX) = 500V but lowers to 28W at VIN(MIN) = 250V.
Selecting a Transformer
Transformer specification and design is possibly the
most critical part of successfully applying the LT8316. In
addition to the usual list of guidelines dealing with highfrequency isolated power supply transformer design, the
following information should be carefully considered.
Analog Devices has worked with several leading magnetic
component manufacturers to produce pre-designed flyback transformers for use with the LT8316. Table 1 shows
the details of these transformers.
POUT = 0.5 • η • VIN • D • ISW(MAX)
Table 1. Predesigned Transformers — Typical Specifications
TRANSFORMER PART
NUMBER
LPRI
(µH)
NP:NS:NT
ISOLATION
VENDOR
TARGET APPLICATIONS
11328-T078
670
8:1:1
Reinforced
Sumida
100V–600V to 12V/3A
11328-T080
670
4:1:0.5
Reinforced
Sumida
100V–600V to 24V/1.5A
11328-T073
670
2:1:0.25
Reinforced
Sumida
100V–600V to 54V/0.7A
11328-T061
600
5:1:1
Basic
Sumida
200V–450V to 15V/2A
11338-T195
1000
14:1:1.7
Basic
Sumida
100V–400V to 7V/2A
11328-T074
500
8:1:1
Reinforced
Sumida
100V–450V to 12V/3A
15364-T008
1500
20:1:2.4
Reinforced
Sumida
25V–450V to 5V/1A
11328-T086
70
4:1:0.5
Reinforced
Sumida
30V–260V to 24V/3A
00399-T239
2800
6:1:0.7
Functional
Sumida
90V–500V to 16.8V/0.4A
750317463
440
8:1:1
Reinforced
Wurth Elektronik
100V–600V to 12V/4A
750317589
670
8:1:1
Reinforced
Wurth Elektronik
100V–600V to 12V/3A
750317464
440
4:1:0.5
Reinforced
Wurth Elektronik
100V–600V to 24V/2A
11328-T060
800
18:1:3
Reinforced
Sumida
140V–450V to 5V/7A
Rev. B
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13
LT8316
APPLICATIONS INFORMATION
Flyback Transformer Modeling
A flyback transformer can be thought of as an ideal transformer with a parallel magnetizing inductance and series
leakage inductances, as shown in Figure 1.
LLEAK(PRI)
NPS :1
LLEAK(SEC)
LPRI
8316 F01
IDEAL
Figure 1. Transformer Model
The magnetizing inductance, which is the mutual inductance shared by both primary and secondary windings,
is essential for absorbing energy and delivering it to the
load. It stores energy in magnetic flux lines that pass
through both primary and secondary windings.
If the leakage inductances are small, the magnetizing
inductance can be measured by leaving the secondary
open-circuited and measuring the inductance of the primary, resulting in an inductance LPRI. The magnetizing
inductance can also be measured from the secondary by
leaving the primary open-circuited and measuring the
secondary inductance LSEC. The relationship between the
primary-referred magnetizing inductance and secondaryreferred magnetizing inductance is given by the primaryto-secondary turns ratio NPS as:
LPRI = LSEC • NPS2
The transformer also has leakage inductances, which
are parasitic inductances associated with each winding.
These inductances store energy in magnetic flux lines
which “leak” out of the magnetic core and do not pass
through both windings, and therefore represent selfinductances whose energy cannot be transferred through
the transformer. As such, they contribute to energy loss
and reduced converter efficiency.
If the leakage inductances are small, the combined leakage inductance can be measured by short-circuiting the
secondary and measuring the primary inductance. This
results in a primary-referred inductance,
LLEAK = LLEAK(PRI) + LLEAK(SEC) • NPS2
14
The leakage inductance and magnetizing inductance are
related by the coupling coefficient k according to the
relation:
k=
L PRI
L PRI + L LEAK / 2
Coupling coefficients of k=99% are common, and are
a function of transformer construction and materials.
Increased voltage isolation between primary and secondary is often desired for safety purposes, but generally reduces the coupling coefficient and increases leakage inductance. Bifilar windings maximize the coupling
coefficient, but are often undesirable because of their
minimal isolation and increased primary-to-secondary
capacitance. In the end, a reasonable trade-off between
isolation and coupling coefficient must be made.
Magnetizing Inductance Requirement
The appropriate magnetizing inductance depends on the
LT8316’s minimum switch-on time, its minimum switchoff time, and output power.
The conduction of secondary current reflects the output
voltage onto the tertiary winding during the flyback pulse.
The LT8316 obtains output voltage information from the
reflected output voltage on the FB pin. The sample-andhold error amplifier needs a minimum of 800ns to settle and sample the reflected output voltage. In order to
ensure proper sampling, the secondary winding needs to
conduct current for at least 800ns.
The minimum value for primary-side magnetizing inductance is given by:
LPRI ≥
tOFF(MIN) • NPS • ( VOUT + VF )
ISW(MIN)
where
tOFF(MIN) = Minimum switch-off time = 800ns
ISW(MIN) = Minimum switch current limit = 20mV/RSNS
The LT8316 has a minimum switch-on time that prevents
the chip from turning on the power switch for a period
shorter than 300ns in order to blank the initial switch
Rev. B
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LT8316
APPLICATIONS INFORMATION
turn-on current spike. If the inductor current exceeds the
minimum switch current limit during that time, the minimum load current will increase. Therefore, the following
equation must also be observed:
LPRI ≥
tON(MIN) • VIN(MAX)
ISW(MIN)
where
tON(MIN) = Minimum Switch-On Time = 300ns
Additionally, the magnetizing inductance must be large
enough to provide sufficient power to the output when the
LT8316 operates at maximum frequency. This creates a
third requirement for magnetizing inductance:
Example: For a 12V/2A output converter with
VIN(MAX) = 500V, VF = 300mV, NPS = 10, and
RSNS = 120mΩ, the first equation requires LPRI ≥ 590μH,
the second equation requires LPRI ≥ 900μH, and the third
equation requires LPRI ≥ 633μH. A reasonable standard
value for primary inductance is LPRI = 1.2mH. If a larger
minimum load at high VIN can be tolerated, 820μH is
acceptable. The fourth equation dictates that LPRI must
be less than 5.9mH; this requirement is easily satisfied
by both options.
Saturation Current
where
The current in the transformer windings should not
exceed its rated saturation current. Beyond its saturation
value, the inductance drops and the current rises to an
uncontrolled value, causing extra power dissipation and
possible failure. Choose a transformer whose primary
saturation current is at least 30% greater than ISW(MAX),
which is 100mV/RSNS.
ISW(MAX) = Maximum switch current = 100mV/RSNS
Turns Ratios
LPRI ≥
2 • (VOUT + VF ) •IOUT(MAX)
η •ISW(MAX)2 • fSW(MAX)
IOUT(MAX) = Maximum load current
fSW(MAX) = Maximum switching frequency = 140kHz
η = Efficiency ≈ 80%
In general, choose a transformer with its primary magnetizing inductance about 20% to 50% larger than the
minimum values calculated above.
In addition to these minimum values, the magnetizing
inductance has a maximum value. To avoid a stuck output-low state, the LT8316 has a 50μs backup timer that
turns the switch on if the secondary diode turn-off has
not been detected. As a result, the magnetizing inductance
must not be so large as to cause secondary diode conduction to exceed this time. This creates a final requirement
for maximum magnetizing inductance:
LPRI <
0.8 • ( VOUT + VF ) •NPS • tBU
ISW(MAX )
where
tBU = Backup time = 50μs
Typically, choose the transformer primary-to-secondary
turns ratio NPS to maximize available output power. For
low output voltages, a larger NPS ratio can be used to
maximize the transformer’s current gain. However,
remember that the MOSFET’s drain sees a voltage that
is equal to VIN plus the output voltage multiplied by NPS.
Additionally, leakage inductance will cause a voltage spike
(VLEAKAGE) that adds to this reflected voltage. This total
quantity needs to remain below the absolute maximum
rating of the MOSFET’s drain to prevent breakdown.
Together these conditions place an upper limit on the
turns ratio NPS for a given application. Choose a turns
ratio low enough to ensure:
NPS <
VBR − VIN(MAX) − VLEAKAGE
VOUT + VF
where
VBR = MOSFET breakdown voltage.
For producing high output voltages, a low ratio NPS may
be used. However, the multiplied capacitance presented to
the transformer primary may cause ringing that exceeds
Rev. B
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15
LT8316
APPLICATIONS INFORMATION
the 300ns tON(MIN), causing light-load instability. Fully
evaluate these applications before use with the LT8316.
During operation, the LT8316 derives its power from a
tertiary winding through its BIAS pin. BIAS must be maintained between 10V and 30V for proper operation. This
dictates a tertiary-to-secondary turns ratio NTS of:
10V
VOUT
< N TS <
30V
VOUT
Example: For VOUT = 12V, NTS must lie between 0.83
and 2.5, or a 5:6 and 5:2 tertiary-to-secondary ratio
respectively.
Due to leakage inductance ringing on the tertiary winding,
BIAS will rise above its nominal value. To prevent BIAS pin
breakdown, an internal clamp circuit activates at 36V and
shunts the excess current to ground. This current must
not exceed 15mA; evaluate at maximum load current and
minimum VIN to verify proper operation.
Because the output voltage is measured through the voltage appearing on the third winding, NTS directly affects
the output voltage regulation accuracy. For best results,
make sure the transformer is manufactured with a precise
turns ratio specified within ±1%.
VSW
Leakage Inductance and Snubbers
Any leakage inductance on either the primary or secondary
windings causes a voltage spike to appear on the primary
after the power switch turns off. This spike is increasingly
prominent at higher load currents where more energy is
stored in the leakage inductance. This energy cannot be
delivered to the load, and must be dissipated as heat. It
is thus very important to minimize transformer leakage
inductance.
When designing an application, adequate margin should
be kept for the worst-case leakage voltage spikes even
under overload conditions. In most cases, the reflected
output voltage on the primary plus VIN should be kept
below 80% of VBR, as shown in Figure 2. This leaves 20%
margin for the leakage spike across line and load conditions. A larger voltage margin will be required for poorly
wound transformers with excessive leakage inductance.
In addition to the voltage spikes, the leakage inductance
also causes the switching node to ring for a while after
the power switch turns off. To prevent the voltage ringing from falsely triggering the boundary mode detector,
the LT8316 internally blanks the boundary mode detector
for 800ns. Any ringing after 800ns may trigger the power
switch to turn back on again before the secondary current
falls to zero, so the leakage inductance spike and associated ringing should be limited to less than 800ns.
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