LT8337/LT8337-1
28V, 5A Low IQ Synchronous
Step-Up Silent Switcher with PassThru
FEATURES
DESCRIPTION
Silent Switcher® Architecture
n Ultralow EMI Emissions
n Optional Spread Spectrum Frequency Modulation
n Integrated 28V, 5A Power Switches
n Wide Input Voltage Range: 2.7V to 28V
n Output Voltage Programmable Up to 26V
n Low V Pin Quiescent Current
IN
n 0.3µA in Shutdown
n 4µA in Burst Mode® Operation (LT8337)
n 15µA in PassThru™ (LT8337)
n 100% Duty Cycle Capability for Synchronous MOSFET
n External Compensation: Fast Transient Response
(LT8337-1)
n Power Good Monitor (LT8337)
n Adjustable and Synchronizable: 300kHz to 3MHz
n Pulse-Skipping or Burst Mode Operation at Light Load
n Small 16-Lead (3mm × 3mm) LQFN Package
The LT®8337/LT8337-1 is a low IQ, synchronous stepup DC/DC converter. It features Silent Switcher architecture and optional spread spectrum frequency modulation (SSFM) to minimize EMI emissions while delivering
high efficiencies at high switching frequencies.
n
n
The LT8337/LT8337-1 integrates 28V, 5A power switches,
operating at a fixed switching frequency programmable
between 300kHz and 3MHz and synchronizable to an
external clock. The LT8337/LT8337-1 features output
soft-start and output overvoltage lockout.
The LT8337-1 allows external compensation via the VC pin
for fast transient response. The LT8337 offers an output
power good flag via the PG pin.
APPLICATIONS
n
The wide input/output voltage range, low VIN pin quiescent current in Burst Mode operation, and 100% dutycycle capability for the synchronous MOSFET in PassThru
operation (VIN > VOUT) makes the LT8337/LT8337-1 ideally suited for battery-powered systems and general purpose step-up applications.
Battery-Powered Systems
General Purpose Step-Up
All registered trademarks and trademarks are the property of their respective owners. Protected
by U.S patents, including 10686381.
TYPICAL APPLICATION
High Efficiency 5V to 13V Input, 2MHz, 15V Output Boost Converter
Efficiency
2.2µH
SW
VIN
VOUT
15V
1.2A AT 5V VIN
3A AT 13V VIN
VOUT
LT8337
1M
INTVCC
RT
1µF
22µF
×4
FB
SYNC/MODE
GND
1000
80
70
100
60
50
10
40
30
1
20
71.5k
VIN = 13V
VIN = 5V
10
47.5k
2MHz
0
0.1
83371 TA01a
POWER LOSS (mW)
PG
90
BST
EN/UVLO
10000
100
0.1µF
22µF
EFFICIENCY (%)
VIN
5V TO 13V
1
10
100
1000
OUTPUT CURRENT (mA)
0.1
10000
83371 TA01b
Rev. 0
Document Feedback
For more information www.analog.com
1
LT8337/LT8337-1
ABSOLUTE MAXIMUM RATINGS
(Note 1)
VIN, VOUT, EN/UVLO...................................................28V
SYNC/MODE, FB..........................................................6V
PG (LT8337)..............................................................10V
VC (LT8337-1)............................................................2.5V
Operating Junction Temperature Range (Notes 2, 3)
LT8337EV/LT8337EV-1....................... –40°C to 125°C
LT8337JV/LT8337JV-1........................ –40°C to 150°C
Storage Temperature Range................... –65°C to 150°C
Maximum Reflow (Package Body)
Temperature....................................................... 260°C
PIN CONFIGURATION
LT8337-1
6
7
8
GND
VOUT
GND
SYNC/MODE 1
11 SW
RT 2
10 SW
GND 3
9 SW
FB 4
NC
NC
LQFN PACKAGE
16-LEAD (3mm × 3mm) LQFN
θJA = 42.8°C/W, θJCtop = 45.2°C/W,
θJCbottom = 8.2°C/W (NOTE 4)
EXPOSED PAD (PIN 17) IS GND, MUST BE SOLDERED TO PCB
VIN
EN/UVLO
INTVCC
12 BST
11 SW
17
GND
10 SW
9 SW
5
6
7
8
GND
5
VOUT
FB 4
12 BST
NC
16 15 14 13
VOUT
17
GND
GND 3
NC
VOUT
RT 2
NC
NC
16 15 14 13
SYNC/MODE 1
TOP VIEW
VC
VIN
EN/UVLO
INTVCC
NC
PG
TOP VIEW
GND
LT8337
NC
LQFN PACKAGE
16-LEAD (3mm × 3mm) LQFN
θJA = 42.8°C/W, θJCtop = 45.2°C/W,
θJCbottom = 8.2°C/W (NOTE 4)
EXPOSED PAD (PIN 17) IS GND, MUST BE SOLDERED TO PCB
ORDER INFORMATION
PART MARKING
PART NUMBER
LT8337EV#PBF
LT8337JV#PBF
LT8337EV-1#PBF
LT8337JV-1#PBF
DEVICE
FINISH CODE
PAD FINISH
PACKAGE*
TYPE
MSL
RATING
TEMPERATURE RANGE
(SEE NOTE 2)
–40°C to 125°C
LHKR
e4
Au (RoHS)
LHNW
LQFN (Laminate
Package with QFN
Footprint)
3
–40°C to 150°C
–40°C to 125°C
–40°C to 150°C
• Contact the factory for parts specified with wider operating temperature
ranges. Pad or ball finish code is per IPC/JEDEC J-STD-609.
• Recommended LGA and BGA PCB Assembly and Manufacturing
Procedures
*The LT8337/LT8337-1 package has the same dimensions as a standard
3mm × 3mm QFN.
• LGA and BGA Package and Tray Drawings
2
Rev. 0
For more information www.analog.com
LT8337/LT8337-1
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 5V, EN/UVLO = 2V, unless otherwise noted.
PARAMETER
CONDITIONS
MIN
VIN Operation Voltage
VIN Quiescent Current in Shutdown
LT8337 VIN Quiescent Current
LT8337-1 VIN Quiescent Current
FB Regulation Voltage
TYP
UNITS
V
0.3
0.3
1
10
µA
µA
4
8
µA
SYNC/MODE = Open, Not Switching
0.9
1.5
mA
VIN = 10.1V, VOUT = 10V, FB = 1.05V (In PassThru Mode)
15
25
µA
SYNC/MODE = 0V, Not Switching
23
35
µA
SYNC/MODE = Open, Not Switching
0.9
1.5
mA
VIN = 10.1V, VOUT = 10V, FB = 1.05V (In PassThru Mode)
30
60
µA
1.000
1.000
1.000
1.006
1.010
1.012
V
V
V
0.005
0.03
%/V
20
nA
EN/UVLO = 0.15V
EN/UVLO = 0.15V
2.7
MAX
28
l
l
SYNC/MODE = 0V, Not Switching
0.994
0.983
0.980
E-Grade
J-Grade
l
l
FB Line Regulation
2.7V < VIN < 28V
l
FB Pin Input Current
FB = 1.0V
–20
Switching Frequency
RT = 357kΩ
RT = 102kΩ
RT = 47.5kΩ
RT = 30.1kΩ
270
0.93
1.85
2.7
l
300
1
2
3
330
1.07
2.15
3.3
kHz
MHz
MHz
MHz
Spread Spectrum Modulation Frequency
as Percentage of fSW
0.45
%
Spread Spectrum Modulation Frequency
Range as Percentage of fSW
20
%
Synchronizable Frequency
SYNC/MODE = External Clock
l
0.3
SYNC/MODE Pin Input Logic Level for
Frequency Synchronization
SYNC Logic Low
SYNC Logic High
l
l
1.7
l
0.94
Soft-Start Time
RT = 47.5kΩ
EN/UVLO Threshold Voltage
Falling
Hysteresis
EN/UVLO Input Bias Current
EN/UVLO = 2V
LT8337 PG Upper Threshold Offset from
Regulated FB
FB Falling
Hysteresis
l
5
LT8337 PG Lower Threshold Offset from
Regulated FB
FB Rising
Hysteresis
l
–12
LT8337 PG Leakage Current
PG = 3.5V
LT8337 PG Pull-Down Resistance
PG = 0.1V
LT8337-1 Error Amp Transconductance
VC = 1.25V
3
0.4
1.4
1.0
90
V
V
ms
1.06
V
mV
40
nA
8
1
12
%
%
–8
1
–5
%
%
40
nA
2000
Ω
–40
–40
700
LT8337-1 Error Amp Gain
MHz
0.4
mS
400
V/V
LT8337-1 VC Source Current
FB = 0.8V, VC = 1.25V
–75
μA
LT8337-1 VC Sink Current
FB = 1.2V, VC = 1.25V
70
μA
6.0
A/V
LT8337-1 VC Pin to Switch Current Gain
Rev. 0
For more information www.analog.com
3
LT8337/LT8337-1
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 5V, EN/UVLO = 2V, unless otherwise noted.
PARAMETER
CONDITIONS
Bottom Switch On-Resistance
ISW = 1A
MIN
TYP
MAX
32
Bottom Switch Current Limit
5
l
Bottom Switch Minimum Off-time
UNITS
mΩ
6
20
20
6.6
A
50
ns
Bottom Switch Minimum On-time
VIN = 9.5V, VOUT = 10V
Top Switch On-Resistance
ISW = 1A
80
SW Leakage Current
VOUT = 28V, SW = 0V, 28V
VOUT Pin Current
SYNC/MODE = 0V, VOUT = 10V, Not Switching
1
μA
VIN = 10.1V, VOUT = 10V , FB = 1.05V (In PassThru Mode)
30
μA
35
ns
mΩ
–1.5
1.5
μA
PassThru Mode VIN to VOUT Threshold
(VIN – VOUT)
VIN Rising
VIN Falling
0
–0.6
V
V
PassThru Mode Top Switch Reverse
Current Limit
VIN = 9.9V, VOUT = 10V, FB = 1.05V (Top Switch Turns Off)
1.5
A
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LT8337EV/LT8337EV-1 are guaranteed to meet performance
specifications from the 0°C to 125°C junction temperature. Specifications
over the –40°C to 125°C operating junction temperature range are
assured by design, characterization and correlation with statistical process
controls. The LT8337JV/LT8337JV-1 are guaranteed to meet performance
specifications over the –40°C to 150°C operating junction temperature
ranges. High junction temperatures degrade operating lifetimes; operating
lifetime is de-rated for junction temperatures greater than 125°C.
Note 3: These ICs include overtemperature protection that is intended to
protect the device during momentary overload conditions. The maximum
rated junction temperature will be exceeded when this protection is active.
Continuous operation above the specified absolute maximum operating
junction temperature may impair device reliability or permanently damage
the device.
Note 4: θ values are determined by simulation per JESD51 conditions.
TYPICAL PERFORMANCE CHARACTERISTICS
Efficiency and Power Loss
vs Output Current
90
90
10
40
30
FRONT PAGE CIRCUIT 1
20
VIN = 13V
VIN = 5V
10
1
10
100
1000
OUTPUT CURRENT (mA)
0.1
10000
EFFICIENCY (%)
EFFICIENCY (%)
50
70
PULSE-SKIPPING
60 LOSS
10
40
PULSE-SKIPPING
EFFICIENCY
20
0
1
FRONT PAGE CIRCUIT
VIN = 7.2V
10
1
10
100
OUTPUT CURRENT (mA)
0.1
1000
83371 G02
83371 G01
4
100
BURST LOSS
50
30
100
VIN = 13V
95
1000
POWER LOSS (mW)
100
60
POWER LOSS (mW)
70
BURST EFFICIENCY
80
1000
80
0
0.1
10000
100
10000
100
Burst Mode Efficiency
vs Inductor Value
VIN = 5V
90
EFFICIENCY (%)
Efficiency and Power Loss
vs Output Current
TA ≈ TJ = 25°C, unless otherwise noted.
85
80
FRONT PAGE CIRCUIT
ILOAD = 10mA
1.0μH: COILCRAFT XGL4020-102ME
1.5μH: COILCRAFT XGL4020-152ME
2.2μH: COILCRAFT XEL5030-222ME
4.7μH: COILCRAFT XAL5030-472ME
75
70
65
1
2
3
4
INDUCTOR VALUE (μH)
5
83371 G03
Rev. 0
For more information www.analog.com
LT8337/LT8337-1
TYPICAL PERFORMANCE CHARACTERISTICS
Efficiency vs Output Current at
Different Switching Frequencies
EN/UVLO Thresholds vs
60
50
40
FRONT PAGE CIRCUIT
VIN = 7.2V
30
20
1MHz, L = 4.7μH
2MHz, L = 2.2μH
3MHz, L = 1.5μH
10
0
0.1
1
10
100
LOAD CURRENT (mA)
1000
EN/UVLO RISING
1.08
1.06
1.04
1.02
EN/UVLO FALLING
1.00
OSCILLATOR FREQUENCY (MHz)
OSCILLATOR FREQUENCY (MHz)
2.5
2.06
2.04
2.02
2
1.98
1.96
1.94
1.92
25 50 75 100 125 150
TEMPERATURE (°C)
0
2.4
1
0.998
0.996
0.994
0.99
–50 –25
83371 G06
VOUT AT VIN = 5V
EN/UVLO
2V/DIV
83371 G10
Switching Waveforms, Soft-Start
15V
EN/UVLO
2V/DIV
2.1
1ms/DIV
2.0
1.9
83371 G09
VIN = 7.2V
FRONT PAGE CIRCUIT
0
50
100
150 200
TIME (μs)
250
300
83371 G08
Bottom Switch Current Limit vs
Temperature
Bottom Switch Current Limit vs
Duty Cycle
6.4
6.4
6.2
6.2
6.0
6.0
CURRENT LIMIT (A)
VOUT AT VIN = 9V
25 50 75 100 125 150
TEMPERATURE (°C)
VOUT
5V/DIV
2.2
CURRENT LIMIT (A)
VOUT AT VIN = 13V
0
2.3
Switching Waveforms, Soft-Start
at Different VIN Voltages
VIN = 13V
FRONT PAGE CIRCUIT
25 50 75 100 125 150
TEMPERATURE (C°)
RT = 47.5kΩ
SYNC/MODE = INTVCC
83371 G07
1ms/DIV
1.002
Oscillator Frequency with Spread
Spectrum Modulation
RT = 47.5kΩ
SYNC/MODE = OPEN
VOUT
10V/DIV
1.004
83371 G05
Oscillator Frequency vs
Temperature
0
1.006
0.992
0.98
–50 –25
83371 G04
1.9
–50 –25
1.008
FB REGULATION VOLTAGE (V)
70
EN/UVLO THRESHOLD (V)
1.10
80
EFFICIENCY (%)
1.01
1.12
90
2.08
FB Regulation Voltage vs
Temperature
Temperature
100
2.1
TA ≈ TJ = 25°C, unless otherwise noted.
5.8
5.6
5.4
5.2
5.0
–50 –25
5.8
5.6
5.4
5.2
0
25 50 75 100 125 150
TEMPERATURE (°C)
8337 G11
5.0
0
25
50
75
DUTY CYCLE (%)
100
83371 G12
Rev. 0
For more information www.analog.com
5
LT8337/LT8337-1
TYPICAL PERFORMANCE CHARACTERISTICS
Switching Waveforms, Current
Limit at 15% Duty Cycle
TA ≈ TJ = 25°C, unless otherwise noted.
Switching Waveforms, Current
Limit at 82% Duty Cycle
Power Switch Voltage Drop vs
Switch Current
240
IL
2A/DIV
IL
2A/DIV
0A
VSW
10V/DIV
VSW
10V/DIV
500ns/DIV
83371 G13
SWITCH DROP (mV)
0A
210
500ns/DIV
83371 G14
VIN = 2.8V
FRONT PAGE CIRCUIT
VIN = 13V
FRONT PAGE CIRCUIT
180
150
TOP SWITCH
120
90
BOTTOM SWITCH
60
30
0
0
1
2
3
4
SWITCH CURRENT (A)
5
6
83371 G15
LT8337 Transient Response,
Pulse-Skipping Mode Operation
Power Switch Voltage Drop vs
Temperature
Switch Current
70
SWITCH CURRENT = 1A
60
SWITCH DROP (mV)
LT8337 Transient Response,
Burst Mode Operation
IOUT
1A/DIV
IOUT
1A/DIV
VOUT
0.2V/DIV
VOUT
0.2V/DIV
50
TOP SWITCH
40
BOTTOM SWITCH
30
20
200µs/DIV
10
0
–50 –25
0
83371 G17
200µs/DIV
VIN = 7.2V
FRONT PAGE CIRCUIT
VIN = 7.2V
FRONT PAGE CIRCUIT
LT8337-1 Transient Response,
Pulse-Skipping Mode Operation
Burst Mode Operation
83371 G18
25 50 75 100 125 150
TEMPERATURE (C°)
83371 G16
Max Programmable Switching
Frequency
Frequency vs
vs Input
Input Voltage
Voltage
LT8337-1 Transient Response,
MAX SWITCHING FREQUENCY (MHz)
3.5
3.0
IOUT
1A/DIV
VOUT
0.2V/DIV
VOUT
0.2V/DIV
2.5
LT8337-1
2.0
LT8337
1.5
1.0
200µs/DIV
0.5
0
2.70
6
IOUT
1A/DIV
2.75
2.80
2.85 2.90
VIN (V)
2.95
3.00
83371 G20
VIN = 7.2V
FRONT PAGE CIRCUIT WITH LT8337-1
CC = 220pF, RC = 100k
200µs/DIV
83371 G21
VIN = 7.2V
FRONT PAGE CIRCUIT WITH LT8337-1
CC = 220pF, RC = 100k
83371 G19
Rev. 0
For more information www.analog.com
LT8337/LT8337-1
TYPICAL PERFORMANCE CHARACTERISTICS
Minimum On/Off Times vs
Temperature
70
Switching Waveforms, Full
Frequency PWM Operation
VOUT = 30V
Switching Waveforms,
Continuous Burst Mode Operation
IL
2A/DIV
60
MIN ON/OFF TIMES (ns)
TA ≈ TJ = 25°C, unless otherwise noted.
0A
IL
1A/DIV
0A
VSW
10V/DIV
VSW
10V/DIV
MIN ON TIME
50
40
MIN OFF TIME
30
20
83371 G23
2μs/DIV
10
0
–50 –25
0
83371 G24
2μs/DIV
VIN = 5V
ILOAD = 1.2A
FRONT PAGE CIRCUIT
VIN = 5V
ILOAD = 250mA
FRONT PAGE CIRCUIT
Switching Waveforms, Light Load
Low IQ Burst Mode Operation
Switching Waveforms,
Discontinuous Pulse-Skipping Mode
25 50 75 100 125 150
TEMPERATURE (°C)
83371 G22
Switching Waveforms,
Discontinuous Burst Mode Operation
IL
1A/DIV
0A
IL
1A/DIV
0A
VSW
10V/DIV
VSW
10V/DIV
5μs/DIV
VOUT, VIN
1V/DIV
VSW
10V/DIV
83371 G25
83371 G26
10ms/DIV
83371 G27
500ns/DIV
VIN = 5V
ILOAD = 50mA
FRONT PAGE CIRCUIT
VIN = 5V
ILOAD = 0mA
FRONT PAGE CIRCUIT
VIN = 7.2V
ILOAD = 10mA
FRONT PAGE CIRCUIT
Waveforms, PassThru
Mode Operation
Waveforms, Reverse Current
Protection in PassThru Mode
Switching Waveforms, Frequency
Foldback when VIN is close to VOUT
VIN
VOUT, VIN
1V/DIV
VOUT
VOUT, VIN
1V/DIV
VOUT
15.6V
IL
2A/DIV
VSW
20V/DIV
5μs/DIV
ILOAD = 1A
VIN = 15.5V
FRONT PAGE CIRCUIT
83371 G28
200mA
VOUT
15V
VIN
IL
1A/DIV
1A
VIN
IL
1A/DIV
1A
VSW
20V/DIV
0V
IL
0.5A/DIV
0A
–1.6A
VSW
20V/DIV
50μs/DIV
83371 G29
FRONT PAGE CIRCUIT
5μs/DIV
83371 G30
ILOAD = 1A
FRONT PAGE CIRCUIT
Rev. 0
For more information www.analog.com
7
LT8337/LT8337-1
TYPICAL PERFORMANCE CHARACTERISTICS
Conducted EMI Performance
(CISPR25
Class 5 Average)
CISPR25 Conducted
Emission Performance Voltage Method
Conducted EMI Performance
(CISPR25 Class 5 Peak)
80
70
50
40
30
20
10
60
50
40
30
20
10
0
0
–10
–10
1
10
–20
0.1
108
FREQUENCY (MHz)
CLASS 5 AVERAGE LIMIT
LT8337
AMBIENT
70
AVERAGE CE (dBµV)
PEAK CE (dBµV)
60
1
10
PAGE 20 CIRCUIT,
5V INPUT TO 12V OUTPUT AT 1.5A,
SSFM = ON, fSW = 2MHz TO 2.4MHz
PAGE 20 CIRCUIT,
5V INPUT TO 12V OUTPUT AT 1.5A,
SSFM = ON, fSW = 2MHz TO 2.4MHz
Radiated EMI Performance
(CISPR25
Class 5 Peak)
CISPR25 Radiated
EMI Performance
Radiated EMI Performance
(CISPR25 Class 5 Average)
60
60
50
50
40
40
30
20
10
0
CLASS 5 PEAK LIMIT
LT8337
AMBIENT
–10
–20
0.1
1
10
FREQUENCY (MHz)
100
1000
8
83371 G32
CLASS 5 AVERAGE LIMIT
LT8337
AMBIENT
30
20
10
0
–10
–20
0.1
1
10
FREQUENCY (MHz)
83371 G33
PAGE 20 CIRCUIT,
5V INPUT TO 12V OUTPUT AT 1.5A,
SSFM = ON, fSW = 2MHz TO 2.4MHz
108
FREQUENCY (MHz)
83371 G31
AVERAGE RE (dBµV/m)
PEAK RE (dBµV/m)
80
CLASS 5 PEAK LIMIT
LT8337
AMBIENT
–20
0.1
TA ≈ TJ = 25°C, unless otherwise noted.
100
1000
83371 G34
PAGE 20 CIRCUIT,
5V INPUT TO 12V OUTPUT AT 1.5A,
SSFM = ON, fSW = 2MHz TO 2.4MHz
Rev. 0
For more information www.analog.com
LT8337/LT8337-1
PIN FUNCTIONS
SYNC/MODE (Pin 1): External Synchronization Input and
Mode Selection Pin. This pin allows five selectable modes
for optimization of performance:
SYNC/MODE PIN INPUT
CAPABLE MODE(S) OF OPERATION
(1) GND or (INTVCC–0.2V)
Pulse-Skipping/SSFM
(5) External Clock
Pulse-Skipping/Sync
the IC as possible to achieve lowest EMI. Additional bulk
capacitors of 2.2µF or more should be placed close to
the IC with the positive terminals connected to VOUT, and
negative terminals connected to ground plane. See the
Applications Information section for a sample layout.
SW (Pins 9, 10, 11): The SW pins are the outputs of
the internal power switches. Tie these pins together and
connect them to the inductor and one side of the boost
capacitor CBST.
where the selectable modes of operation are:
Burst = low IQ, (low output ripple operation at light loads)
Pulse-Skipping = skipped pulse(s) at light load (aligned clock)
SSFM = spread spectrum frequency modulation for low EMI
Sync = switching frequency synchronized to external clock.
The LT8337/LT8337-1 automatically selects pulse-skipping mode with no spread spectrum frequency modulation during start-up, and The SYNC/MODE pin input
configurations (1) through (4) are ignored.
The LT8337/LT8337-1 automatically select low IQ operation in the PassThru mode operation, and all the SYNC/
MODE pin input configurations are ignored.
RT (Pin 2): Switching Frequency Adjustment Pin. The
LT8337/LT8337-1 switching frequency is programmed
by connecting a resistor of the appropriate value from the
RT pin to GND at Pin 3. See the Applications Information
section for more detail. Do not leave the RT pin open.
GND (Pins 3, 5, 8, Exposed Pad Pin 17): Ground. The
exposed pad should be soldered to the PCB ground plane
for good thermal and electrical performance. See the
Applications Information section for sample layout.
FB (Pin 4): Feedback Input Pin. This pin receives the feedback voltage from the external resistor divider between
VOUT and Pin 3 GND. FB pin is one input to the error
amplifier of the output voltage control loop. See the
Applications Information section for sample layout.
VOUT (Pins 6, 7): Output Pins. Connect one 1µF capacitor between VOUT at Pin 6 and GND at Pin 5 only, and a
matching 1µF capacitor between VOUT at Pin 7 and GND
at Pin 8 only. These two capacitors complete the Silent
Switcher configuration and must be placed as close to
BST (Pin 12): Top Switch Gate Driver Supply Pin. Place
a 0.1µF capacitor (CBST) between the BST and SW pins
and close to the IC.
VIN (Pin 13): Input Supply Pin. This pin must be connected to the input of the power stage (the inductor’s
input terminal).
EN/UVLO (Pin 14): Enable and Input Undervoltage
Lockout Pin. The IC is shut down when this pin is below
1V (typical). The IC draws a low VIN current of 0.3μA
(typical) when this pin is below 0.15V. The IC is enabled
when this pin is above 1.0V (typical). A resistor divider
from VIN to GND can be used to program a VIN threshold
below which the IC is shut down. See the Applications
Information section for further details. Tie EN/UVLO to
VIN if the shutdown feature is not used.
INTVCC (Pin 15): Internal 3.5V Regulator Bypass Pin.
This pin provides supply for internal drivers and control
circuits. The bypass capacitor for INTVCC should be connected to the ground plane. Do not load the INTVCC pin
with external circuitry. This pin must be bypassed with a
1µF or larger low ESR ceramic capacitor placed close to
the pin.
PG (Pin 16, LT8337 Only): Power Good Indicator. Opendrain logic output that is pulled to ground when the output
voltage is greater than ±8% outside the regulated voltage. PG is also pulled to ground when EN/UVLO is below
1V, INTVCC has fallen too low, or the IC enters thermal
shutdown.
VC (Pin 16, LT8337-1 Only): Error Amplifier Output and
Switch Regulator Compensation Pin. Connect this pin to
appropriate external RC network to compensate the regulator loop frequency response.
Rev. 0
For more information www.analog.com
9
LT8337/LT8337-1
BLOCK DIAGRAM
CIN
R3
R4
14
IL
L
VIN
EN/UVLO
13
CBST
CVCC
15
VIN
INTVCC
12
BST
I_ZERO
3.5V REG
AND UVLO
1V REF
1V
VOUT_OVLO
–
+
VOUT_OVLO
UVLO
SHDN
A4
+
–
SHDN
A3
+
–
28V
VIN
M2
A6
–
SS
+
+
GND
(3, 5, 8, 17)
±8%
R2
SS
FB
A1
BURST
MODE
DETECT
+
–
FB
1V
C1
M1
FB
SHDN
4
COUT3
R1
G1
OSC
PG
LT8337
ONLY
VOUT
COUT1,2
INTVCC
SYNC/MODE
16
FB
+
–
VOUT
(6, 7)
SWITCHING
LOGIC
AND
CHARGE
PUMP
VC
INTVCC
VIN_HIGH
G2
VIN_HIGH
R5
A5
I_ZERO
A2
TJ > 170°C
SW (9, 10, 11)
VC
EA
RAMP
GENERATOR
LT8337
ONLY
OSC
16
VC
RC
OSCILLATOR
2
RT
1
SYNC/MODE
83371 BD
RT
CC
LT8337-1
ONLY
10
Rev. 0
For more information www.analog.com
LT8337/LT8337-1
OPERATION
The LT8337/LT8337-1 uses a fixed frequency, current
mode control scheme to provide excellent line and load
regulation. Referring to the Block Diagram, the Switching
Logic and Charge Pump block turns on the power switch
M1 through driver G1 at the start of each oscillator cycle.
During the M1 switch on-phase, the inductor current IL
flows through M1. A current proportional to the M1 switch
current is added to a stabilizing slope compensation ramp
and the resulting sum is fed into the positive terminal
of the PWM comparator A1. The voltage at the negative
input of A1, labeled “VC”, is set by the error amplifier EA
and is an amplified version of the difference between the
feedback voltage FB and the reference voltage. During
the M1 on-phase, IL increases. When the signal at the
positive input of A1 exceeds VC, A1 sends out a signal to
the Switching Logic and Charge Pump block to turn off
M1. When M1 turns off, the synchronous power switch
M2 turns on until the next clock cycle begins or inductor current IL falls to zero. During the M1 off-phase, IL
decreases. Through this repetitive action, the EA sets the
correct IL peak current level to keep the output in regulation. VIN and VOUT are constantly monitored by the IC.
When VIN rises above VOUT (causing A3’s output high)
and at the same time VOUT is higher than its regulation
voltage programmed by the FB resistor network, the IC
enters PassThru operation, where M2 is kept on continuously and M1 is kept off continuously, and the VOUT is
essentially shorted to VIN by the inductor and M2. See
Applications Information section for further details.
one 1µF capacitor between VOUT at pin 6 and GND at pin 5
and a matching 1µF capacitor between VOUT at pin 7 and
GND at pin 8 (see Applications Information section for
further details).
The EN/UVLO pin controls whether the IC is enabled or
is in shutdown state. A 1.0V reference and a comparator
A2 with 90mV hysteresis (Block Diagram) allow the user
to accurately program the supply voltage at which the IC
turns on and off. See the Applications Information section
for further details.
The LT8337/LT8337-1 features a variety of operation
modes which can be selected by SYNC/MODE pin to optimize the converter performance based on the application
requirements. The low ripple Burst Mode operation can
be selected to optimize the efficiency at light loads. The
spread spectrum frequency modulation function can be
selected to minimize the EMI emissions.
Pulling SYNC/MODE pin to ground selects Burst Mode
operation. Connecting this SYNC/MODE to ground
through a 50k resistor selects Burst Mode operation with
spread spectrum frequency modulation. Floating SYNC/
MODE pin selects pulse-skipping operation. Connecting
SYNC/MODE pin to INTVCC selects pulse-skipping operation with spread spectrum frequency modulation. If a
clock is applied to the SYNC/MODE pin, the IC synchronizes to an external clock frequency and operates in pulseskipping mode. See the Applications Information section
for further details.
The IC features Silent Switcher architecture to minimize
EMI emissions while delivering high efficiency. The Silent
Switcher EMI cancellation loops are completed by placing
Rev. 0
For more information www.analog.com
11
LT8337/LT8337-1
APPLICATIONS INFORMATION
Programming VIN Turn-On and Turn-Off Thresholds
with the EN/UVLO Pin
Light Load Current Operation—Burst Mode Operation
or Pulse-Skipping
The falling threshold voltage and rising hysteresis voltage
of the EN/UVLO pin can be calculated by Equation 1.
To enhance the efficiency at light loads, the LT8337/
LT8337-1 features operate in low ripple Burst Mode
operation. When the IC is enabled for Burst Mode operation, the minimum peak inductor current is set to approximately 1.2A even though the VC node Block Diagram)
indicates a lower value. In this condition, the IC maintains
the output regulation voltage by reducing the switching
frequency instead of reducing the inductor peak current.
In light load Burst Mode operation the IC delivers single
pulses of current to the output capacitor followed by sleep
periods during which the output power is supplied by
the output capacitor. This low ripple Burst Mode operation minimizes the input quiescent current and minimizes
output voltage ripple.
VVIN,FALLING = 1.0V •
VVIN,RISING
(R3 + R4)
R4
(R3 + R4)
= 90mV •
+ VVIN,FALLING
R4
(1)
When in Burst Mode operation with light load currents,
the current through the resistor network R3 and R4 can
easily be greater than the supply current consumed by the
IC. Therefore, large resistors can be used for R3 and R4
to minimize their effect on efficiency at light loads.
EN/UVLO pin can be tied to VIN if the shutdown feature
is not used, or alternatively, the pin may be tied to a logic
level if shutdown control is required. The IC draws a low
VIN quiescent current of 0.3µA (typical) When EN/UVLO
is below 0.15V.
INTVCC Regulator
An internal low dropout (LDO) regulator produces the
3.5V supply from VIN that powers the drivers and the
internal bias circuitry. The INTVCC pin must be bypassed
to ground with a minimum of 1μF ceramic capacitor.
Good bypassing is necessary to supply the high transient currents required by the power MOSFET gate drivers. Applications with high VIN voltage and high switching
frequency increase die temperature because of the higher
power dissipation across the LDO. When VIN is lower than
2.95V for LT8337 or 2.90V for LT8337-1, the maximum
programmable switching frequency is lower due to the
voltage drop across the LDO. See the Max Programmable
Switching Frequency vs Input Voltage curve in the Typical
Performance Characteristics section for more information. Do not connect an external load to the INTVCC pin.
12
As the output load decreases, the frequency of single current pulses decreases and the percentage of time the IC
is in sleep mode increases, resulting in much higher light
load efficiency than for typical converters. By maximizing
the time between pulses, the converter VIN pin quiescent
current approaches 4µA (LT8337) or 23µA (LT8337-1)
for a typical application when there is no output load.
To optimize the quiescent current performance at light
loads, the current in the feedback resistor divider should
be minimized as it appears to the output as load current.
In order to achieve higher light load efficiency, more
energy should be delivered to the output during the single
small pulses in Burst Mode operation such that the IC can
stay in sleep mode longer between each pulse. This can
be achieved by using a larger value inductor. For example,
while a smaller inductor value would typically be used for
a high switching frequency application, if high light load
efficiency is desired, a larger inductor value should be
chosen. See the Burst Mode Efficiency vs Inductor Value
curve in the Typical Performance Characteristics section
for more information.
Rev. 0
For more information www.analog.com
LT8337/LT8337-1
APPLICATIONS INFORMATION
Pulse-skipping mode operation offers two major differences from Burst Mode operation. First, the internal
clock stays awake at all times and all switching cycles are
aligned to the clock. In this mode the internal circuitry is
awake at all times, increasing quiescent current to several
hundred μA compared to the 5μA of VIN pin quiescent current in Burst Mode operation. Second, as the load ramps
upward from zero, the switching frequency programmed
by the resistor at the RT pin is reached at a lower output
load than in Burst Mode operation, therefore, pulse-skipping mode operation exhibits lower output ripple as well
as lower audio noise and RF interference.
Switching Frequency and Synchronization
The choice of switching frequency is a trade-off between
efficiency and component size. Low frequency operation improves efficiency by reducing the power switches’
switching losses and gate drive current. However, lower
frequency operation requires a physically larger inductor.
The LT8337/LT8337-1 uses a constant-frequency architecture that can be programmed over a 300kHz to 3MHz
range with a single external resistor from the RT pin to
ground, as shown in Block Diagram. A table for selecting
the value of RT for a given switching frequency is shown
in Table 1. Figure 1 shows the RT Value vs Switching
Frequency curve.
1M
RT(Ω)
While in Burst Mode operation the bottom switch peak
current is approximately 1.2A as shown in the Switching
Waveforms in Burst Mode operation curve in the Typical
Performance Characteristics section. This behavior
results in larger output voltage ripple compared to that
in pulse-skipping mode operation which has lower bottom switch peak current. However, the output voltage
ripple can be reduced proportionally by increasing the
output capacitance. When adjusting output capacitance,
a careful evaluation of system stability should be made
to ensure adequate design margin. As the load ramps
upward from zero, the switching frequency keeps increasing until reaching the switching frequency programmed
by the resistor at the RT pin. The output load at which the
LT8337/LT8337-1 reaches the programmed frequency
varies based on input voltage, output voltage, and inductor choice.
100k
10k
0
500 1000 1500 2000 2500
SWITCHING FREQUENCY (kHz)
3000
83371 F01
Figure 1. RT Value vs Switching Frequency
Table 1. SW Frequency (fSW) vs RT Value
fSW (MHz)
RT (kΩ)
fSW (MHz)
RT (kΩ)
0.3
357
1.7
57.6
0.4
267
1.8
53.6
0.5
210
1.9
51.1
0.6
174
2.0*
47.5
0.7
147
2.1
45.2
0.8
127
2.2
43.2
0.9
113
2.3
40.2
1.0
102
2.4
39.2
1.1
90.9
2.5
37.4
1.2
84.5
2.6
35.7
1.3
76.8
2.7
34.0
1.4
71.5
2.8
32.4
1.5
64.9
2.9
30.9
1.6
61.9
3.0
30.1
* Programming 2MHz will ensure fSW stays above 1.85MHz (out of the
AM band).
The operating frequency of the LT8337/LT8337-1 can
be synchronized to an external clock source with 100ns
minimum pulse width. By providing a digital clock signal
to the SYNC/MODE pin, the IC operates at the SYNC pulse
frequency and automatically enters pulse-skipping mode
operation at light load. If this feature is used, an RT resistor should be chosen to program a switching frequency
as close as possible to the SYNC pulse frequency.
Rev. 0
For more information www.analog.com
13
LT8337/LT8337-1
APPLICATIONS INFORMATION
Spread Spectrum Frequency Modulation
The LT8337/LT8337-1 features spread spectrum frequency modulation to further reduce EMI emissions. The
user can select spread spectrum frequency modulation
with Burst Mode operation by connecting the SYNC/MODE
pin to ground through a 50k resistor, or spread spectrum
frequency modulation with pulse-skipping operation by
connecting the SYNC/MODE pin to INTVCC. When spectrum frequency modulation is selected, a stepped triangular frequency modulation is used to vary the internal
oscillator frequency between the value programmed by
the RT resistor to approximately 20% higher than that
value. The modulation frequency is approximately 0.45%
of the switching frequency. For example, when the IC is
programmed to 2MHz, and spread spectrum frequency
modulation is selected, the oscillator frequency varies from 2MHz to 2.4MHz at a 9kHz rate (see Oscillator
Frequency with Spread Spectrum Modulation curve in the
Typical Performance Characteristics section). When operating at light load, the spread spectrum frequency modulation is more effective in pulse-skipping mode than in
Burst Mode operation, due to the fact that pulse-skipping
operation maintains the programmed switching frequency
down to a much lower load current as compared to Burst
Mode operation.
VIN to VOUT PassThru Mode Operation
In the boost pre-regulator applications for automotive
stop-start and cold crank, VIN is normally above the regulated VOUT voltage. In this condition, LT8337/LT8337-1
enters PassThru operation. LT8337/LT8337-1 is designed
to have an accurate, well controlled PassThru operation
with low quiescent current consumption. If VIN transiently
falls below the VOUT regulation setpoint, the boost converter commences switching to maintain the output voltage in regulation.
As shown in Block Diagram, VIN is compared with VOUT
using the comparator A3 with 0.6V hysteresis. When
VIN rises above VOUT (causing A3’s output high), and at
the same time VOUT is higher than its regulation voltage
14
programmed by the FB resistor network, the IC boost
converter enters PassThru operation, where the synchronous power switch M2 is kept on continuously and the
power switch M1 is kept off continuously. The voltage
across the boost capacitor (CBST), VBST_SW, is constantly
monitored. When VBST_SW drops below 3.2V, an internal charge pump is turned on to charge VBST_SW up to
3.6V, and then turned off. In PassThru mode the VOUT is
essentially shorted to VIN by the inductor and M2, and
VIN pin quiescent current is limited to 15µA (LT8337)
or 30µA (LT8337-1) regardless of the SYNC/MODE pin’s
configuration. VOUT pin draws 30µA (typ). A typical
waveforms drawing is shown in the Typical Performance
Characteristics section.
Several conditions cause the IC to exit from the PassThru
mode operation. First, when VOUT drops below its regulation voltage programmed by the FB resistor network, the
IC exits from PassThru mode operation and normal boost
switching operation resumes to maintain the regulated
VOUT voltage. Second, when VOUT is still higher than its
regulation voltage but VIN drops below VOUT by the comparator A3’s hysteresis of 0.6V (typ) or more to cause
A3’s output low, M2 is turned off to prevent the reverse
current from VOUT to VIN from ramping up. IC is back to
the PassThru mode when A3’s output is high again. Third,
when VOUT is still higher than its regulation voltage but
M2’s reverse current (flowing from its drain to source)
rises above 1.5A (typ), M2 is turned off to prevent the
reverse current from VOUT to VIN from ramping up. The
IC re-enters the PassThru mode when A3’s output is high
again. Waveforms for typical reverse current protection
are shown in the Typical Performance Characteristics
section.
To ensure the PassThru mode operation works properly,
the IC’s VIN pin must be connect to the input of the power
stage (the input terminal of inductor as shown in Block
Diagram).
Rev. 0
For more information www.analog.com
LT8337/LT8337-1
APPLICATIONS INFORMATION
FB Resistor Network and the Quiescent Current at
No Load
The output voltage is programmed with a resistor divider
between the output and the FB pin. Choose the resistor
values according to Equation 2.
⎛V
⎞
R1 = R2 • ⎜ OUT – 1⎟
⎝ 1V
⎠
(2)
Reference designators refer to Block Diagram. The
1% resistors are recommended to maintain output
voltage accuracy.
If low input quiescent current and good light-load efficiency are desired, use large resistor values for the FB
resistor divider. The current flowing in the divider acts as
a load current, and will increase the no load input current
to the converter.
When VIN < VOUT, the LT8337 converter Burst Mode quiescent current at no load can be estimated using Equation 3,
and the LT8337-1 converter Burst Mode quiescent current
at no load can be estimated using Equation 4.
(3)
⎛ V
⎞ ⎛V
⎞
IQ ≈ 4µA + ⎜ OUT + 1µA ⎟ • ⎜ OUT ⎟ • 1.2
⎝ R1 + R2
⎠ ⎝ VIN ⎠
(4)
⎛ V
⎞ ⎛V
⎞
IQ ≈ 23µA + ⎜ OUT + 1µA ⎟ • ⎜ OUT ⎟ • 1.4
⎠ ⎝ VIN ⎠
⎝ R1 + R2
where 4µA and 23µA are the VIN pin quiescent current of
the LT8337 and LT8337-1 respectively, and the second
term is the current drawn by the feedback divider and VOUT
pin (1μA) reflected to the input of the boost operating.
For a 12V input, 24V output boost converter with R1 = 1M
and R2 = 43.2k, it can be calculated that the LT8337 converter draws approximately 60µA from the supply at no
load, and the LT8337-1 converter draws approximately
90µA from the supply at no load. Note that Equation 3
and Equation 4 imply that the no load current is a function of VIN.
When VIN is higher than the regulated VOUT voltage, the IC
enters PassThru operation and VOUT is essentially shorted
to VIN by the inductor and M2. The converter quiescent
current at no load can be estimated using Equation 5 for
LT8337 and Equation 6 for LT8337-1.
IQ ≈ 45µA +
IQ ≈ 60µA +
VIN
R1 + R2
VIN
R1 + R2
(5)
(6)
where 45µA and 60µA are is the sum of the VIN pin and
VOUT pin quiescent current of the LT8337 and LT8337-1
respectively, and the second term is the current drawn by
the feedback divider.
When using large FB resistors, a 4.7pF to 22pF phase-lead
capacitor should be connected from VOUT to FB, and a
careful evaluation of system stability should be made to
ensure adequate design margin.
Overvoltage Lockout
The VOUT pin voltage is constantly monitored by the
LT8337/LT8337-1. An overvoltage condition occurs when
VOUT pin voltage exceeds approximately 28V. Switching is
stopped at such condition. Normal switching is resumed
when the VOUT pin voltage drops back to 28V or lower.
Switching Frequency Foldback when VIN
Approaches VOUT
In some applications, VIN may rise to a voltage very close
to VOUT. In this condition the switching regulator must
operate at a very low duty cycles to keep VOUT in regulation. However, the minimum on-time limitation may prevent the switcher from attaining a sufficiently low duty
cycle at the programmed switching frequency. As a result
a typical boost converter may experience a large output
ripple under these conditions. The LT8337/LT8337-1
addresses this issue by adopting a switching frequency
foldback function to smoothly decrease the switching
frequency when its minimum on-time starts to limit the
Rev. 0
For more information www.analog.com
15
LT8337/LT8337-1
APPLICATIONS INFORMATION
switcher from attaining a sufficiently low duty cycle. The
typical switching waveforms in these VIN approaching
VOUT conditions are shown in the Typical Performance
Characteristics section.
Start-Up
To limit the peak switch current and VOUT overshoot during start-up, the LT8337/LT8337-1 contains internal circuitry to provide soft-start operation (refer to the error
amplifier EA in Block Diagram). During start-up, the internal soft-start circuity slowly ramps the internal SS signal
from zero to 1V. When the SS voltage falls between the FB
initial voltage and 1V, the IC regulates the FB pin voltage
to the SS voltage instead of 1V. In this way the output
capacitor is charged gradually towards its final value while
limiting the start-up peak switch currents.
Referring to Figure 2, the start-up time TSTART_UP is the
time period from EN/UVLO transitioning high to VOUT having reached 90% of its regulation voltage programmed
by FB resistor network. When VIN > 3.6V, TSTART_UP is
approximately given by Equation 7.
2100
fSW
TSTART _UP = 0.25ms +
(7)
The IC selects pulse-skipping mode with no spread
spectrum frequency modulation during start-up, and the
SYNC/MODE pin configuration is ignored. The IC reads
SYNC/MODE pin configuration after the start-up delay
(Equation 9).
TMODE _DELAY = 0.22ms +
4096
fSW
(9)
If the LT8337/LT8337-1 boost converter is plugged into
a live supply, the VOUT could ring to twice the voltage of
VIN, due to the resonant circuit composed by L, COUT1-3,
and the body diode of M2 (refer to Block Diagram). If such
over-shoot exceeds the VOUT rating, it must be limited
to protect the load and the converter. For these situations, a small Schottky diode or silicon diode can be connected between VIN and VOUT to deactivate the resonant
circuit and limit the VOUT over-shoot as shown in Figure 3.
With the diode connected, the boost is also more robust
against output fault conditions such as output short circuit or overload, due to the fact that the diode diverts a
great amount of output current from the IC. The diode
can be rated for about one half to one fifth of the full load
current since it only conducts current during start-up or
output fault conditions.
D
15V
VOUT
5V/DIV
VOUT
COUT3
L
VIN
SW
CIN
VOUT
COUT1,2
LT8337/LT8337-1
VIN
IL
2A/DIV
GND
83371 F03
EN/UVLO
2V/DIV
tSTART_UP
tMODE_DELAY
1ms/DIV
Figure 3. A Simplified LT8337/LT8337-1 Power
Stage with a Diode Added Between VIN and VOUT
83371 F02
Inductor Selection
VIN = 7.2V
FRONT PAGE CIRCUIT
Figure 2. Typical Start-Up Waveforms
When VIN < 3.6V, TSTART_UP is approximately given by
Equation 8.
TSTART _UP = 0.25ms +
3.5V
2100
•
VIN − 0.1V fSW
(8)
When operating in continuous conduction mode (CCM),
the duty cycle can be calculated based on the output voltage (VOUT) and the input voltage (VIN). The maximum duty
cycle (DMAX) occurs when the converter has the minimum
input voltage (Equation 10).
16
DMAX =
VOUT – VIN(MIN)
VOUT
(10)
Rev. 0
For more information www.analog.com
LT8337/LT8337-1
APPLICATIONS INFORMATION
Discontinuous conduction mode (DCM) provides higher
conversion ratios at a given frequency at the cost of
reduced efficiencies and higher switching currents.
The inductor ripple current ∆ISW has a direct effect on the
choice of the inductor value, the converter’s maximum
output current capability, and the light load efficiency in
Burst Mode operation. Choosing smaller values of ∆ISW
increases output current capability and light load efficiency in Burst Mode operation, but require large inductance values and reduce the current loop gain. Accepting
larger values of ∆ISW provides fast transient response and
allows the use of low inductance values, but results in
higher input current ripple, greater core losses, lower light
load efficiency in Burst Mode operation, and lower output
current capability. Large values of ΔISW at high duty cycle
operation may result in sub-harmonic oscillation. ∆ISW =
1.2A to 2.4A generally provides a good starting value for
many applications, and careful evaluation of system stability should be made to ensure adequate design margin.
Given an operating input voltage range, and having chosen the operating frequency and ripple current in the
inductor, the inductor value of the boost converter can
be determined using Equation 11.
L=
VIN(MIN)
• DMAX
∆ISW • fSW
(11)
The peak inductor current is equal to the LT8337/
LT8337-1 bottom switch current limit as given in the
Electrical Characteristics table. The user should choose
an inductor with sufficient saturation and RMS current
ratings to handle the inductor’s peak current.
Input Capacitor Selection
The input ripple current in a boost converter is relatively
low (compared with the output ripple current), because
this current is continuous. The voltage rating of the input
capacitor, CIN, should comfortably exceed the maximum
input voltage. Although ceramic capacitors can be relatively tolerant of overvoltage conditions, aluminum electrolytic capacitors are not. Be sure to characterize the
input voltage for any possible overvoltage transients that
could apply excess stress to the input capacitors.
The value of CIN is a function of the source impedance,
and in general, the higher the source impedance, the
higher the required input capacitance.
The RMS CIN ripple current can be estimated by
Equation 12.
IRMS(CIN) = 0.3 • ∆IL
(12)
Output Capacitor Selection
The output capacitor has two essential functions. First, it
filters the LT8337/LT8337-1’s discontinuous top switch
current to produce the DC output. In this role, it determines the output ripple, thus low impedance at the switching frequency is important. The second function is to store
energy in order to satisfy transient loads and stabilize the
IC’s control loop. The X5R or X7R type ceramic capacitors
have very low equivalent series resistance (ESR), which
provides low output ripple and good transient response.
Transient performance can be improved with higher output capacitance and the addition of a feedforward capacitor placed between VOUT and FB. When a feedforward
capacitor is used or output capacitance is adjusted, a
careful evaluation of system stability should be made to
ensure adequate design margin. Increasing the output
capacitance will also decrease the output voltage ripple.
Lower value of output capacitance can be used to save
space and cost, but transient performance will suffer and
loop instability may result.
Besides the bulk output capacitors, two small output
ceramic capacitors, 1µF each, should be placed as close
as possible to the IC to complete the Silent Switcher cancellation loops.
See the Board Layout section for more detail. XR7 or
X5R capacitors are recommended for best performance
across temperature and output voltage variations. Note
that larger output capacitance is required when a lower
switching frequency is used. If there is significant inductance to the load due to long wires or cables, additional
Rev. 0
For more information www.analog.com
17
LT8337/LT8337-1
APPLICATIONS INFORMATION
When the LT8337’s FB voltage is within the ±8% window
of the regulation point, the output voltage is considered
good and the open-drain PG pin goes high impedance
and is typically pulled high with an external resistor.
Otherwise, the internal pull-down device will pull the PG
pin low. To prevent glitching both the upper and lower
thresholds include 1% of hysteresis. The PG pin is also
actively pulled low during several fault conditions: corresponding EN/UV pin below 1V, INTVCC voltage falling too
low, VIN under voltage, or thermal shutdown.
Frequency Compensation (LT8337-1 Only)
The LT8337-1 has a VC pin which can be used to optimize the loop compensation. Designing the compensation
network is a bit complicated and the best values depend
on the application and in particular the type of output
capacitor. A practical approach is to start with one of the
circuits in the data sheet that is similar to your application and tune the compensation network to optimize
the performance. LTspice® simulations can help in this
process. Stability should then be checked across all operating conditions, including load current, input voltage,
and temperature.
Figure 4 shows an equivalent circuit for the LT8337-1
control loop. The error amplifier is a transconductance
amplifier with finite output impedance. The power section,
consisting of the modulator, power switches, and inductor,
OUTPUT
INPUT
CIN
CPL
gm = 6S • (1–D)
gm = 0.4mS
VC
RC
Output Power Good (LT8337 Only)
18
LT8337-1
CURRENT
MODE POWER
STAGE
1MΩ
+
–
bulk capacitance may be necessary. This can be provided
with an electrolytic capacitor. When choosing a capacitor,
special attention should be given to capacitor's data sheet
to calculate the effective capacitance under the relevant
operating conditions of voltage bias and temperature. A
physically larger capacitor, or one with a higher voltage
rating, may be required. For good starting values, refer
to the Typical Applications section.
R1
FB
1V
C1
R2
CF
CC
83371 F04
Figure 4. Mode for Loop Response
is modeled as a transconductance amplifier generating an
output current proportional to the voltage at the VC pin.
Note that the output capacitor integrates this current and
that the capacitor on the VC pin (CC) integrates the error
amplifier output current, resulting in two poles in the loop.
A zero is required and comes from a resistor RC in series
with CC. This simple model works well as long as the value
of the inductor is not too high and the loop crossover
frequency is much lower than the switching frequency.
A small capacitor CF can be added to filter the switching noise that is coupled on the VC pin. A phase lead
capacitor (CPL) across the feedback divider can be used
to improve the transient response and is required to
cancel the parasitic pole caused by the feedback node to
ground capacitance.
Figure 5a shows the transient response for the front page
application with LT8337 which uses internal compensation.
Figure 5b shows a faster transient response of the same
application with LT8337-1 when a 100k RC and 220pF
CC compensation network is used on its VC pin. The
LT8337-1 VIN pin draws 20μA more quiescent current
compared to LT8337.
Rev. 0
For more information www.analog.com
LT8337/LT8337-1
APPLICATIONS INFORMATION
the low parasitic inductance. Additional bulk capacitors
of 2.2µF or more should be placed close to the IC with
the positive terminals connected to VOUT, and negative
terminals connected to ground plane. The bypass capacitors for VIN and INTVCC pins should also be connected to
the ground plane.
IOUT
1A/DIV
VOUT
0.2V/DIV
(AC)
200µs/DIV
83371 F05a
VIN = 7.2V
FRONT PAGE CIRCUIT
(a)
IOUT
1A/DIV
VOUT
0.2V/DIV
(AC)
200µs/DIV
VIN = 7.2V
FRONT PAGE CIRCUIT WITH LT8337-1
CC = 220pF, RC = 100k
83317 F05b
The output capacitors, along with the inductor and input
capacitors, should be placed on the same side of the
circuit board, and their connections should be made on
that layer. Place a local, unbroken power ground plane
under the application circuit on the layer closest to the
surface layer. The SW and BST nodes should be as small
as possible.
Keep the FB and RT nodes small so that the ground traces
will shield them from the noise generated by the SW and
BST nodes. It is recommended to use the GND at Pin 3
for the ground connection of the resistors connecting FB
pin or RT Pin (refer to Figure 6).
(b)
R2
Figure 5. Transient Response
RT
C1
Board Layout
R1
The LT8337/LT8337-1 is specifically designed to minimize EMI/EMC emissions and also to maximize efficiency
when switching at high frequencies. Figure 6 shows a
recommended PCB layout for LT8337. For more detail
and PCB design files refer to the demo board guide for
the LT8337/LT8337-1.
For optimal performance the LT8337/LT8337-1 requires
the use of multiple VOUT bypass capacitors. It is recommended to connect one 1µF capacitor between VOUT at
Pin 6 and GND at Pin 5 only, and a matching 1µF capacitor
between VOUT at Pin 7 and GND at Pin 8 only to complete
the Silent Switcher EMI cancellation loops. These two
capacitors must be placed as close as possible to the
IC, and the loops formed by these two capacitors should
be symmetrical and as small as possible to achieve an
optimized EMI cancellation performance. Capacitors with
small case size, such as 0402 or 0603, are optimal due to
R5
COUT1
1
CVCC
VOUT
COUT3
COUT2
CBST
R3
R4
L
CIN1
VIN
GND
GND
83371 F04
GROUND VIA
PG SIGNAL VIA
Figure 6. A Recommended PCB Layout for the LT8337
Rev. 0
For more information www.analog.com
19
LT8337/LT8337-1
APPLICATIONS INFORMATION
The exposed pad on the bottom of the package should
be soldered to the ground plane to reduce the package
thermal resistance. To keep the thermal resistance low,
extend the ground plane as much as possible, and add
many thermal vias to additional power ground planes
within the circuit board.
be estimated by calculating the total power loss from an
efficiency measurement and subtracting the inductor loss.
The junction temperature can be calculated by multiplying the total IC power dissipation by the thermal resistance from junction to ambient and adding the ambient
temperature. The IC includes internal overtemperature
protection that is intended to protect the device during
momentary overload conditions. The overtemperature
protection shuts down the IC when the junction temperature exceeds 170°C (typ). The internal soft-start is
triggered when the junction temperature drops below
165°C (typ). The maximum rated junction temperature
is exceeded when this protection is active. Continuous
operation above the specified absolute maximum operating junction temperature (see Absolute Maximum Ratings
section) may impair device reliability or permanently damage the device.
Thermal Considerations
Care should be taken in the layout of the PCB to ensure
good heat sinking of the LT8337/LT8337-1. The power
ground plane should consist of large copper layers with
thermal vias; these layers spread heat dissipated by the
IC. Placing additional vias can reduce thermal resistance
further. The maximum load current should be derated
as the junction temperature approaches its maximum
temperature rating. Power dissipation within the IC can
TYPICAL APPLICATIONS
Low IQ, Low EMI, 15V Output Boost Converter with SSFM
VIN
4.5V TO 10V
INPUT EMI FILTER
L2
0.25µH
10µF
25V
X7R
L1
1.5µH
+ 47µF
35V
22µF
25V
X7R
0.1µF
1M
UVLOFALLING = 4V
SW
VIN
BST
EN/UVLO
OUTPUT EMI FILTER
FB1
VOUT
332k
PG
4.7pF
RT
INTVCC
1µF
1M
FB
SYNC/MODE
49.9k
GND
90.9k
1µF
50V
X7R
×2
22µF
25V
X7R
×4
0.1µF
50V
X7R
47.5k
2MHz
L1: WURTH ELEKTRONIK 74438357015
L2: WURTH ELEKTRONIK 74479290125
FB1: WURTH ELEKTRONIK 742792040
* THE EMI PERFORMANCE IS SHOWN IN THE TYPICAL PERFORMANCE CHARACTERISTICS SECTION.
20
0.1µF
50V
X7R
LT8337
VOUT
12V
1.5A
83371 TA02a
Rev. 0
For more information www.analog.com
LT8337/LT8337-1
TYPICAL APPLICATIONS
2.85V to 4.2V Input, 2MHz, 5V Output Boost Converter
Efficiency vs Output Current
L
0.47µH
47µF
6.3V
X7R
100
0.1µF
1M
VIN
SW
EN/UVLO
UVLOFALLING = 2.85V
95
BST
VOUT
549k
LT8337
PG
1M
4.7pF
INTVCC
GND
RT
1µF
1µF
6.3V
X7R
×2
FB
SYNC/MODE
90
VOUT
5V
3A AT 3.6VIN
2A AT 2.85VIN
EFFICIENCY (%)
VIN
2.85V TO 4.2V
249k
47µF
6.3V
X7R
×2
85
80
75
70
65
VIN = 4.2V
VIN = 3.6V
VIN = 2.85V
Burst Mode OPERATION
60
55
47.5k
2MHz
50
0.01
83371 TA03a
L: COILCRAFT XGL4030-471ME
0.1
1
10
100
LOAD CURRENT (mA)
1000
83371 TA03b
5V to 15V Input, 2MHz, 12V Output Boost Converter
VIN
5V TO 15V
L
1.5µH
22µF
25V
X7R
0.1µF
UVLOFALLING = 4.5V
SW
VIN
1M
BST
EN/UVLO
VOUT*
12V
1.2A AT 5VIN
2.2A AT 7.2VIN
VOUT
287k
LT8337
PG
4.7pF
FB
SYNC/MODE
INTVCC
RT
1µF
1M
GND
90.9k
1µF
25V
X7R
×2
47.5k
2MHz
L: COILCRAFT XGL4020-152ME
*WHEN VIN > 12V, VOUT FOLLOWS VIN.
83371 TA04a
Efficiency vs Input Voltage
100
100
95
99
90
98
85
97
EFFICIENCY (%)
EFFICIENCY (%)
Efficiency vs Output Current
80
75
70
65
60
55
50
0.1
VIN = 7.2V
VIN = 5V
Burst Mode OPERATION
1
10
100
OUTPUT CURRENT (mA)
1000
22µF
25V
X7R
×4
96
95
94
93
92
ILOAD = 1.5A
Burst Mode OPERATION
91
90
83371 F04b
5
6
7
8 9 10 11 12 13 14 15
INPUT VOLTAGE (V)
83371 TA04c
Rev. 0
For more information www.analog.com
21
LT8337/LT8337-1
TYPICAL APPLICATIONS
2.8V to 24V Input, 18V Output Boost Converter
VIN
2.8V TO 24V
L
4.7µH
22µF
25V
X7R
0.1µF
1M
SW
VIN
BST
EN/UVLO
UVLOFALLING = 2.8V
VOUT*
18V
VOUT
556k
PG
LT8337
1M
4.7pF
RT
INTVCC
1µF
1µF
25V
X7R
×2
FB
SYNC/MODE
59k
GND
102k
1MHz
L: COILCRAFT XEL5030-472ME
*WHEN VIN > 18V, VOUT FOLLOWS VIN
83371 TA05a
Efficiency vs Input Voltage
100
95
99
90
98
85
97
75
70
65
VIN = 15V
VIN = 9V
VIN = 5V
VIN = 2.8V
Burst Mode OPERATION
60
55
50
0.1
1
10
100
LOAD CURRENT (mA)
1000
EFFICIENCY (%)
EFFICIENCY (%)
Efficiency vs Output Current
100
80
96
95
94
93
92
ILOAD = 0.3A
Burst Mode OPERATION
91
90
0
3
6
9
12 15 18
INPUT VOLTAGE (V)
21
24
83371 TA05b
83371 TA05b
22
22µF
25V
X7R
×4
Rev. 0
For more information www.analog.com
0.25 REF
D
PACKAGE TOP VIEW
1.43
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog
Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications
Forgranted
morebyinformation
www.analog.com
subject to change without notice. No license is
implication or
otherwise under any patent or patent rights of Analog Devices.
1.43
0.335
0.375
SUGGESTED PCB LAYOUT
TOP VIEW
3.50 ±0.05
0.335
0.7500
aaa Z
2×
PACKAGE
OUTLINE
0.70 REF
3.50 ±0.05
5
0.2500
0.0000
0.2500
PIN 1
CORNER
0.7500
X
aaa Z
0.7500
0.2500
0.0000
0.2500
0.7500
0.375
Y
E
2×
SYMBOL
A
A1
L
b
D
E
D1
E1
e
H1
H2
aaa
bbb
ccc
ddd
eee
fff
DETAIL B
H2
MOLD
CAP
0.30
0.22
MIN
0.85
H1
ddd Z
16b
eee M Z X Y
fff M Z
Z
0.40
0.25
3.00
3.00
1.43
1.43
0.50
0.25 REF
0.70 REF
NOM
0.95
DIMENSIONS
DETAIL C
SUBSTRATE
DETAIL C
A1
16×
Z
// bbb Z
0.10
0.10
0.10
0.10
0.15
0.08
MAX
1.05
0.03
0.50
0.28
e/2
e
L
SUBSTRATE THK
MOLD CAP HT
NOTES
DETAIL A
DETAIL B
A
(Reference LTC DWG # 05-08-1798 Rev Ø)
0.375
e
b
9
12
b
D1
e
0.385
6
0.385
DETAIL A
5
16
PACKAGE BOTTOM VIEW
8
0.385
0.385
13
4
1
4
SEE NOTES
PIN 1 NOTCH
0.23 × 45°
7
SEE NOTES
TRAY PIN 1
BEVEL
PACKAGE IN TRAY LOADING ORIENTATION
LTXXXXX
CORNER SUPPORT PAD CHAMFER IS OPTIONAL
COMPONENT
PIN 1
7
LGA 16 0321 REV Ø
THE EXPOSED HEAT FEATURE MAY HAVE OPTIONAL CORNER RADII
DETAILS OF PIN 1 IDENTIFIER ARE OPTIONAL, BUT MUST BE
LOCATED WITHIN THE ZONE INDICATED. THE PIN 1 IDENTIFIER
MAY BE EITHER A MOLD OR MARKED FEATURE
5
6
METAL FEATURES UNDER THE SOLDER MASK OPENING NOT SHOWN
SO AS NOT TO OBSCURE THESE TERMINALS AND HEAT FEATURES
4
3. PRIMARY DATUM -Z- IS SEATING PLANE
2. ALL DIMENSIONS ARE IN MILLIMETERS
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M-1994
E1
ccc M Z X Y
ccc M Z X Y
LQFN Package
16-Lead (3mm × 3mm × 0.95mm)
LT8337/LT8337-1
PACKAGE DESCRIPTION
Rev. 0
23
LT8337/LT8337-1
TYPICAL APPLICATION
8V to 16V Input, 24V Output Boost Converter
Efficiency and Power Loss
Output Current
vs OutputvsCurrent
L
4.7µH
10µF
50V
X7R
1M
SW
EN/UVLO
162k
LT8337-1
4.7pF
1M
FB
VC
10pF
VOUT
24V
1.2A AT 8VIN
2.4A AT 16VIN
VOUT
SYNC/MODE
100k
90
BST
INTVCC
RT
220pF
1µF
43.2k
GND
1µF
50V
X7R
×2
10µF
50V
X7R
×4
70
50
83371 TA06a
10
40
30
20
0
0.1
L: COILCRAFT XEL5030-472ME
100
60
10
102k
1MHz
1k
80
POWER LOSS (mW)
UVLOFALLING = 7.2V
VIN
10k
100
0.1µF
EFFICIENCY (%)
VIN
8V TO 16V
VIN = 16V 1
VIN = 8V
Burst Mode OPERATION
0.1
1
10
100
1k 3k
OUTPUT CURRENT (mA)
83371 TA06b
RELATED PARTS
PART NUMBER DESCRIPTION
COMMENTS
LT8330
1A (ISW), 60V, 2MHz High Efficiency Boost/SEPIC/ VIN = 3V to 40V, VOUT(MAX) = 60V, IQ = 6µA (Burst Mode Operation), ISD =
工商网监
湘ICP备2023018690号
