LT8608EMSE#TRPBF

LT8608/LT8608B 42V, 1.5A Synchronous Step-Down Regulator with 2.5µA Quiescent Current FEATURES DESCRIPTION Wide Input Voltage Range: 3.0V to 42V nn Ultralow Quiescent Current Burst Mode® Operation nn 0.5), a minimum inductance is required to avoid sub-harmonic oscillation. See Application Note 19. Input Capacitor where ∆IL is the inductor ripple current as calculated several paragraphs below and ILOAD(MAX) is the maximum output load for a given application. The peak-to-peak ripple current in the inductor can be calculated as follows: Bypass the input of the LT8608 circuit with a ceramic capacitor of X7R or X5R type. Y5V types have poor performance over temperature and applied voltage, and should not be used. A 4.7μF to 10μF ceramic capacitor is adequate to bypass the LT8608 and will easily handle the ripple current. Note that larger input capacitance is required when a lower switching frequency is used. If the input power source has high impedance, or there is significant inductance due to long wires or cables, additional bulk capacitance may be necessary. This can be provided with a low performance electrolytic capacitor. Step-down regulators draw current from the input supply in pulses with very fast rise and fall times. The input capacitor is required to reduce the resulting voltage ripple at the LT8608 and to force this very high frequency switching current into a tight local loop, minimizing EMI. A 4.7μF capacitor is capable of this task, but only if it is placed close to the LT8608 (see the PCB Layout section). A second precaution regarding the ceramic input capacitor concerns the maximum input voltage rating of the LT8608. Rev. D For more information www.analog.com 13 LT8608/LT8608B APPLICATIONS INFORMATION A ceramic input capacitor combined with trace or cable inductance forms a high quality (under damped) tank circuit. If the LT8608 circuit is plugged into a live supply, the input voltage can ring to twice its nominal value, possibly exceeding the LT8608’s voltage rating. This situation is easily avoided (see Analog Devices Application Note 88). loads the LT8608 can excite the ceramic capacitor at audio frequencies, generating audible noise. Since the LT8608 operates at a lower current limit during Burst Mode operation, the noise is typically very quiet to a casual ear. If this is unacceptable, use a high performance tantalum or electrolytic capacitor at the output. Output Capacitor and Output Ripple A final precaution regarding ceramic capacitors concerns the maximum input voltage rating of the LT8608. As previously mentioned, a ceramic input capacitor combined with trace or cable inductance forms a high quality (under damped) tank circuit. If the LT8608 circuit is plugged into a live supply, the input voltage can ring to twice its nominal value, possibly exceeding the LT8608’s rating. This situation is easily avoided (see Analog Devices Application Note 88). The output capacitor has two essential functions. Along with the inductor, it filters the square wave generated by the LT8608 to produce the DC output. In this role it determines the output ripple, thus low impedance at the switching frequency is important. The second function is to store energy in order to satisfy transient loads and stabilize the LT8608’s control loop. Ceramic capacitors have very low equivalent series resistance (ESR) and provide the best ripple performance. A good starting value is: C OUT = 100 VOUT • fSW where fSW is in MHz, and COUT is the recommended output capacitance in μF. Use X5R or X7R types. This choice will provide low output ripple and good transient response. Transient performance can be improved with a higher value output capacitor and the addition of a feedforward capacitor placed between VOUT and FB. Increasing the output capacitance will also decrease the output voltage ripple. A lower value of output capacitor can be used to save space and cost but transient performance will suffer and may cause loop instability. See the Typical Applications in this data sheet for suggested capacitor values. When choosing a capacitor, special attention should be given to the data sheet to calculate the effective capacitance under the relevant operating conditions of voltage bias and temperature. A physically larger capacitor or one with a higher voltage rating may be required. Enable Pin The LT8608 is in shutdown when the EN pin is low and active when the pin is high. The rising threshold of the EN comparator is 1.05V, with 50mV of hysteresis. The EN pin can be tied to VIN if the shutdown feature is not used, or tied to a logic level if shutdown control is required. Adding a resistor divider from VIN to EN programs the LT8608 to regulate the output only when VIN is above a desired voltage (see Block Diagram). Typically, this threshold, VIN(EN), is used in situations where the input supply is current limited, or has a relatively high source resistance. A switching regulator draws constant power from the source, so source current increases as source voltage drops. This looks like a negative resistance load to the source and can cause the source to current limit or latch low under low source voltage conditions. The VIN(EN) threshold prevents the regulator from operating at source voltages where the problems might occur. This threshold can be adjusted by setting the values R3 and R4 such that they satisfy the following equation: Ceramic Capacitors Ceramic capacitors are small, robust and have very low ESR. However, ceramic capacitors can cause problems when used with the LT8608 due to their piezoelectric nature. When in Burst Mode operation, the LT8608’s switching frequency depends on the load current, and at very light 14 ⎛ R3 ⎞ VIN(EN ) = ⎜ + 1⎟ • 1V ⎝ R4 ⎠ where the LT8608 will remain off until VIN is above VIN(EN). Due to the comparator’s hysteresis, switching will not stop until the input falls slightly below VIN(EN). Rev. D For more information www.analog.com LT8608/LT8608B APPLICATIONS INFORMATION When in Burst Mode operation for light-load currents, the current through the VIN(EN) resistor network can easily be greater than the supply current consumed by the LT8608. Therefore, the VIN(EN) resistors should be large to minimize their effect on efficiency at low loads. is considered good and the open-drain PG pin goes high impedance and is typically pulled high with an external resistor. Otherwise, the internal drain pull-down device will pull the PG pin low. To prevent glitching both the upper and lower thresholds include 0.5% of hysteresis. INTVCC Regulator The PG pin is also actively pulled low during several fault conditions: EN/UV pin is below 1V, INTVCC has fallen too low, VIN is too low, or thermal shutdown. An internal low dropout (LDO) regulator produces the 3.5V supply from VIN that powers the drivers and the internal bias circuitry. The INTVCC can supply enough current for the LT8608’s circuitry and must be bypassed to ground with a minimum of 1μF ceramic capacitor. Good bypassing is necessary to supply the high transient currents required by the power MOSFET gate drivers. Applications with high input voltage and high switching frequency will increase die temperature because of the higher power dissipation across the LDO. Do not connect an external load to the INTVCC pin. Output Voltage Tracking and Soft-Start (MSOP Only) The LT8608 allows the user to program its output voltage ramp rate by means of the TR/SS pin. An internal 2μA pulls up the TR/SS pin to INTVCC. Putting an external capacitor on TR/SS enables soft-starting the output to prevent current surge on the input supply. During the soft-start ramp the output voltage will proportionally track the TR/SS pin voltage. For output tracking applications, TR/SS can be externally driven by another voltage source. From 0V to 0.778V, the TR/SS voltage will override the internal 0.778V reference input to the error amplifier, thus regulating the FB pin voltage to that of TR/SS pin. When TR/SS is above 0.778V, tracking is disabled and the feedback voltage will regulate to the internal reference voltage. An active pull-down circuit is connected to the TR/SS pin which will discharge the external soft-start capacitor in the case of fault conditions and restart the ramp when the faults are cleared. Fault conditions that clear the softstart capacitor are the EN/UV pin transitioning low, VIN voltage falling too low, or thermal shutdown. The LT8608 and LT8608B DFN do not have TR/SS pin or functionality. Output Power Good When the LT8608’s output voltage is within the ±8.5% window of the regulation point, which is a VFB voltage in the range of 0.716V to 0.849V (typical), the output voltage Synchronization (MSOP Only) To select low ripple Burst Mode operation, tie the SYNC pin below 0.4V (this can be ground or a logic low output). To synchronize the LT8608 oscillator to an external frequency connect a square wave (with 20% to 80% duty cycle) to the SYNC pin. The square wave amplitude should have valleys that are below 0.9V and peaks above 2.7V (up to 5V). The LT8608 will not enter Burst Mode operation at low output loads while synchronized to an external clock, but instead will pulse skip to maintain regulation. The LT8608 may be synchronized over a 200kHz to 2.2MHz range. The RT resistor should be chosen to set the LT8608 switching frequency equal to or below the lowest synchronization input. For example, if the synchronization signal will be 500kHz and higher, the RT should be selected for 500kHz. The slope compensation is set by the RT value, while the minimum slope compensation required to avoid subharmonic oscillations is established by the inductor size, input voltage, and output voltage. Since the synchronization frequency will not change the slopes of the inductor current waveform, if the inductor is large enough to avoid subharmonic oscillations at the frequency set by RT, then the slope compensation will be sufficient for all synchronization frequencies. For some applications it is desirable for the LT8608 to operate in pulse-skipping mode, offering two major differences from Burst Mode operation. First is the clock stays awake at all times and all switching cycles are aligned to the clock. Second is that full switching frequency is reached at lower output load than in Burst Mode operation as shown in Figure 2 in an earlier section. These two differences come at the expense of increased quiescent current. To enable pulse-skipping mode the SYNC pin is floated. For more information www.analog.com Rev. D 15 LT8608/LT8608B APPLICATIONS INFORMATION For some applications, reduced EMI operation may be desirable, which can be achieved through spread spectrum modulation. This mode operates similar to pulse skipping mode operation, with the key difference that the switching frequency is modulated up and down by a 3kHz triangle wave. The modulation has the frequency set by RT as the low frequency, and modulates up to approximately 20% higher than the frequency set by RT. To enable spread spectrum mode, tie SYNC to INTVCC or drive to a voltage between 3.2V and 5V. The LT8608 does not operate in forced continuous mode regardless of SYNC signal. The LT8608 DFN is programmed for Burst Mode operation and cannot enter pulse skipping mode. The LT8608B DFN is programmed for pulse-skipping and cannot enter Burst Mode operation. the LT8608’s internal circuitry will pull its quiescent current through its SW pin. This is acceptable if the system can tolerate several μA in this state. If the EN pin is grounded the SW pin current will drop to near 0.7µA. However, if the VIN pin is grounded while the output is held high, regardless of EN, parasitic body diodes inside the LT8608 can pull current from the output through the SW pin and the VIN pin. Figure 5 shows a connection of the VIN and EN/UV pins that will allow the LT8608 to run only when the input voltage is present and that protects against a shorted or reversed input. D1 VIN LT8608 EN/UV GND 8608 F05 Shorted and Reversed Input Protection The LT8608 will tolerate a shorted output. Several features are used for protection during output short-circuit and brownout conditions. The first is the switching frequency will be folded back while the output is lower than the set point to maintain inductor current control. Second, the bottom switch current is monitored such that if inductor current is beyond safe levels switching of the top switch will be delayed until such time as the inductor current falls to safe levels. This allows for tailoring the LT8608 to individual applications and limiting thermal dissipation during short circuit conditions. Frequency foldback behavior depends on the state of the SYNC pin: If the SYNC pin is low or high, or floated the switching frequency will slow while the output voltage is lower than the programmed level. If the SYNC pin is connected to a clock source, the LT8608 will stay at the programmed frequency without foldback and only slow switching if the inductor current exceeds safe levels. There is another situation to consider in systems where the output will be held high when the input to the LT8608 is absent. This may occur in battery charging applications or in battery backup systems where a battery or some other supply is diode ORed with the LT8608’s output. If the VIN pin is allowed to float and the EN pin is held high (either by a logic signal or because it is tied to VIN), then 16 VIN Figure 5. Reverse VIN Protection PCB Layout For proper operation and minimum EMI, care must be taken during printed circuit board layout. Figure 7 shows the recommended component placement with trace, ground plane and via locations. Note that large, switched currents flow in the LT8608’s VIN pins, GND pins, and the input capacitor (C1). The loop formed by the input capacitor should be as small as possible by placing the capacitor adjacent to the VIN and GND pins. When using a physically large input capacitor the resulting loop may become too large in which case using a small case/value capacitor placed close to the VIN and GND pins plus a larger capacitor further away is preferred. These components, along with the inductor and output capacitor, should be placed on the same side of the circuit board, and their connections should be made on that layer. Place a local, unbroken ground plane under the application circuit on the layer closest to the surface layer. The SW and BOOST nodes should be as small as possible. Finally, keep the FB and RT nodes small so that the ground traces will shield them from the SW and BOOST nodes. The exposed pad on the bottom of the package must be soldered to ground so that the pad is connected to ground electrically and also Rev. D For more information www.analog.com LT8608/LT8608B APPLICATIONS INFORMATION Figure 7 shows the basic guidelines for a layout example that can pass CISPR25 radiated emission test with class 5 limits. Thermal Considerations For higher ambient temperatures, care should be taken in the layout of the PCB to ensure good heat sinking of the LT8608. Figure 7 shows the recommended component placement with trace, ground plane, and via locations. The exposed pad on the bottom of the package must be soldered to a ground plane. This ground should be tied to large copper layers below with thermal vias; these layers will spread heat dissipated by the LT8608. Placing additional vias can reduce thermal resistance further. The maximum load current should be derated as the ambient temperature approaches the maximum junction rating. Power dissipation within the LT8608 can be estimated by calculating the total power loss from an efficiency measurement and subtracting the inductor loss. The die temperature is calculated by multiplying the LT8608 power dissipation by the thermal resistance from junction to ambient. The LT8608 will stop switching and indicate a fault condition if safe junction temperature is exceeded. Temperature rise of the LT8608 is worst when operating at high load, high VIN, and high switching frequency. If the case temperature is too high for a given application, then either VIN, switching frequency or load current can be decreased to reduce the temperature to an acceptable level. Figure 6 shows how case temperature rise can be managed by reducing VIN. (5V out) 50 45 40 CASE TEMP RISE (°C) acts as a heat sink thermally. To keep thermal resistance low, extend the ground plane as much as possible, and add thermal vias under and near the LT8608 to additional ground planes within the circuit board and on the bottom side. VIN = 6V VIN = 12V VIN= 36V 35 30 25 20 15 10 L = 2.2µH fSW = 2MHz 5 0 0.00 0.25 0.50 0.75 1.00 IOUT (A) 1.25 1.50 8608 F06 Figure 6. Case Temperature Rise vs Load Current Rev. D For more information www.analog.com 17 LT8608/LT8608B APPLICATIONS INFORMATION GROUND PLANE ON LAYER 2 COUT L CIN CBST 1 CVCC CIN(OPT) RT RPG R4 R3 R1 CFF GND VIA VIN VIA VOUT VIA EN/UV VIA R2 CSS OTHER SIGNAL VIA 8609S F07 Figure 7. PCB Layout (Not to Scale) 18 Rev. D For more information www.analog.com LT8608/LT8608B TYPICAL APPLICATIONS 3.3V Step Down VIN 3.9V TO 42V C1 0.1µF VIN C2 4.7µF EN/UV BST SYNC SW L1 2.2µH R4 100k LT8608 INTVCC C3 1µF PG C5 10pF TR/SS C6 10nF R1 18.2k RT GND FB 8608 TA03 fSW = 2MHz R3 309k R2 1M L1 = XFL4020-222ME VOUT 3.3V 1.5A POWER GOOD C4 22µF X7R 1206 5V Step Down VIN 5.6V TO 42V C1 0.1µF VIN C2 4.7µF EN/UV BST SYNC SW L1 2.2µH R4 100k LT8608 INTVCC C3 1µF PG C5 10pF TR/SS C6 10nF R1 18.2k RT GND FB 8608 TA04 fSW = 2MHz R3 187k R2 1M L1 = XFL4020-222ME VOUT 5V 1.5A POWER GOOD C4 22µF X7R 1206 12V Step Down VIN 12.7V TO 42V C1 0.1µF VIN C2 4.7µF EN/UV BST SYNC SW L1 10µH R4 100k LT8608 INTVCC C3 1µF C5 10pF TR/SS C6 10nF R1 40.2k FSW = 1MHz PG RT GND FB 8608 TA05 R3 69.8k R2 1M L1 = XAL4040-103ME VOUT 12V 1.5A POWER GOOD C4 22µF X7R 1210 Rev. D For more information www.analog.com 19 LT8608/LT8608B TYPICAL APPLICATIONS 1.8V 2MHz Step-Down Converter VIN 3.1V TO 20V (42V TRANSIENT) C2 4.7µF PSKIP R1 18.2k L1 2.2µH VOUT 1.8V 1.5A SW INTVCC C6 10nF M1 NFET BST EN/UV SYNC C3 1µF C1 0.1µF VIN LT8608 (MSOP) R4 100k PG C5 10pF TR/SS RT GND FB 8608 TA06 fSW = 2MHz R3 768k R2 1M L1 = XFL4020-222ME POWER GOOD C4 22µF X7R 1206 Ultralow EMI 5V 1.5A Step-Down Converter VIN 5.8V TO 42V L2 BEAD L3 4.7µH C8 4.7µF C7 4.7µF VIN C2 4.7µF BST EN/UV SYNC INTVCC SW LT8608 (MSOP) C1 0.1µF R4 100K PG C5 10pF TR/SS C3 1µF C6 10nF FB RT R1 60.4k GND fSW = 700kHz L1 4.7µH R3 187k R2 1M L1 = XFL4020-472ME 8608 TA07 VOUT 5V 1.5A POWER GOOD C4 22µF X7R 1206 C2, C4, C7, C8 X7R 1206 20 Rev. D For more information www.analog.com LT8608/LT8608B PACKAGE DESCRIPTION MSE Package 10-Lead Plastic MSOP, Exposed Die Pad (Reference LTC DWG # 05-08-1664 Rev I) BOTTOM VIEW OF EXPOSED PAD OPTION 1.88 ±0.102 (.074 ±.004) 5.10 (.201) MIN 1 0.889 ±0.127 (.035 ±.005) 1.68 ±0.102 (.066 ±.004) 0.05 REF 10 0.305 ± 0.038 (.0120 ±.0015) TYP RECOMMENDED SOLDER PAD LAYOUT 3.00 ±0.102 (.118 ±.004) (NOTE 3) DETAIL “B” CORNER TAIL IS PART OF DETAIL “B” THE LEADFRAME FEATURE. FOR REFERENCE ONLY NO MEASUREMENT PURPOSE 10 9 8 7 6 DETAIL “A” 0° – 6° TYP 1 2 3 4 5 GAUGE PLANE 0.53 ±0.152 (.021 ±.006) DETAIL “A” 0.18 (.007) 0.497 ±0.076 (.0196 ±.003) REF 3.00 ±0.102 (.118 ±.004) (NOTE 4) 4.90 ±0.152 (.193 ±.006) 0.254 (.010) 0.29 REF 1.68 (.066) 3.20 – 3.45 (.126 – .136) 0.50 (.0197) BSC 1.88 (.074) SEATING PLANE 0.86 (.034) REF 1.10 (.043) MAX 0.17 – 0.27 (.007 – .011) TYP 0.50 (.0197) BSC NOTE: 1. DIMENSIONS IN MILLIMETER/(INCH) 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX 6. EXPOSED PAD DIMENSION DOES INCLUDE MOLD FLASH. MOLD FLASH ON E-PAD SHALL NOT EXCEED 0.254mm (.010") PER SIDE. 0.1016 ±0.0508 (.004 ±.002) MSOP (MSE) 0213 REV I Rev. D For more information www.analog.com 21 LT8608/LT8608B PACKAGE DESCRIPTION DC8 Package 8-Lead Plastic DFN (2mm × 2mm) (Reference LTC DWG # 05-08-1939 Rev Ø) Exposed Pad Variation AA 1.8 REF 0.90 REF 0.23 REF 0.85 ±0.05 2.60 ±0.05 PACKAGE OUTLINE 0.335 REF 0.25 ±0.05 0.45 BSC RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED 2.00 ±0.05 (4 SIDES) PIN 1 BAR TOP MARK (SEE NOTE 6) 2.00 SQ ±0.05 1.8 REF 5 8 0.23 0.335 REF REF 0.55 ±0.05 PIN 1 NOTCH R = 0.15 (DC8MA) DFN 0113 REV Ø 4 0.200 REF 0.75 ±0.05 1 0.23 ±0.05 0.45 BSC BOTTOM VIEW—EXPOSED PAD 0.00 – 0.05 NOTE: 1. DRAWING IS NOT A JEDEC PACKAGE OUTLINE 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 22 Rev. D For more information www.analog.com LT8608/LT8608B REVISION HISTORY REV DATE DESCRIPTION A 12/16 Clarified minimum on time to 35ns Clarified condition on feedback voltage line regulation Clarified transient response graphs PAGE NUMBER B 01/18 Added DFN Package Option Added H-Grade Temperature Options Clarified Graphs for MSOP Package Option Only Clarified Pin Functions for MSOP and DFN Package Options Clarified Operation and Applications Information Section for MSOP and DFN Package Options Added Figure 6 Clarified Typical Applications for MSOP Package Option C 05/18 Added B version Added table to clarify versions Modified text in Description to add DFN functionality Added B version to Order Information Clarified Minimum On-Time Conditions Clarified Efficiency graphs Clarified No-Load Supply Current graphs Clarified Burst Mode Operation vs Output Current graph Clarified Frequency Foldback graph Clarified Pin Functions on SYNC and TR/SS Clarified Operation third and fifth paragraph Clarified last paragraph to include DFN B version and Figure 1 and Figure 3 Clarified Applications Information to include DFN B version All 1 1 2 3 4 4 5 6 8 10 11 16 D 03/19 Corrected TRM Part # in Order Information 2 1 2 7 1-3 2 6 8 10-11, 15-17 18 20 Rev. D Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license For is granted implication or otherwise under any patent or patent rights of Analog Devices. moreby information www.analog.com 23 LT8608/LT8608B TYPICAL APPLICATION 3.3V and 1.8V with Ratio Tracking VIN 3.9V TO 42V C2 4.7µF C1 0.1µF VIN R1 18.2k R4 100k LT8608 INTVCC C6 10nF VOUT 3.3V, 1.5A SW SYNC C3 1µF L1 2.2µH BST EN/UV PG C5 10pF TR/SS RT GND FB R3 309k R2 1M POWER GOOD C4 47µF fSW = 2MHz C8 4.7µF R9 31.6k L2 2.2µH BST EN/UV SW SYNC INTVCC C12 1µF C7 0.1µF VIN R8 100k LT8608 PG C11 10pF TR/SS R10 10k R5 18.2k RT GND FB 8608 TA02 R7 768k R6 1M VOUT 1.8V 1.5A POWER GOOD C10 47µF fSW = 2MHz C2, C8 X7R 1206 C4, C10, X7R 1210 RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LT8609/ LT8609A 42V, 2A/3A Peak, 93% Efficiency, 2.2MHz Synchronous MicroPower Step-Down DC/DC Converter with IQ = 2.5µA VIN = 3.2V to 42V, VOUT(MIN) = 0.8V, IQ = 2.5µA, ISD