LTC1042MJ8

LTC1042 Window Comparator U FEATURES ■ ■ ■ ■ ■ ■ ■ DESCRIPTIO The LTC®1042 is a monolithic CMOS window comparator manufactured using Linear Technology’s enhanced LTCMOS™ silicon gate process. Two high impedance voltage inputs, CENTER and WIDTH/2, define the middle and width of the comparison window. Whenever the input voltage, VIN, is inside the window the WITHIN WINDOW output is high. The ABOVE WINDOW output is high whenever VIN is above the window. By interchanging VIN and CENTER, the ABOVE WINDOW output becomes BELOW WINDOW and is high if VIN is below the window. Micropower 1.5µW (1 Sample/Second) Wide Supply Range — 2.8V to 16V High Accuracy Center Error ±1mV Max Width Error ±0.15% Max Wide Input Voltage Range V+ to Ground TTL Outputs with 5V Supply Two Independent Ground-Referred Control Inputs Small Size 8-Pin MiniDIP Sampling techniques provide high impedance voltage inputs that can common mode to both supply rails (V+ and GND). An important feature of the inputs is their non-interaction. Also the device is effectively “chopper stabilized,” giving it extremely high accuracy over all conditions of temperature, power supply and input voltage range. U APPLICATIO S ■ ■ ■ Fault Detectors Go/No-Go Testing Microprocessor Power Supply Monitor , LTC and LT are registered trademarks of Linear Technology Corporation. LTCMOS is a trademark of Linear Technology Corp. Another benefit of the sampling techniques used to design the LTC1042 is the extremely low power consumption. When the device is strobed, it internally turns on the power to the comparators, samples the inputs, stores the outputs in CMOS latches and then turns off power to the comparators. This all happens in about 80µs. Average power can be made small, almost arbitrarily, by lowering the strobe rate. The device can be self-strobed using an external RC network or strobed externally by driving the OSC pin with a CMOS gate. U TYPICAL APPLICATIO Battery-Powered Remote Freezer Alarm Total Supply Current vs Sampling Frequency V+ 10000 150k 150k 1 8 2 7 3 3V TO 16V R1* 7.5k T 4 LTC1042 “HI” = TEMPERATURE BETWEEN 10M ±5% 26°F AND 31°F ±1°F 6 “HI” = TEMPERATURE ABOVE 31°F ±1°F 5 0.05µF R2* 576Ω V+ = 6V TOTAL SUPPLY CURRENT, IT (µA) IT 1000 IT 100 10 LTC1042 SUPPLY CURRENT 1 FOR THIS APPLICATION fS ≈ 1HZ 0.1 0.01 T = YELLOW SPRINGS INSTRUMENT CO., INC. P/N 44007 ALL RESISTORS ±1% UNLESS OTHERWISE SPECIFIED *OTHER TEMPERATURE BANDS MAY BE SELECTED BY CHOOSING APPROPRIATE VALUES FOR R1 AND R2 LTC1042 • A01 0.1 1 10 100 1000 SAMPLING FREQUENCY, fS (Hz) 10000 LTC1042 • TA02 1042fa 1 LTC1042 W W W AXI U U ABSOLUTE RATI GS U U W PACKAGE/ORDER I FOR ATIO (Note 1) Total Supply Voltage (V+ to GND) ............................ 18V Input Voltage ..................................... V+ +0.3V to –0.3V Operating Temperature Range LTC1042C ......................................... –40°C to 85°C LTC1042M (OBSOLETE) ................. –55°C to 125°C Storage Temperature Range ................. –55°C to 150°C Lead Temperature (Soldering, 10 sec).................. 300°C Output Short Circuit Duration ....................... Continuous ORDER PART NUMBER TOP VIEW WITHIN WINDOW 1 CENTER 2 8 V+ 7 OSC ABOVE WINDOW WIDTH / 2 VIN 3 6 GND 4 5 LTC1042CN8 N8 PACKAGE 8-LEAD PDIP TJMAX = 110°C, θJA = 150°C/W J8 PACKAGE 8-LEAD CERDIP LTC1042MJ8 OBSOLETE PACKAGE Consider the N8 Package as an Alternate Source LTC1042 • POI01 Consult LTC Marketing for parts specified with wider operating temperature ranges. ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. SYMBOL PARAMETER TEST CONDITIONS Center Error (Note 3) V+ MIN = 2.8V to 6V (Note 2) ● V+ = 6V to 15V (Note 2) ● Width Error (Note 4) V + = 2.8V to 6V (Note 2) ● V + = 6V to 15V (Note 2) ● IBIAS Input Bias Current V + = 5V, TA = 25°C, OSC = GND VIN, CENTER and WIDTH/2 Inputs RIN Average lnput Resistance fS = 1kHz (Note 5) Input Voltage Range PSR Power Supply Range IS(ON) Power Supply ON Current (Note 6) V+ = 5V IS(OFF) Power Supply OFF Current (Note 6) V+ = 5V, LTC1042C LTC1042M TD Response Time (Note 7) V+ = 5V VOH VOL Output Levels Logic 1 Output Logical 0 Output V+ = 4.75V, lOUT = –360µA V+ = 4.75V, lOUT = –1.6mA TYP MAX UNITS ±0.3 + ±0.05 ±1 + ±0.15 mV ±1 + ±0.05 ±3 + ±0.15 ±0.6 + ±0.1 ±2 + ±0.3 ±2 + ±0.1 ±6 + ±0.3 % WIDTH/2 mV % WIDTH/2 mV % WIDTH/2 mV % WIDTH/2 ±0.3 nA 15 MΩ ● 10 ● GND V+ V ● 2.8 16 V ● 1.2 3 mA ● ● 0.001 0.001 0.5 5.0 µA µA 80 100 µs 4.4 0.25 0.45 V V ● ● 2.4 1042fa 2 LTC1042 ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. SYMBOL REXT PARAMETER TEST CONDITIONS External Timing Resistor Resistor connected between V + MIN TYP 100 ● MAX UNITS 10,000 kΩ and OSC Pin fS V + = 5V, TA = 25°C REXT =1MΩ, CEXT = 0.1µF Sampling Frequency 5 Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: Applies over input voltage range limit and includes gain uncertainty. Note 3: Center error = [(VU +VL)/2 – CENTER] (where VU = upper band limit and VL = lower band limit). Hz Note 4: Width error = (VU –VL – 2 • WIDTH/2) (where VU = upper band limit and VL = lower band limit). Note 5: RIN is guaranteed by design and is not tested. RIN = 1/(fS x 66pF). Note 6: Average supply current = TD • lS(ON) • fS + (1 – TD fS) IS(OFF). Note 7: Response time is set by an internal oscillator and is independent of overdrive voltage. TD is guaranteed by correlation test and is not directly measured. U W TYPICAL PERFOR A CE CHARACTERISTICS Normalized Sampling Frequency vs V+, Temperature IS(ON) vs V+ 2.2 NORMALIZED SAMPLING FREQUENCY (fS AT 5V, 25°C) 16 IS(ON) (mA) 14 12 25°C 10 –55°C 8 6 125°C 4 2 0 2 4 10 8 6 12 SUPPLY VOLTAGE, V+ (V) 14 CEXT = 1000pF 1.8 TA = 125°C 1.6 1.4 1.2 TA = 25°C 1.0 Response Time vs Supply Voltage TA = 25°C TA = – 55°C 0 2 8 10 12 4 6 SUPPLY VOLTAGE, V+ (V) 14 V+ = 5V RESPONSE TIME, t D (µs) RESPONSE TIME, tD (µs) 110 100 90 80 70 60 60 50 4 10 14 8 12 6 SUPPLY VOLTAGE, V+ (V) 16 LTC1042 • TPC04 40 –50 0 25 –25 50 75 100 AMBIENT TEMPERATURE, TA (°C) CEXT = 0.05µF 1M R EXT (Ω) 10M LTC1042 • TPC03 RIN vs Sampling Frequency 100 2 1 0.1 100k 16 120 50 CEXT = 0.1µF Response Time vs Temperature 130 70 10 LTC1042 • TPC02 110 80 CEXT = 0.01µF CEXT = 1µF LTC1042 • TPC01 90 102 0.8 0.6 16 R = 1M, C = 0.1µF 2.0 AVERAGE INPUT RESISTANCE, RIN (1/FS • 66pF) (Ω) 18 Sampling Rate vs REXT CEXT 103 SAMPLE RATE, fS (Hz) 20 125 LTC1042 • TPC05 1011 1010 109 108 107 1 10 102 103 SAMPLING FREQUENCY, fS (Hz) 104 LTC1042 • TPC06 1042fa 3 LTC1042 U W U U APPLICATIO S I FOR ATIO The LTC1042 uses sampled data techniques to achieve its unique characteristics. It consists of two comparators, each of which has two differential inputs (Figure 1). When the sum of the voltages on a comparator’s inputs is positive, the output is high; when the sum is negative, the output is low. The inputs are interconnected such that when (CENTER – WIDTH/2) ≤ VIN ≤ (CENTER + WIDTH/2) both comparator outputs are low. In this condition VIN is within the window and the WITHIN WINDOW output is high. When VIN > CENTER + WIDTH/2, VIN is above the window and the ABOVE WINDOW output is high. An important feature of the LTC1042 is the non-interaction of the inputs. This means the center and width of the window can be changed without one affecting the other. Also note that the width of the window is set by a ground referred signal WlDTH/2). storing the results in CMOS output latches and turning the power off. This whole process takes approximately 80µs. During the 80µs “active” time, the LTC1042 draws typically 1.2mA (lS(ON)) at V + = 5V. Because power is consumed only during the “active” time, extremely low average power consumption can be achieved at low sample rates. For example, at a sample rate of 1 sample/second the average power consumption is: Power = (V+) (IS(AVG)) = 5V • 1.2mA • 80µs/1sec = 0.48µW At low sampling rates, REXT dominates the power consumption. REXT consumes power continuously. The average voltage at the OSC pin is approximately V+/2. The power consumed by REXT is: P(REXT) = (V+/2)2REXT Strobing Example: Assume REXT = 1MΩ and V+ = 5V. Then: An internal oscillator allows the LTC1042 to strobe itself. The frequency of oscillation sets the sampling rate and is set with an external RC network (see typical curve, OSC frequency vs REXT, CEXT). To assure oscillation, under all conditions, REXT must be between 100kΩ and 10MΩ. There is no limit to the size of CEXT. This is more than ten times the typical power consumed by the LTC1042 at V+ = 5V and 1 sample/second. Where power is a premium, REXT should be made as large as possible. Note that the power dissipated by REXT is not a function of the sampling frequency or CEXT. A sampling cycle is initiated on the positive going transition of the voltage on the OSC pin. When this voltage is near the positive supply, a Schmitt trigger trips and initiates the sampling cycle. A sampling cycle consists of applying power to both comparators, sampling the inputs, If high sampling rates are needed and power consumption is of secondary importance, a convenient way to get the maximum possible sampling rate is to make REXT = 100kΩ and CEXT = 0. The sampling rate, set by the LTC1042’s active time, will nominally be ≈ 10kHz. WINDOW CENTER (VIN) 2 + – + – P(REXT) = (2.5)2/1MΩ = 6.25µW 8 V+ COMP A WINDOW CENTER 1 WITHIN WINDOW VIN (WINDOW CENTER) 3 WIDTH/2 5 GND 4 + – + – 6 COMP B ABOVE WINDOW (BELOW WINDOW) 7 WITHIN WINDOW ABOVE WINDOW V+ –WIDTH/2 WIDTH/2 4 0V POWER ON OSC OUTPUT VOLTAGE (V) 4 TIMING GENERATOR VL VU INPUT VOLTAGE, VIN POWER OFF 80µs (A) (B) LTC1042 • AI01 Figure 1. LTC1042 Block Diagram 1042fa 4 LTC1042 U W U U APPLICATIO S I FOR ATIO To synchronize the sampling of the LTC1042 to an external frequency source, the OSC pin can be driven by a CMOS gate. A CMOS gate is necessary because the input trip points of the oscillator are close to the supply rails and TTL does not have enough output swing. Externally driven, there will be a delay from the rising edge of the OSC input and the start of the sampling cycle of approximately 5µs. Input Impedance The input impedance of the LTC1042 does not look like a classic linear comparator; CMOS switches and a precision capacitor array form the dual differential input structure. Input impedance characteristics can be determined from the equivalent circuit shown in Figure 2. The input capacitance will charge with a time constant of RS • CIN. It is critical, in determining errors caused by the input charging current, that CIN be fully charged during the “active” time. For RS ≤ 10kΩ For Rs less than or equal to 10kΩ, CIN fully charges and no error is caused by the charging current. lAVG = VIN x CIN x fS, where fS is the sampling frequency. Because the input current is directly proportional to the differential input voltage, the LTC1042 can be said to have an average input resistance of RIN = VIN/IAVG = 1/(fS x CIN). Since two comparator inputs are connected in parallel, RIN is one half this value (see typical curve of RIN vs Sampling Frequency). This finite input resistance causes an error due to voltage divided between RS and RIN. The input error caused by both of these effects is VERROR = VIN[2CIN/(2CIN + CS) + RS/(RS + RIN)]. EXAMPLE: Assume fS = 10Hz, RS = 1MΩ, CS = 1µF and VIN = 1V. Then VERROR = 1V(66µV + 660µV) = 726µV. If the sampling frequency is reduced to 1Hz, the voltage error from input impedance effects is reduced to 136µV. Input Voltage Range The input switches of the LTC1042 are capable of switching either to the V+ supply or ground. Consequently, the input voltage range includes both supply rails. This is a further benefit of the input sampling structure. Error Specifications For RS > 10kΩ For source resistances greater than 10kΩ, CIN cannot fully charge, causing voltage errors. To minimize these errors an input bypass capacitor, CS should be used. Charge is shared between CIN and CS causing a voltage error. The magnitude of this error is ∆V = VIN x CIN/(CIN + CS). This error can be made arbitrarily small by increasing CS. The averaging effect of the bypass capacitor CS causes another error term. Each time the input switches cycle between the plus and minus inputs, CIN is charged and discharged. The average input current due to this is S1 RS VIN The only measurable errors on the LTC1042 are the deviations from “ideal” of the upper and lower window limits [Figure 1(B)]. The critical parameters for a window comparator are the width and center of the window. These errors may be expressed in terms of VU and VL. center error = [(VU + VL)/2] – CENTER width error = (VU – VL) – 2 x (WIDTH/2) The specified error limits (see Electrical Characteristics) include error due to offset, power supply variation, gain, time and temperature. CIN ~ (~33pF) + CS S2 – V– LTC1042 DIFFERENTIAL INPUT LTC1042 • AI02 Figure 2. Equivalent Input Circuit 1042fa 5 LTC1042 U W U U APPLICATIO S I FOR ATIO TTL Power Supply Monitor TTL SUPPLY V+ V+ 10k ± 0.25% 25k 1 8 2 7 3 LTC1042 4 100k 100k 6 “HI” = ABOVE RANGE (V + > 5.5V) 5 10k ± 0.25% LT1004-2.5 “HI” = SUPPLY IN RANGE (4.5 < V+ < 5.5) R2* 10k LTC1042 • AI03 ALL RESISTORS ± 5% UNLESS OTHERWISE NOTED * SUPPLY TOLERANCE EQUALS R2 IN kΩ. I.E., 10k = ±10% Single 5V Thermocouple Over Temperature Alarm 5V COLD JUNCTION COMPENSATOR 36k ± 5% TTL SUPPLY V+ R4 5k AT 25°C† R1** 1690Ω 4 LT1034-1.2 1/2 LTC1043 7 8 ( VT 1+ 7 3 1820Ω 2 11 1µF 1µF 12 13 THERMOCOUPLE TYPE J K T S 16 R4 232k 301k 301k 2.1M 2 3 4 CF* 0.1µF 7 LTC1042 4 RF** R2** RI* R3** 6 100k ±5% 5 TEMPERATURE HIGH LTC1042 • A104 17 VCENTER = 0.0047µF 1.235 • (R2 + R3) R1 + R2 + R3 WIDTH = 2 • 1.235 • R3 R1 + R2 + R3 † 1k – TEMPERATURE IN WINDOW 8 14 + VT 1 8 1 0.1µF ) 6 LTC1052N8 187Ω RF RI YELLOW SPRINGS INST. CO. P/N 44007 * CHOOSE CF TO FILTER NOISE ** CHOOSE RF, RI, R1, R2 AND R3 TO SET WINDOW ALL RESISTORS ±1% UNLESS OTHERWISE NOTED 1042fa 6 LTC1042 U W U U APPLICATIO S I FOR ATIO Wind Powered Battery Charger A simple wind powered battery charger can be constructed using the new LTC1042, a 12V DC permanent magnet motor, and low cost power FET transistor. The DC motor is used as a generator with the voltage output being proportional to its RPM. The LTC1042 monitors the voltage output and provides the following control functions: 1) If generator voltage output is below 13.8V, the control circuit is active and the NiCad battery is charging through the LM334 current source. The lead acid battery is not being charged. 2) If the generator voltage output is between 13.8V and 15.1V, the 12V lead acid battery is being charged at about a 1A/hour rate (limited by the power FET). 3) If generator voltage exceeds 15.1V (a condition caused by excessive wind speed or 12V battery being fully charged) then a fixed load is connected thus limiting the generator RPM to prevent damage. This charger can be used as a remote source of power where wind energy is plentiful, such as on sailboats or remote radio repeater sites. Unlike solar powered panels, this system will function in bad weather and at night. 12V GENERATOR WIND 107k 1N4001 10k + 0.1µF LM334 215k 100k 4.5V NiCAD BATTERY 1 8 2 7 3 4 10k WITHIN WINDOW 13.8V TO 15.1V 0.1µF 68Ω LTC1042 12V LEAD ACID 36Ω 5W MTP8N05 10M 6 5 + 0.1µF OVER VOLTAGE (>15.1V) MTP8N05 LT1004-1.2 LTC1042 • A105 1042fa Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 7 LTC1042 U PACKAGE DESCRIPTIO J8 Package 8-Lead CERDIP (Narrow .300 Inch, Hermetic) (Reference LTC DWG # 05-08-1110) .300 BSC (7.62 BSC) .008 – .018 (0.203 – 0.457) .200 (5.080) MAX CORNER LEADS OPTION (4 PLCS) 0° – 15° .015 – .060 (0.381 – 1.524) .023 – .045 (0.584 – 1.143) HALF LEAD OPTION .045 – .068 (1.143 – 1.650) FULL LEAD OPTION .405 (10.287) MAX .005 (0.127) MIN 8 NOTE: LEAD DIMENSIONS APPLY TO SOLDER DIP/PLATE OR TIN PLATE LEADS .014 – .026 (0.360 – 0.660) 6 5 .025 (0.635) RAD TYP .220 – .310 (5.588 – 7.874) 1 .045 – .065 (1.143 – 1.651) 7 2 3 4 .125 3.175 MIN .100 (2.54) BSC J8 0801 OBSOLETE PACKAGE N8 Package 8-Lead PDIP (Narrow .300 Inch) (Reference LTC DWG # 05-08-1510) .400* (10.160) MAX 8 7 6 5 1 2 3 4 .255 ± .015* (6.477 ± 0.381) .300 – .325 (7.620 – 8.255) .045 – .065 (1.143 – 1.651) .065 (1.651) TYP .008 – .015 (0.203 – 0.381) ( +.035 .325 –.015 +0.889 8.255 –0.381 .130 ± .005 (3.302 ± 0.127) .100 (2.54) BSC ) .120 (3.048) .020 MIN (0.508) MIN .018 ± .003 (0.457 ± 0.076) N8 1002 NOTE: 1. DIMENSIONS ARE INCHES MILLIMETERS *THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .010 INCH (0.254mm) 1042fa 8 Linear Technology Corporation LW/TP 1202 1K REV A • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com  LINEAR TECHNOLOGY CORPORATION 1988