LTC1261
Switched Capacitor
Regulated Voltage Inverter
FEATURES
DESCRIPTION
Regulated Negative Voltage from a
Single Positive Supply
n Can Provide Regulated –5V from a 3V Supply
n REG Pin Indicates Output is in Regulation
n Low Output Ripple: 5mV Typ
n Supply Current: 600µA Typ
n Shutdown Mode Drops Supply Current to 5µA
n Up to 15mA Output Current
n Adjustable or Fixed Output Voltages
n Requires Only Three or Four External Capacitors
n Available in SO-8 Packages
The LTC®1261 is a switched-capacitor voltage inverter
designed to provide a regulated negative voltage from
a single positive supply. The LTC1261CS operates from
a single 3V to 8V supply and provides an adjustable
output voltage from –1.25V to –8V. An on-chip resistor
string allows the LTC1261CS to be configured for output
voltages of –3.5V, –4V, –4.5V or –5V with no external
components. The LTC1261CS8 is optimized for applications which use a 5V or higher supply or which require
low output voltages. It requires a single external 0.1µF
capacitor and provides adjustable and fixed output voltage
options in 8-lead SO packages. The LTC1261CS requires
one or two external 0.1µF capacitors, depending on input
voltage. Both versions require additional external input
and output bypass capacitors. An optional compensation
capacitor at ADJ/COMP can be used to reduce the output
voltage ripple.
n
APPLICATIONS
n
n
n
n
GaAs FET Bias Generators
Negative Supply Generators
Battery-Powered Systems
Single Supply Applications
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
Each version of the LTC1261 will supply up to 12mA
output current with guaranteed output regulation of 5%.
The LTC1261 includes an open-drain REG output which
pulls low when the output is within 5% of the set value.
Output ripple is typically as low as 5mV. Quiescent current
is typically 600µA when operating and 5µA in shutdown.
The LTC1261 is available in a 14-lead narrow body SO
package and an 8-lead SO package.
TYPICAL APPLICATION
Waveforms for –4V Generator with Power Valid
–4V Generator with Power Valid
5V
1
5V
VCC
SHDN
8
2
C1
1µF
C2
0.1µF
7
REG
C1 +
LTC1261-4
3
6
OUT
C1 –
4
*OPTIONAL
GND
COMP
0V
10k
POWER VALID
5
C3*
100pF
C4
+ 3.3µF
VOUT = –4V
AT 10mA
LTC1261 • TA01
OUT
–4V
SHDN
5V
0V
5V
POWER VALID
0V
0.2ms/DIV
LTC1261 • TA02
1261fb
For more information www.linear.com/LTC1261
1
LTC1261
ABSOLUTE MAXIMUM RATINGS
(Note 1)
Supply Voltage (Note 2) ..............................................9V
Output Voltage (Note 5)................................0.3V to – 9V
Total Voltage, VCC to VOUT (Note 2)............................12V
Input Voltage
SHDN Pin......................................–0.3V to VCC + 0.3V
REG Pin.................................................. –0.3V to 12V
ADJ, RO, R1, RADJ...............VOUT – 0.3V to VCC + 0.3V
Output Short-Circuit Duration........................... Indefinite
Commercial Temperature Range (Note 7)..... 0°C to 70°C
Industrial Temperature Range (Note 7).... –40°C to 85°C
Storage Temperature Range.................... –65°C to 150°C
Lead Temperature (Soldering, 10 sec)................... 300°C
PIN CONFIGURATION
TOP VIEW
TOP VIEW
VCC 1
C1+
C1–
2
3
GND 4
NC 1
8
7
6
5
14 VCC
SHDN
C1+ 2
13 SHDN
REG
C1– 3
12 REG
OUT
C2+
4
11 OUT
ADJ (COMP*)
C2– 5
10 ADJ
S8 PACKAGE
8-LEAD PLASTIC SO
GND 6
9
RADJ
R0 7
8
R1
*FOR FIXED VERSIONS
S PACKAGE
14-LEAD PLASTIC SO
TJMAX = 150°C, θJA = 150°C/W
TJMAX = 150°C, θJA = 110°C/W
ORDER INFORMATION
LEAD FREE FINISH
TAPE AND REEL
PART MARKING*
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LTC1261CS8#PBF
LTC1261CS8#TRPBF
1261
8-Lead Plastic S0
0°C to 70°C
LTC1261IS8#PBF
LTC1261IS8#TRPBF
1261
8-Lead Plastic S0
–40°C to 85°C
LTC1261CS8-4#PBF
LTC1261CS8-4#TRPBF
12614
8-Lead Plastic S0
0°C to 70°C
LTC1261CS8-4.5#PBF
LTC1261CS8-4.5#TRPBF
126145
8-Lead Plastic S0
0°C to 70°C
LTC1261CS#PBF
LTC1261CS#TRPBF
LTC1261CS
14-Lead Plastic S0
0°C to 70°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Consult LTC Marketing for information on nonstandard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
1261fb
2
For more information www.linear.com/LTC1261
LTC1261
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VCC = 3V to 6.5V unless otherwise specified.
–40°C ≤ TA ≤ 85°C
0°C ≤ TA ≤ 70°C
(Note 7)
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
MIN
TYP
MAX
l 1.20
Reference Voltage
1.24
1.28
1.20
1.24
1.28
VREF
l
Supply Current
No Load, SHDN Floating, Doubler Mode
600
1000
600
1500
IS
l
No Load, SHDN Floating, Tripler Mode
900
1500
900
2000
l
No Load, VSHDN = VCC
5
20
5
20
Internal Oscillator Frequency
550
550
fOSC
Power Efficiency
65
65
PEFF
l
REG Output Low Voltage
IREG = 1mA
0.1
0.8
0.1
0.8
VOL
l
REG Sink Current
VREG = 0.8V, VCC = 3.3V
5
8
5
8
IREG
l
VREG = 0.8V, VCC = 5.0V
8
15
8
15
l
Adjust Pin Current
VADJ = 1.24V
0.01
1
0.01
1
IADJ
l
SHDN Input High Voltage
2
2
VIH
l
SHDN Input Low Voltage
0.8
0.8
VIL
l
SHDN Input Current
VSHDN = VCC
5
20
5
25
IIN
Turn-On Time
IOUT = 15mA
500
500
tON
Doubler Mode. VCC = 5V ±10%, C1 = 0.1µF, C2 = 0 (Note 4), COUT = 3.3µF unless otherwise specified.
l
Output Regulation (Note 2)
–1.24V ≥ VOUT ≥ –4V, 0 ≤ IOUT ≤ 8mA
1
5
∆VOUT
l
–1.24V ≥ VOUT ≥ –4V, 0 ≤ IOUT ≤ 7mA
1
5
2
2
–4V ≥ VOUT ≥ –5V, 0 ≤ IOUT ≤ 8mA (Note 6)
l
Output Short-Circuit Current
VOUT = 0V
60
125
60
125
ISC
Output Ripple Voltage
IOUT = 5mA, VOUT = –4V
5
5
VRIP
LTC1261CS Only. Tripler Mode. VCC = 2.7V, C1 = C2 = 0.1µF (Note 4), COUT = 3.3µF unless otherwise specified.
l
Output Regulation
–1.24V ≥ VOUT ≥ –4V, 0 ≤ IOUT ≤ 5mA
1
5
1
5
∆VOUT
l
Output Short-Circuit Current
VOUT = 0V
60
125
60
125
ISC
Output Ripple Voltage
IOUT = 5mA, VOUT = –4V
5
5
VRIP
LTC1261CS Only. Tripler Mode. VCC = 3.3V ±10%, C1 = C2 = 0.1µF (Note 4), COUT = 3.3µF unless otherwise specified.
l
Output Regulation (Note 2)
–1.24V ≥ VOUT ≥ –4.5V, 0 ≤ IOUT ≤ 6mA
1
5
1
5
∆VOUT
l
–4.5V ≥ VOUT ≥ –5V, 0 ≤ IOUT ≤ 3.5mA
2
5
2
l
Output Short-Circuit Current
VOUT = 0V
35
75
35
75
ISC
Output Ripple Voltage
IOUT = 5mA, VOUT = –4V
5
5
VRIP
LTC1261CS Only. Tripler Mode. VCC = 5V ±10%, C1 = C2 = 0.1µF (Note 4), COUT = 3.3µF unless otherwise specified.
l
Output Regulation
–1.24V ≥ VOUT ≥ –4V, 0 ≤ IOUT ≤ 12mA
1
5
1
5
∆VOUT
l
–4V ≥ VOUT ≥ –5V, 0 ≤ IOUT ≤ 10mA
2
5
2
5
l
Output Short-Circuit Current
VOUT = 0V
35
75
35
75
ISC
Output Ripple Voltage
IOUT = 5mA, VOUT = –4V
5
5
VRIP
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: All currents into device pins are positive; all currents out of device
pins are negative. All voltages are referenced to ground unless otherwise
specified.
Note 3: All typicals are given at TA = 25°C.
Note 4: C1 = C2 = 0.1µF means the specifications apply to tripler mode
where VCC – VOUT = 3VCC (LTC1261CS only; the LTC1261CS8 cannot be
connected in tripler mode) with C1 connected between C1+ and C1– and
C2 connected between C2+ and C2–. C2 = 0 implies doubler mode where
VCC – VOUT = 2VCC; for the LTC1261CS this means C1 connects from C1+
UNITS
V
µA
µA
µA
kHz
%
V
mA
mA
µA
V
V
µA
µs
%
%
%
mA
mV
%
mA
mV
%
%
mA
mV
%
%
mA
mV
to C2– with C1– and C2+ floating. For the LTC1261CS8 in doubler mode,
C1 connects from C1+ to C1–; there are no C2 pins.
Note 5: Setting output to –4.75V for a –5V set point). If the magnitude
of the output is forced higher than the magnitude of the
set point ( i.e., to – 6V when the output is set for –5V) the
REG output will stay low.
1261fb
For more information www.linear.com/LTC1261
7
LTC1261
APPLICATIONS INFORMATION
OUTPUT RIPPLE
Output ripple in the LTC1261 comes from two sources;
voltage droop at the output capacitor between clocks and
frequency response of the regulation loop. Voltage droop
is easy to calculate. With a typical clock frequency of
550kHz, the charge on the output capacitor is refreshed
once every 1.8µs. With a 15mA load and a 3.3µF output
capacitor, the output will droop by:
To prevent this from happening, an external capacitor
can be connected from ADJ (or COMP for fixed output
parts) to ground to compensate for external parasitics and
increase the regulation loop bandwidth (Figure 3). This
sounds coutnterintuitive until we remember that the internal
reference is generated with respect to OUT, not ground.
TO CHARGE
PUMP
RESISTORS ARE
INTERNAL FOR
FIXED OUTPUT PARTS
∆t
1.8µs
ILOAD •
= 8.2mV
= 15mA •
3.3µF
COUT
This can be a significant ripple component when the output
is heavily loaded, especially if the output capacitor is small.
If absolute minimum output ripple is required, a 10µF or
greater output capacitor should be used.
Regulation loop frequency response is the other major
contributor to output ripple. The LTC1261 regulates the
output voltage by limiting the amount of charge transferred
to the output capacitor on a cycle-by-cycle basis. The
output voltage is sensed at the ADJ pin (COMP for fixed
output versions) through an internal or external resistor
divider from the OUT pin to ground. As the flying capacitors are first connected to the output, the output voltage
begins to change quite rapidly. As soon as it exceeds the
set point COMP1 trips, switching the state of the charge
pump and stopping the charge transfer. Because the RC
time constant of the capacitors and the switches is quite
short, the ADJ pin must have a wide AC bandwidth to be
able to respond to the output in time. External parasitic
capacitance at the ADJ pin can reduce the bandwidth to
the point where the comparator cannot respond by the
time the clock pulse finishes. When this happens the
comparator will allow a few complete pulses through, then
overcorrect and disable the charge pump until the output
drops below the set point. Under these conditions the
output will remain in regulation but the output ripple will
increase as the comparator “hunts” for the correct value.
COMP 1
CC
100pF
R1
+
1.24V
–
REF
R2
ADJ/COMP
VOUT
LTC1261 • F03
Figure 3. Regulator Loop Compensation
The feedback loop actually sees ground as its “output,” thus
the compensation capacitor should be connected across
the “top” of the resistor divider, from ADJ (or COMP) to
ground. By the same token, avoid adding capacitance
between ADJ (or COMP) and VOUT. This will slow down
the feedback loop and increase output ripple. A 100pF
capacitor from ADJ or COMP to ground will compensate
the loop properly under most conditions.
OUTPUT FILTERING
If extremely low output ripple (< 5mV) is required, additional output filtering is required. Because the LTC1261
uses a high 550kHz switching frequency, fairly low value
RC or LC networks can be used at the output to effectively
filter the output ripple. A 10Ω series output resistor and
a 3.3µF capacitor will cut output ripple to below 3mV
(Figure 4). Further reductions can be obtained with larger
filter capacitors or by using an LC output filter.
1261fb
8
For more information www.linear.com/LTC1261
LTC1261
APPLICATIONS INFORMATION
5V
1µF
VCC
2
0.1µF
C1
+
OUT
6
10Ω
5
3.3µF
VOUT = –4V
LTC1261CS8-4
COMP
GND
100pF
+
C1–
+
3
3.3µF
each clock cycle. The smaller capacitors draw smaller
pulses of current out of VCC as well, limiting peak currents and reducing the demands on the input supply.
Table 1 shows recommended values of flying capacitor
vs maximum load capacity.
Table 1. Typical Max Load (mA) vs Flying Capacitor Value at
TA = 25°C, VOUT = – 4V
FLYING
CAPACITOR
VALUE (µF)
MAX LOAD (mA)
VCC = 5V DOUBLER MODE
MAX LOAD (mA)
VCC = 3.3V TRIPLER MODE
0.1
22
20
0.047
16
15
CAPACITOR SELECTION
0.033
8
11
0.022
4
5
Capacitor Sizing
0.01
1
3
4
LTC1261 • F04
Figure 4. Output Filter Cuts Ripple Below 3mV
The performance of the LTC1261 can be affected by the
capacitors it is connected to. The LTC1261 requires bypass
capacitors to ground for both the VCC and OUT pins. The
input capacitor provides most of LTC1261’s supply current
while it is charging the flying capacitors. This capacitor
should be mounted as close to the package as possible
and its value should be at least five times larger than the
flying capacitor. Ceramic capacitors generally provide
adequate performance but avoid using a tantalum capacitor as the input bypass unless there is at least a 0.1µF
ceramic capacitor in parallel with it. The charge pump
capacitors are somewhat less critical since their peak
currents are limited by the switches inside the LTC1261.
Most applications should use 0.1µF as the flying capacitor value. Conveniently, ceramic capacitors are the most
common type of 0.1µF capacitor and they work well here.
Usually the easiest solution is to use the same capacitor
type for both the input bypass and the flying capacitors.
In applications where the maximum load current is welldefined and output ripple is critical or input peak currents
need to be minimized, the flying capacitor values can be
tailored to the application. Reducing the value of the flying
capacitors reduces the amount of charge transferred with
each clock cycle. This limits maximum output current, but
also cuts the size of the voltage step at the output with
The output capacitor performs two functions: it provides
output current to the load during half of the charge pump
cycle and its value helps to set the output ripple voltage.
For applications that are insensitive to output ripple, the
output bypass capacitor can be as small as 1µF. To achieve
specified output ripple with 0.1µF flying capacitors, the
output capacitor should be at least 3.3µF. Larger output
capacitors will reduce output ripple further at the expense
of turn-on time.
Capacitor ESR
Output capacitor Equivalent Series Resistance (ESR) is
another factor to consider. Excessive ESR in the output
capacitor can fool the regulation loop into keeping the
output artificially low by prematurely terminating the
charging cycle. As the charge pump switches to recharge
the output a brief surge of current flows from the flying
capacitors to the output capacitor. This current surge can
be as high as 100mA under full load conditions. A typical
3.3µF tantalum capacitor has 1Ω or 2Ω of ESR; 100mA
• 2Ω = 200mV. If the output is within 200mV of the set
point this additional 200mV surge will trip the feedback
comparator and terminate the charging cycle. The pulse
dissipates quickly and the comparator returns to the
correct state, but the RS latch will not allow the charge
1261fb
For more information www.linear.com/LTC1261
9
LTC1261
APPLICATIONS INFORMATION
pump to respond until the next clock edge. This prevents
the charge pump from going into very high frequency
oscillation under such conditions but it also creates an
output error as the feedback loop regulates based on
the top of the spike, not the average value of the output
(Figure 5). The resulting output voltage behaves as if a
resistor of value CESR • (IPK/IAVE)Ω was placed in series
with the output. To avoid this nasty sequence of events
connect a 0.1µF ceramic capacitor in parallel with the
larger output capacitor. The ceramic capacitor will “eat”
the high frequency spike, preventing it from fooling the
feedback loop, while the larger but slower tantalum or
aluminum output capacitor supplies output current to the
load between charge cycles.
CLOCK
LOW ESR
OUTPUT CAP
VSET
VOUT
AVERAGE
VOUT
COMP1
OUTPUT
HIGH ESR
OUTPUT CAP
VOUT
Most of this resistance is already provided by the internal
switches in the LTC1261 (especially in tripler mode). More
than 1Ω or 2Ω of ESR on the flying capacitors will start
to affect the regulation at maximum load.
RESISTOR SELECTION
Resistor selection is easy with the fixed output versions
of the LTC1261— no resistors are needed! Selecting
the right resistors for the adjustable parts is only a little
more difficult. A resistor divider should be used to divide
the signal at the output to give 1.24V at the ADJ pin with
respect to VOUT (Figure 6). The LTC1261 uses a positive
reference with respect to VOUT, not a negative reference
with respect to ground (Figure 2 shows the reference connection). Be sure to keep this in mind when connecting
the resistors! If the initial output is not what you expected,
try swapping the two resistors.
GND
LTC1261
VSET
ADJ
VOUT
AVERAGE
OUT
6 (4*)
10 (5*)
11 (6*)
R1
R2
*LTC1261CS8
COMP1
OUTPUT
LTC1261 • F05
Figure 5. Output Ripple with Low and High ESR Capacitors
Note that ESR in the flying capacitors will not cause the
same condition; in fact, it may actually improve the situation by cutting the peak current and lowering the amplitude of the spike. However, more flying capacitor ESR is
not necessarily better. As soon as the RC time constant
approaches half of a clock period (the time the capacitors have to share charge at full duty cycle) the output
current capability of the LTC1261 will begin to diminish.
For 0.1µF flying capacitors, this gives a maximum total
series resistance of:
VOUT = –1.24V
(
R1 + R2
R2
)
LTC1261 • F06
Figure 6. External Resistor Connections
The 14-lead adjustable parts include a built-in resistor
string which can provide an assortment of output voltages
by using different pin-strapping options at the R0, R1,
and RADJ pins (Table 2). The internal resistors are roughly
124k, 226k, 100k, and 50k (see Figure 2) giving output
options of –3.5V, –4V, –4.5V, and –5V. The resistors
are carefully matched to provide accurate divider ratios,
but the absolute values can vary substantially from part
to part. It is not a good idea to create a divider using an
external resistor and one of the internal resistors unless
the output voltage accuracy is not critical.
1 tCLK 1 1
/ 0.1µF = 9.1Ω
=
2 CFLY 2 550kHz
1261fb
10
For more information www.linear.com/LTC1261
LTC1261
APPLICATIONS INFORMATION
Table 2. Output Voltages Using the Internal Resistor Divider
PIN CONNECTIONS
OUTPUT VOLTAGE
ADJ to RADJ
–5V
ADJ to RADJ, R0 to GND
–4.5V
ADJ to RADJ, R1 to R0
–4V
ADJ to RADJ, R1 to GND
–3.5V
ADJ to R1
–1.77V
ADJ to R0
–1.38V
ADJ to GND
–1.24V
There are some oddball output voltages available by connecting ADJ to R0 or R1 and shorting out some of the
internal resistors. If one of these combinations gives you
the output voltage you want, by all means use it!
The internal resistor values are the same for the fixed
output versions of the LTC1261 as they are for the
adjustable. The output voltage can be trimmed, if desired,
by connecting external resistance from the COMP pin to
OUT or ground to alter the divider ratio. As in the adjustable
parts, the absolute value of the internal resistors may vary
significantly from unit to unit. As a result, the further the
trim shifts the output voltage the less accurate the output
voltage will be. If a precise output voltage other than one
of the available fixed voltages is required, it is better to
use an adjustable LTC1261 and use precision external
resistors. The internal reference is trimmed at the factory
to within 3.5% of 1.24V; with 1% external resistors the
output will be within 5.5% of the nominal value, even
under worst case conditions.
The LTC1261 can be internally configured with nonstandard fixed output voltages. Contact the Linear Technology
Marketing Department for details.
TYPICAL APPLICATIONS
3.3V Input, –4.5V Output GaAs FET Bias Generator
P-CHANNEL
POWER SWITCH
VBAT
3.3V
1µF
SHUTDOWN
10k
14
2
0.1µF
VCC
13
SHDN
C1 +
12
REG
C1–
LTC1261
11
4
OUT
C2+
3
5
NC
8
C2 –
ADJ
R1
R0
7
RADJ
GND
6
10
+
0.1µF
–4.5V BIAS
3.3µF
9
GaAs
TRANSMITTER
LTC1261 • TA03
100pF
1261fb
For more information www.linear.com/LTC1261
11
LTC1261
TYPICAL APPLICATIONS
5V Input, – 4V Output GaAs FET Bias Generator
P-CHANNEL
POWER SWITCH
VBAT
SHUTDOWN
1
5V
VCC
SHDN
10k
8
2
1µF
7
REG
C1+
LTC1261-4
3
6
OUT
C2 –
0.1µF
4
COMP
GND
– 4V BIAS
5
100pF
GaAs
TRANSMITTER
+ 3.3µF
LTC1261 • TA04
7 Cells to – 1.24V Output GaAs FET Bias Generator
P-CHANNEL
POWER SWITCH
VBAT = 8.4V
(7 NiCd CELLS)
SHUTDOWN
1
VCC
SHDN
10k
8
2
1µF
7
REG
C1+
LTC1261
3
6
OUT
C2 –
0.1µF
4
ADJ
GND
–1.24V BIAS
5
GaAs
TRANSMITTER
+ 3.3µF
LTC1261 • TA05
1mV Ripple, 5V Input, – 4V Output GaAs FET Bias Generator
P-CHANNEL
POWER SWITCH
VBAT
SHUTDOWN
1
5V
VCC
SHDN
10k
8
2
1µF
0.1µF
7
REG
C1+
LTC1261-4
3
6
OUT
C2–
4
GND
COMP
100µH
5
100pF
+ 10µF
– 4V BIAS
+ 10µF
GaAs
TRANSMITTER
LTC1261 • TA06
1261fb
12
For more information www.linear.com/LTC1261
LTC1261
TYPICAL APPLICATIONS
High Supply Voltage, – 5V Output GaAs FET Bias Generator
P-CHANNEL
POWER SWITCH
8V ≤ VBAT ≤ 12V
1N4733A
5.1V
1µF
10k
SHUTDOWN
14
2
0.1µF
VCC
13
SHDN
C1 +
12
REG
C1–
LTC1261
11
4
OUT
C2+
3
0.1µF
5
NC
8
C2 –
ADJ
R1
R0
7
NC
RADJ
GND
–5V BIAS
10
GaAs
TRANSMITTER
+ 3.3µF
9
LTC1261 • TA07
100pF
6
Low Output Voltage Generator
– 5V Supply Generator
3V ≤ VCC ≤ 7V
5V
1µF
1
VCC
2
0.1µF
100pF
ADJ
5
OUT
GND
4
14
RS
2
C1+
LTC1261
3
C1–
0.1µF
124k
6
1N5817
1µF
VOUT = VCC – 10µA (RS + 124k)
= – 0.5V (RS = 426k)
= –1V (RS = 476k)
ADJ
10
9
RADJ
C1–
LTC1261
4
8
C2+
R1
100pF
3
0.1µF
+ 3.3µF
C1 +
VCC
5
C2 –
R0
OUT
LTC1261 • TA10
7
NC
NC
11
GND
–5V 5%
AT 10mA
+ 3.3µF
6
LTC1261 • TA09
Minimum Parts Count – 4V Generator
1
5V
VCC
SHDN
8
2
1µF
0.1µF
7
REG
C1 +
LTC1261-4
3
6
OUT
C1 –
4
GND
COMP
5
VOUT = –4V
at 10mA
+ 3.3µF
LTC1261 • TA12
1261fb
For more information www.linear.com/LTC1261
13
LTC1261
TYPICAL APPLICATIONS
This circuit uses the LTC1261CS8 to generate a –1.24V
output at 20mA. Attached to this output is a 312Ω resistor
to make the current/voltage conversion. 4mA through 312Ω
generates 1.24V, giving a net 0V output. 20mA through
312Ω gives 6.24V across the resistor, giving a net 5V
output. If the 4mA to 20mA source requires an operating voltage greater than 8V, it should be powered from a
separate supply; the LTC1261 can then be powered from
any convenient supply, 3V ≤ VS ≤ 8V. The Schottky diode
prevents the external voltage from damaging the LTC1261
in shutdown or under fault conditions. The LTC1261’s
reference is trimmed to 3.5% and the resistor adds 1%
uncertainty, giving 4.5% total output error.
– 1.24V Generator for 4mA-20mA to 0V-5V Conversion
+
4mA
TO 20mA
SENSOR
OPTIONAL
INPUT
PROTECTION
DIODES
8V
1µF
–
312Ω
1%
–1.24V
6
+ 3.3µF
1N5817
0V TO 5V
±5%
1
5
OUT
VCC
C1+
2
0.1µF
LTC1261
C1–
ADJ
3
GND
4
LTC1261 • TA11
1261fb
14
For more information www.linear.com/LTC1261
LTC1261
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
S8 Package
8-Lead Plastic Small Outline (Narrow .150 Inch)
(Reference LTC DWG # 05-08-1610 Rev G)
.189 – .197
(4.801 – 5.004)
NOTE 3
.045 ±.005
.050 BSC
8
.245
MIN
.160 ±.005
.010 – .020
× 45°
(0.254 – 0.508)
2
.053 – .069
(1.346 – 1.752)
0°– 8° TYP
.016 – .050
(0.406 – 1.270)
5
.150 – .157
(3.810 – 3.988)
NOTE 3
1
RECOMMENDED SOLDER PAD LAYOUT
.008 – .010
(0.203 – 0.254)
6
.228 – .244
(5.791 – 6.197)
.030 ±.005
TYP
NOTE:
1. DIMENSIONS IN
7
.014 – .019
(0.355 – 0.483)
TYP
INCHES
(MILLIMETERS)
2. DRAWING NOT TO SCALE
3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm)
4. PIN 1 CAN BE BEVEL EDGE OR A DIMPLE
3
4
.004 – .010
(0.101 – 0.254)
.050
(1.270)
BSC
SO8 REV G 0212
1261fb
For more information www.linear.com/LTC1261
15
LTC1261
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
S Package
14-Lead Plastic Small Outline (Narrow .150 Inch)
(Reference LTC DWG # 05-08-1610 Rev G)
.337 – .344
(8.560 – 8.738)
NOTE 3
.045 ±.005
.050 BSC
14
N
12
11
10
9
8
N
.245
MIN
.160 ±.005
.228 – .244
(5.791 – 6.197)
1
.030 ±.005
TYP
13
2
3
N/2
N/2
RECOMMENDED SOLDER PAD LAYOUT
1
.010 – .020
× 45
(0.254 – 0.508)
.008 – .010
(0.203 – 0.254)
2
3
4
5
.053 – .069
(1.346 – 1.752)
NOTE:
1. DIMENSIONS IN
.014 – .019
(0.355 – 0.483)
TYP
INCHES
(MILLIMETERS)
2. DRAWING NOT TO SCALE
3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm)
4. PIN 1 CAN BE BEVEL EDGE OR A DIMPLE
7
.004 – .010
(0.101 – 0.254)
0° – 8° TYP
.016 – .050
(0.406 – 1.270)
6
.150 – .157
(3.810 – 3.988)
NOTE 3
.050
(1.270)
BSC
S14 REV G 0212
1261fb
16
For more information www.linear.com/LTC1261
LTC1261
REVISION HISTORY
(Revision history begins at Rev B)
REV
DATE
DESCRIPTION
PAGE NUMBER
B
02/13
Updated part numbers for lead free
Added I-grade option
2
2, 3
1261fb
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection
of its circuits
as described
herein will not infringe on existing patent rights.
For more
information
www.linear.com/LTC1261
17
LTC1261
TYPICAL APPLICATION
5V Input, – 0.5V Output GaAs FET Bias Generator
P-CHANNEL
POWER SWITCH
VBAT
SHUTDOWN
1
5V
VCC
SHDN
42.2k
8
10k
2
1µF
7
REG
C1+
LTC1261
3
6
OUT
C2–
0.1µF
4
GND
ADJ
–0.5V BIAS
5.5%
5
12.4k
+ 3.3µF
100pF
GaAs
TRANSMITTER
LTC1261 • TA08
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LTC1550/LTC1551
Low Noise Switched Capacitor Regulated Voltage Inverter
GaAs FET Bias with Linear Regulator 1mV Ripple
LTC1429
Clock Synchronized Switched Capacitor Regulated Voltage Inverter
GaAs FET Bias
LT1121
Micropower Low Dropout Regulators with Shutdown
0.4V Dropout Voltage at 150mA, Low Noise,
Switched Capacitor Regulated Voltage Inverter
1261fb
18
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
For more information www.linear.com/LTC1261
(408) 432-1900 ● FAX: (408) 434-0507
●
www.linear.com/LTC1261
LT 0313 REV B • PRINTED IN USA
LINEAR TECHNOLOGY CORPORATION 2013