LTC1272-8CCN#PBF

LTC1272 12-Bit, 3µs, 250kHz Sampling A/D Converter FEATURES DESCRIPTION n n n n n The LTC1272 is a 3µs, 12-bit, successive approximation sampling A/D converter. It has the same pinout as the industry standard AD7572 and offers faster conversion time, on-chip sample-and-hold, and single supply operation. It uses LTBiCMOS™ switched-capacitor technology to combine a high speed 12-bit ADC with a fast, accurate sample-and-hold and a precision reference. AD7572 Pinout 12-Bit Resolution 3µs and 8µs Conversion Times On-Chip Sample-and-Hold Up to 250kHz Sample Rates 5V Single Supply Operation No Negative Supply Required n On-Chip 25ppm/°C Reference n 75mW (Typ) Power Consumption n ESD Protected on All Pins n 24-Pin Narrow DIP and SOL Packages n n The LTC1272 operates with a single 5V supply but can also accept the 5V/–15V supplies required by the AD7572 (Pin 23, the negative supply pin of the AD7572, is not connected on the LTC1272). The LTC1272 has the same 0V to 5V input range as the AD7572 but, to achieve single supply operation, it provides a 2.42V reference output instead of the – 5.25V of the AD7572. It plugs in for the AD7572 if the reference capacitor polarity is reversed and a 1µs sampleand-hold acquisition time is allowed between conversions. APPLICATIONS n n n n High Speed Data Acquisition Digital Signal Processing (DSP) Multiplexed Data Acquisition Systems Single Supply Systems The output data can be read as a 12-bit word or as two 8-bit bytes. This allows easy interface to both 8-bit and higher processors. The LTC1272 can be used with a crystal or an external clock and comes in speed grades of 3ms and 8ms. L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and LTBiCMOS is a trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners. TYPICAL APPLICATION Single 5V Supply, 3µs, 12-Bit Sampling ADC 0.1µF + 8 OR 12-BIT PARALLEL BUS 10µF A IN VDD VREF NC BUSY AGND D11 (MSB) CS D10 RD D9 HBEN D8 CLK OUT D7 CLK IN D6 D0/8 D5 D1/9 D4 D2/10 DGND D3/11 10µF + 0 –20 0.1µF µP CONTROL LINES S = 72.1 (N+D) –40 AMPLITUDE (dB) 2.42V VREF OUTPUT ANALOG INPUT (0V TO 5V) 1024 Point FFT, fS = 250kHz, fIN = 10kHz 5V LTC1272 –60 –80 –100 –120 –140 0 20 40 60 80 100 120 FREQUENCY (kHz) LTC1272 • F02 LTC1272 • F01 1272fc For more information www.linear.com/1272 1 LTC1272 ABSOLUTE MAXIMUM RATINGS (Notes 1 and 2) Supply Voltage (VDD)...................................................6V Analog Input Voltage (Note 3)..................... –0.3V to 15V Digital Input Voltage.................................... –0.3V to 12V Digital Output Voltage......................–0.3V to VDD + 0.3V Power Dissipation................................................500mW Operating Temperature Range LTC1272-XAC, CC..................................... 0°C to 70°C Storage Temperature Range....................– 65°C to 150°C Lead Temperature (Soldering, 10 sec)................... 300°C PIN CONFIGURATION TOP VIEW TOP VIEW A IN 1 24 VDD A IN 1 24 VDD VREF 2 23 NC VREF 2 23 NC AGND 3 22 BUSY AGND 3 22 BUSY (MSB) D11 4 21 CS (MSB) D11 4 21 CS D10 5 20 RD D10 5 20 RD D9 6 19 HBEN D9 6 19 HBEN D8 7 18 CLK OUT D8 7 18 CLK OUT D7 8 17 CLK IN D7 8 17 CLK IN D6 9 16 D0/8 D6 9 16 D0/8 D5 10 15 D1/9 D5 10 15 D1/9 D4 11 14 D2/10 D4 11 14 D2/10 DGND 12 13 D3/11 DGND 12 13 D3/11 N PACKAGE 24-LEAD PDIP SW PACKAGE 24-LEAD PLASTIC SO WIDE TJMAX = 110°C, θJA = 100°C/W TJMAX = 110°C, θJA = 130°C/W ORDER INFORMATION LEAD FREE FINISH TAPE AND REEL PART MARKING PACKAGE DESCRIPTION TEMPERATURE RANGE LTC1272ACN-3#PBF LTC1272ACN-3#TRPBF LTC1272-3ACN 24-Lead PDIP 0°C to 70°C LTC1272CCN-3#PBF LTC1272CCN-3#TRPBF LTC1272-3CCN 24-Lead PDIP 0°C to 70°C LTC1272ACN-8#PBF LTC1272ACN-8#TRPBF LTC1272-8ACN 24-Lead PDIP 0°C to 70°C LTC1272CCN-8#PBF LTC1272CCN-8#TRPBF LTC1272-8CCN 24-Lead PDIP 0°C to 70°C LTC1272ACSW-3#PBF LTC1272ACSW-3#TRPBF LTC1272-3ACSW 24-Lead Plastic SO Wide 0°C to 70°C LTC1272CCSW-3#PBF LTC1272CCSW-3#TRPBF LTC1272-3CCSW 24-Lead Plastic SO Wide 0°C to 70°C LTC1272ACSW-8#PBF LTC1272ACSW-8#TRPBF LTC1272-8ACSW 24-Lead Plastic SO Wide 0°C to 70°C LTC1272CCSW-8#PBF LTC1272CCSW-8#TRPBF LTC1272-8CCSW 24-Lead Plastic SO Wide 0°C to 70°C Consult LTC Marketing for parts specified with wider operating temperature ranges. Consult LTC Marketing for information on nonstandard lead based finish parts. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ 1272fc 2 For more information www.linear.com/1272 LTC1272 CONVERTER CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. With Internal Reference (Note 4) LTC1272-XA PARAMETER CONDITIONS MIN Resolution (No Missing Codes) Integral Linearity Error l (Note 5) Differential Linearity Error TYP LTC1272-XC MAX MIN 12 TYP MAX 12 Bits l ±1/2 ±1 LSB l ±1 ±1 LSB l ±3 ±4 ±4 ±6 LSB LSB Offset Error Gain Error ±10 Full-Scale Tempco IOUT (Reference) = 0 UNITS ±5 l ±25 ±10 ±15 LSB ±45 ppm/°C INTERNAL REFERENCE CHARACTERISTICS l denotes the specifications which apply over the full The operating temperature range, otherwise specifications are at TA = 25°C. (Note 4) LTC1272-XA LTC1272-XC PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS VREF Output Voltage (Note 6) IOUT = 0 2.400 2.420 2.440 2.400 2.420 2.440 V VREF Output Tempco IOUT = 0 5 25 10 45 VREF Line Regulation 4.75V ≤ VDD ≤ 5.25V, IOUT = 0 l 0.01 0.01 2 2 VREF Load Regulation (Sourcing Current) 0 ≤ IOUT  ≤ 1mA ppm/°C LSB/V LSB/mA DIGITAL AND DC ELECTRICAL CHARACTERISTICS l denotes the specifications which The apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 4) LTC1272-XA/C SYMBOL PARAMETER CONDITIONS VIH High Level Input Voltage CS, RD, HBEN, CLK IN VDD = 5.25V l VIL Low Level Input Voltage CS, RD, HBEN, CLK IN VDD = 4.75V l 0.8 V IIN Input Current CS, RD, HBEN VIN = 0V to VDD l ± 10 µA Input Current CLK IN VIN = 0V to VDD l ± 20 µA High Level Output Voltage All Logic Outputs VDD = 4.75V IOUT = – 10μA IOUT = – 200μA l VOH MIN TYP MAX 2.4 UNITS V 4.7 4.0 V V VOL Low Level Output Voltage All Logic Outputs VDD = 4.75V, IOUT = 1.6mA l 0.4 V IOZ High-Z Output Leakage D11-D0/8 VOUT = 0V to VDD l ±10 µA COZ High-Z Output Capacitance (Note 7) ISOURCE Output Source Current VOUT = 0V –10 mA ISINK Output Sink Current VOUT = VDD 10 mA IDD Positive Supply Current CS = RD = VDD, AIN = 5V PD Power Dissipation 15 l l 15 75 30 pF mA mW 1272fc For more information www.linear.com/1272 3 LTC1272 DYNAMIC ACCURACY (Note 4) fSAMPLE = 250kHz (LTC1272-3), 111kHz (LTC1272-8) LTC1272-XA/C SYMBOL PARAMETER CONDITIONS S/(N+D) Signal-to-Noise Plus Distortion Ratio 10kHz Input Signal MIN TYP 72 MAX UNITS dB THD Total Harmonic Distortion (Up to 5th Harmonic) 10kHz Input Signal –82 dB Peak Harmonic or Spurious Noise 10kHz Input Signal –82 dB ANALOG INPUT The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 4) LTC1272-XA/B/C SYMBOL PARAMETER CONDITIONS VIN Input Voltage Range 4.75V ≤ VDD ≤ 5.25V IIN Input Current CIN Input Capacitance tACQ Sample-and-Hold Acquisition Time MIN l TYP 0 MAX 3.5 l 50 0.45 l UNITS 5 V mA pF 1 µs TIMING CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 8) LTC1272-XA/C SYMBOL PARAMETER t1 CS to RD Setup Time t2 RD to BUSY Delay t3 t4 Data Access Time After RD↓ RD Pulse Width t5 CS to RD Hold Time t6 Data Setup Time After BUSY t7 Bus Relinquish Time CONDITIONS MIN l TYP MAX 0 UNITS ns CL = 50pF COM Grade l CL = 20pF COM Grade l CL = 100pF COM Grade l COM Grade l t3 t3 ns ns l 0 ns COM Grade l COM Grade l 20 20 80 190 230 ns ns 50 90 110 ns ns 70 125 150 ns ns 40 70 90 ns ns 30 75 85 ns ns t8 HBEN to RD Setup Time l 0 ns t9 HBEN to RD Hold Time l 0 ns t10 Delay Between RD Operations l 200 ns t11 Delay Between Conversions 1 µs t12 Aperture Delay of Sample and Hold t13 CLK to BUSY Delay tCONV Conversion Time Jitter