LTC1564
10kHz to 150kHz
Digitally Controlled
Antialiasing Filter and 4-Bit P.G.A.
DESCRIPTIO
U
FEATURES
■
■
■
■
■
■
■
■
■
■
4-Bit Digitally Controlled 8th-Order Lowpass Filter
– fCUTOFF Adjustable from 10kHz to 150kHz in 10kHz
Steps
– 100dB Attenuation at 2.5 × fCUTOFF
4-Bit Digitally Controlled Programmable Gain
Amplifier
– G = 1 to 16 in 1V/V Steps
Miniature 16-Pin SSOP Package
No External Components
122dB Total System Dynamic Range
Rail-to-Rail Input and Output Range
2.7V to 10V Operation
Low Noise Mute Mode
Low Power Shutdown Mode
Available in 16-Lead Plastic SSOP Package
U
APPLICATIO S
■
■
■
■
■
■
■
■
■
Antialias or Reconstruction Filtering
DSP Systems
Communications Systems
Scientific Instruments
High Resolutions (16 Bits to 20 Bits)
Processing Signals Buried in Noise
Audio Signal Processing
Programmable Data Rates
Automatic Gain Control (AGC)
Single Part Replacing Multiple Filters
The LTC1564 is a rail-to-rail high resolution 8th-order
lowpass filter with two stopband notches, giving approximately 100dB attenuation at 2.5 times the passband cutoff
frequency fC (a de-facto standard for DSP front ends).
Signals with low or variable levels can be normalized with
the built-in variable gain that reduces input-referred noise
with increasing gain for a typical dynamic range (maximum signal level to minimum noise) of 122dB (20 equivalent bits) with 20kHz fC and 118dB at 100kHz fC on a ±5V
supply.
Other frequency-response shapes can be provided upon
request. Please contact LTC Marketing.
, LTC and LT are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
U
■
The LTC®1564 is a new type of continuous time filter for
antialiasing, reconstruction and other band-limiting applications. No other analog components or filter expertise are
needed to use it. There is one analog input pin and one
analog output pin. The cutoff frequency (fC) and gain are
programmable while the shape of the lowpass response is
fixed. A latching digital interface stores fC and gain settings
or it can be bypassed for control directly from the pins. The
LTC1564 operates from 2.7V to 10V total (single or split
supplies) and comes in a 16-pin surface mount SSOP.
TYPICAL APPLICATIO
LTC1564 Programmable Range
Low Noise Programmable Filter with Variable Gain
V+
0.1µF
ANALOG
IN
15
14
13
12
IN AGND V + RST G3
11
10
9
G2
G1
G0
F2
F1
F0
LTC1564
OUT
1
V–
2
CS/
EN HOLD F3
3
0.1µF
4
5
7
8
FREQUENCY CODE
ANALOG
OUT
V–
6
1564 TA01
V+ AND V – SUPPLIES CAN BE FROM
1.35V TO 5.25V EACH
TIE F AND G PINS TO V+ OR V – TO
SET FREQUENCY AND GAIN
DYNAMIC RANGE 118dB TO 122dB
AT ± 5V DEPENDING ON FREQUENCY CODE
GAIN (dB)
GAIN CODE
16
30
20
10
0
–10
–20
–30
–40
–50
–60
fC = 10kHz
–70
–80 GAIN = 1V/V
–90
–100
–110
–120
10
5
fC = 150kHz
GAIN = 16V/V
100
FREQUENCY (kHz)
500
1564 TA02
1564fa
1
LTC1564
W W
W
AXI U
U
ABSOLUTE
RATI GS
U
U
W
PACKAGE/ORDER I FOR ATIO
(Note 1)
Total Supply Voltage (V+ to V–) .............................. 11V
Input Voltage ............................. V + + 0.3V to V – – 0.3V
Output Short-Circuit Duration .......................... Indefinite
Operating Temperature Range
LTC1564C .............................................. 0°C to 70°C
LTC1564I .......................................... – 40°C TO 85°C
Storage Temperature Range ................. – 65°C to 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C
ORDER PART
NUMBER
TOP VIEW
OUT
1
16 IN
V–
2
15 AGND
EN
3
14 V +
CS/HOLD
4
13 RST
F3
5
12 G3
F2
6
11 G2
F1
7
10 G1
F0
8
9
LTC1564CG
LTC1564IG
G0
G PACKAGE
16-LEAD PLASTIC SSOP
TJMAX = 125°C, θJA = 130°C/ W
Order Options Tape and Reel: Add #TR
Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF
Lead Free Part Marking: http://www.linear.com/leadfree/
Consult LTC Marketing for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS
The ● denotes specifications that apply over the full operating temperature
range, otherwise specifications are at TA = 25°C. VS = ±2.375V, fC = 10kHz, gain = 1, RL = 10k, unless otherwise noted.
PARAMETER
CONDITIONS
MIN
Total Supply Voltage
TYP
2.7
MAX
UNITS
10.5
V
17
18.5
25
mA
mA
mA
VS = ±1.35V, VIN = 0V
VS = ±2.375V, VIN = 0V
VS = ±5V, VIN = 0V
●
●
●
Output Voltage Swing
RL = 10k to 0V
●
4.65
VP-P
Output Short-Circuit Current
VS = ±5V
●
±10
mA
DC Offset Voltage Magnitude (Referred to Input)
Gain = 1, 0°C to 70°C
Gain = 1, – 40°C to 85°C
Gain = 10, 0°C to 70°C
Gain = 10, – 40°C to 85°C
●
●
●
●
3
3
1
1
Supply Current
15
16
22
4.5
13
16
5
6
mV
mV
mV
mV
0.8
25.3
dB
dB
0.5
1.6
dB
dB
DC AGND Reference Voltage
VS = Single 5V Supply
Passband Gain
fC = 50kHz, fIN = 10kHz, Gain = 1
fC = 50kHz, fIN = 10KHz, Gain = 16
●
●
– 0.1
23.5
2.5
Passband Ripple
fC = 10kHz, 0 ≤ fIN ≤ 9kHz (Notes 2, 3)
fC = 150kHz, 0 ≤ fIN ≤ 135kHz (Notes 2, 3)
●
●
–0.5
– 0.6
Roll Off at Cutoff Frequency (fC) (Note 3)
fC = 10kHz (F = 0001)
fC = 150kHz (F = 1111)
●
●
–1.2
–1.5
–0.7
–0.5
–0.3
0.6
dB
dB
Roll Off at 2fC (Note 3)
fC = 10kHz
●
–67
–63
–59
dB
Roll Off at 2.5fC (Note 3)
fC = 10kHz
–99
dB
Wideband Noise (Referred to Input)
BW = 20kHz, fC = 10kHz, Gain = 1
BW = 20kHz, fC = 10kHz, Gain = 16
BW = 200kHz, fC = 100kHz, Gain = 1
33
2.5
50
µVRMS
µVRMS
µVRMS
Total Harmonic Distortion
fC = 100kHz, fIN = 10kHz, VIN = 1VRMS
– 86
dB
0.3
24.2
V
1564fa
2
LTC1564
ELECTRICAL CHARACTERISTICS
The ● denotes specifications that apply over the full operating temperature
range, otherwise specifications are at TA = 25°C. VS = ±2.375V, fC = 10kHz, gain = 1, RL = 10k, unless otherwise noted.
PARAMETER
CONDITIONS
MIN
Input Impedance
Gain = 1, DC VIN = 0V
Gain = 16, DC VIN = 0V
10
625
kΩ
Ω
Output Impedance
fC = 10kHz, f = 10kHz
30
Ω
Mute State (F = 0000) Gain
F = 0000, fIN = 20kHz, VIN = 1VRMS
Mute State Output Noise
F = 0000, BW = 200kHz
Shutdown Supply Current
VS = ±1.35V, EN to V +
VS = ±1.35V, EN to V +
●
VS = ±2.375V, EN to V+
VS = ±2.375V, EN to V+
●
TYP
MAX
UNITS
–103
dB
µVRMS
5.4
VS = ±5V, EN to V + (Note 4)
45
75
150
µA
µA
100
150
180
µA
µA
µA
175
Digital Input “High” Voltage
VS = ±1.35V
VS = ±2.375V
VS = ±5V
Digital Input “Low” Voltage
VS = ±1.35V
VS = ±2.375V
VS = ±5V
Digital Input Pull-Up or Pull-Down Current (Note 5)
(Digital Inputs Other than EN)
VS = ±1.35V
VS = ±5V
●
●
Digital Input Pull-Up Current (EN Input)
VS = ±1.35V
VS = ±5V
●
●
1.08
1.90
4.50
Note 1: Absolute Maximum Ratings are those values beyond which the life
of the device may be impaired.
Note 2: Response is tested in production at discrete frequencies fIN of 0.1,
0.5, 0.8 and 0.9 times fC.
Note 3: Relative to gain at 0.1fC.
Note 4: All digital inputs driven rail-to-rail. When driving digital inputs with
0V and 5V levels, the shutdown current will increase to 3.5mA (typ).
V
V
V
–1.08
–1.90
0.50
V
V
V
3.5
13
6
20
µA
µA
1
10
2
20
µA
µA
Note 5: Each digital input includes a small positive or negative current
source to float the CMOS input to V+ or V– potential if it is unconnected.
The table shows the current due to this source when the input is driven at
the supply voltage opposite from the float potential. Pins CS/HOLD, F3, F2,
F0 and G3 to G0 float to the V– voltage, pins RST, EN and F1 to the V+
voltage. See “Floatable Digital Inputs” in Applications Information section.
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Roll-Offs Over Temperature
(fC = 10kHz)
Overall Frequency Response
(Frequency Scales Normalized to fC)
5
5
fC = 10kHz
SINGLE 5V SUPPLY
VS = SINGLE 5V
UNITY GAIN
(G CODE 0000)
fC = 100kHz
SINGLE 5V SUPPLY
–40°C, 25°C, 85°C
0
0
fC = 150kHz
–40°C
25°C
GAIN (dB)
GAIN (dB)
GAIN (dB)
10
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
–110
–120
–130
0.1
Roll-Offs Over Temperature
(fC = 100kHz)
–5
85°C
–5
fC = 50kHz
fC = 10kHz
1
fIN/fC
–10
10
1564 G01
5
6.25
7.5
8.75
10
FREQUENCY (kHz)
11.25
–10
12.5
1564 G02
50
62.5
75
87.5 100
FREQUENCY (kHz)
112.5
125
1564 G03
1564fa
3
LTC1564
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Passband Roll-Off at fIN = fC
vs fC
0
Passband Gain, Phase
and Group Delay
5
VS = SINGLE 5V
TA = 25°C
0
–0.25
GAIN (dB)
GAIN (dB)
–1.00
–1.25
–1.50
30
50
90
70
fC (kHz)
110
130
150
0
450
–5
–90
400
–10
–180
350
GAIN
PHASE
–15
Detail of Stopband Response
–360
–25
–450
–30
–540
GROUP DELAY
–60
250
200
150
–35
–630
100
–40
–720
50
–45
–810
0
4
2
8
6
FREQUENCY (kHz)
Rectangular Pulse Response
10
12
Short-Pulse Response
fC = 10kHz
UNITY GAIN
VS = ±5V
–70
fC = 10kHz
UNITY GAIN
VS = ± 5V
INPUT
–80
INPUT, 1V/DIV (PULSE WIDTH 10µs)
2V/DIV
GAIN (dB)
300
1546 G06
fC = 10kHz
VS = ±5V
TA = 25°C
–50
–270
–20
1564 G04
–40
500
–90
DELAY (µs)
–0.75
90
PHASE (DEGREES)
–0.50
10
fC = 10kHz
OUTPUT, 100mV/DIV
–100
–110
–120
OUTPUT
–130
–140
15
25
45
35
FREQUENCY (kHz)
55
200µs/DIV
65
100µs/DIV
1564 G07
1564 G08
1564 G05
SIGNAL/NOISE (dB)
fC = 10kHz
fIN = 1kHz
UNITY GAIN
VS = ± 5V
5V/DIV
INPUT
OUTPUT
200µs/DIV
1564 G09
THD + Noise vs Input Voltage
(fC = 10kHz)
SNR vs Input Voltage
140
130
120
110
100
90
80
70
60
50
40
30
20
10
0
0.001
–20
LIMIT FOR 10V TOTAL SUPPLY
LIMIT FOR 5V TOTAL SUPPLY
–30
(THD + NOISE)/SIGNAL (dB)
Triangular-Wave Time Response
GAIN = 16
fC = 100kHz
GAIN = 16
fC = 20kHz
GAIN = 1
fC = 100kHz
GAIN = 1
fC = 20kHz
PASSBAND INPUT
(fIN < fC)
0.1
1
0.01
INPUT VOLTAGE (VP-P)
10
1564 G10
3V SUPPLY
–40
–50
5V SUPPLY
±5V SUPPLY
–60
–70
–80
–90 f = 10kHz
C
fIN = 1kHz
–100
0.01
0.001
0.1
1
INPUT VOLTAGE (VP-P)
10
1564 G11
1564fa
4
LTC1564
U W
TYPICAL PERFOR A CE CHARACTERISTICS
THD + Noise vs Input Voltage
(fC = 100kHz)
Noise vs Frequency
and Gain Settings
10
100
–20
0
3V SUPPLY
–40
5V SUPPLY
–50
±5V SUPPLY
–60
–70
–80
–90 f = 100kHz
C
fIN = 10kHz
–100
0.01
0.001
0.1
1
INPUT VOLTAGE (VP-P)
NEGATIVE SUPPLY
V + SUPPLY BYPASS = 0.1µF
– SUPPLY BYPASS = NONE
V
–20
fC = 100kHz
10
fC = 10kHz
–30
–40
–50
–60
POSITIVE SUPPLY
V + SUPPLY BYPASS = NONE
–
V SUPPLY BYPASS = 0.1µF
–70
1
10
fC = 10kHz
VS = ±2.5V
–10
GAIN (dB)
INPUT-REFERRED NOISE (µVRMS)
–30
(THD + NOISE)/SIGNAL (dB)
Power Supply Rejection
vs Frequency
1
2
4
8
BASEBAND GAIN SETTING
1564 G12
16
1564 G13
–80
0.1k
1k
10k
100k
FREQUENCY (Hz)
1M
1564 G14
U
U
U
PI FU CTIO S
OUT (Pin 1): Analog Output. In normal filtering, this is the
output of an internal operational amplifier and is capable
of swinging essentially to any voltage between the power
supply rails (that is, between V+ and V –). This output is
designed to drive a nominal load of 5k and 50pF. For
lowest signal distortion it should be loaded as lightly as
possible. The output can drive lower resistances than 5k,
but distortion may increase, and the output current will
limit at approximately ±10mA. Capacitances higher than
50pF should be isolated by a series resistor of 500Ω to
preserve AC stability. In the Mute state (F code 0000 or
RST = 0), the output operates as in normal filtering but the
gain from the IN pin becomes zero and the output noise is
reduced. In the shutdown state (EN = 1 or EN open
circuited), most of the circuitry in the LTC1564 shuts off
and the OUT pin assumes a high impedance state.
V –, V + (Pins 2, 14): Power Supply Pins. The V + and V –
pins should be bypassed with 0.1µF capacitors to an
adequate analog ground plane using the shortest possible
wiring. Electrically clean supplies and a low impedance
ground are important for the high dynamic range and high
stopband suppression available from the LTC1564 (see
further details under AGND). Low noise linear power
supplies are recommended. Switching supplies are not
recommended because of the inevitable risk of their
switching noise coupling into the signal path, reducing
dynamic range.
EN (Pin 3): CMOS-Level Digital Chip Enable Input. Logic 1
or open circuiting this pin causes a shutdown mode with
reduced supply current. The active circuitry in the LTC1564
shuts off and its output assumes a high impedance state.
If F and G bits are latched (CS/HOLD = 1) during the
shutdown state, the latch will retain its contents.
A small pull-up current source at the EN input causes the
LTC1564 to be in shutdown state if the EN pin is left open.
Therefore, the user must connect the EN pin to logic 0 (V –
or optionally 0V with ±5V supplies) for normal filter
operation.
CS/HOLD (Pin 4): CMOS-Level Digital Enable Input for the
Latch Holding F and G Bits. Logic 0 makes the latch
transparent so that the F and G inputs directly control the
filter’s cutoff frequency and gain. Logic 1 holds the last
values of these inputs prior to the transition. This pin floats
to logic 0 (V –) when open circuited because of a small
current source (see Electrical Characteristics, Note 5).
F3, F2, F1, F0 (Pins 5, 6, 7, 8): CMOS-Level Digital
Frequency Control (“F Code”) Inputs. F3 is the most
significant bit (MSB). These pins program the LTC1564’s
cutoff frequency fC through the internal latch, which
1564fa
5
LTC1564
U
U
U
PI FU CTIO S
passes the bits directly when the CS/HOLD input is at logic
0. When CS/HOLD changes to logic 1, the F pins cease to
have effect and the latch holds the previous values. The F
code controls the filter’s cutoff frequency fC in 10kHz steps
up to 150kHz, as summarized in Table 1.
Table 1
F3
F2
F1
F0
(AT OUTPUT OF INTERNAL LATCH)
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
NOMINAL FC
(CUTOFF FREQUENCY)
0 (Mute State: Filter Gain is Zero)
10kHz
20kHz
30kHz
40kHz
50kHz
60kHz
70kHz
80kHz
90kHz
100kHz
110kHz
120kHz
130kHz
140kHz
150kHz
G0, G1, G2, G3 (Pins 9, 10, 11, 12): CMOS-Level Digital
Gain Control (“G Code”) Inputs. G3 is the most significant
bit (MSB). These pins program the LTC1564’s passband
gain through the internal latch, which passes the bits
directly when the CS/HOLD input is at logic 0. When
CS/HOLD changes to logic 1, the G pins cease to have
effect and the latch retains the previous input values. This
gain control is linear in amplitude: nominal passband gain
of the LTC1564 is the binary value of the G code, plus one
as shown in Table 2.
Note that small current sources pull the G pins to V – when
these pins are left unconnected (see Electrical Characteristics, Note 5). This sets a G code input of 0000 by default,
giving unity passband gain in normal filtering operation, if
CS/HOLD is logic 0 or is open circuited.
Thus fC is proportional to the binary value of the F code.
Note that small current sources pull F1 to V + and F3, F2
and F0 to V – when these pins are left unconnected (see
Electrical Characteristics, Note 5). This sets an F code
input of 0010 (2, in decimal form) by default, giving an fC
of 20kHz in normal filtering operation, if CS/HOLD is logic
0 or is open circuited.
RST (Pin 13): CMOS-Level Asynchronous Reset Input.
Logic 0 on this pin immediately resets the internal F and G
latch to all zeros, regardless of the state of the CS/HOLD
pin or the F or G input pins. This causes the LTC1564 to
enter a mute state (powered but with zero signal gain)
because of the resulting F = 0000 command. Logic 1
permits the other pins to control F and G. This pin floats to
logic 1 (V +) when open circuited because of a small
current source (see Electrical Characteristics, Note 5). A
brief internal reset (shorter than the analog settling time of
the filter) also occurs when power is first applied.
Table 2
G3
G2
G1
G0
(AT OUTPUT OF INTERNAL LATCH)
NOMINAL
PASSBAND GAIN
(VOLT/VOLT) (dB)
MAXIMUM INPUT SIGNAL LEVEL
(VOLTS PEAK-TO-PEAK)
DUAL 5V SINGLE 5V SINGLE 3V
NOMINAL
INPUT IMPEDANCE
(kΩ)
0
0
0
0
0
0
0
0
0
0
1
1
0
1
0
1
1
2
3
4
0
6.0
9.5
12
10
5
3.33
2.5
5.0
2.5
1.67
1.25
3.0
1.5
1.0
0.75
10
5
3.33
2.5
0
0
0
0
1
1
1
1
0
0
1
1
0
1
0
1
5
6
7
8
14.0
15.6
16.9
18.1
2
1.67
1.43
1.25
1
0.83
0.71
0.63
0.6
0.5
0.43
0.38
2
1.67
1.43
1.25
1
1
1
1
0
0
0
0
0
0
1
1
0
1
0
1
9
10
11
12
19.1
20.0
20.8
21.6
1.1
1.0
0.91
0.83
0.56
0.50
0.45
0.42
0.33
0.30
0.27
0.25
1.11
1
0.91
0.83
1
1
1
1
1
1
1
1
0
0
1
1
0
1
0
1
13
14
15
16
22.3
22.9
23.5
24.1
0.77
0.71
0.67
0.63
0.38
0.36
0.33
0.31
0.23
0.21
0.20
0.19
0.77
0.71
0.66
0.63
1564fa
6
LTC1564
U
U
U
PI FU CTIO S
Table 3. Summary of LTC1564 Digital Controls and Modes
EN
RST
CS/HOLD
F3
F2
F1
F0
G3 G2 G1
G0
FUNCTION
1
1
1
X
X
X
X
X
X
X
X
Shutdown Mode. Filter Disabled. Latch Holds F and G Inputs Present
when Last CS/HOLD = 0
1
1
0
X
X
X
X
X
X
X
X
Shutdown Mode. Filter Disabled. Latch Accepts F and G Inputs
1
0
X
X
X
X
X
X
X
X
X
Shutdown Mode. Filter Disabled. Latch Contents (F and G) Reset to All Zeros
0
1
0
0
0
0
0
X
X
X
X
Mute Mode. Filter Active, Zero Gain, Reduced Noise
0
0
X
X
X
X
X
X
X
X
X
Mute Mode. Filter Active, Zero Gain, Reduced Noise. Latch Contents
(F and G) Reset to All Zeros
0
1
1
Other Than 0000
X
X
X
X
Normal Filtering Operation. Latch Holds F and G Inputs Present
when Last CS/HOLD = 0
0
1
0
Other Than 0000
X
X
X
X
Normal Filtering Operation. Filter Responds Directly to F and G Input
Pins (See Separate Pin Descriptions)
X = Doesn’t Matter
ANALOG
GROUND PLANE
V+
ANALOG
GROUND PLANE
0.1µF
V+
0.1µF
16
15
14
13
12
11
10
V +/2
REFERENCE
9
1µF
16
15
14
13
12
11
10
9
6
7
8
LTC1564
LTC1564
1
2
3
4
5
6
7
8
0.1µF
1
2
3
4
5
V–
SINGLE-POINT
SYSTEM GROUND
DIGITAL GROUND PLANE
(IF ANY)
SINGLE-POINT
SYSTEM GROUND
DIGITAL GROUND PLANE
(IF ANY)
1564 F01
1564 F01
Figure 1. Dual Supply Ground Plane Connection
Figure 2. Single Supply Ground Plane Connection
AGND (Pin 15): Analog Ground. The AGND pin is at the
midpoint of an internal resistive voltage divider, developing a potential halfway between the V+ and V– pins, with
an equivalent series resistance to the pin of nominally 7k.
(In the shutdown state, analog switch FETs interrupt the
voltage-divider resistors and the AGND pin assumes a
high impedance.) AGND also serves as the internal halfsupply reference in the LTC1564, tied to the noninverting
inputs of all internal op amps and establishing the ground
reference voltage for the IN and OUT pins. Because of this,
very “clean” grounding is recommended, including an
analog ground plane surrounding the package. For dual
supply operation, this ground plane will be tied to the 0V
point and the AGND pin should connect directly to the
ground plane (Figure 1). For single supply operation, in
contrast, if the system signal ground is at V –, the ground
plane should tie to V – and the AGND pin should be ACbypassed to the ground plane by at least a 0.1µF high
quality capacitor (at least 1µF for best AC performance)
(Figure 2). As with all high dynamic range analog circuits,
performance in an application will reflect the quality of the
grounding.
1564fa
7
LTC1564
U
U
U
PI FU CTIO S
IN (Pin 16): Analog Input. The filter in the LTC1564 senses
the voltage difference between the IN and AGND pins. In
normal filtering (EN = 0, RST = 1, F code other than 0000),
the IN pin connects within the LTC1564 to a digitally
controlled resistance whose other end is a current-summing point at the AGND potential. At unity gain (G code
0000), the value of this input resistance is nominally 10k
and the IN voltage range is rail-to-rail (V + to V–). When
filtering at gain settings above unity (G code ≠ 0000), the
input resistance falls as (1/gain) to nominally 625Ω at a
gain of 16 (G code 1111) and the linear input range also
falls in inverse proportion to gain. (The variable gain
capability is designed to boost lower level input signals
with good noise performance.) Input resistance does not
vary significantly with the frequency-setting F code except in the mute state (F code 0000). In either the mute
state (F code 0000 or RST = 0) or the shutdown state (EN
= 1 or EN open circuited), analog switches disconnect the
IN pin internally and this pin presents a very high input
resistance. Circuitry driving the IN pin must be compatible with the LT1564’s input resistance and with the
variation of this resistance in the event that the LTC1564
is used in multiple modes. Signal sources with significant
output resistance may introduce a gain error as the
source’s output resistance and the LTC1564’s input resistance form a voltage divider. This is especially true at the
higher gain or G code settings where the LTC1564’s input
resistance is lowest.
In single supply voltage applications with elevated gain
settings (G code ≠ 0000) it is important to keep in mind
that the LTC1564’s ground reference point is AGND, not
V –. With increasing gains, the LTC1564’s linear input
voltage range is no longer rail-to-rail but converges
toward AGND. Similarly the OUT pin swings positive or
negative with respect to AGND. At unity gain (G code
0000), both IN and OUT voltages can swing from rail-torail.
W
BLOCK DIAGRA
IN
VARIABLE
GAIN
AMPLIFIER
OUT
PROGRAMMABLE FILTER
V+
V+
SHUTDOWN
SWITCH
CS/HOLD
CMOS LATCH
R
RST
V–
R
EN
SHUTDOWN
SWITCH
1564 F03
AGND
G3
G2
G1
G0
F3
F2
F1
F0
V–
Figure 3. Block Diagram
1564fa
8
LTC1564
U
W
U U
APPLICATIO S I FOR ATIO
Digital Control
The LTC1564 is a self-contained, continuous time, variable gain, high order analog lowpass filter. The gain
magnitude between IN and OUT pins is approximately
constant for signal frequency components up to the cutoff
frequency fC and falls off rapidly for frequencies above fC.
The pins IN, OUT and AGND (analog ground) are the sole
analog signal connections on the LTC1564; the others are
power supplies and digital control inputs to select fC (and
to select gain if desired). The fC range is 10kHz to 150kHz
in 10kHz steps. The form of the lowpass frequency response is an 8-pole elliptic type with two stopband notches
(Figure 4). This response rolls off by approximately 100dB
from fC to 2.5fC. The LTC1564 is laser trimmed for fC
accuracy, passband ripple, gain and offset. It delivers a
combination of 100+dB stopband attenuation, 100+dB
signal-to-noise ratio (SNR) and 100+kHz fC.
Logic levels for the LTC1564 digital inputs are nominally
rail-to-rail CMOS. (Logic 1 is V+, logic 0 is V – or alternatively 0V with ±5V supplies). The part is tested with 10%
and 90% of full excursion on the inputs, thus ±1.08V at
±1.35V supplies, ±1.9V at ±2.375V and 0.5V and 4.5V at
±5V.
GAIN (dB)
Functional Description
100dB
The fC and gain settings are always controlled by the output of an on-chip CMOS latch. Inputs to this latch are the
pins F3 through F0, G3 through G0, the latch-enable control CS/HOLD and the asynchronous reset input RST. A
logic-0 input to CS/HOLD makes the latch transparent so
that the F and G input pins pass directly to the latch outputs
and therefore control the filter directly. Raising CS/HOLD
to logic 1 freezes the latch’s output so that the F and G input
pins have no effect. Logic 0 at the RST input at any time
resets the latch outputs to all zeros. The all-zero state, in
turn, imposes a mute mode with zero gain and low output
noise if the filter is powered on (EN = 0). The all-zeros
condition will persist until RST is returned to logic 1, nonzero F and G inputs are set up and the latch outputs are
updated by CS/HOLD = 0. EN is a chip-enable input causing a shutdown state. Specific details on the digital controls appear in the Pin Functions section of this data sheet.
Floatable Digital Inputs
fC
2.5fC
FREQUENCY (Hz)
1564 F04
Figure 4. General Shape of Frequency Response
Figure 3 is a block diagram showing analog signal path,
digital control latch, and analog ground (AGND) circuitry.
A proprietary active-RC architecture filters the analog
signal. This architecture limits internal noise sources to
near the fundamental “kT/C” bounds for a filter of this
order and power consumption. The variable gain capability
at the input is an integral part of the filter, and allows
boosting of low level input signals with little increase in
output referred noise. This permits the input noise floor to
drop steadily with increasing gain, enhancing the SNR at
lower signal levels. Such a property is difficult to achieve
in practice by combining separate variable gain amplifier
and filter circuits.
Every digital input of the LTC1564 includes a small current
source (roughly 10µA) to float the CMOS input to V+ or V–
potential if the pin is unconnected. Table 4 summarizes the
open-circuit default levels.
Table 4. Open-Circuit Default Input Levels
INPUT
FLOATING LOGIC LEVEL
EFFECT
EN
1
Shutdown State
CS/HOLD
0
F and G Pins Enabled
RST
1
Latch Not Reset
F3 F2 F1 F0
0010
fC = 20kHz
G3 G2 G1 G0
0000
Unity Passband Gain
Note particularly that the pull-up current source at the EN
pin forces the LTC1564 to the shutdown state if this pin is
left open. Therefore the user must connect EN deliberately
to a logic-0 level (V –, or optionally 0V with ±5V supplies)
for normal filter operation. The other digital inputs float to
1564fa
9
LTC1564
U
W
U U
APPLICATIO S I FOR ATIO
levels that program the part for enabled F and G pins
(CS/HOLD = 0), 20kHz fC and unity passband gain. Therefore six connections (power pins, EN to logic 0, AGND, IN
and OUT) are enough to set up a working 20kHz lowpass
filter, and additional pins can be connected as necessary
to select different fC or gain.
This feature of floatable logic inputs is intended for rapid
prototyping and experimentation. Floating the logic inputs
is not recommended for production designs because,
depending on construction details, the high impedances
of these inputs may permit unwanted interference coupling and consequent erroneous digital inputs to the
LTC1564.
Also, it may be necessary to consider the effect of the pullup and pull-down current sources on the logic that drives
the LTC1564. In particular, if the LTC1564 operates from
±5V but receives digital inputs from logic using 5V and 0V,
CMOS logic levels will be compatible but the possibility
exists of the LTC1564 pulling current out of the driving logic
at those LTC1564 inputs that are capable of floating to logic
0. That is because the small current sources at these inputs return to V –, not to 0V. If the driving logic presents a
high impedance or three-state output, the LTC1564’s input current may pull this output below 0V, although the
current is limited to about 10µA. The system designer
should be aware of this possibility and ensure that any such
current flow is compatible with the driving logic.
Mute State
The Mute mode keeps the filter powered as in normal
filtering but “turns off” the signal path for minimal signal
transmission (approximately –100dB) and reduced output noise. This feature may be useful for gating a signal
source on and off, or for system calibration procedures.
Note however that the DC output in the Mute state may
shift by some millivolts compared to normal filtering
because the internal signal path changes. Recovery from
Mute, like other transient responses in a filter, proceeds at
the time scale of the filter’s pole-zero time constants and
therefore is faster at the higher fC settings (that is, at the
higher F codes).
The LTC1564 enters the Mute state when the F bits at the
latch output (Figure 3) become 0000. (It can be remem-
bered as a “zero-bandwidth” frequency setting.) This is
achieved either by presenting a 0000 code to the F inputs
and lowering the CS/HOLD input to enable the latch, or
alternatively at any time by lowering RST, which immediately resets the latch contents to all zeroes. Such a reset
also occurs normally at the application of power, unless
CS/HOLD is low and a nonzero pattern at the F inputs
overrides the brief power-on reset. In the Mute state, the
G gain-control inputs have no effect.
Output noise in Mute is largely thermal and wideband
(unlike in normal filtering, where the filter’s response
affects the noise spectrum). Typical Mute-state output
noise is 5.4µVRMS in 200kHz measurement bandwidth
and less than 3µVRMS in 40kHz bandwidth. It has occasionally happened elsewhere in the electronics industry
that someone would characterize a circuit or system by
comparing its output level in normal operation to the noise
level in a Mute state as though this were a normal signalto-noise ratio (SNR), which it is not, because this signal
and noise exist only at different times. A scrupulous name
for such a measure is SMR, signal-to-mute ratio. Accordingly in a 40kHz bandwidth, the LTC1564 can exhibit an
SMR exceeding 120dB.
Construction and Instrumentation Cautions
Electrically clean construction is important in applications
seeking the full dynamic range or high stopband rejection
of the LTC1564. Short, direct wiring will minimize parasitic
capacitance and inductance. High quality supply bypass
capacitors of 0.1µF near the chip provide good decoupling
from a clean, low inductance power source. But several
inches of wire (i.e., a few microhenrys of inductance) from
the power supplies, unless decoupled by substantial capacitance (≥ 10µF) near the chip, can cause a high-Q LC
resonance in the hundreds of kHz in the chip’s supplies or
ground reference. This may impair stopband rejection and
other specifications at those frequencies. In stringent filter
applications we have often found that a compact, carefully
laid out printed circuit board with good ground plane
makes a difference in both stopband rejection and distortion. Finally, equipment to measure filter performance can
itself introduce distortion or noise floors. Checking for
these limits with a wire replacing the filter is a prudent
routine procedure.
1564fa
10
LTC1564
U
TYPICAL APPLICATIO S
2-Chip Flexible DSP Front End with Amplification,
Antialias Filtering and A/D Conversion
1µF
2.2µF
10Ω
3
36
AVDD
VREF
*C1 IS A 1000pF NPO, SURFACE MOUNT DEVICE
PLACE AS CLOSE AS POSSIBLE TO THE LTC1608 INPUT PINS
5V 1µF
5V 1µF
35
AVDD
0.1µF
0.1µF
10
DGND
SHDN 33
LTC1608
CONTROL
LOGIC
AND
TIMING
–5V
5V
9
DVDD
4
REFCOMP
7.5k
2.5V
REF
1.75X
+
CS 32
RD 30
BUSY 27
22µF
14 3
+
16
IN
AV
INPUT
LTC1564
OUT
AV
OVDD 29
249Ω
1% METAL FILM
1
249Ω
1% METAL FILM
fC
CS/
HOLD RST
F
4
13 5 6 7 8
1 AIN+
C1*
AGND
15
G
9 10 11 12
2 AIN–
DIFFERENTIAL
ANALOG INPUT
±2.5V
5V OR
3V
1µF
OGND 28
+
16-BIT
SAMPLING
ADC
–
AGND
AGND
5
OUTPUT
BUFFERS
B15 TO B0
AGND
6
7
D15 TO D0
11 TO 26
AGND VSS
8
16-BIT
PARALLEL
BUS
34
1564 TA03
1µF
FILTER CONTROL
ANTIALIAS FILTER/AMP
ADC
–5V
16-Bit Output, Sampling Rate to 500ksps, Analog Bandwidth to 150kHz, Gain to 24dB.
(For More Information, See Linear Technology Magazine, May 2001)
4096-Point FFT Spectrum
with Low Level Input
0
–20
AMPLITUDE (dB)
–
2
V+ EN V–
µP
CONTROL
LINES
CONVST 31
–40
–60
–80
–100
–120
–140
0
25.6
51.2
76.8
102.4
FREQUENCY (kHz)
1564 TA04
Boosting a 100mVRMS Input Signal to Nearly Fill the Input Range of the LTC1608 ADC. Input Frequency of 40kHz,
LTC1608 fSAMPLE = 204.8ksps, LTC1564 is Set for fC = 50kHz and Gain of 16 (F = 0101, G = 1111). Measured THD
is 86dB, HD2 = – 88dB, SNR = 85dB with 100mVRMS Input. Dynamic Range of Approximately 115dB
1564fa
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
11
LTC1564
U
TYPICAL APPLICATIO S
Single Supply, Very Low Noise Input Buffer for High Impedance
Source Driving the Input of LTC1564
Single Supply Differential Output Driver
V+
0.1µF
V+
V+
0.1µF
0.1µF
2
+
RSOURCE
≤10k VIN 3
V+
7
–
LT1677
+
1µF
6
16
15
14
13
12
VSOURCE
11
10
G2
G1
GAIN CODE
VIN
GAIN CODE
IN AGND V + RST G3
4
2.49k
1µF
9
G0
16
15
V + SUPPLY FROM 2.7V TO 10.5V
+ OR GROUND
TIE F AND G PINS TO V
TO SET FREQUENCY AND GAIN
1
2
CS/
EN HOLD F3
3
4
5
F2
F1
6
F0
7
8
13
11
G2
0.1µF
10
G1
9
2.49k
2
–
CS/
EN HOLD F3
3
+
OUT V –
1
2
3
4
5
8
G0
1/2 LT1813
LTC1564
F2
F1
6
1
VOUT+
7
VOUT–
F0
7
2.49k
8
FREQUENCY CODE
FREQUENCY CODE
VOUT
12
IN AGND V + RST G3
LTC1564
OUT V –
14
2.49k
2.49k
6
–
5
+
1564 TA05
V + SUPPLY FROM 4.5V TO 10.5V
+
1/2 LT1813
TIE F AND G PINS TO V OR GROUND
TO SET FREQUENCY AND GAIN.
OUTPUTS DRIVE 100Ω/1000pF LOADS
4
1564 TA06
U
PACKAGE DESCRIPTIO
G Package
16-Lead Plastic SSOP (5.3mm)
(Reference LTC DWG # 05-08-1640)
5.90 – 6.50*
(.232 – .256)
16 15 14 13 12 11 10 9
1.25 ±0.12
5.00 – 5.60**
(.197 – .221)
7.8 – 8.2
7.40 – 8.20
(.291 – .323)
5.3 – 5.7
0° – 8°
0.09 – 0.25
(.0035 – .010)
0.55 – 0.95
(.022 – .037)
0.42 ±0.03
2.0
(.079)
MAX
0.65
(.0256)
BSC
0.65 BSC
NOTE:
1. CONTROLLING DIMENSION: MILLIMETERS
MILLIMETERS
2. DIMENSIONS ARE IN
(INCHES)
0.22 – 0.38
(.009 – .015)
TYP
1 2 3 4 5 6 7 8
RECOMMENDED SOLDER PAD LAYOUT
0.05
(.002)
MIN
3. DRAWING NOT TO SCALE
* DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD
FLASH SHALL NOT EXCEED .152mm (.006") PER SIDE
** DIMENSIONS DO NOT INCLUDE INTERLEAD FLASH.
INTERLEAD FLASH SHALL NOT EXCEED .254mm (.010")
PER SIDE
G16 SSOP 0204
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LTC1560-1
1MHz/500kHz Continuous Time, Lowpass Elliptic Filter
fCUTTOFF = 500kHz or 1MHz
LTC1562/LTC1562-2
Universal 8th Order Active RC Filters
fCUTOFF(MAX) = 150kHz (LTC1562),
fCUTOFF(MAX) = 300kHz (LTC1562-2)
LTC1563-2/LTC1563-3 4th Order Active RC Lowpass Filters
fCUTOFF(MAX) = 256kHz
LTC1565-31
650kHz Continuous Time, Linear Phase Lowpass Filter
7th Order, Differential Inputs and Outputs
LTC1566-1
2.3MHz Continuous Time Lowpass Filter
LTC1569-6/LTC1569-7 Self Clocked, 10th Order Linear Phase Lowpass Filters
7th Order, Differential Input and Outputs
fCLK/fCUTOFF = 64/1, fCUTOFF(MAX) = 75kHz (LTC1569-6),
fCLK/fCUTOFF = 32/1, fCUTOFF(MAX) = 300kHz (LTC1569-7)
1564fa
12
Linear Technology Corporation
LT/TP 0905 REV A • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507
●
www.linear.com
© LINEAR TECHNOLOGY CORPORATION 2001
工商网监
湘ICP备2023018690号
