LTC1657/LTC1657L
Parallel 16-Bit Rail-to-Rail
Micropower DAC
FEATURES
DESCRIPTION
16-Bit Monotonic Over Temperature
nn Deglitched Rail-to-Rail Voltage Output: 8nV•s
nn I : 650µA Typ
CC
nn Maximum DNL Error: ±1LSB
nn Settling Time: 20µs to ±1LSB
nn Built-In Reference: 2.048V (LTC1657)
1.25V (LTC1657L)
nn Internal Power-On Reset to Zero Volts
nn Asynchronous CLR Pin
nn Output Buffer Configurable for Gain of 1 or 2
nn Parallel 16-Bit or 2-Byte Double Buffered Interface
nn Multiplying Capability
nn Narrow 28-Lead SSOP Package
The LTC®1657/LTC1657L are complete single supply, railto-rail voltage output, 16-bit digital-to-analog converters
(DAC) in a 28-pin SSOP package. They include a rail-to-rail
output buffer amplifier, an internal reference and a double
buffered parallel digital interface.
nn
The LTC1657/LTC1657L have separate reference input pins
that can be driven by an external reference. The full-scale
output can be 1 or 2 times the reference voltage depending
on how the X1/X2 pin is connected. The LTC1657 operates
from a 4.5V to 5.5V supply and has an onboard 2.048V
reference. The LTC1657L operates from a 2.7V to 5.5V
supply and has an onboard 1.25V reference.
The LTC1657/LTC1657L are similar to Linear Technology
Corporation’s LTC1450/LTC1450L 12-bit VOUT DAC family,
allowing an upgrade path. They are the only buffered 16-bit
parallel DACs in a 28-lead SSOP package and include an
onboard reference for stand alone performance.
APPLICATIONS
Instrumentation
Digital Calibration
nn Industrial Process Control
nn Automatic Test Equipment
nn Communication Test Equipment
nn
nn
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
BLOCK DIAGRAM
LTC1657: 4.5V TO 5.5V
LTC1657L: 2.7V TO 5.5V
19 D15 (MSB)
MSB
8-BIT
INPUT
REGISTER
14
REFHI
Differential Nonlinearity
vs Input Code
24
VCC
1.0
13
DATA IN FROM
MICROPROCESSOR
DATA BUS
12
16-BIT
DAC
REGISTER
D8
11 D7
10
16-BIT
DAC
+
–
9
8
7
6
VOUT
LSB
8-BIT
INPUT
REGISTER
LTC1657:
25
0V TO 4.096V
LTC1657L:
0V TO 2.5V
0.2
0
–0.8
–1.0
1 WR
2 CSLSB
27 CLR
0.4
–0.6
3 CSMSB
28 LDAC
0.6
–0.4
R
4 D0 (LSB)
FROM
SYSTEM RESET
0.8
–0.2
R
5
FROM
MICROPROCESSOR
DECODE LOGIC
DIFFERENTIAL NONLINEARITY (LSB)
17
15
22
REFOUT
REFERENCE
LTC1657: 2.048V
LTC1657L: 1.25V
18
16
23
POWER-ON
RESET
0
16384
32768
49152
DIGITAL INPUT CODE
65535
1657 TA02
GND
20
REFLO
X1/X2
21
26
1657 TA01
1657lfa
For more information www.linear.com/LTC1657
1
LTC1657/LTC1657L
ABSOLUTE MAXIMUM RATINGS
PACKAGE/ORDER INFORMATION
(Note 1)
TOP VIEW
VCC to GND................................................ –0.5V to 7.5V
TTL Input Voltage, REFHI, REFLO,
X1/X2 ........................................................ –0.5V to 7.5V
VOUT, REFOUT .............................. –0.5V to (VCC + 0.5V)
Operating Temperature Range
LTC1657C/LTC1657LC ............................ 0°C to 70°C
LTC1657I/LTC1657LI .......................... –40°C to 85°C
Maximum Junction Temperature........................... 125°C
Storage Temperature Range.................. –65°C to 150°C
Lead Temperature (Soldering, 10 sec)................... 300°C
WR
1
28 LDAC
CSLSB
2
27 CLR
CSMSB
3
26 X1/X2
(LSB) D0
4
25 VOUT
D1
5
24 VCC
D2
6
23 REFOUT
D3
7
22 REFHI
D4
8
21 REFLO
D5
9
20 GND
D6 10
19 D15 (MSB)
D7 11
18 D14
D8 12
17 D13
D9 13
16 D12
D10 14
15 D11
OBSOLETE PACKAGE
GN PACKAGE
N PACKAGE
28-LEAD PLASTIC SSOP
28-LEAD PDIP
TJMAX = 125°C, θJA = 95°C/W (GN)
TJMAX = 125°C, θJA = 58°C/W (N)
ORDER INFORMATION
LEAD FREE FINISH
TAPE AND REEL
PART MARKING
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LTC1657CGN#PBF
LTC1657CGN#TRPBF
1657CGN
28-Lead Plastic SSOP
0°C to 70°C
LTC1657IGN#PBF
LTC1657IGN#TRPBF
1657IGN
28-Lead Plastic SSOP
–40°C to 85°C
LTC1657LCGN#PBF
LTC1657LCGN#TRPBF
1657LCGN
28-Lead Plastic SSOP
0°C to 70°C
LTC1657LIGN#PBF
LTC1657LIGN#TRPBF
1657LIGN
28-Lead Plastic SSOP
–40°C to 85°C
LTC1657CN#PBF
LTC1657CN#TRPBF
1657CN
28-Lead PDIP
0°C to 70°C
LTC1657IN#PBF
LTC1657IN#TRPBF
1657IN
28-Lead PDIP
–40°C to 85°C
LTC1657LCN#PBF
LTC1657LCN#TRPBF
1657LCN
28-Lead PDIP
0°C to 70°C
LTC1657LIN#PBF
LTC1657LIN#TRPBF
1657LIN
28-Lead PDIP
–40°C to 85°C
OBSOLETE PACKAGE
Consult LTC Marketing for parts specified with wider operating temperature ranges.
Consult LTC Marketing for information on nonstandard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
2
1657lfa
For more information www.linear.com/LTC1657
LTC1657/LTC1657L
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VCC = 4.5V to 5.5V (LTC1657), VCC = 2.7V to 5.5V (LTC1657L),
VOUT unloaded, REFOUT tied to REFHI, REFLO tied to GND, X1/X2 tied to GND, unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
DAC (Note 2)
Resolution
l
16
Bits
Monotonicity
l
16
Bits
DNL
Differential Nonlinearity
Guaranteed Monotonic (Note 3)
l
INL
Integral Nonlinearity
(Note 3)
l
ZSE
Zero Scale Error
VOS
Offset Error
VOSTC
±1
LSB
±4
±12
LSB
2
mV
Measured at Code 200 (LTC1657)
l
±0.3
±3
mV
Measured at Code 200 (LTC1657L)
l
±0.4
±4
mV
l
±2
l
0
Offset Error Tempco
±5
Gain Error
Gain Error Drift
±0.5
µV/°C
±16
LSB
LTC1657
0.5
ppm/°C
LTC1657L
1.0
ppm/°C
Power Supply
VCC
ICC
Positive Supply Voltage
For Specified Performance (LTC1657)
l
4.5
5.5
V
For Specified Performance (LTC1657L)
l
2.7
5.5
V
(Note 4)
l
650
1200
µA
Short-Circuit Current Low
VOUT Shorted to GND
l
70
120
mA
Short-Circuit Current High
VOUT Shorted to VCC
l
80
140
mA
Output Impedance to GND
Input Code = 0 (LTC1657)
l
40
120
Ω
Input Code = 0 (LTC1657L)
l
120
275
Ω
Supply Current
Op Amp DC Performance
Input Code = 65535, LTC1657: VCC = 4.5V to 5.5V
l
4
mV/V
Input Code = 65535, LTC1657L: VCC = 2.7V to 5.5V
l
3
mV/V
Voltage Output Slew Rate
(Note 5)
l
Voltage Output Settling Time
(Note 5) to 0.0015% (16-Bit Settling Time)
(Note 5) to 0.012% (13-Bit Settling Time)
10
µs
Digital Feedthrough
(Note 6)
0.3
nV•s
Midscale Glitch Impulse
DAC Switch Between 8000H and 7FFFH
8
nV•s
Output Voltage Noise Using
Internal Reference at 1kHz
X1/X2 Tied to VOUT (Notes 8, 9)
LTC1657
LTC1657L
165
105
nV/√Hz
nV/√Hz
Output Voltage Noise Using
External Reference at 1kHz
X1/X2 Tied to VOUT (Notes 8, 9, 10)
50
nV/√Hz
Output Voltage Noise Density Using
Internal Reference from 0.1Hz to 10Hz
X1/X2 Tied to VOUT (Notes 8, 9)
8
µVP-P
Output Line Regulation
AC Performance
Reference Input Multiplying BW
±0.3
±0.7
20
700
V/µs
µs
kHz
1657lfa
For more information www.linear.com/LTC1657
3
LTC1657/LTC1657L
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VCC = 4.5V to 5.5V (LTC1657), VCC = 2.7V to 5.5V (LTC1657L),
VOUT unloaded, REFOUT tied to REFHI, REFLO tied to GND, X1/X2 tied to GND, unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Reference Output (REFOUT)
Reference Output Voltage
LTC1657
l
2.036
2.048
2.060
V
LTC1657L
l
1.240
1.250
1.260
V
Reference Output
Temperature Coefficient
Reference Line Regulation
Reference Load Regulation
15
ppm/°C
LTC1657: VCC = 4.5V to 5.5V
l
±1.5
mV/V
LTC1657L: VCC = 2.7V to 5.5V
l
±1.0
mV/V
Measured at IOUT = 100µA (LTC1657)
l
5
mV/A
3
mV/A
Measured at IOUT = 100µA (LTC1657L)
l
Short-Circuit Current
REFOUT Shorted to GND
l
Reference Output Voltage Noise at 1kHz
LTC1657
150
nV/√Hz
LTC1657L
90
nV/√Hz
6
µVP-P
50
Reference Output Voltage Noise
Density from 0.1Hz to 10Hz
100
mA
Reference Input
REFHI, REFLO Input Range
REFHI Input Resistance
4
(Note 7) See Applications Information
X1/X2 Tied to VOUT
X1/X2 Tied to GND
l
l
0
0
LTC1657
l
16
25
kΩ
LTC1657L (Relative to REFLO)
l
16
23
kΩ
VCC – 1.5
VCC/2
V
V
1657lfa
For more information www.linear.com/LTC1657
LTC1657/LTC1657L
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range TA = TMIN to TMAX, VCC = 5V (LTC1657), VCC = 3V (LTC1657L), unless otherwise noted.
LTC1657
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
LTC1657L
MAX
MIN
TYP
MAX
UNITS
Digital I/O
VIH
Digital Input High Voltage
l
2.4
2.0
V
VIL
Digital Input Low Voltage
l
0.8
0.6
V
ILEAK
Digital Input Leakage
VIN = GND to VCC
l
±10
±10
µA
CIN
Digital Input Capacitance
(Note 7)
l
10
10
pF
Switching Characteristics
tCS
CS (MSB or LSB) Pulse Width
l
40
60
ns
tWR
WR Pulse Width
l
40
60
ns
tCWS
CS to WR Setup
l
0
0
ns
tCWH
CS to WR Hold
l
0
0
ns
tDWS
Data Valid to WR Setup
l
40
60
ns
tDWH
Data Valid to WR Hold
l
0
0
ns
tLDAC
LDAC Pulse Width
l
40
60
ns
tCLR
CLR Pulse Width
l
40
60
ns
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: External reference REFHI = 2.2V. VCC = 5V (LTC1657).
External reference REFHI = 1.3V. VCC = 3V (LTC1657L).
Note 3: Nonlinearity is defined from code 128 to code 65535 (full scale).
See Applications Information.
Note 4: Digital inputs at 0V or VCC.
Note 5: DAC switched between all 1s and all 0s. VFS = 4.096V.
Note 6: D0 to D15 toggle between all 0s and all 1s with REFHI = 0V,
CSMSB = CSLSB = WR = LDAC = High
Note 7: Guaranteed by design. Not subject to test.
Note 8: DAC inputs all 1s.
Note 9: X1/X2 tied to GND, the voltage noise will be a factor of 2 greater.
Note 10: Using 2.048V (1.25V) external reference with 3nV/√Hz noise at
1kHz for LTC1657/(LTC1657L).
1657lfa
For more information www.linear.com/LTC1657
5
LTC1657/LTC1657L
TYPICAL PERFORMANCE CHARACTERISTICS
LTC1657L Differential Nonlinearity
LTC1657 Integral Nonlinearity
5
1.6
1.6
4
1.2
0.8
0.4
0
–0.4
–0.8
–1.2
–1.6
–2.0
0
16384
32768
49152
DIGITAL INPUT CODE
65535
INTEGRAL NONLINEARITY (LSB)
2.0
DIFFERENTIAL NONLINEARITY (LSB)
DIFFERENTIAL NONLINEARITY (LSB)
LTC1657 Differential Nonlinearity
2.0
1.2
0.8
0.4
0
–0.4
–0.8
–1.2
0
3
1.6
2
1.4
1
0
–1
–2
2.0
1.6
1.4
125°C
1.0
0.8
0.4
–4
0.2
–5
0
65535
25°C
5
LOAD CURRENT (mA)
0.4
–55°C
5
10
OUTPUT SINK CURRENT (mA)
15
1657 G07
6
0
5
LOAD CURRENT (mA)
10
1657 G06
LTC1657 Full-Scale Voltage
vs Temperature
4.110
125°C
25°C
–55°C
4.105
FULL-SCALE VOLTAGE (V)
OUTPUT PULL-DOWN VOLTAGE (V)
OUTPUT PULL-DOWN VOLTAGE (V)
25°C
0
0
10
0.6
0.6
–55°C
0.2
LTC1657L Minimum Output
Voltage vs Output Sink Current
0.8
25°C
0.8
1657 G05
LTC1657 Minimum Output
Voltage vs Output Sink Current
0
1.0
0.4
–55°C
0
0.4
0.2
0
65535
125°C
1.2
0.6
1657 G04
125°C
16384
32768
49152
DIGITAL INPUT CODE
CODE ALL 1s
∆VOUT ≤ 1LSB
VOUT = 2.5V
1.8
0.6
CODE ALL 0s
∆VOUT ≤ 1LSB
0
1657 G03
CODE ALL 1s
∆VOUT ≤ 1LSB
VOUT = 4.096V
1.2
–3
0.2
–3
LTC1657L Minimum Supply
Headroom for Full Output Swing
vs Load Current
VCC – VOUT (V)
1.8
VCC – VOUT (V)
INTEGRAL NONLINEARITY (LSB)
2.0
4
1.0
–2
1657 G02
LTC1657L Integral Nonlinearity
1.2
0
–1
LTC1657 Minimum Supply
Headroom for Full Output Swing
vs Load Current
5
32768
16384
49152
DIGITAL INPUT CODE
1
–5
65535
32768
16384
49152
DIGITAL INPUT CODE
1657 G01
0
2
–4
–1.6
–2.0
3
CODE ALL 0s
∆VOUT ≤ 1LSB
0
5
10
OUTPUT SINK CURRENT (mA)
15
1657 G08
4.100
4.095
4.090
4.085
4.080
–55
–25
5
35
65
TEMPERATURE (°C)
95
125
1657 G09
1657lfa
For more information www.linear.com/LTC1657
LTC1657/LTC1657L
TYPICAL PERFORMANCE CHARACTERISTICS
LTC1657L Full-Scale Voltage
vs Temperature
LTC1657 Offset Error
vs Temperature
2.500
1.0
1.0
0.9
0.8
0.8
0.6
0.7
0.4
OFFSET (mV)
2.505
OFFSET (mV)
FULL-SCALE VOLTAGE (V)
2.510
0.6
0.5
2.490
–55
–25
5
35
65
TEMPERATURE (°C)
95
–0.4
–0.6
0.1
– 0.8
–10
35
80
TEMPERATURE (°C)
1657 G10
2.0
5
4
3
2
680
1.6
660
1.4
1.2
1.0
0.8
0.6
0.4
0
0.2
1
2
3
4
LOGIC INPUT VOLTAGE (V)
700
VCC = 3V
1.8
1
5
5
0
1
2
LOGIC INPUT VOLTAGE (V)
VCC = 5V
580
VCC = 4.5V
560
500
–55 –35 –15
3
510
VCC = 2.7V
480
5 25 45 65 85 105 125
TEMPERATURE (°C)
1657 G15
LTC1657L
Large-Signal Transient Response
5
VOUT UNLOADED
TA = 25°C
VOUT UNLOADED
TA = 25°C
4
OUTPUT VOLTAGE (V)
OUTPUT VOLTAGE (V)
SUPPLY CURRENT (µA)
VCC = 3.3V
VCC = 3V
600
520
4
540
490
VCC = 5.5V
LTC1657
Large-Signal Transient Response
550
520
620
1657 G14
560
530
640
540
1657 G13
LTC1657L Supply Current
vs Temperature
125
LTC1657 Supply Current
vs Temperature
SUPPLY CURRENT (µA)
SUPPLY CURRENT (mA)
SUPPLY CURRENT (mA)
7
6
–10
35
80
TEMPERATURE (°C)
1657 G12
LTC1657L Supply Current
vs Logic Input Voltage
VCC = 5V
0
–1.0
–55
125
1657 G11
LTC1657 Supply Current
vs Logic Input Voltage
8
0
0.2
0
–55
125
0.2
–0.2
0.4
0.3
2.495
500
LTC1657L Offset Error
vs Temperature
3
2
3
2
1
1
0
0
470
460
–55 –35 –15
5 25 45 65 85 105 125
TEMPERATURE (°C)
1657 G16
TIME (20µs/DIV)
TIME (20µs/DIV)
1657 G17
1657 G18
1657lfa
For more information www.linear.com/LTC1657
7
LTC1657/LTC1657L
TYPICAL PERFORMANCE CHARACTERISTICS
LTC1657L 0.1Hz to 10Hz
Voltage Noise
1µV/DIV
1µV/DIV
LTC1657 0.1Hz to 10Hz
Voltage Noise
0
1
2
3
4 5 6
TIME (SEC)
7
8
9
10
0
1
1659 G19
2
3
4 5 6
TIME (SEC)
7
8
9
10
1659 G20
PIN FUNCTIONS
WR (Pin 1): Write Input (Active Low). Used with CSMSB
and/or CSLSB to control the input registers. While WR
and CSMSB and/or CSLSB are held low, data writes into
the input register.
CSLSB (Pin 2): Chip Select Least Significant Byte (Active
Low). Used with WR to control the LSB 8-bit input registers.
While WR and CSLSB are held low, the LSB byte writes
into the LSB input register. Can be connected to CSMSB
for simultaneous loading of both sets of input latches on
a 16-bit bus.
CSMSB (Pin 3): Chip Select Most Significant Byte (Active Low). Used with WR to control the MSB 8-bit input
registers. While WR and CSMSB are held low, the MSB
byte writes into the MSB input register. Can be connected
to CSLSB for simultaneous loading of both sets of input
latches on a 16-bit bus.
D0 to D7 (Pins 4 to 11): Input data for the Least Significant
Byte. Written into LSB input register when WR = 0 and
CSLSB = 0.
D8 to D15 (Pins 12 to 19): Input data for the Most Significant Byte. Written into MSB input register when WR = 0
and CSMSB = 0.
REFLO (Pin 21): Lower input terminal of the DAC’s internal
resistor ladder. Typically connected to Analog Ground. An
input code of (0000)H will connect the positive input of
the output buffer to this end of the ladder. Can be used
to offset the zero scale above ground.
REFHI (Pin 22): Upper input terminal of the DAC’s internal
resistor ladder. Typically connected to REFOUT. An input
code of (FFFF)H will connect the positive input of the output
buffer to 1LSB below this voltage.
REFOUT (Pin 23): Output of the internal reference is 2.048V
(LTC1657), 1.25V (LTC1657L). Typically connected to
REFHI to drive internal DAC resistor ladder.
VCC (Pin 24): Positive Power Supply Input. 4.5V ≤ VCC ≤
5.5V (LTC1657), 2.7V ≤ VCC ≤ 5.5V (LTC1657L). Requires
a 0.1µF bypass capacitor to ground.
VOUT (Pin 25): Buffered DAC Output.
X1/X2 (Pin 26): Gain Setting Resistor Pin. Connect to GND
for G = 2 or to VOUT for G = 1. This pin should always be
tied to a low impedance source, such as ground or VOUT,
to ensure stability of the output buffer when driving capacitive loads.
GND (Pin 20): Ground.
8
1657lfa
For more information www.linear.com/LTC1657
LTC1657/LTC1657L
PIN FUNCTIONS
CLR (Pin 27): Clear Input (Asynchronous Active Low). A
low on this pin asynchronously resets all input and DAC
registers to 0s.
LDAC (Pin 28): Load DAC (Asynchronous Active Low).
Used to asynchronously transfer the contents of the input
registers to the DAC register which updates the output
voltage. If held low, the DAC register loads data from the
input registers which will immediately update VOUT.
DIGITAL INTERFACE TRUTH TABLE
CLR
CSMSB
CSLSB
WR
LDAC
FUNCTION
L
X
X
X
X
H
X
X
X
L
Loads DAC register with contents of input registers
H
X
X
X
H
Freezes contents of DAC register
H
L
H
L
X
Writes MSB byte into MSB input register
H
H
L
L
X
Writes LSB byte into LSB input register
H
L
L
L
X
Writes MSB and LSB bytes into MSB and LSB input registers
H
X
X
H
X
Inhibits write to MSB and LSB input registers
H
H
X
X
X
Inhibits write to MSB input register
H
X
H
X
X
Inhibits write to LSB input register
H
L
L
L
L
Data bus flows directly through input and DAC registers
Clears input and DAC registers to zero
TIMING DIAGRAM
t CS
CSLSB
CSMSB
t CS
t CWS
t WR
t CWH
t WR
WR
t LDAC
LDAC
t DWS
DATA
t DWH
DATA VALID
DAC UPDATE
DATA VALID
1657 TD
1657lfa
For more information www.linear.com/LTC1657
9
LTC1657/LTC1657L
DEFINITIONS
Resolution (n): Resolution is defined as the number of
digital input bits (n). It defines the number of DAC output
states (2n) that divide the full-scale range. Resolution does
not imply linearity.
Full-Scale Voltage (VFS): This is the output of the DAC
when all bits are set to 1.
Voltage Offset Error (VOS): Normally, the DAC offset is
the voltage at the output when the DAC is loaded with
all zeros. The DAC can have a true negative offset, but
because the part is operated from a single supply, the
output cannot go below zero. If the offset is negative, the
output will remain near 0V resulting in the transfer curve
shown in Figure 1.
OUTPUT
VOLTAGE
NEGATIVE
OFFSET
0V
DAC CODE
1657 F01
Figure 1. Effect of Negative Offset
The offset of the part is measured at the code that corresponds to the maximum offset specification:
VOS = VOUT – [(Code)(VFS)/(2n – 1)]
Least Significant Bit (LSB): One LSB is the ideal voltage
difference between two successive codes.
LSB = G • VREF/65536
DAC Transfer Characteristic:
REFHI – REFLO
(CODE ) + REFLO
VOUT = G •
65536
G = 1 for X1/X2 connected to VOUT
G = 2 for X1/X2 connected to GND
CODE = Decimal equivalent of digital input
(0 ≤ CODE ≤ 65535)
Zero-Scale Error (ZSE): The output voltage when the DAC
is loaded with all zeros. Since this is a single supply part,
this value cannot be less than 0V.
Integral Nonlinearity (INL): End-point INL is the maximum
deviation from a straight line passing through the end
points of the DAC transfer curve. Because the part operates
from a single supply and the output cannot go below zero,
the linearity is measured between full scale and the code
corresponding to the maximum offset specification. The
INL error at a given input code is calculated as follows:
INL (In LSBs) = [VOUT – VOS – (VFS – VOS)
(code/65535)]
VOUT = The output voltage of the DAC measured at
the given input code
Differential Nonlinearity (DNL): DNL is the difference
between the measured change and the ideal one LSB
change between any two adjacent codes. The DNL error
between any two codes is calculated as follows:
DNL = (∆VOUT – LSB)/LSB
∆VOUT = The measured voltage difference between
two adjacent codes
G = 1 for X1/X2 connected to VOUT
G = 2 for X1/X2 connected to GND
Nominal LSBs: (VREFOUT tie to VREFHI, REFLO tie to GND,
G = 2)
LTC1657 LSB = 4.096V/65536 = 62.5µV
Digital Feedthrough: The glitch that appears at the analog
output caused by AC coupling from the digital inputs when
they change state. The area of the glitch is specified in nV•s.
LTC1657L LSB = 2.5V/65536 = 38.1µV
10
1657lfa
For more information www.linear.com/LTC1657
LTC1657/LTC1657L
OPERATION
Parallel Interface
The data on the input of the DAC is written into the DAC’s
input registers when Chip Select (CSLSB and/or CSMSB)
and WR are at a logic low. The data that is written into the
input registers will depend on which of the Chip Selects
are at a logic low (see Digital Interface Truth Table). If WR
and CSLSB are both low and CSMSB is high, then only
data on the eight LSBs (D0 to D7) is written into the input
registers. Similarly, if WR and CSMSB are both low and
CSLSB is high, then only data on the eight MSBs (D8 to
D15) is written into the input registers. Data is written
into both the Least Significant Data Bits (D0 to D7) and
the Most Significant Bits (D8 to D15) at the same time if
WR, CSLSB and CSMSB are low. If WR is high or both
CSMSB and CSLSB are high, then no data is written into
the input registers.
Once data is written into the input registers, it can be
written into the DAC register. This will update the analog
voltage output of the DAC. The DAC register is written by
a logic low on LDAC. The data in the DAC register will be
held when LDAC is high.
When WR, CSLSB, CSMSB and LDAC are all low, the
registers are transparent and data on pins D0 to D15 flows
directly into the DAC register.
the resistor ladder can be driven by an external source in
multiplying applications. The external reference or source
must be capable of driving the 16k (minimum) DAC ladder resistance.
Internal reference output noise can be reduced with a
bypass capacitor to ground. (Note: The reference does
not require a bypass capacitor to ground for nominal
operation.) When bypassing the reference, a small value
resistor in series with the capacitor is recommended to
help reduce peaking on the output. A 10Ω resistor in series
with a 4.7µF capacitor is optimum for reducing reference
generated noise. Internal reference output voltage noise
spectral density at 1kHz is typically 150nV/√Hz (LTC1657),
90nV/√Hz (LTC1657L).
DAC Resistor Ladder
The high and low end of the DAC ladder resistor string
(REFHI and REFLO, respectively) are not connected internally on this part. Typically, REFHI will be connected
to REFOUT and REFLO will be connected to GND. X1/X2
connected to GND will give the LTC1657/LTC1657L a
full-scale output swing of 4.096V/2.5V.
For an 8-bit data bus connection, tie the MSB byte data
pins to their corresponding LSB byte pins (D15 to D7,
D14 to D6, etc).
Either of these pins can be driven up to VCC – 1.5V when
using the buffer in the gain-of-1 configuration. The resistor string pins can be driven to VCC/2 when the buffer is
in the gain of 2 configuration. The resistance between
these two pins is typically 25k (16k min) (LTC1657), 23k
(16k min) (LTC1657L).
Power-On Reset
Voltage Output
The LTC1657/LTC1657L have an internal power-on reset
that resets all internal registers to 0’s on power-up and
VOUT pin forces to GND (equivalent to the CLR pin function).
Reference
The LTC1657/LTC1657L include an internal 2.048V/1.25V
reference, giving the LTC1657/LTC1657L a full-scale
range of 4.096V/2.5V in the gain-of-2 configuration. The
onboard reference in the LTC1657/LTC1657L is not internally connected to the DAC’s reference resistor string
but is provided on an adjacent pin for flexibility. Because
the internal reference is not internally connected to the
DAC resistor ladder, an external reference can be used or
The output buffer for the LTC1657/LTC1657L can be
configured for two different gain settings. By tying the
X1/X2 pin to GND, the gain is set to 2. By tying the X1/X2
pin to VOUT, the gain is set to unity.
The LTC1657/LTC1657L rail-to-rail buffered output can
source or sink 5mA within 500mV of the positive supply
voltage or ground at room temperature. The output stage
is equipped with a deglitcher that results in a midscale
glitch impulse of 8nV•s. The output swings to within a
few millivolts of either supply rail when unloaded and has
an equivalent output resistance of 40Ω (LTC1657), 120Ω
(LTC1657L) when driving a load to the rails.
1657lfa
For more information www.linear.com/LTC1657
11
LTC1657/LTC1657L
APPLICATION INFORMATION
Rail-to-Rail Output Considerations
In any rail-to-rail DAC, the output swing is limited to voltages within the supply range.
If the DAC offset is negative, the output for the lowest
codes limits at 0V as shown in Figure 1b.
Similarly, limiting can occur near full scale when the REF
pin is tied to VCC /2. If VREF = VCC/2 and the DAC full-scale
error (FSE) is positive, the output for the highest codes
limits at VCC as shown in Figure 1c. No full-scale limiting
can occur if VREF is less than (VCC – FSE)/2.
Offset and linearity are defined and tested over the region
of the DAC transfer function where no output limiting
can occur.
VCC
VREF = VCC /2
POSITIVE
FSE
OUTPUT
VOLTAGE
INPUT CODE
(c)
VCC
VREF = VCC /2
OUTPUT
VOLTAGE
0
32768
INPUT CODE
(a)
65535
OUTPUT
VOLTAGE
NEGATIVE
OFFSET
0V
INPUT CODE
(b)
1657 F02
Figure 2. Effects of Rail-to-Rail Operation On a DAC Transfer Curve. (a) Overall Transfer Function (b) Effect of Negative Offset for
Codes Near Zero Scale (c) Effect of Positive Full-Scale Error for Input Codes Near Full Scale When VREF = VCC/2
12
1657lfa
For more information www.linear.com/LTC1657
LTC1657/LTC1657L
APPLICATIONS INFORMATION
This circuit shows how to make a bipolar output 16-bit
DAC with a wide output swing using an LTC1657 and an
LT1077. R1 and R2 resistively divide down the LTC1657
output and an offset is summed in using the LTC1657
onboard 2.048V reference and R3 and R4. R5 ensures
that the onboard reference is always sourcing current and
never has to sink any current even when VOUT is at full
scale. The LT1077 output will have a wide bipolar output
swing of –4.096V to 4.096V as shown in the figure below.
With this output swing, 1LSB = 125µV.
A Wide Swing, Bipolar Output 16-Bit DAC
5V
0.1µF
24
5:19
2
µP
3
1
28
27
VCC
DATA (0:15)
CSLSB
CSMSB
VOUT
LTC1657
WR
LDAC
CLR
X1/X2 REFLO GND
26
21
REFHI REFOUT
20
22
23
25
R1
100k
1%
R2
200k
1%
5V
3
2
7
+
LT1077
–
R3
100k
1%
6
VOUT:
(2)(DIN)(4.096)
– 4.096V
65536
4
R4
– 5V 200k
1%
1657 TA05
R5
100k
1%
TRANSFER CURVE
4.096
VOUT
0
32768
65535
DIN
– 4.096
1657lfa
For more information www.linear.com/LTC1657
13
LTC1657/LTC1657L
TYPICAL APPLICATIONS
This circuit shows a digitally programmable current source
from an external voltage source using an external op amp,
an LT1218 and an NPN transistor (2N3440). Any digital
word from 0 to 65535 is loaded into the LTC1657 and
its output correspondingly swings from 0V to 4.096V.
This voltage will be forced across the resistor RA. If RA
is chosen to be 412Ω, the output current will range from
0mA at zero scale to 10mA at full scale. The minimum
voltage for VS is determined by the load resistor RL and
Q1’s VCESAT voltage. With a load resistor of 50Ω, the voltage source can be 5V.
Digitally Programmable Current Source
5V
22
5:19
2
µP
3
1
28
27
DATA (0:15)
23
CSLSB
CSMSB
LTC1657
WR
VOUT
25
3
+
X1/X2 REFLO GND
26
21
20
2
–
RL
7
LT1218
LDAC
CLR
5V < VS < 100V
FOR RL ≤ 50Ω
0.1μF
REFHI REFOUT VCC
6
Q1
2N3440
(DIN)(4.096)
(65536)(RA)
≈ 0mA TO 10mA
IOUT =
4
RA
412Ω
1%
1657 TA04
14
1657lfa
For more information www.linear.com/LTC1657
LTC1657/LTC1657L
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
GN Package
28-Lead Plastic SSOP (Narrow .150 Inch)
(Reference LTC DWG # 05-08-1641 Rev B)
.386 – .393*
(9.804 – 9.982)
.045 ±.005
28 27 26 25 24 23 22 21 20 19 18 17 1615
.254 MIN
.033
(0.838)
REF
.150 – .165
.229 – .244
(5.817 – 6.198)
.0165 ±.0015
.150 – .157**
(3.810 – 3.988)
.0250 BSC
1
RECOMMENDED SOLDER PAD LAYOUT
.015 ±.004
× 45°
(0.38 ±0.10)
.0075 – .0098
(0.19 – 0.25)
2 3
4
5 6
7
8
.0532 – .0688
(1.35 – 1.75)
9 10 11 12 13 14
.004 – .0098
(0.102 – 0.249)
0° – 8° TYP
.016 – .050
(0.406 – 1.270)
.008 – .012
(0.203 – 0.305)
TYP
NOTE:
1. CONTROLLING DIMENSION: INCHES
INCHES
2. DIMENSIONS ARE IN
(MILLIMETERS)
.0250
(0.635)
BSC
GN28 REV B 0212
3. DRAWING NOT TO SCALE
4. PIN 1 CAN BE BEVEL EDGE OR A DIMPLE
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
**DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
1657lfa
For more information www.linear.com/LTC1657
15
LTC1657/LTC1657L
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
N Package
28-Lead Plastic PDIP (Narrow .300 Inch)
(Reference LTC DWG # 05-08-1510 Rev I)
1.400*
(35.560)
MAX
28
27
26
25
24
23
22
21
20
19
18
17
16
15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
.240 – .295*
(6.096 – 7.493)
.045 – .065
(1.143 – 1.651)
.130 ±.005
(3.302 ±0.127)
.020
(0.508)
MIN
.120
(3.048)
MIN
.065
(1.651)
TYP
N28 REV I 0711
.005
(0.127)
MIN
.100
(2.54)
BSC
.018 ±.003
(0.457 ±0.076)
NOTE:
1. DIMENSIONS ARE
INCHES
MILLIMETERS
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .010 INCH (0.254mm)
OBSOLETE PACKAGE
16
1657lfa
For more information www.linear.com/LTC1657
LTC1657/LTC1657L
REVISION HISTORY
REV
DATE
DESCRIPTION
A
07/15
Obsoleted 28-Lead PDIP Package
PAGE NUMBER
2, 16
1657lfa
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection
of its circuits
as described
herein will not infringe on existing patent rights.
For more
information
www.linear.com/LTC1657
17
LTC1657/LTC1657L
TYPICAL APPLICATION
This circuit shows how to measure negative offset. Since
LTC1657/LTC1657L operate on a single supply, if their
offset is negative, the output for code 0 limits at 0V. To
measure this negative offset, a negative supply is needed,
connect resistor R1 as shown in the figure. The output
voltage is the offset when code 0 is loaded in.
Negative Offset Measurement
5V
22
5:19
2
3
µP
1
28
27
23
24
0.1µF
REFHI REFOUT VCC
DATA (0:15)
CSLSB
CSMSB
LTC1657/LTC1657L
WR
VOUT
R1
100k
LDAC
CLR
25
X1/X2 REFLO GND
26
21
–5V
20
1657 TA06
Although LTC1657 output is up to 4.096V with its internal
reference, higher voltages can be achieved with the help
of another op amp. The following circuit shows how to
increase the output swing of LTC1657 by using an LT1218.
As shown in the configuration, the output of LTC1657 is
amplified by 8 for an output swing of 0V to 32.768V, or a
convenient 0.5mV/LSB.
A Higher Voltage Output DAC
5V
22
5:19
2
µP
3
1
28
27
DATA (0:15)
23
0.1µF 36V
24
32.768 (V)
0.1µF
CSLSB
CSMSB
LTC1657
WR
VOUT
25
3
+
7
6
LT1218
LDAC
CLR
TRANSFER CURVE
REFHI REFOUT VCC
2
X1/X2 REFLO GND
26
21
–
20
R1
1k
1%
VOUT =
4
( )
VOUT
(DIN)(4.096)
R2
1+
65536
R1
0
R2
6.98k
1%
DIN
65535
1657 TA07
RELATED PARTS
PART NUMBER DESCRIPTION
COMMENTS
LTC1446(L)
Dual 12-Bit VOUT DACs in SO-8 Package
VCC = 5V (3V), VOUT = 0V to 4.095V (0V to 2.5V)
LTC1450(L)
Single 12-Bit VOUT DACs with Parallel Interface
VCC = 5V (3V), VOUT = 0V to 4.095V (0V to 2.5V)
LTC1458(L)
Quad 12-Bit Rail-to-Rail Output DACs with Added Functionality
VCC = 5V (3V), VOUT = 0V to 4.095V (0V to 2.5V)
LTC1650
Single 16-Bit VOUT Industrial DAC in 16-Pin SO
VCC = ±5V, Low Power, Deglitched, 4-Quadrant Multiplying VOUT
LTC1654
Dual 14-Bit VOUT DAC
Programmable Speed/Power, SO-8 Footprint
LTC1655(L)
Single 16-Bit VOUT DAC with Serial Interface in SO-8
VCC = 5V (3V), Low Power, Deglitched, VOUT = 0V to 4.096V
(0V to 2.5V)
LTC1658
Single 14-Bit VOUT DAC in MSOP Package
2.7V to 5.5V Operation, Low Power
18 Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
For more information www.linear.com/LTC1657
(408) 432-1900 ● FAX: (408) 434-0507
●
www.linear.com/LTC1657
1657lfa
LT 0715 REV A • PRINTED IN USA
LINEAR TECHNOLOGY CORPORATION 1999
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