LTC1772B
Constant Frequency
Current Mode Step-Down
DC/DC Controller in SOT-23
FEATURES
DESCRIPTION
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The LTC®1772B is a constant frequency current mode
step-down DC/DC controller providing excellent AC and
DC load and line regulation. The device incorporates an
accurate undervoltage lockout feature that shuts down the
LTC1772B when the input voltage falls below 2.0V.
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Burst Mode® Operation Disabled for Lower Output
Ripple at Light Loads
High Efficiency: Up to 94%
High Output Currents Easily Achieved
Wide VIN Range: 2.5V to 9.8V
Constant Frequency 550kHz Operation
Low Dropout: 100% Duty Cycle
Output Voltage Down to 0.8V
Current Mode Operation for Excellent Line and Load
Transient Response
Shutdown Mode Draws Only 8µA Supply Current
Tiny 6-Lead TSOT-23 Package
The LTC1772B provides a ± 2.5% output voltage accuracy
and consumes only 270μA of quiescent current. In shutdown, the device draws a mere 8μA.
To further maximize the life of a battery source, the
external P-channel MOSFET is turned on continuously
in dropout (100% duty cycle). High constant operating
frequency of 550kHz allows the use of a small external
inductor.
APPLICATIONS
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The LTC1772B is available in a small footprint 6-lead
TSOT-23.
One or Two Lithium-Ion-Powered Applications
Cellular Telephones
Wireless Devices
Portable Computers
Distributed 3.3V, 2.5V or 1.8V Power Systems
For a Burst Mode operation enabled version of the
LTC1772B, please refer to the LTC1772 data sheet.
L, LT, LTC, LTM and Burst Mode are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
TYPICAL APPLICATION
Efficiency vs Load Current*
C1
10μF
10V
1
ITH/RUN PGATE
6
2
220pF
3
VIN
GND
VFB
SENSE–
5
4
D1
+
C2A
47μF
6V
LTC1772
Burst Mode
OPERATION
90
L1
M1 4.7μH
LTC1772B
10k
95
C2B
1μF
10V
VOUT
2.5V
2A
174k
EFFICIENCY (%)
R1
0.03Ω
100
VIN
2.5V
TO 9.8V
85
80
75
LTC1772B
NON-Burst Mode
OPERATION
70
C1: TAIYO YUDEN LMK325BJ106K-T
C2A: SANYO 6TPA47M
C2B: AVX 0805ZC105KAT1A
D1: MOTOROLA MBRM120T3
L1: MURATA LQN6C-4R7
M1: FAIRCHILD FDC638P
R1: IRC LRC-LR1206-01-R030F
80.6k
65
60
1772 F01a
VIN = 3.6V
VOUT = 2.5V
10
100
1000
10000
LOAD CURRENT (mA)
*OUTPUT RIPPLE WAVEFORMS FOR THE CIRCUIT
OF FIGURE 1 APPEAR IN FIGURE 2.
1772 F01b
Figure 1. High Efficiency, High Output Current 2.5V/2A Regulator
1772bfa
1
LTC1772B
ABSOLUTE MAXIMUM RATINGS
PIN CONFIGURATION
(Note 1)
Input Supply Voltage (VIN) .........................– 0.3V to 10V
SENSE–, PGATE Voltages ...............–0.3V to (VIN + 0.3V)
VFB, ITH/RUN Voltages............................... –0.3V to 2.4V
PGATE Peak Output Current (< 10µs) ........................ 1A
Storage Ambient Temperature Range.....– 65°C to 150°C
Operating Temperature Range (Note 2).... –40°C to 85°C
Junction Temperature (Note 3) ............................ 150°C
Lead Temperature (Soldering, 10 sec) .................. 300°C
TOP VIEW
6 PGATE
ITH/RUN 1
5 VIN
GND 2
4 SENSE–
VFB 3
S6 PACKAGE
6-LEAD PLASTIC TSOT-23
TJMAX = 150°C, θJA = 230°C/W
ORDER INFORMATION
LEAD FREE FINISH
TAPE AND REEL
PART MARKING*
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LTC1772BES6#PBF
LTC1772BES6#TRPBF
LTVU
6-Lead Plastic TSOT Package
–40°C to 85°C
LTC1772BIS6#PBF
LTC1772BIS6#TRPBF
LTVU
6-Lead Plastic TSOT Package
–40°C to 85°C
LEAD BASED FINISH
TAPE AND REEL
PART MARKING*
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LTC1772BES6
LTC1772BES6#TR
LTVU
6-Lead Plastic TSOT Package
–40°C to 85°C
LTC1772BIS6
LTC1772BIS6#TR
LTVU
6-Lead Plastic TSOT Package
–40°C to 85°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 4.2V unless otherwise specified. (Note 2)
PARAMETER
CONDITIONS
Input DC Supply Current
Normal Operation
Shutdown
UVLO
Typicals at VIN = 4.2V (Note 4)
2.4V ≤ VIN ≤ 9.8V, PGATE Logic High
2.4V ≤ VIN ≤ 9.8V, VITH/RUN = 0V
VIN < UVLO Threshold
Undervoltage Lockout Threshold
VIN Falling
VIN Rising
Shutdown Threshold (at ITH/RUN)
Start-Up Current Source
MIN
TYP
MAX
UNITS
270
8
6
420
22
10
μA
μA
μA
l
1.55
1.85
2.00
2.10
2.35
2.40
V
V
l
0.15
0.35
0.55
V
0.25
0.5
0.85
μA
0.780
0.770
0.800
0.800
0.820
0.830
V
V
VITH/RUN = 0V
l
l
Regulated Feedback Voltage
0°C to 70°C (Note 5)
–40°C to 85°C (Note 5)
Output Voltage Line Regulation
2.4V ≤ VIN ≤ 9.8V (Note 5)
0.05
mV/V
Output Voltage Load Regulation
ITH/RUN Sinking 5μA (Note 5)
ITH/RUN Sourcing 5μA (Note 5)
2.5
2.5
mV/μA
mV/μA
1772bfa
2
LTC1772B
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 4.2V unless otherwise specified. (Note 2)
PARAMETER
CONDITIONS
VFB Input Current
(Note 5)
Overvoltage Protect Threshold
Measured at VFB
MIN
0.820
Overvoltage Protect Hysteresis
TYP
MAX
10
50
nA
0.860
0.895
V
20
UNITS
mV
Oscillator Frequency
VFB = 0.8V
VFB = 0V
Gate Drive Rise Time
CLOAD = 3000pF
40
ns
Gate Drive Fall Time
CLOAD = 3000pF
40
ns
Peak Current Sense Voltage
(Note 6)
105
mV
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTC1772BE is guaranteed to meet specifications from 0°C to
85°C. Specifications over the –40°C to 85°C operating temperature range
are assured by design, characterization and correlation with statistical
process controls. The LTC1772BI is guaranteed to meet specifications over
the full –40°C to 85°C operating temperature range.
500
550
120
650
kHz
kHz
Note 3: TJ is calculated from the ambient temperature TA and power
dissipation PD according to the following formula:
TJ = TA + (PD • θJA°C/W)
Note 4: Dynamic supply current is higher due to the gate charge being
delivered at the switching frequency.
Note 5: The LTC1772B is tested in a feedback loop that servos VFB to the
output of the error amplifier.
Note 6: Peak current sense voltage is reduced dependent on duty cycle to
a percentage of value as given in Figure 2.
1772bfa
3
LTC1772B
TYPICAL PERFORMANCE CHARACTERISTICS
Reference Voltage
vs Temperature
10
VIN = 4.2V
8
VFB VOLTAGE (mV)
815
810
805
800
795
790
785
2.20
6
2.16
4
2.12
2
0
–2
–4
–6
780
775
–55 –35 –15
2.24
VIN = 4.2V
TRIP VOLTAGE (V)
820
NORMALIZED FREQUENCY (%)
825
Undervoltage Lockout Trip
Voltage vs Temperature
Normalized Oscillator Frequency
vs Temperature
5 25 45 65 85 105 125
TEMPERATURE (°C)
2.00
1.96
1.84
–55 –35 –15
5 25 45 65 85 105 125
TEMPERATURE (°C)
1772 G02
Maximum (VIN – SENSE –) Voltage
vs Duty Cycle
1772 G03
Shutdown Threshold
vs Temperature
600
VIN = 4.2V
TA = 25°C
110
2.04
1.88
–10
–55 –35 –15
1772 G01
120
2.08
1.92
–8
5 25 45 65 85 105 125
TEMPERATURE (°C)
VIN FALLING
560
VIN = 4.2V
ITH/RUN VOLTAGE (mV)
TRIP VOLTAGE (mV)
520
100
90
80
70
60
440
400
360
320
280
50
40
20
480
240
30
40
50 60 70 80
DUTY CYCLE (%)
90
100
1772 G04
200
–55 –35 –15
5 25 45 65 85 105 125
TEMPERATURE (°C)
1772 G05
1772bfa
4
LTC1772B
PIN FUNCTIONS
ITH/RUN (Pin 1): This pin performs two functions. It
serves as the error amplifier compensation point as well
as the run control input. Nominal voltage range for this
pin is 0.85V to 1.9V. Forcing this pin below 0.35V causes
the device to be shut down. In shutdown all functions are
disabled and the PGATE pin is held high.
GND (Pin 2): Ground Pin.
SENSE – (Pin 4): The Negative Input to the Current Comparator.
VIN (Pin 5): Supply Pin. Must be closely decoupled to
GND Pin 2.
PGATE (Pin 6): Gate Drive for the External P-channel
MOSFET. This pin swings from 0V to VIN.
VFB (Pin 3): Receives the feedback voltage from an external
resistive divider across the output.
FUNCTIONAL DIAGRAM
VIN
SENSE–
5
4
+
15mV
ICMP
–
VIN
RS1
SLOPE
COMP
OSC
PGATE
SWITCHING
LOGIC AND
BLANKING
CIRCUIT
R
Q
S
6
–
FREQ
FOLDBACK
OVP
0.3V
+
SHORT-CIRCUIT
DETECT
EAMP
+
–
VREF
+
60mV
+
VREF
0.8V
0.5μA
VFB
+
–
1 ITH/RUN
3
VIN
VIN
–
0.35V
VOLTAGE
REFERENCE
SHDN
CMP
–
GND
2
+
VREF
0.8V
UNDERVOLTAGE
LOCKOUT
SHDN
UV
1.2V
1772FD
1772bfa
5
LTC1772B
OPERATION
(Refer to Functional Diagram)
Main Control Loop
Low Load Current Operation
The LTC1772B is a constant frequency current mode
switching regulator. During normal operation, the external
P-channel power MOSFET is turned on each cycle when
the oscillator sets the RS latch (RS1) and turned off when
the current comparator (ICMP) resets the latch. The peak
inductor current at which ICMP resets the RS latch is
controlled by the voltage on the ITH/RUN pin, which is the
output of the error amplifier EAMP. An external resistive
divider connected between VOUT and ground allows the
EAMP to receive an output feedback voltage VFB. When
the load current increases, it causes a slight decrease in
VFB relative to the 0.8V reference, which in turn causes the
ITH/RUN voltage to increase until the average inductor
current matches the new load current.
Under very light load current conditions, the ITH/RUN pin
voltage will be very close to the zero current level of 0.85V.
As the load current decreases further, an internal offset at
the current comparator input will assure that the current
comparator remains tripped (even at zero load current) and
the regulator will start to skip cycles, as it must, in order
to maintain regulation. This behavior allows the regulator
to maintain constant frequency down to very light loads,
resulting in less low frequency noise generation over a
wide load current range.
The main control loop is shut down by pulling the ITH/RUN
pin low. Releasing ITH/RUN allows an internal 0.5μA current
source to charge up the external compensation network.
When the ITH/RUN pin reaches 0.35V, the main control
loop is enabled with the ITH/RUN voltage then pulled up
to its zero current level of approximately 0.85V. As the
external compensation network continues to charge up,
the corresponding output current trip level follows, allowing normal operation.
Comparator OVP guards against transient overshoots
> 7.5% by turning off the external P-channel power
MOSFET and keeping it off until the fault is removed.
Figure 2 illustrates this result for the circuit of Figure 1
using both an LTC1772 in Burst Mode operation and an
LTC1772B (non-Burst Mode operation). At an output current of 100mA, the Burst Mode operation part exhibits
an output ripple of approximately 60mVP-P, whereas the
non-Burst Mode operation part has an output ripple of only
20mVP-P. At lower output current levels, the improvement
is even greater. This comes at a tradeoff of lower efficiency
for the non-Burst Mode operation part (see Figure 1). Also
notice the constant frequency operation of the LTC1772B,
even at 5% of maximum output current.
Dropout Operation
When the input supply voltage decreases towards the
output voltage, the rate of change of inductor current
during the ON cycle decreases. This reduction means
VOUT Ripple for Figure 1 Circuit Using
LTC1772 Burst Mode Operation.
VOUT Ripple for Figure 1 Circuit Using
LTC1772B Non-Burst Mode Operation.
20mVAC/DIV
20mVAC/DIV
VIN = 3.6V
VOUT = 2.5V
IOUT = 100mA
5μs/DIV
1772 F02a
VIN = 3.6V
VOUT = 2.5V
IOUT = 100mA
5μs/DIV
1772 F02b
Figure 2. Output Ripple Waveforms for the Circuit of Figure 1.
1772bfa
6
LTC1772B
OPERATION
(Refer to Functional Diagram)
that the external P-channel MOSFET will remain on for
more than one oscillator cycle since the inductor current
has not ramped up to the threshold set by EAMP. Further
reduction in input supply voltage will eventually cause the
P-channel MOSFET to be turned on 100%, i.e., DC. The
output voltage will then be determined by the input voltage minus the voltage drop across the MOSFET, the sense
resistor and the inductor.
Undervoltage Lockout
To prevent operation of the P-channel MOSFET below safe
input voltage levels, an undervoltage lockout is incorporated into the LTC1772B. When the input supply voltage
drops below approximately 2.0V, the P-channel MOSFET
and all circuitry is turned off except the undervoltage block,
which draws only several microamperes.
Short-Circuit Protection
When the output is shorted to ground, the frequency of
the oscillator will be reduced to about 120kHz. This lower
frequency allows the inductor current to safely discharge,
thereby preventing current runaway. The oscillator’s fre-
quency will gradually increase to its designed rate when
the feedback voltage again approaches 0.8V.
Overvoltage Protection
As a further protection, the overvoltage comparator in
the LTC1772B will turn the external MOSFET off when
the feedback voltage has risen 7.5% above the reference
voltage of 0.8V. This comparator has a typical hysteresis
of 20mV.
Slope Compensation and Inductor’s Peak Current
The inductor’s peak current is determined by:
IPK =
VITH – 0.85
(
10 RSENSE
)
when the LTC1772B is operating below 40% duty
cycle. However, once the duty cycle exceeds 40%, slope
compensation begins and effectively reduces the peak
inductor current. The amount of reduction is given by the
curves in Figure 3.
110
100
SF = IOUT/IOUT(MAX) (%)
90
80
70
60
50
IRIPPLE = 0.4IPK
AT 5% DUTY CYCLE
IRIPPLE = 0.2IPK
AT 5% DUTY CYCLE
40
30
20
VIN = 4.2V
10
0
10 20 30 40 50 60 70 80 90 100
DUTY CYCLE (%)
1772 F03
Figure 3. Maximum Output Current vs Duty Cycle
1772bfa
7
LTC1772B
APPLICATIONS INFORMATION
The basic LTC1772B application circuit is shown in Figure 1.
External component selection is driven by the load requirement and begins with the selection of L1 and RSENSE (= R1).
Next, the power MOSFET, M1 and the output diode D1 is
selected followed by CIN (= C1)and COUT(= C2).
RSENSE Selection for Output Current
The inductance value also has a direct effect on ripple
current. The ripple current, IRIPPLE, decreases with higher
inductance or frequency and increases with higher VIN or
VOUT. The inductor’s peak-to-peak ripple current is given
by:
IRIPPLE =
VIN VOUT VOUT + VD
f (L ) VIN + VD
RSENSE is chosen based on the required output current.
With the current comparator monitoring the voltage developed across RSENSE, the threshold of the comparator
determines the inductor’s peak current. The output current
the LTC1772B can provide is given by:
0.105 IRIPPLE
IOUT =
−
RSENSE
2
where f is the operating frequency. Accepting larger values
of IRIPPLE allows the use of low inductances, but results
in higher output voltage ripple and greater core losses.
A reasonable starting point for setting ripple current is
IRIPPLE = 0.4(IOUT(MAX)). Remember, the maximum IRIPPLE
occurs at the maximum input voltage.
where IRIPPLE is the inductor peak-to-peak ripple current
(see Inductor Value Calculation section).
The ripple current is normally set such that the inductor current is continuous down to approximately 1/4 of
maximum load current. This results in:
A reasonable starting point for setting ripple current is
IRIPPLE = (0.4)(IOUT). Rearranging the above equation, it
becomes:
0.0875
RSENSE =
for Duty Cycle < 40%
IOUT
However, for operation that is above 40% duty cycle, slope
compensation effect has to be taken into consideration to
select the appropriate value to provide the required amount
of current. Using Figure 3, the value of RSENSE is:
RSENSE =
(0.0875)SF
( )
IOUT 100
Inductor Value Calculation
The operating frequency and inductor selection are interrelated in that higher operating frequencies permit the use
of a smaller inductor for the same amount of inductor ripple
current. However, this is at the expense of efficiency due
to an increase in MOSFET gate charge losses.
IRIPPLE ≤
0.03
RSENSE
This implies a minimum inductance of:
LMIN =
VIN VOUT VOUT + VD
0.03 VIN + VD
f
RSENSE
(Use VIN(MAX) = VIN)
A smaller value than L MIN could be used in the circuit;
however, the inductor current transitioning from continuous
to discontinuous will occur at a higher load current.
Power MOSFET Selection
An external P-channel power MOSFET must be selected
for use with the LTC1772B. The main selection criteria for
the power MOSFET are the threshold voltage VGS(TH) and
the “on” resistance RDS(ON), reverse transfer capacitance
CRSS and total gate charge.
1772bfa
8
LTC1772B
APPLICATIONS INFORMATION
Since the LTC1772B is designed for operation down to low
input voltages, a logic level threshold MOSFET (RDS(ON)
guaranteed at VGS = 2.5V) is required for applications that
work close to this voltage. When these MOSFETs are used,
make sure that the input supply to the LTC1772B is less
than the absolute maximum VGS rating, typically 8V.
The required minimum RDS(ON) of the MOSFET is governed
by its allowable power dissipation. For applications that
may operate the LTC1772B in dropout, i.e., 100% duty
cycle, at its worst case the required RDS(ON) is given by:
R DS(ON)
=
DC=100%
PP
2
(IOUT(MAX)) (1+ p)
Under normal load conditions, the average current conducted by the diode is:
V V
ID = IN OUT IOUT
VIN + VD
The allowable forward voltage drop in the diode is calculated
from the maximum short-circuit current as:
VF ≈
PD
ISC(MAX)
where PD is the allowable power dissipation and will be
determined by efficiency and/or thermal requirements.
where PP is the allowable power dissipation and δp is the
temperature dependency of RDS(ON). (1 + δp) is generally
given for a MOSFET in the form of a normalized RDS(ON)
vs temperature curve, but δp = 0.005/°C can be used as
an approximation for low voltage MOSFETs.
A fast switching diode must also be used to optimize
efficiency. Schottky diodes are a good choice for low
forward drop and fast switching times. Remember to
keep lead length short and observe proper grounding (see
Board Layout Checklist) to avoid ringing and increased
dissipation.
In applications where the maximum duty cycle is less
than 100% and the LTC1772B is in continuous mode, the
RDS(ON) is governed by:
CIN and COUT Selection
R DS(ON)
PP
(DC) IOUT2 (1+ p)
where DC is the maximum operating duty cycle of the
LTC1772B.
Output Diode Selection
The catch diode carries load current during the off-time.
The average diode current is therefore dependent on the
P-channel switch duty cycle. At high input voltages the
diode conducts most of the time. As VIN approaches VOUT
the diode conducts only a small fraction of the time. The
most stressful condition for the diode is when the output
is short-circuited. Under this condition the diode must
safely handle IPEAK at close to 100% duty cycle. Therefore,
it is important to adequately specify the diode peak current and average power dissipation so as not to exceed
the diode ratings.
In continuous mode, the source current of the P-channel MOSFET is a square wave of duty cycle (VOUT + VD)/
(VIN + VD). To prevent large voltage transients, a low
ESR input capacitor sized for the maximum RMS current
must be used. The maximum RMS capacitor current is
given by:
C IN Required IRMS ≈ IMAX
[V (V
OUT
IN − VOUT
1/ 2
)]
VIN
This formula has a maximum value at VIN = 2VOUT, where
IRMS = IOUT /2. This simple worst-case condition is commonly used for design because even significant deviations
do not offer much relief. Note that capacitor manufacturer’s
ripple current ratings are often based on 2000 hours of life.
This makes it advisable to further derate the capacitor, or
to choose a capacitor rated at a higher temperature than
required. Several capacitors may be paralleled to meet the
1772bfa
9
LTC1772B
APPLICATIONS INFORMATION
The selection of COUT is driven by the required effective
series resistance (ESR). Typically, once the ESR requirement is satisfied, the capacitance is adequate for filtering.
The output ripple (ΔVOUT) is approximated by:
1
VOUT IRIPPLE ESR +
4fC OUT
where f is the operating frequency, COUT is the output
capacitance and IRIPPLE is the ripple current in the inductor. The output ripple is highest at maximum input voltage
since ΔIL increases with input voltage.
Manufacturers such as Nichicon, United Chemicon and
Sanyo should be considered for high performance throughhole capacitors. The OS-CON semiconductor dielectric
capacitor available from Sanyo has the lowest ESR (size)
product of any aluminum electrolytic at a somewhat higher
price. Once the ESR requirement for COUT has been met,
the RMS current rating generally far exceeds the IRIPPLE(P-P)
requirement.
Low Supply Operation
Although the LTC1772B can function down to approximately 2.0V, the maximum allowable output current is
reduced when VIN decreases below 3V. Figure 4 shows
the amount of change as the supply is reduced down to
2V. Also shown in Figure 4 is the effect of VIN on VREF as
VIN goes below 2.3V.
Setting Output Voltage
The regulated output voltage is determined by:
R2
VOUT = 0.8 1+
R1
Efficiency Considerations
The efficiency of a switching regulator is equal to the output
power divided by the input power times 100%. It is often
useful to analyze individual losses to determine what is
limiting the efficiency and which change would produce
the most improvement. Efficiency can be expressed as:
Efficiency = 100% – (η1 + η2 + η3 + ...)
where η1, η2, etc. are the individual losses as a percentage of input power.
Although all dissipative elements in the circuit produce
losses, four main sources usually account for most of
the losses in LTC1772B circuits: 1) LTC1772B DC bias
105
NORMALIZED VOLTAGE (%)
size or height requirements in the design. Due to the high
operating frequency of the LTC1772B, ceramic capacitors
can also be used for CIN. Always consult the manufacturer
if there is any question.
VREF
100
VITH
95
90
85
80
75
2.0
2.2
3.0
2.4
2.6
2.8
INPUT VOLTAGE (V)
1772 F03
Figure 4. Line Regulation of VREF and VITH
VOUT
LTC1772B
3
VFB
R2
R1
1772 F04
Figure 5. Setting Output Voltage
For most applications, an 80k resistor is suggested for
R1. To prevent stray pickup, locate resistors R1 and R2
close to LTC1772B.
1772bfa
10
LTC1772B
APPLICATIONS INFORMATION
current, 2) MOSFET gate charge current, 3) I2R losses
and 4) voltage drop of the output diode.
1. The VIN current is the DC supply current, given in the
electrical characteristics, that excludes MOSFET driver
and control currents. VIN current results in a small loss
which increases with VIN.
2. MOSFET gate charge current results from switching
the gate capacitance of the power MOSFET. Each time a
MOSFET gate is switched from low to high to low again,
a packet of charge dQ moves from VIN to ground. The
resulting dQ/dt is a current out of VIN which is typically
much larger than the DC supply current. In continuous
mode, IGATECHG = f(Qp).
3.
I2R
losses are predicted from the DC resistances of
the MOSFET, inductor and current shunt. In continuous mode the average output current flows through L
but is “chopped” between the P-channel MOSFET (in
series with RSENSE) and the output diode. The MOSFET
RDS(ON) plus RSENSE multiplied by duty cycle can be
summed with the resistances of L and RSENSE to obtain
I2R losses.
4. The output diode is a major source of power loss at
high currents and gets worse at high input voltages.
The diode loss is calculated by multiplying the forward
voltage times the diode duty cycle multiplied by the
load current. For example, assuming a duty cycle of
50% with a Schottky diode forward voltage drop of
0.4V, the loss increases from 0.5% to 8% as the load
current increases from 0.5A to 2A.
5. Transition losses apply to the external MOSFET and
increase at higher operating frequencies and input
voltages. Transition losses can be estimated from:
Transition Loss = 2(VIN)2IO(MAX)CRSS(f)
Other losses including CIN and COUT ESR dissipative losses,
and inductor core losses, generally account for less than
2% total additional loss.
Foldback Current Limiting
As described in the Output Diode Selection, the worst-case
dissipation occurs with a short-circuited output when the
diode conducts the current limit value almost continuously.
To prevent excessive heating in the diode, foldback current
limiting can be added to reduce the current in proportion
to the severity of the fault.
Foldback current limiting is implemented by adding diodes
DFB1 and DFB2 between the output and the ITH/RUN pin as
shown in Figure 6. In a hard short (VOUT = 0V), the current
will be reduced to approximately 50% of the maximum
output current.
VOUT
LTC1772B
R2
ITH/RUN VFB
+
DFB1
R1
DFB2
1772 F05
Figure 6. Foldback Current Limiting
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11
LTC1772B
APPLICATIONS INFORMATION
PC Board Layout Checklist
4. Connect the end of RSENSE as close to VIN (Pin 5) as
possible. The VIN pin is the SENSE + of the current
comparator.
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of
the LTC1772B. These items are illustrated graphically in
the layout diagram in Figure 7. Check the following in
your layout:
5. Is the trace from SENSE – (Pin 4) to the Sense resistor
kept short? Does the trace connect close to RSENSE?
6. Keep the switching node PGATE away from sensitive
small signal nodes.
1. Is the Schottky diode closely connected between ground
(Pin 2) and drain of the external MOSFET?
7. Does the VFB pin connect directly to the feedback
resistors? The resistive divider R1 and R2 must be
connected between the (+) plate of COUT and signal
ground.
2. Does the (+) plate of CIN connect to the sense resistor
as closely as possible? This capacitor provides AC
current to the MOSFET.
3. Is the input decoupling capacitor (0.1μF) connected
closely between VIN (Pin 5) and ground (Pin 2)?
1
ITH/RUN PGATE
CIN
LTC1772B
RITH
2
GND
VIN
5
3
VFB
SENSE–
L1
RSENSE
0.1μF
CITH
VIN
+
6
4
VOUT
M1
+
D1
COUT
R1
BOLD LINES INDICATE HIGH CURRENT PATHS
R2
1772 F06
Figure 7. LTC1772B Layout Diagram (See PC Board Layout Checklist)
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12
LTC1772B
TYPICAL APPLICATIONS
LTC1772B High Efficiency, Small Footprint 3.3V to 1.8V/0.5A Regulator
1
R4
10k
C3
220pF
ITH/RUN PGATE
6
L1
M1 10μH
LTC1772B
2
3
GND
VFB
VIN
5
4
SENSE–
VIN
3.3V
C1
10μF
10V
R1
0.15Ω
D1
+
C2
47μF
6V
C1: TAIYO YUDEN CERAMIC
L1: COILTRONICS UP1B-100
LMK325BJ106K-T
M1: Si3443DV
C2: SANYO POSCAP 6TPA47M R1: DALE 0.25W
D1: MOTOROLA MBRM120T3
VOUT
1.8V
0.5A
R2
100k
R3
80.6k
1772 TA02
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13
LTC1772B
TYPICAL APPLICATIONS
LTC1772B 5V/0.5A Flyback Regulator
R1
0.033Ω
1
R4
10k
C3
220pF
ITH/RUN PGATE
6
C1
10μF
10V
VIN
2.5V
TO 9.8V
M1
LTC1772B
2
3
GND
VFB
VIN
SENSE–
5
4
D1
VOUT
5V
0.5A
T1
•
10μH
+
10μH
•
C1: TAIYO YUDEN CERAMIC
LMK325BJ106K-T
C2: AVXTPSE107M010R0100
D1: IR10BQ015
M1: Si9803
R1: DALE 0.25W
T1: COILTRONICS CTX10-4
C2
100μF
10V
×2
R2
52.3k
R3
10k
1772 TA04
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14
LTC1772B
PACKAGE DESCRIPTION
S6 Package
6-Lead Plastic TSOT-23
(Reference LTC DWG # 05-08-1636)
0.62
MAX
2.90 BSC
(NOTE 4)
0.95
REF
1.22 REF
3.85 MAX 2.62 REF
1.4 MIN
2.80 BSC
1.50 – 1.75
(NOTE 4)
PIN ONE ID
RECOMMENDED SOLDER PAD LAYOUT
PER IPC CALCULATOR
0.30 – 0.45
6 PLCS (NOTE 3)
0.95 BSC
0.80 – 0.90
0.20 BSC
0.01 – 0.10
1.00 MAX
DATUM ‘A’
0.30 – 0.50 REF
0.09 – 0.20
(NOTE 3)
1.90 BSC
S6 TSOT-23 0302 REV B
NOTE:
1. DIMENSIONS ARE IN MILLIMETERS
2. DRAWING NOT TO SCALE
3. DIMENSIONS ARE INCLUSIVE OF PLATING
4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR
5. MOLD FLASH SHALL NOT EXCEED 0.254mm
6. JEDEC PACKAGE REFERENCE IS MO-193
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Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
15
LTC1772B
TYPICAL APPLICATION
LTC1772B 3.3V to 5V/1A Boost Regulator
R1
0.033Ω
VIN
3.3V
C1
47μF
16V
×2
L1
4.7μH
D1
U1
1
R4
10k
C3
220pF
ITH/RUN PGATE
6
3
VIN
GND
VFB
C1: AVXTPSE476M016R0047
C2: AVXTPSE107M010R0100
D1: IR10BQ015
SENSE–
5
4
M1
+
3
LTC1772B
2
2
5
VOUT
5V
1A
C2
100μF
10V
×2
4
L1: MURATA LQN6C-4R7
M1: Si9804
R1: DALE 0.25W
R2
422k
U1: FAIRCHILD NC7SZ04
ALSO SEE LTC1872
FOR THIS APPLICATION
R3
80.6k
1772 TA03
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
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No Need for 5V Supply, Uses Standard Logic Gate
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550kHz, 2 Phase, Dual Synchronous Controller
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High Efficiency 5V to 3.3V Conversion at up to 15A
LTC1771
Ultra-Low Supply Current Step-Down DC/DC Controller
10μA Supply Current, 93% Efficiency, 1.23V ≤ VOUT ≤ 18V;
2.8V ≤ VIN ≤ 20V
LTC1772
Constant Frequency Current Mode Step-Down
DC/DC Controller in SOT-23
With Burst Mode Operation for Higher Efficiency at Light Load
Current
LTC1773
95% Efficient Synchronous Step-Down Controller
2.65V ≤ VIN ≤ 8.5V; 0.8V ≤ VOUT ≤ VIN; Current Mode; 550kHz
LTC1872
SOT-23 Step-Up Controller
2.5V ≤ VIN ≤ 9.8V; 550kHz; 90% Efficiency
No RSENSE is a trademark of Linear Technology Corporation.
1772bfa
16 Linear Technology Corporation
LT 0508 REV A • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507
●
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