0
登录后你可以
  • 下载海量资料
  • 学习在线课程
  • 观看技术视频
  • 写文章/发帖/加入社区
创作中心
发布
  • 发文章

  • 发资料

  • 发帖

  • 提问

  • 发视频

创作活动
LTC1877EMS8#TRPBF

LTC1877EMS8#TRPBF

  • 厂商:

    AD(亚德诺)

  • 封装:

    MSOP8

  • 描述:

    LTC1877EMS8#TRPBF

  • 数据手册
  • 价格&库存
LTC1877EMS8#TRPBF 数据手册
LTC1877 High Efficiency Monolithic Synchronous Step-Down Regulator DESCRIPTION FEATURES n n n n n n n n n n n n n n n High Efficiency: Up to 95% Very Low Quiescent Current: Only 10μA During Operation 600mA Output Current at VIN = 5V 2.65V to 10V Input Voltage Range 550kHz Constant-Frequency Operation No Schottky Diode Required Low Dropout Operation: 100% Duty Cycle Synchronizable from 400kHz to 700kHz Selectable Burst Mode® Operation or Pulse-Skipping Mode 0.8V Reference Allows Low Output Voltages Shutdown Mode Draws < 1μA Supply Current ±2% Output Voltage Accuracy Current Mode Control for Excellent Line and Load Transient Response Overcurrent and Overtemperature Protected Available in 8-Lead MSOP Package The LTC®1877 s a high efficiency monolithic synchronous buck regulator using a constant-frequency, current mode architecture. Supply current during operation is only 10μA and drops to < 1μA in shutdown. The 2.65V to 10V input voltage range makes the LTC1877 ideally suited for both single and dual Li-Ion battery-powered applications. 100% duty cycle provides low dropout operation, extending battery life in portable systems. Switching frequency is internally set at 550kHz, allowing the use of small surface mount inductors and capacitors. For noise sensitive applications the LTC1877 can be externally synchronized from 400kHz to 700kHz. Burst Mode operation is inhibited during synchronization or when the SYNC/MODE pin is pulled low, preventing low frequency ripple from interfering with audio circuitry. The internal synchronous switch increases efficiency and eliminates the need for an external Schottky diode. Low output voltages are easily supported with the 0.8V feedback reference voltage. The LTC1877 is available in a space saving 8-lead MSOP package. Lower input voltage applications (less than 7V abs max) should refer to the LTC1878 data sheet. APPLICATIONS n n n n n n Cellular Telephones Wireless Modems Personal Information Appliances Portable Instruments Distributed Power Systems Battery-Powered Equipment L, LT, LTC, LTM, Linear Technology, the Linear logo and Burst Mode are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. TYPICAL APPLICATION Efficiency vs Output Current 100 High Efficiency Step-Down Converter 5 SW SYNC 6 LTC1877 VIN 1 RUN 3 2 ITH GND VFB 7 10μF** CER 10μH* 20pF + 47μF*** 887k 280k 220pF VIN = 10V 85 80 75 VIN = 7.2V VIN = 5V 70 65 4 *TOKO D62CB A920CY-100M **TAIYO-YUDEN CERAMIC LMK325BJ106MN ***SANYO POSCAP 6TPA47M † VOUT CONNECTED TO VIN FOR 2.65V < VIN < 3.3V VIN = 3.6V 90 † VOUT 3.3V EFFICIENCY (%) VIN 2.65V TO 10V 95 60 55 50 0.1 1877 TA01 VOUT = 3.3V L = 10μH Burst Mode OPERATION 1.0 100 10 OUTPUT CURRENT (mA) 1000 1877 TA02 1877fb 1 LTC1877 ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION (Note 1) Input Supply Voltage (VIN) ..........................–0.3V to 11V ITH, PLL LPF Voltage ................................. –0.3V to 2.7V RUN, VFB Voltages ...................................... –0.3V to VIN SYNC/MODE Voltage .................................. –0.3V to VIN SW Voltage ................................... –0.3V to (VIN + 0.3V) P-Channel MOSFET Source Current (DC)............ 800mA N-Channel MOSFET Sink Current (DC)................ 800mA Peak SW Sink and Source Current .......................... 1.5A Operating Temperature Range (Note 2) .....–40°C to 85°C Junction Temperature (Note 3) ............................ 125°C Storage Temperature Range .................. –65°C to 150°C Lead Temperature (Soldering, 10 sec)................... 300°C TOP VIEW RUN ITH VFB GND 1 2 3 4 8 7 6 5 PLL LPF SYNC/MODE VIN SW MS8 PACKAGE 8-LEAD PLASTIC MSOP TJMAX = 125°C, θJA = 150°C/W ORDER INFORMATION LEAD FREE FINISH TAPE AND REEL PART MARKING PACKAGE DESCRIPTION TEMPERATURE RANGE LTC1877EMS8#PBF LTC1877EMS8#TRPBF LTLU 8-Lead Plastic MSOP –40°C to 85°C LTC1877IMS8#PBF LTC1877IMS8#TRPBF LTLV 8-Lead Plastic MSOP –40°C to 85°C Consult LTC Marketing for parts specified with wider operating temperature ranges. Consult LTC Marketing for information on non-standard lead based finish parts. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VIN = 5V unless otherwise specified. SYMBOL PARAMETER CONDITIONS IVFB Feedback Current (Note 4) l MIN VFB Regulated Output Voltage (Note 4) 0°C ≤ TA ≤ 85°C (Note 4) –40°C ≤ TA ≤ 85°C l ΔVOVL Output Overvoltage Lockout ΔVOVL = VOVL – VFB l ΔVFB Reference Voltage Line Regulation VIN = 2.65V to 10V (Note 4) VLOADREG Output Voltage Load Regulation Measured in Servo Loop; VITH = 0.9V to 1.2V Measured in Servo Loop; VITH = 1.6V to 1.2V VIN Input Voltage Range IQ Input DC Bias Current Pulse-Skipping Mode Burst Mode Operation Shutdown (Note 5) 2.65V < VIN < 10V, VSYNC/MODE = 0V, IOUT = 0A VSYNC/MODE = VIN, IOUT = 0A VRUN = 0V, VIN = 10V fOSC Oscillator Frequency VFB = 0.8V VFB = 0V fSYNC SYNC Capture Range TYP MAX 4 30 nA 0.784 0.74 0.8 0.8 0.816 0.84 V V 20 50 110 mV 0.05 0.15 %/V 0.1 –0.1 0.5 –0.5 % % 10 V 230 10 0 350 15 1 μA μA μA 550 80 605 kHz kHz 700 kHz l l l 2.65 495 400 UNITS 1877fb 2 LTC1877 ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VIN = 5V unless otherwise specified. SYMBOL PARAMETER CONDITIONS IPLL LPF Phase Detector Output Current Sinking Capability Sourcing Capability fPLLIN < fOSC fPLLIN > fOSC l l MIN TYP MAX UNITS 3 –3 10 –10 20 –20 μA μA RPFET RDS(ON) of P-Channel MOSFET ISW = 100mA 0.65 0.85 Ω RNFET RDS(ON) of N-Channel MOSFET ISW = –100mA 0.75 0.95 Ω IPK Peak Inductor Current VFB = 0.7V, Duty Cycle < 35% 1.0 1.25 A ILSW SW Leakage VRUN = 0V, VSW = 0V or 8.5V, VIN = 8.5V ±0.01 ±1 μA VSYNC/MODE SYNC/MODE Threshold 1.0 1.5 V ±0.01 ±1 μA 0.7 1.5 V ±0.01 ±1 μA ISYNC/MODE SYNC/MODE Leakage Current VRUN RUN Threshold IRUN RUN Input Current Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The LTC1877E is guaranteed to meet specifications from 0°C to 85°C. Specifications over the –40°C to 85°C operating temperature range are assured by design, characterization and correlation with statistical process controls. The LTC1877I is guaranteed over the full –40°C to 85°C operating temperature range. 0.8 l 0.3 l 0.3 Note 3: TJ is calculated from the ambient temperature TA and power dissipation PD according to the following formulas: LTC1877EMS8: TJ = TA + (PD)(150°C/W) Note 4: The LTC1877 is tested in a feedback loop which servos VFB to the balance point for the error amplifier (VITH = 1.2V). Note 5: Dynamic supply current is higher due to the gate charge being delivered at the switching frequency. TYPICAL PERFORMANCE CHARACTERISTICS Efficiency vs Input Voltage ILOAD = 100mA I LOAD = 10mA 95 90 80 85 70 ILOAD = 300mA 80 ILOAD = 1mA 75 70 ILOAD = 0.1mA 65 60 2 6 8 4 INPUT VOLTAGE (V) VIN = 3.6V 90 VIN = 7.2V 85 VIN = 7.2V VIN = 3.6V 50 40 PULSE-SKIPPING MODE Burst Mode OPERATION 20 10 50 0 60 30 VOUT = 2.5V L = 10μH Burst Mode OPERATION 55 Efficiency vs Output Current 95 90 EFFICIENCY (%) EFFICIENCY (%) Efficiency vs Output Current 100 10 12 1877 G01 0 0.1 VOUT = 2.5V L = 10μH 1.0 100 10 OUTPUT CURRENT (mA) 1000 1877 G02 EFFICIENCY (%) 100 L = 15μH L = 10μH 80 75 70 65 60 55 0.1 VIN = 10V VOUT = 3.3V Burst Mode OPERATION 1.0 100 10 OUTPUT CURRENT (mA) 1000 1877 G03 1877fb 3 LTC1877 TYPICAL PERFORMANCE CHARACTERISTICS Efficiency vs Output Current Oscillator Frequency vs Temperature Reference Voltage vs Temperature 605 0.814 95 VIN = 5V VIN = 3.6V 90 EFFICIENCY (%) VIN = 10V VIN = 5V 75 70 65 60 50 0.1 0.799 0.794 545 535 50 25 75 0 TEMPERATURE (°C) 100 495 –50 125 2.53 595 2.52 585 2.51 555 545 535 525 100 RDS(ON) vs Input Voltage PULSE-SKIPPING MODE VIN = 4.2V L = 10μH 1.0 2.50 SYNCHRONOUS SWITCH 0.8 2.49 2.48 2.47 0.6 MAIN SWITCH 0.4 2.46 2.45 515 125 1.2 RDS(ON) (Ω) 565 25 50 75 0 TEMPERATURE (°C) 1877 G06 Output Voltage vs Load Current 605 575 –25 1877 G05 OUTPUT VOLTAGE (V) OSCILLATOR FREQUENCY (kHz) 555 515 0.784 –50 –25 Oscillator Frequency vs Supply Voltage 0.2 2.44 505 2.43 0 2 6 8 4 SUPPLY VOLTAGE (V) 10 200 600 400 LOAD CURRENT (mA) 0 12 0.8 VIN = 5V 0.6 SYNCHRONOUS SWITCH MAIN SWITCH 50 25 75 0 TEMPERATURE (°C) VOUT = 1.8V 150 100 50 125 1877 G10 8 9 10 PULSE-SKIPPING MODE 200 150 100 50 Burst Mode OPERATION 100 3 4 5 6 7 INPUT VOLTAGE (V) 2 VIN = 5V 250 200 SUPPLY CURRENT (μA) DC SUPPLY CURRENT (μA) 1.2 0.2 –50 –25 300 PULSE-SKIPPING MODE VIN = 3V 1 DC Supply Current vs Temperature 250 1.0 0 1877 G09 DC Supply Current vs Input Voltage RDS(ON) vs Temperature 1.4 0.4 0 800 1877 G08 1877 G07 RDS(ON) (Ω) 565 525 1877 G04 495 575 505 1000 1.0 100 10 OUTPUT CURRENT (mA) 0.804 0.789 L = 10μH VOUT = 2.5V 55 585 FREQUENCY (kHz) VIN = 7.2V 80 REFERENCE VOLTAGE (V) 0.809 85 VIN = 5V 595 Burst Mode OPERATION 0 0 2 6 4 INPUT VOLTAGE (V) 8 10 1877 G11 0 –50 –25 50 25 75 0 TEMPERATURE (°C) 100 125 1877 G11b 1877fb 4 LTC1877 TYPICAL PERFORMANCE CHARACTERISTICS Switch Leakage vs Temperature Switch Leakage vs Input Voltage 1400 VIN = 10V RUN = 0V 1000 MAIN SWITCH 800 600 400 SYNCHRONOUS SWITCH 200 RUN = 0V SW 5V/DIV 12 10 50 25 75 0 TEMPERATURE (°C) 100 6 4 0 125 VOUT 20mV/DIV AC COUPLED SYNCHRONOUS SWITCH 8 IL 200mA/DIV 2 0 –50 –25 Burst Mode Operation 14 SWITCH LEAKAGE (nA) SWITCH LEAKAGE (nA) 1200 16 MAIN SWITCH 0 2 4 6 INPUT VOLTAGE (V) 8 1877 G12 10 1877 G13 Start-Up from Shutdown VIN = 5V VOUT = 1.5V CIN = 10μF 10μs/DIV L = 10μH COUT = 47μF ILOAD = 50mA 1877 G14 Load Step Response RUN 5V/DIV VOUT 50mV/DIV AC COUPLED VOUT 1V/DIV IL 500mA/DIV IL 500mA/DIV ITH 1V/DIV 50μs/DIV 1877 G16 1877 G15 CIN = 10μF COUT = 47μF ILOAD = 500mA VIN = 5V VOUT = 1.5V L = 10μH VIN = 5V VOUT = 1.5V L = 10μH Load Step Response 40μs/DIV CIN = 10μF COUT = 47μF ILOAD = 50mA TO 500mA PULSE-SKIPPING MODE Load Step Response VOUT 50mV/DIV AC COUPLED VOUT 50mV/DIV AC COUPLED IL 500mA/DIV 10Ms/DIV IL 500mA/DIV ITH 1V/DIV ITH 1V/DIV VIN = 5V VOUT = 1.5V L = 10μH 1877 G17 40μs/DIV CIN = 10μF COUT = 47μF ILOAD = 50mA TO 500mA Burst Mode OPERATION 1877 G18 VIN = 5V VOUT = 1.5V L = 10μH 20μs/DIV CIN = 10μF COUT = 47μF ILOAD = 200mA TO 500mA PULSE-SKIPPING MODE 1877fb 5 LTC1877 PIN FUNCTIONS RUN (Pin 1): Run Control Input. Forcing this pin below 0.4V shuts down the LTC1877. In shutdown, all functions are disabled drawing 6.25% by turning the main switch off and keeping it off until the fault is removed. Burst Mode Operation The LTC1877 is capable of Burst Mode operation in which the internal power MOSFETs operate intermittently based on load demand. To enable Burst Mode operation, simply tie the SYNC/MODE pin to VIN or connect it to a logic high (VSYNC/MODE > 1.5V). To disable Burst Mode operation and enable PWM pulse-skipping mode, connect the SYNC/MODE pin to GND. In this mode, the efficiency is lower at light loads, but becomes comparable to Burst Mode operation when the output load exceeds 50mA. The advantage of pulse-skipping mode is lower output ripple and less interference to audio circuitry. When the converter is in Burst Mode operation, the peak current of the inductor is set to approximately 250mA, even though the voltage at the ITH pin indicates a lower value. The voltage at the ITH pin drops when the inductor’s average current is greater than the load requirement. As the ITH voltage drops below approximately 0.55V, the BURST comparator trips, causing the internal sleep line to go high and forces off both power MOSFETs. The ITH pin is then disconnected from the output of the EA amplifier and parked a diode voltage above ground. In sleep mode, both power MOSFETs are held off and a majority of the internal circuitry is partially turned off, reducing the quiescent current to 10μA. The load current is now being supplied solely from the output capacitor. When the output voltage drops, the ITH pin reconnects to the output of the EA amplifier and the top MOSFET is again turned on and this process repeats. Short-Circuit Protection When the output is shorted to ground, the frequency of the oscillator is reduced to about 80kHz, one-seventh the nominal frequency. This frequency foldback ensures that the inductor current has ample time to decay, thereby preventing runaway. The oscillator’s frequency will progressively increase to 550kHz (or the synchronized frequency) when VFB rises above 0.3V. Frequency Synchronization A phase-locked loop (PLL) is available on the LTC1877 to allow the internal oscillator to be synchronized to an external source connected to the SYNC/MODE pin. The output of the phase detector at the PLL LPF pin operates over a 0V to 2.4V range corresponding to 400kHz to 700kHz. When locked, the PLL aligns the turn-on of the top MOSFET to the rising edge of the synchronizing signal. When the LTC1877 is clocked by an external source, Burst Mode operation is disabled; the LTC1877 then operates in PWM pulse-skipping mode. In this mode, when the output load is very low, current comparator ICOMP may remain tripped for several cycles and force the main switch to stay off for the same number of cycles. Increasing the output load slightly allows constant-frequency PWM operation to resume. This mode exhibits low output ripple as well as low audio noise and reduced RF interference while providing reasonable low current efficiency. Frequency synchronization is inhibited when the feedback voltage VFB is below 0.6V. This prevents the external clock from interfering with the frequency foldback for shortcircuit protection. 1877fb 8 LTC1877 OPERATION Dropout Operation When the input supply voltage decreases toward the output voltage, the duty cycle increases toward the maximum on-time. Further reduction of the supply voltage forces the main switch to remain on for more than one cycle until it reaches 100% duty cycle. The output voltage will then be determined by the input voltage minus the voltage drop across the internal P-channel MOSFET and the inductor. Low Supply Operation The LTC1877 is designed to operate down to an input supply voltage of 2.65V although the maximum allowable output current is reduced at this low voltage. Figure 1 shows the reduction in the maximum output current as a function of input voltage for various output voltages. 1200 Slope compensation provides stability in constant-frequency architectures by preventing subharmonic oscillations at high duty cycles. It is accomplished internally by adding a compensating ramp to the inductor current signal at duty cycles in excess of 40%. As a result, the maximum inductor peak current is reduced for duty cycles >40%. This is shown in the decrease of the inductor peak current as a function of duty cycle graph in Figure 2. MAXIMUM INDUCTOR PEAK CURRENT (mA) 1000 MAX OUTPUT CURRENT (mA) Slope Compensation and Inductor Peak Current 1100 VOUT = 2.5V VIN = 5V 1000 VOUT = 1.5V 800 VOUT = 5V 600 VOUT = 3.3V 400 200 L = 10μH 0 Another important detail to remember is that at low input supply voltages, the RDS(ON) of the P-channel switch increases. Therefore, the user should calculate the power dissipation when the LTC1877 is used at 100% duty cycle with a low input voltage (see Thermal Considerations in the Applications Information section). 0 2 4 6 VIN (V) 8 10 12 1877 F01 Figure 1. Maximum Output Current vs Input Voltage 900 800 700 600 0 20 60 40 DUTY CYCLE (%) 80 100 1877 F02 Figure 2. Maximum Inductor Peak Current vs Duty Cycle APPLICATIONS INFORMATION The basic LTC1877 application circuit is shown on the first page. External component selection is driven by the load requirement and begins with the selection of L followed by CIN and COUT. Inductor Value Calculation The inductor selection will depend on the operating frequency of the LTC1877. The internal nominal frequency is 550kHz, but can be externally synchronized from 400kHz to 700kHz. The operating frequency and inductor selection are interrelated in that higher operating frequencies allow the use of smaller inductor and capacitor values. However, operating at a higher frequency generally results in lower efficiency because of increased internal gate charge losses. The inductor value has a direct effect on ripple current. The ripple current ΔIL decreases with higher inductance or frequency and increases with higher VIN or VOUT. ⎛ V ⎞ 1 ΔIL = VOUT ⎜1− OUT ⎟ VIN ⎠ ⎝ ( f) (L) (1) 1877fb 9 LTC1877 APPLICATIONS INFORMATION Accepting larger values of ΔIL allows the use of low inductance, but results in higher output voltage ripple and greater core losses. A reasonable starting point for setting ripple current is ΔIL = 0.4(IMAX). The inductor value also has an effect on Burst Mode operation. The transition to low current operation begins when the inductor current peaks fall to approximately 250mA. Lower inductor values (higher ΔIL) will cause this to occur at lower load currents, which can cause a dip in efficiency in the upper range of low current operation. In Burst Mode operation, lower inductance values will cause the burst frequency to increase. Inductor Core Selection Once the value for L is known, the type of inductor must be selected. High efficiency converters generally cannot afford the core loss found in low cost powdered iron cores, forcing the use of more expensive ferrite, molypermalloy, or Kool Mμ cores. Actual core loss is independent of core size for a fixed inductor value, but it is very dependent on inductance selected. As inductance increases, core losses go down. Unfortunately, increased inductance requires more turns of wire and therefore copper losses will increase. Ferrite designs have very low core losses and are preferred at high switching frequencies, so design goals can concentrate on copper loss and preventing saturation. Ferrite core material saturates hard, which means that inductance collapses abruptly when the peak design current is exceeded. This results in an abrupt increase in inductor ripple current and consequent output voltage ripple. Do not allow the core to saturate! Kool Mμ (from Magnetics, Inc.) is a very good, low loss core material for toroids with a soft saturation characteristic. Molypermalloy is slightly more efficient at high (>200kHz) switching frequencies but quite a bit more expensive. Toroids are very space efficient, especially when you can use several layers of wire, while inductors wound on bobbins are generally easier to surface mount. New designs for surface mount inductors are available from Coiltronics, Coilcraft, Dale and Sumida. CIN and COUT Selection In continuous mode, the source current of the top MOSFET is a square wave of duty cycle VOUT/VIN. To prevent large voltage transients, a low ESR input capacitor sized for the maximum RMS current must be used. The maximum RMS capacitor current is given by: 1/2 ⎡⎣ VOUT ( VIN − VOUT )⎤⎦ CIN required IRMS ≅ IOMAX VIN This formula has a maximum at VIN = 2VOUT, where IRMS = IOUT/2. This simple worst-case condition is commonly used for design because even significant deviations do not offer much relief. Note the capacitor manufacturer’s ripple current ratings are often based on 2000 hours of life. This makes it advisable to further derate the capacitor, or choose a capacitor rated at a higher temperature than required. Several capacitors may also be paralleled to meet size or height requirements in the design. Always consult the manufacturer if there is any question. The selection of COUT is driven by the required effective series resistance (ESR). Typically, once the ESR requirement is satisfied, the capacitance is adequate for filtering. The output ripple ΔVOUT is determined by: ⎛ 1 ⎞ ΔVOUT ≅ ΔIL ⎜ESR + ⎟ 8fCOUT ⎠ ⎝ where f = operating frequency, COUT = output capacitance and ΔIL = ripple current in the inductor. The output ripple is highest at maximum input voltage since ΔIL increases with input voltage. For the LTC1877, the general rule for proper operation is: COUT required ESR < 0.25Ω The choice of using a smaller output capacitance increases the output ripple voltage due to the frequency dependent term but can be compensated for by using capacitor(s) of very low ESR to maintain low ripple voltage. The ITH pin compensation components can be optimized to provide stable high performance transient response regardless of the output capacitor selected. ESR is a direct function of the volume of the capacitor. Manufacturers such as Taiyo Yuden, AVX, Sprague, Kemet and Sanyo should be considered for high performance ca1877fb 10 LTC1877 APPLICATIONS INFORMATION pacitors. The POSCAP solid electrolytic capacitor available from Sanyo is an excellent choice for output bulk capacitors due to its low ESR/size ratio. Once the ESR requirement for COUT has been met, the RMS current rating generally far exceeds the IRIPPLE(P-P) requirement. When using tantalum capacitors, it is critical that they are surge tested for use in switching power supplies. A good choice is the AVX TPS series of surface mount tantalum, available in case heights ranging from 2mm to 4mm. Other capacitor types include KEMET T510 and T495 series and Sprague 593D and 595D series. Consult the manufacturer for other specific recommendations. Output Voltage Programming The output voltage is set by a resistive divider according to the following formula: The output of the phase detector is a pair of complementary current sources charging or discharging the external filter network on the PLL LPF pin. The relationship between the voltage on the PLL LPF pin and operating frequency is shown in Figure 4. A simplified block diagram is shown in Figure 5. If the external frequency (VSYNC/MODE) is greater than 550kHz, the center frequency, current is sourced continuously, pulling up the PLL LPF pin. When the external frequency is less than 550kHz, current is sunk continuously, pulling down the PLL LPF pin. If the external and internal frequencies are the same but exhibit a phase difference, the current sources turn on for an amount of time corresponding to the phase difference. Thus, the voltage on the PLL LPF pin is adjusted until the phase and frequency of the external and internal oscillators are identical. At 800 ⎛ R2 ⎞ VOUT = 0.8V ⎜1+ ⎟ ⎝ R1 ⎠ OSCILLATOR FREQUENCY (kHz) (2) The external resistive divider is connected to the output, allowing remote voltage sensing, as shown in Figure 3. 0.8V b VOUT b 10V R2 700 600 500 400 VFB LTC1877 300 R1 0 0.4 GND 0.8 1.2 VPLL LPF (V) 1.6 2.0 1877 F04 1877 F03 Figure 3. Setting the LTC1877 Output Voltage Figure 4. Relationship Between Oscillator Frequency and Voltage at PLL LPF Pin Phase-Locked Loop and Frequency Synchronization The LTC1877 has an internal voltage-controlled oscillator and phase detector comprising a phase-locked loop. This allows the top MOSFET turn-on to be locked to the rising edge of an external frequency source. The frequency range of the voltage-controlled oscillator is 400kHz to 700kHz. The phase detector used is an edge sensitive digital type that provides zero degrees phase shift between the external and internal oscillators. This type of phase detector will not lock up on input frequencies close to the harmonics of the VCO center frequency. The PLL hold-in range ΔfH is equal to the capture range, ΔfH = ΔfC = ±150kHz. RLP PHASE DETECTOR 2.4V CLP PLL LPF SYNC/ MODE DIGITAL PHASE/ FREQUENCY DETECTOR VCO 1877 F05 Figure 5. Phase-Locked Loop Block Diagram 1877fb 11 LTC1877 APPLICATIONS INFORMATION The loop filter components CLP and RLP smooth out the current pulses from the phase detector and provide a stable input to the voltage controlled oscillator. The filter component’s CLP and RLP determine how fast the loop acquires lock. Typically RLP = 10k and CLP is 2200pF to 0.01μF. When not synchronized to an external clock, the internal connection to the VCO is disconnected. This disallows setting the internal oscillator frequency by a DC voltage on the VPLL LPF pin. Efficiency Considerations The efficiency of a switching regulator is equal to the output power divided by the input power times 100%. It is often useful to analyze individual losses to determine what is limiting the efficiency and which change would produce the most improvement. Efficiency can be expressed as: Efficiency = 100% – (L1 + L2 + L3 + ...) where L1, L2, etc. are the individual losses as a percentage of input power. Although all dissipative elements in the circuit produce losses, two main sources usually account for most of the losses in LTC1877 circuits: VIN quiescent current and I2R losses. The VIN quiescent current loss dominates the efficiency loss at very low load currents, whereas the I2R loss dominates the efficiency loss at medium to high load currents. In a typical efficiency plot, the efficiency curve at very low load currents can be misleading since the actual power lost is of no consequence, as illustrated in Figure 6. 1. The VIN quiescent current is due to two components: the DC bias current as given in the Electrical Characteristics section and the internal main switch and synchronous switch gate charge currents. The gate charge current results from switching the gate capacitance of the internal power MOSFET switches. Each time the gate is switched from high to low to high again, a packet of charge dQ moves from VIN to ground. The resulting dQ/dt is the current out of VIN that is typically larger than the DC bias current. In continuous mode, IGATECHG = f(QT + QB) where QT and QB are the gate charges of the internal top and bottom switches. Both the DC bias and gate charge losses are proportional to VIN and thus their effects will be more pronounced at higher supply voltages. 2. I2R losses are calculated from the resistances of the internal switches, RSW , and external inductor RL. In continuous mode, the average output current flowing through inductor L is chopped between the main switch and the synchronous switch. Thus, the series resistance looking into the SW pin is a function of both top and bottom MOSFET RDS(ON) and the duty cycle (DC) as follows: RSW = (RDS(ON)TOP)(DC) + (RDS(ON)BOT)(1 – DC) The RDS(ON) for both the top and bottom MOSFETs can be obtained from the Typical Performance Characteristics curves. Thus, to obtain I2R losses, simply add RSW to RL and multiply the result by the square of the average output current. Other losses including CIN and COUT ESR dissipative losses and inductor core losses generally account for less than 2% total additional loss. 1 0.1 POWER LOST (W) this stable operating point the phase comparator output is high impedance and the filter capacitor CLP holds the voltage. 0.01 VIN = 4.2V L = 10μH VOUT = 1.5V VOUT = 2.5V VOUT = 3.3V Burst Mode OPERATION 0.001 0.0001 0.00001 0.1 1 10 100 LOAD CURRENT (mA) 1000 1877 F06 Figure 6. Power Lost vs Load Current Thermal Considerations In most applications the LTC1877 does not dissipate much heat due to its high efficiency. But, in applications where the LTC1877 is running at high ambient temperature with low supply voltage and high duty cycles, such as in dropout, the heat dissipated may exceed the maximum junction 1877fb 12 LTC1877 APPLICATIONS INFORMATION temperature of the part. If the junction temperature reaches approximately 150°C, both power switches will be turned off and the SW node will become high impedance. To avoid the LTC1877 from exceeding the maximum junction temperature, the user will need to do some thermal analysis. The goal of the thermal analysis is to determine whether the power dissipated exceeds the maximum junction temperature of the part. The temperature rise is given by: TR = (PD)(θJA) where PD is the power dissipated by the regulator and θJA is the thermal resistance from the junction of the die to the ambient temperature. The junction temperature, TJ, is given by: TJ = TA + TR where TA is the ambient temperature. As an example, consider the LTC1877 in dropout at an input voltage of 3V, a load current of 500mA, and an ambient temperature of 70°C. From the typical performance graph of switch resistance, the RDS(ON) of the P-channel switch at 70°C is approximately 0.9Ω. Therefore, power dissipated by the part is: PD = ILOAD2 • RDS(ON) = 0.225W For the MSOP package, the θJA is 150°C/W. Thus, the junction temperature of the regulator is: TJ = 70°C + (0.225)(150) = 104°C which is below the maximum junction temperature of 125°C. Note that at higher supply voltages, the junction temperature is lower due to reduced switch resistance (RDS(ON)). Checking Transient Response The regulator loop response can be checked by looking at the load transient response. Switching regulators take several cycles to respond to a step in load current. When a load step occurs, VOUT immediately shifts by an amount equal to (ΔILOAD • ESR), where ESR is the effective series resistance of COUT. ΔILOAD also begins to charge or discharge COUT, which generates a feedback error signal. The regulator loop then acts to return VOUT to its steady-state value. During this recovery time VOUT can be monitored for overshoot or ringing that would indicate a stability problem. The internal compensation provides adequate compensation for most applications. But if additional compensation is required, the ITH pin can be used for external compensation using RC, CC1, as shown in Figure 7. The 220pF capacitor, CC2, is typically needed for noise decoupling. A second, more severe transient is caused by switching in loads with large (>1μF) supply bypass capacitors. The discharged bypass capacitors are effectively put in parallel with COUT , causing a rapid drop in VOUT . No regulator can deliver enough current to prevent this problem if the load switch resistance is low and it is driven quickly. The only solution is to limit the rise time of the switch drive so that the load rise time is limited to approximately (25 • CLOAD). Thus, a 10μF capacitor charging to 3.3V would require a 250μs rise time, limiting the charging current to about 130mA. PC Board Layout Checklist When laying out the printed circuit board, the following checklist should be used to ensure proper operation of the LTC1877. These items are also illustrated graphically in the layout diagram of Figure 7. Check the following in your layout: 1. Are the signal and power grounds segregated? The LTC1877 signal ground consists of the resistive divider, the optional compensation network (RC and CC1) and CC2. The power ground consists of the (–) plate of CIN, the (–) plate of COUT and Pin 4 of the LTC1877. The power ground traces should be kept short, direct and wide. The signal ground and power ground should converge to a common node in a star-ground configuration. 2. Does the VFB pin connect directly to the feedback resistors? The resistive divider R1/R2 must be connected between the (+) plate of COUT and signal ground. 3. Does the (+) plate of CIN connect to VIN as closely as possible? This capacitor provides the AC current to the internal power MOSFETs. 4. Keep the switching node SW away from sensitive small signal nodes. 1877fb 13 LTC1877 APPLICATIONS INFORMATION Design Example A 15μH inductor works well for this application. For best efficiency choose a 1A inductor with less than 0.25Ω series resistance. As a design example, assume the LTC1877 is used in a single lithium-ion battery-powered cellular phone application. The input voltage will be operating from a maximum of 4.2V down to about 2.7V. The load current requirement is a maximum of 0.3A but most of the time it will be in standby mode, requiring only 2mA. Efficiency at both low and high load currents is important. Output voltage is 2.5V. With this information we can calculate L using Equation (1), ⎛ V ⎞ 1 L= VOUT ⎜1− OUT ⎟ VIN ⎠ ⎝ ( f) (ΔIL ) (3) CIN will require an RMS current rating of at least 0.15A at temperature and COUT will require an ESR of less than 0.25Ω. In most applications, the requirements for these capacitors are fairly similar. For the feedback resistors, choose R1 = 412k. R2 can then be calculated from Equation (2) to be: ⎛V ⎞ R2 = ⎜ OUT – 1⎟ R1= 875.5k; use 887k ⎝ 0.8 ⎠ Figure 8 shows the complete circuit along with its efficiency curve. Substituting VOUT = 2.5V, VIN = 4.2V, ΔIL=120mA and f = 550kHz in Equation (3) gives: L= ⎛ 2.5V ⎞ 2.5V ⎜1− ⎟ = 15.3μH 550kHz(120mA) ⎝ 4.2V ⎠ CC2 LTC1877 OPTIONAL 1 CC1 RC 2 3 4 R1 R2 RUN ITH PLL LPF SYNC/MODE VFB VIN GND SW 8 7 BOLD LINES INDICATE HIGH CURRENT PATHS 6 5 + L1 + + + CIN COUT VOUT VIN – – 1877 F07 Figure 7. LTC1877 Layout Diagram 2 3 4 RUN ITH PLL LPF SYNC/MODE LTC1877 VFB VIN GND SW 8 85 7 6 5 15μH* + 887k 412k VIN = 3.0V 90 20pF VOUT 2.5V 47μF*** EFFICIENCY (%) 220pF 1 95 VIN 2.7V TO 4.2V 10μF** CER 80 VIN = 4.2V VIN = 3.6V 75 70 65 60 1877 F08a *SUMIDA CD54-150 **TAIYO YUDEN CERAMIC LMK325BJ106MN ***SANYO POSCAP 6TPA47M VOUT = 2.5V L = 15μH 55 50 0.1 100 1.0 10 OUTPUT CURRENT (mA) 1000 1877 F08b Figure 8. Single Lithium-Ion to 2.5V/0.3A Regulator from Design Example 1877fb 14 LTC1877 TYPICAL APPLICATIONS Dual Lithium-Ion to 2.5V/0.6A Regulator Using All Ceramic Capacitors 1 2 RUN ITH 220pF PLL LPF SYNC/MODE 1 8 CIN** 10μF CER 4 VFB VIN GND SW 6 2 VIN b 8.4V 7 LTC1877 3 4-to 6-Cell NiCd/NiMH to 1.8V/0.6A Regulator Using All Ceramic Capacitors 4 VOUT 2.5V/0.6A 887k VFB VIN GND SW 1877 TA03 2 ITH 220pF PLL LPF SYNC/MODE 8 7 LTC1877 3 4 VFB GND VIN SW EXT CLOCK 700kHz 5 VOUT 1.8V/0.6A 10μH* 887k 698k *TOKO D62CB A920CY-100M **TAIYO YUDEN CERAMIC LMK325BJ106MN ***TAIYO YUDEN CERAMIC JMK325BJ226MM 1877 TA04 VIN 2.85V TO 10V 1 CIN** 10μF CER 10k 2 RUN ITH 220pF VOUT 2.5V/ 0.6A 10μH* 20pF PLL LPF SYNC/MODE 8 CIN** 10μF CER 7 LTC1877 3 5 4 VFB VIN GND SW 6 5 20pF COUT*** 22μF CER 1877 TA05 VOUT 2.5V/0.3A 15μH* 887k 412k COUT*** 22μF CER Low Noise 2.5V/0.3A Regulator 6 *TOKO D62CB A920CY-100M **TAIYO YUDEN CERAMIC LMK325BJ106MN ***TAIYO YUDEN CERAMIC JMK325BJ226MM 6 VIN 4V TO 10V 0.01μF RUN VIN b 9V CIN** 10μF CER 20pF Externally Synchronized 2.5V/0.6A Regulator Using All Ceramic Capacitors 1 7 COUT*** 22μF CER 412k *SUMIDA CD54-150 **TAIYO YUDEN CERAMIC LMK325BJ106MN ***TAIYO YUDEN CERAMIC JMK325BJ226MM SYNC/MODE 8 LTC1877 3 15μH* PLL LPF ITH 220pF 5 20pF RUN *SUMIDA CD54-150 **TAIYO YUDEN CERAMIC LMK325BJ106MN ***SANYO POSCAP 6TPA47M 887k COUT*** 47μF 6.3V 412k 1877 TA06 1877fb 15 LTC1877 PACKAGE DESCRIPTION Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. MS8 Package 8-Lead Plastic MSOP (Reference LTC DWG # 05-08-1660 Rev F) 0.889 ± 0.127 (.035 ± .005) 5.23 (.206) MIN 3.20 – 3.45 (.126 – .136) 3.00 ± 0.102 (.118 ± .004) (NOTE 3) 0.65 (.0256) BSC 0.42 ± 0.038 (.0165 ± .0015) TYP 8 7 6 5 0.52 (.0205) REF RECOMMENDED SOLDER PAD LAYOUT 0.254 (.010) 3.00 ± 0.102 (.118 ± .004) (NOTE 4) 4.90 ± 0.152 (.193 ± .006) DETAIL “A” 0° – 6° TYP GAUGE PLANE 1 0.53 ± 0.152 (.021 ± .006) DETAIL “A” 2 3 4 1.10 (.043) MAX 0.86 (.034) REF 0.18 (.007) SEATING PLANE 0.22 – 0.38 (.009 – .015) TYP 0.65 (.0256) NOTE: BSC 1. DIMENSIONS IN MILLIMETER/(INCH) 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX 0.1016 ± 0.0508 (.004 ± .002) MSOP (MS8) 0307 REV F 1877fb 16 LTC1877 REVISION HISTORY (Revision history begins at Rev B) REV DATE DESCRIPTION PAGE NUMBER B 11/11 Part marking for LTC1877IMS8 corrected from LTLU to LTLV 2 1877fb Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 17 LTC1877 TYPICAL APPLICATION Single Lithium-Ion to 3.3V/0.3A Regulator 1 2 RUN ITH 220pF PLL LPF SYNC/MODE 10μF** 8 + – 7 VIN Li-Ion BATTERY 3V TO 4.2V LTC1877 3 4 VFB VIN GND SW 6 5 VOUT 3.3V/0.25A 10μH* 20pF 887k 47μF*** 280k *TOKO D62CB A920CY-100M **TAIYO YUDEN CERAMIC LMK325BJ106MN ***SANYO POSCAP 6TPA47M 1877 TA07 RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LTC1174/LTC1174-3.3/ LTC1174-5 High Efficiency Step-Down and Inverting DC/DC Converters Monolithic Switching Regulators, IOUT to 450mA, Burst Mode Operation LTC1265 1.2A, High Efficiency Step-Down DC/DC Converter Constant Off-Time, Monolithic, Burst Mode Operation LT®1375/LT1376 1.5A, 500kHz Step-Down Switching Regulators High Frequency, Small Inductor, High Efficiency LTC1436/LTC1436-PLL High Efficiency, Low Noise, Synchronous Step-Down Converters 24-Pin Narrow SSOP LTC1474/LTC1475 Low Quiescent Current Step-Down DC/DC Converters Monolithic, IOUT to 250mA, IQ = 10μA, 8-Pin MSOP LTC1504A Monolithic Synchronous Step-Down Switching Regulator Low Cost, Voltage Mode IOUT to 500mA, VIN: 4V to 10V LTC1622 Low Input Voltage Current Mode Step-Down DC/DC Controller High Frequency, High Efficiency, 8-Pin MSOP LTC1626 Low Voltage, High Efficiency Step-Down DC/DC Converter Monolithic, Constant Off-Time, IOUT to 600mA, Low Supply Voltage Range: 2.5V to 6V LTC1627 Monolithic Synchronous Step-Down Switching Regulator Constant Frequency, IOUT to 500mA, Secondary Winding Regulation, VIN: 2.65V to 8.5V LTC1701 Monolithic Current Mode Step-Down Switching Regulator Constant Off-Time, IOUT to 500mA, 1MHz Operation, VIN: 2.5V to 5.5V LTC1707 Monolithic Synchronous Step-Down Switching Regulator 1.19V VREF Pin, Constant Frequency, IOUT to 600mA, VIN: 2.65V to 8.5V LTC1735 High Efficiency, Synchronous Step-Down Converter 16-Pin SO and SSOP, VIN Up to 36V, Fault Protection LTC1772 Low Input Voltage Current Mode Step-Down DC/DC Controller 550kHz, 6-Pin SOT-23, IOUT Up to 5A, VIN: 2.2V to 10V LTC1878 High Efficiency Monolithic Step-Down Regulator 550kHz, MS8, VIN Up to 6V, IQ = 10μA, IOUT to 600mA 1877fb 18 Linear Technology Corporation LT 1111 REV B • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com © LINEAR TECHNOLOGY CORPORATION 2000
LTC1877EMS8#TRPBF 价格&库存

很抱歉,暂时无法提供与“LTC1877EMS8#TRPBF”相匹配的价格&库存,您可以联系我们找货

免费人工找货