LTC2063/LTC2064/LTC2065
2µA Supply Current,
Low IB, Zero-Drift Operational Amplifiers
FEATURES
DESCRIPTION
Low Supply Current: 2μA Maximum (per Amplifier)
n Offset Voltage: 5μV Maximum
n Offset Voltage Drift: 0.02μV/°C Maximum
n Input Bias Current:
n 3pA Typical
n 30pA Maximum, –40°C to 85°C
n 100pA Maximum, –40°C to 125°C
n Integrated EMI Filter (114dB Rejection at 1.8GHz)
n Shutdown Current: 170nA Maximum (per Amplifier)
n Rail-to-Rail Input and Output
n 1.7V to 5.25V Operating Supply Range
n A
VOL: 140dB Typical
n Low-Charge Power-Up for Duty Cycled Applications
n Specified Temperature Ranges:
n –40°C to 85°C
n –40°C to 125°C
n SC70, TSOT23, MS8, DFN10, TSSOP14 and
QFN16 Packages
The LTC®2063/LTC2064/LTC2065 are single, dual,
and quad low power, zero-drift, 20kHz amplifiers. The
LTC2063/LTC2064/LTC2065 enable high resolution measurement at extremely low power levels.
n
APPLICATIONS
Signal Conditioning in Wireless Mesh Networks
Portable Instrumentation Systems
n Low-Power Sensor Conditioning
n Gas Detection
n Temperature Measurement
n Medical Instrumentation
n Energy Harvesting Applications
n Low Power Current Sensing
n
n
Typical supply current is 1.4µA per amplifier with a maximum of 2µA. The available shutdown mode has been
optimized to minimize power consumption in duty-cycled
applications and features low charge loss during power-up, reducing total system power.
The LTC2063/LTC2064/LTC2065’s self-calibrating circuitry results in very low input offset (5µV max) and offset
drift (0.02µV/°C). The maximum input bias current is only
20pA and does not exceed 100pA over the full specified
temperature range. The extremely low input bias current
of the LTC2063/LTC2064/LTC2065 allows the use of high
value power-saving resistors in the feedback network.
With its ultralow quiescent current and outstanding precision, the LTC2063/LTC2064/LTC2065 can serve as a
signal chain building block in portable, energy harvesting and wireless sensor applications.
The LTC2063 is available in 6-lead SC70 and 5-lead
TSOT-23 packages. The LTC2064 is available in 8-lead
MSOP and 10-lead DFN packages. The LTC2065 is available in 14-lead TSSOP and 16-lead 3mm × 3mm QFN
packages. These devices are fully specified over the –40°C
to 85°C and –40°C to 125°C temperature ranges.
All registered trademarks and trademarks are the property of their respective owners.
TYPICAL APPLICATION
Duty Cycle Lowers System Power
Micropower Precision Oxygen Sensor
10M
0.1%
OXYGEN SENSOR
CITY TECHNOLOGY
40XV
100k
0.1%
100k
0.1%
100Ω
0.1%
www.citytech.com
1.8V
–
CHARGE
20nC/DIV
LTC2063
+
VOUT = 1V IN AIR
ISUPPLY = 1.4µA (ENABLED)
90nA (SHUTDOWN)
VSHDN
VOUT
1V/DIV
VSHDN
2V/DIV
40ms/DIV
2063 TA01
2063 TA01b
Rev. C
Document Feedback
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1
LTC2063/LTC2064/LTC2065
ABSOLUTE MAXIMUM RATINGS
(Note 1)
Total Supply Voltage (V+ to V–).................................5.5V
Differential Input Current (+IN to –IN) (Note 2)..... ±10mA
Differential Input Voltage (+IN to –IN).......................5.5V
Input Voltage +IN, –IN, SHDN..(V–) – 0.3V to (V+) + 0.3V
Input Current +IN, –IN, SHDN (Note 2)................. ±10mA
Output Short-Circuit Duration (Note 3)......Thermally Limited
Operating and Specified Temperature Range (Note 4)
LTC2063I/LTC2064I/LTC2065I.............–40°C to 85°C
LTC2063H/LTC2064H/LTC2065H....... –40°C to 125°C
Maximum Junction Temperature........................... 150°C
Storage Temperature Range................... –65°C to 150°C
PIN CONFIGURATION
LTC2065
TOP VIEW
+IN 1
+
–
V– 2
5 SHDN
–IN 3
4 OUT
SC6 PACKAGE
6-LEAD PLASTIC SC70
θJA = 265°C/W (Note 5)
LTC2063
1
10 V+
–INA
2
9 OUTB
–INA 1
+INA
3
8 –INB
+INA 2
V–
4
NC
5
A
B
11
LTC2065
+
+IN 3
–
V– 2
4 –IN
S5 PACKAGE
5-LEAD PLASTIC TSOT-23
θJA = 215°C/W (Note 5)
OUTA
–INA
+INA
V–
1
2
3
4
A
B
9
5
6
7
8
TOP VIEW
OUTA 1
8
7
6
5
+INC
QFN16 PACKAGE
16-LEAD (3mm × 3mm) PLASTIC QFN
θJA = 68°C/W (NOTE 5)
EXPOSED PAD (PIN 17) MUST BE CONNECTED TO V– (PIN 10)
TOP VIEW
5 V+
11 +IND
10 V–
+INB 4
6 SHDN
DD PACKAGE
10-LEAD (3mm × 3mm) PLASTIC DFN
θJA = 43°C/W, θJC = 5.5°C/W (Note 5)
EXPOSED PAD (PIN 11) IS CONNECTED TO V– (PIN 4)
(PCB CONNECTION OPTIONAL)
TOP VIEW
12 –IND
17
V+ 3
7 +INB
LTC2064
OUT 1
16 15 14 13
–INC
6 V+
OUTA
OUTC
TOP VIEW
SHDN
OUTA
OUTD
NC
TOP VIEW
–INB
LTC2064
OUTB
LTC2063
V+
OUTB
–INB
+INB
MS8 PACKAGE
8-LEAD PLASTIC MSOP
θJA = 163°C/W, θJC = 40°C/W (Note 5)
–INA 2
+INA 3
V+
A
D
B
C
4
+INB 5
–INB 6
OUTB 7
14 OUTD
13 –IND
12 +IND
–
11 V
10 +INC
9 –INC
8 OUTC
TSSOP14 PACKAGE
14-LEAD PLASTIC TSSOP
θJA = 100°C/W (NOTE 5)
ORDER INFORMATION
LEAD FREE FINISH
TAPE AND REEL
PART MARKING*
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LTC2063ISC6#TRMPBF
LTC2063ISC6#TRPBF
LGTX
6-Lead Plastic SC70
–40°C to 85°C
LTC2063HSC6#TRMPBF
LTC2063HSC6#TRPBF
LGTX
6-Lead Plastic SC70
–40°C to 125°C
LTC2063IS5#TRMPBF
LTC2063IS5#TRPBF
LTGTW
5-Lead Plastic TSOT-23
–40°C to 85°C
LTC2063HS5#TRMPBF
LTC2063HS5#TRPBF
LTGTW
5-Lead Plastic TSOT-23
–40°C to 125°C
LTC2064IMS8#PBF
LTC2064IMS8#TRPBF
LTHCX
8-Lead Plastic MSOP
–40°C to 85°C
LTC2064HMS8#PBF
LTC2064HMS8#TRPBF
LTHCX
8-Lead Plastic MSOP
–40°C to 125°C
LTC2064IDD#PBF
LTC2064IDD#TRPBF
LHCW
10-Lead (3mm × 3mm)Plastic DFN
–40°C to 85°C
LTC2064HDD#PBF
LTC2064HDD#TRPBF
LHCW
10-Lead (3mm × 3mm)Plastic DFN
–40°C to 125°C
2
Rev. C
For more information www.analog.com
LTC2063/LTC2064/LTC2065
ORDER INFORMATION
LEAD FREE FINISH
TAPE AND REEL
PART MARKING*
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LTC2065IUD#PBF
LTC2065IUD#TRPBF
LHKT
16-Lead (3mm × 3mm) Plastic QFN
–40°C to 85°C
LTC2065HUD#PBF
LTC2065HUD#TRPBF
LHKT
16-Lead (3mm × 3mm) Plastic QFN
–40°C to 125°C
LTC2065IF#PBF
LTC2065IF#TRPBF
LTC2065
14-Lead TSSOP
–40°C to 85°C
LTC2065HF#PBF
LTC2065HF#TRPBF
LTC2065
14-Lead TSSOP
–40°C to 125°C
Contact the factory for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Parts ending with PBF are RoHS and WEEE compliant.
Tape and reel specifications. Some packages are available in 500 unit reels through designated sales channels with #TRMPBF suffix.
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. Unless otherwise noted, VS = 1.8V, VCM = VOUT = VS/2, VSHDN = 1.8V,
RL to VS/2.
SYMBOL PARAMETER
VOS
CONDITIONS
Input Offset Voltage (Note 6)
MIN
TYP
MAX
UNITS
1
l
±5
±10
μV
μV
l
l
±0.03
±0.06
VS = 1.7V
ΔVOS/ΔT
Input Offset Voltage Drift (Note 6)
IB
Input Bias Current (Note 7)
IOS
Input Offset Current (Note 7)
–40°C to 85°C
–40°C to 125°C
μV/°C
µV/°C
0.5
pA
1
pA
in
Input Noise Current Spectral Density
f ≤ 100Hz
12
fA/√Hz
en
Input Noise Voltage Spectral Density
f ≤ 100Hz
230
nV/√Hz
en P-P
Input Noise Voltage
DC to 10Hz
4.8
μVP–P
CIN
Input Capacitance
Differential
Common Mode
3.3
3.5
pF
pF
VCMR
Input Voltage Range
Guaranteed by CMRR
CMRR
PSRR
AVOL
VOL
Common Mode Rejection Ratio (Note 8)
Power Supply Rejection Ratio
Open Loop Gain
Output Voltage Swing Low (VOUT
– V–)
l
(V–) – 0.1
VCM
RL = 499k
103
100
130
l
dB
dB
VS = 1.7V to 5.25V
RL = 499k
108
106
126
l
dB
dB
VOUT = (V–) + 0.1V to (V+) – 0.1V, RL = 499k
135
dB
RL = 499k
0.05
mV
= (V–) – 0.1V to (V+) + 0.1V
RL = 10k
(V+) + 0.1
3
l
VOH
Output Voltage Swing High (V+ – VOUT)
RL = 499k
0.1
RL = 10k
4.5
l
ISC
Output Short Circuit Current
Sourcing
10
20
V
mV
mV
mV
10
50
mV
mV
5.8
5.6
7.5
l
mA
mA
10.4
5
13
l
mA
mA
Sinking
Rev. C
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3
LTC2063/LTC2064/LTC2065
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. Unless otherwise noted, VS = 1.8V, VCM = VOUT = VS/2, VSHDN = 1.8V,
RL to VS/2.
SYMBOL PARAMETER
CONDITIONS
MIN
SR
Slew Rate
AV = +1
3.5
V/ms
RL = 499k
20
kHz
2
ms
GBW
Gain Bandwidth Product
tON
Power-Up Time
fC
Internal Chopping Frequency
VS
Supply Voltage Range
Guaranteed by PSRR
l
IS
Supply Current per Amplifier
No Load
–40°C to 85°C
–40°C to 125°C
l
l
In Shutdown (SHDN = V–)
–40°C to 85°C
–40°C to 125°C
l
l
TYP
MAX
UNITS
5
VH
SHDN Pin Threshold, Logic High (Referred to V–)
l
VL
SHDN Pin Threshold, Logic Low (Referred to V–)
l
ISHDN
SHDN Pin Current
VSHDN = 0V
l
1.7
kHz
5.25
V
1.3
2
2.5
4
μA
μA
µA
90
170
250
500
nA
nA
nA
1.0
V
–150
0.65
V
–20
nA
The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C.
Unless otherwise noted, VS = 5V, VCM = VOUT = VS/2, VSHDN = 5V, RL to VS/2.
SYMBOL PARAMETER
VOS
Input Offset Voltage (Note 6)
ΔVOS/ΔT
Input Offset Voltage Drift (Note 6)
IB
Input Bias Current
IOS
Input Offset Current
CONDITIONS
MIN
TYP
MAX
UNITS
1
l
±5
±10
μV
μV
–40°C to 85°C
–40°C to 125°C
l
l
±0.02
±0.05
μV/°C
µV/°C
–40°C to 85°C
–40°C to 125°C
–3
l
l
±20
±30
±100
pA
pA
pA
–40°C to 85°C
–40°C to 125°C
1.5
l
l
±20
±30
±100
pA
pA
pA
VS = 5.25V
in
Input Noise Current Spectral Density
f ≤ 100Hz
12
fA/√Hz
en
Input Noise Voltage Spectral Density
f ≤ 100Hz
220
nV/√Hz
en P–P
Input Noise Voltage
DC to 10Hz
4.6
μVP–P
CIN
Input Capacitance
Differential
Common Mode
3.3
3.5
pF
pF
VCMR
Input Voltage Range
Guaranteed by CMRR
CMRR
PSRR
Common Mode Rejection Ratio
Power Supply Rejection Ratio
l
(V–) – 0.1
VCM
RL = 499k
111
108
130
l
dB
dB
VS = 1.7V to 5.25V
RL = 499k
108
106
126
l
dB
dB
81
102
114
100
dB
dB
dB
dB
140
dB
dB
= (V–) – 0.1V to (V+) + 0.1V
EMIRR
EMI Rejection Ratio
VRF = 100mVPK
EMIRR = 20 • log(VRF/∆VOS)
f = 400MHz
f = 900MHz
f = 1800MHz
f = 2400MHz
AVOL
Open Loop Gain
VOUT = (V–) + 0.1V to (V+) – 0.1V, RL = 499k
l
4
112
110
(V+) + 0.1
V
Rev. C
For more information www.analog.com
LTC2063/LTC2064/LTC2065
ELECTRICAL
CHARACTERISTICS
The
l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. Unless otherwise noted, VS = 5V, VCM = VOUT = VS/2, VSHDN = 5V,
RL to VS/2.
SYMBOL PARAMETER
VOL
Output Voltage Swing Low (VOUT
CONDITIONS
– V–)
MIN
TYP
RL = 499k
0.1
RL = 10k
5.5
l
VOH
Output Voltage Swing High (V+ – VOUT)
RL = 499k
7
l
Output Short Circuit Current
Sourcing
UNITS
mV
15
20
0.15
RL = 10k
ISC
MAX
mV
mV
mV
15
20
mV
mV
30
16
51
l
mA
mA
20
5
48
l
mA
mA
Sinking
SR
Slew Rate
AV = +1
3.5
V/ms
GBW
Gain Bandwidth Product
RL = 499k
20
kHz
tON
Power-Up Time
2
ms
fC
Internal Chopping Frequency
VS
Supply Voltage Range
Guaranteed by PSRR
l
IS
Supply Current per Amplifier
No Load
–40°C to 85°C
–40°C to 125°C
l
l
In Shutdown (SHDN = V–)
–40°C to 85°C
–40°C to 125°C
l
l
5
VH
SHDN Pin Threshold, Logic High (Referred to V–)
l
VL
SHDN Pin Threshold, Logic Low (Referred to V–)
l
ISHDN
SHDN Pin Current
VSHDN = 0V
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The inputs are protected by two series connected ESD protection
diodes to each power supply. The input current should be limited to less than
10mA. The input voltage should not exceed 300mV beyond the power supply.
Note 3: A heat sink may be required to keep the junction temperature below
the absolute maximum rating when the output is shorted indefinitely.
Note 4: The LTC2063I/LTC2064I/LTC2065I are guaranteed to meet
specified performance from –40°C to 85°C. The LTC2063H/LTC2064H/
LTC2065H are guaranteed to meet specified performance from –40°C
to 125°C.
l
1.7
kHz
5.25
V
1.4
2
2.5
4
μA
μA
µA
90
170
250
500
nA
nA
nA
1.8
–150
V
0.8
V
–20
nA
Note 5: Thermal resistance varies with the amount of PC board metal
connected to the package. The specified values are for short traces
connected to the leads.
Note 6: These parameters are guaranteed by design. Thermocouple effects
preclude measurements of these voltage levels during automated testing.
VOS is measured to a limit determined by test equipment capability.
Note 7: Input bias current is only production tested at 5V. Input bias
current at 1.8V is expected to meet or exceed 5V specifications.
Note 8: Minimum specifications for these parameters are limited by noise
and the capabilities of the automated test system.
Rev. C
For more information www.analog.com
5
LTC2063/LTC2064/LTC2065
TYPICAL PERFORMANCE CHARACTERISTICS
Input Offset Voltage Distribution
40
30
20
10
40
30
20
2
3
4
0
5
2063 G01
–5 –4 –3 –2 –1 0 1
VOS (µV)
Input Offset Voltage Drift
Distribution
120
233 TYPICAL UNITS
VS = 1.8V
TA = –40°C to 125°C
40
30
20
10
2
3
4
100
5
10 15 20 25 30 35 40 45 50
VOS TC (nV/°C)
80
70
60
50
40
30
100
5
4
70
60
50
40
30
20
0
5
0
10 15 20 25 30 35 40 45 50
VOS TC (nV/°C)
5
5 TYPICAL UNITS
VS = 5V
TA = 25°C
4
3
6
1
2
VOS (µV)
1
0
–1
0
–2
–2
–2
–4
–3
–3
–6
–4
–4
–8
–5
–0.5 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5
VCM (V)
–5
–0.5
0.5
5 TYPICAL UNITS
VCM = VS/2
TA = 25°C
8
4
0
10 15 20 25 30 35 40 45 50
VOS TC (nV/°C)
10
5 TYPICAL UNITS
VS = 1.8V
TA = 25°C
2
–1
5
Input Offset Voltage vs
Supply Voltage
2
0
0
2063 G06
Input Offset Voltage vs
Input Common Mode Voltage
2063 G07
6
80
2063 G05
VOS (µV)
VOS (µV)
3
233 TYPICAL UNITS
VS = 1.8V
TA = –40°C to 85°C
90
10
2063 G04
Input Offset Voltage vs
Input Common Mode Voltage
10 15 20 25 30 35 40 45 50
VOS TC (nV/°C)
Input Offset Voltage Drift
Distribution
90
0
5
2063 G03
233 TYPICAL UNITS
VS = 5V
TA = –40°C to 85°C
110
0
2063 G02
20
0
20
0
5
10
0
30
Input Offset Voltage Drift
Distribution
NUMBER OF AMPLIFIERS
NUMBER OF AMPLIFIERS
50
40
10
10
–5 –4 –3 –2 –1 0 1
VOS (µV)
233 TYPICAL UNITS
VS = 5V
TA = –40°C to 125°C
50
NUMBER OF AMPLIFIERS
0
60
233 TYPICAL UNITS
VS = 1.8V
50
NUMBER OF AMPLIFIERS
50
NUMBER OF AMPLIFIERS
60
233 TYPICAL UNITS
VS = 5V
NUMBER OF AMPLIFIERS
60
Input Offset Voltage Drift
Distribution
Input Offset Voltage Distribution
1
1.5
2
VCM (V)
2.5
2063 G08
–10
1
1.5
2
2.5
3 3.5
VS (V)
4
4.5
5
5.5
2063 G09
Rev. C
For more information www.analog.com
LTC2063/LTC2064/LTC2065
TYPICAL PERFORMANCE CHARACTERISTICS
Input Bias Current Distribution
4050 TYPICAL UNITS
VS = 5V
TA = 25°C
600
400
200
Input Bias Current vs Temperature
10
4050 TYPICAL UNITS
VS = 1.8V
TA = 25°C
1600
8
VS = 5V
6
4
1200
2
IB (pA)
NUMBER OF AMPLIFIERS
800
Input Bias Current Distribution
2000
NUMBER OF AMPLIFIERS
1000
800
IB (–IN)
0
–2
–4
400
–6
IB (+IN)
–8
0
–8 –7 –6 –5 –4 –3 –2 –1 0
INPUT BIAS CURRENT (pA)
1
0
2
–5 –4 –3 –2 –1 0 1 2 3
INPUT BIAS CURRENT (pA)
4
2063 G10
Input Bias Current vs
Input Common Mode Voltage
5
VS = 5V
TA = 25°C
4
6
3
4
2
2
1
IB (+IN)
–2
–4
IB (–IN)
–6
–8
10
VCM = VS/2
8 TA = 25°C
VS = 1.8V
TA = 25°C
6
4
IB (+IN)
0
IB (–IN)
–1
–3
0
0.5
4
2.5
2063 G14
0
IAVG
IOS
1
0
IAVG
–1
–2
–6
–3
–8
–4
–10
–0.5 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5
VCM (V)
2063 G16
–5
–0.5
0
0.5
1
1.5
VCM (V)
1
1.5
2
2.5
3 3.5
VS (V)
4
4.5
5
5.5
2063 G15
DC to 10Hz Voltage Noise
VS = 1.8V
TA = 25°C
2
IOS
IB (pA)
IB (pA)
2
3
–2
–4
1
1.5
VCM (V)
–10
Input Offset and Average Current
vs Input Common Mode Voltage
VS = 5V
TA = 25°C
IB (–IN)
–8
–5
–0.5
6
2
–2
–6
5
IB (+IN)
0
–4
Input Offset and Average Current
vs Input Common Mode Voltage
4
2
–2
2063 G13
8
Input Bias Current vs
Supply Voltage
–4
–10
–0.5 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5
VCM (V)
10
25 50 75 100 125 150
TEMPERATURE (°C)
2063 G12
IB (pA)
Input Bias Current vs
Input Common Mode Voltage
0
0
2063 G11
IB (pA)
IB (pA)
8
5
INPUT REFERRED VOLTAGE NOISE (1µV/DIV)
10
–10
–50 –25
2
2.5
TIME (1s/DIV)
2063 G17
2063 G18
Rev. C
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7
LTC2063/LTC2064/LTC2065
TYPICAL PERFORMANCE CHARACTERISTICS
Input Referred Voltage Noise
Density
Input Referred Current Noise
Density
1k
1k
100
1
10
100
1k
FREQUENCY (Hz)
10k
VS = 5V
VCM = 2.5V
100
100
10
0.1
100k
1
10
100
1k
FREQUENCY (Hz)
2063 G19
120
PSRR (dB)
CMRR (dB)
80
60
+PSRR
60
–PSRR
40
40
20
20
0
0
1k
10k
FREQUENCY (Hz)
100k
1M
1
10
100
1k
FREQUENCY (Hz)
120
–60
100
–90
80
PHASE
–150
–180
CL = 0pF
CL = 47pF
CL = 100pF
10
0
–10
AV = +1
100k
–30
AV = –1
1
10
100
1k
FREQUENCY (Hz)
0
VS = 1.8V
RL = 499kΩ –30
–60
PHASE
–90
–120
GAIN
–150
–180
20
0
–240
100k
Open Loop Gain and Phase
vs Frequency
40
–20
10k
2063 G24
60
–210
–270
–40
100µ 1m 10m 100m 1 10 100 1k 10k 100k 1M
FREQUENCY (Hz)
–210
CL = 0pF
CL = 47pF
CL = 100pF
–240
–270
–40
100µ 1m 10m 100m 1 10 100 1k 10k 100k 1M
FREQUENCY (Hz)
2063 G25
8
AV = +10
20
PHASE (°)
–120
GAIN
20
–20
30
120
PHASE (°)
GAIN (dB)
140
60
0
10k
0
VS = 5V
RL = 499kΩ –30
GAIN (dB)
140
40
AV = +100
40
2063 G23
Open Loop Gain and Phase
vs Frequency
80
50
–20
2063 G22
100
4
VS = 5V
RL = 499kΩ
AV = +1000
60
80
100
1
RF FREQUENCY (GHz)
Closed Loop Gain vs Frequency
70
VS = 5V
RL = 499kΩ
100
100
10
0.1
2063 G21
Power Supply Rejection Ratio
vs Frequency
VS = 5V
RL = 499kΩ
120
40
0.05
10k 50k
VIN = 100mVPK
EMIRR = 20log(100mV/∆VOS)
2063 G20
Common Mode Rejection Ratio
vs Frequency
140
80
60
CLOSED LOOP GAIN (dB)
10
0.1
VS = 1.8V
VS = 5V
EMI Rejection vs Frequency
120
EMIRR (dB)
CURRENT NOISE DENSITY (fA/√Hz)
VOLTAGE NOISE DENSITY (nV/√Hz)
10k
2063 G26
Rev. C
For more information www.analog.com
LTC2063/LTC2064/LTC2065
6
VS = 5V
AV = +1
5
VSHDN
4
IS
3
2
0.4
0
0.3
VIN
0.2
VOUT
0.1
0
–0.1
–1
0
1
2
3 4 5
TIME (ms)
6
7
8
9
Shutdown Transient with
Sinusoidal Input
5
VS = 1.8V
AV = +1
4
3
IS
2
1
0.4
0
VSHDN
0.3
VIN
–0.1
–0.2
–1
0
1
2
3 4 5
TIME (ms)
6
7
3
IS
2
0.4
0
0.3
VOUT
0.2
0.1
0
–0.1
VIN
–1
0
1
2
3 4 5
TIME (ms)
6
7
8
9
–0.2
5
VS = 1.8V
AV = +1
4
3
VSHDN
2
1
IS
0.4
0
0.3
VIN
0.2
VOUT
0.1
0
–0.1
–1
0
1
2
3 4 5
TIME (ms)
6
7
10G
10k
100M
1k
10M
100
1M
10
100k
1
10k
0.1
1
10
100
1k
10k
FREQUENCY (Hz)
100k
1M
1k
9
–0.2
LTC2064 Crosstalk vs Frequency
0
VS = 5V
AV = +1
1G
ZOUT (Ω)
ZOUT (Ω)
Output Impedance in Shutdown
vs Frequency
VS = 5V
AV = +1
100k
8
2063 G30
RL = 10k
–20
CROSSTALK (dB)
1M
–0.2
Enable Transient with
Sinusoidal Input
2063 G29
Closed Loop Output Impedance
vs Frequency
9
INPUT VOLTAGE (V)
OUTPUT VOLTAGE (V)
1
VSHDN (V)
SUPPLY CURRENT PER AMP (µA)
4
INPUT VOLTAGE (V)
OUTPUT VOLTAGE (V)
VSHDN (V)
SUPPLY CURRENT PER AMP (µA)
VSHDN
VS = 5V, AV = +1
8
2063 G28
Enable Transient with
Sinusoidal Input
5
0.1
0
2063 G27
6
0.2
VOUT
INPUT VOLTAGE (V)
OUTPUT VOLTAGE (V)
1
VSHDN (V)
SUPPLY CURRENT PER AMP (µA)
Shutdown Transient with
Sinusoidal Input
INPUT VOLTAGE (V)
OUTPUT VOLTAGE (V)
VSHDN (V)
SUPPLY CURRENT PER AMP (µA)
TYPICAL PERFORMANCE CHARACTERISTICS
–40
–60
–80
–100
–120
1
10
100
1k
10k
FREQUENCY (Hz)
100k
2063 G31
1M
2063 G32
–140
100
B TO A
A TO B
1k
10k
100k
FREQUENCY (Hz)
1M
2063 G33
Rev. C
For more information www.analog.com
9
LTC2063/LTC2064/LTC2065
TYPICAL PERFORMANCE CHARACTERISTICS
RL = 10k
ADJACENT CHANNELS
DIAGONAL CHANNELS
CROSSTALK (dB)
–20
–40
–60
–80
–100
–120
–140
100
1k
10k
100k
FREQUENCY (Hz)
–20
TOTAL HARMONIC DISTORTION (dB)
0
AV = +1
VS = ±2.5V
VOUT = ±2V
–40
–60
–80
–100
1M
RL=499kΩ
RL=100kΩ
RL=10kΩ
20
100
FREQUENCY (Hz)
500
–40°C
1.0
0.5
VS = 5V
1.6
1.4
VS = 1.8V
1.2
–25
0
25
50
75
TEMPERATURE (°C)
100
125°C
0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8
SHDN PIN VOLTAGE (V)
2063 G40
10
5
4
25°C
3
85°C 125°C
–40°C
0
20
0.5
1
1.5 2 2.5 3 3.5 4
SHDN PIN VOLTAGE (V)
4.5
5
VS = 1.8V
10
0
0
–10
–10
–20
ISHDN (nA)
–30
–40°C
–40
–50
25°C
–60
85°C
–80
0
VS = 5V
SHDN Pin Pull-Up Current vs
SHDN Pin Voltage
–70
0
2k
2063 G39
–20
ISHDN (nA)
IS PER AMPLIFIER (µA)
2.5
0.5
1k
6
0
125
VS = 5V
10
–40°C
100
FREQUENCY (Hz)
1
20
25°C
20
7
SHDN Pin Pull-Up Current vs
SHDN Pin Voltage
VS = 1.8V
1.0
0
2063 G38
Supply Current vs SHDN Pin
Voltage
85°C
AV = +1
VS = ±2.5V
THD < –40dB
1
2
2063 G37
1.5
2
8
1.8
0.8
–50
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5
VS (V)
2.0
3
9
1.0
3.0
4
10
IS PER AMPLIFIER (µA)
IS PER AMPLIFIER (µA)
IS PER AMPLIFIER (µA)
25°C
5
Supply Current vs SHDN Pin
Voltage
2.0
125°C
1.5
RL=10kΩ
RL=100kΩ
RL=499kΩ
2063 G36
2.2
2.5
85°C
6
Supply Current vs Temperature
Supply Current vs Supply Voltage
2.0
Maximum Undistorted Output
Amplitude vs Frequency
2063 G35
2063 G34
0
MAXIMUM UNDISTORTED OUTPUT VOLTAGE (VP-P)
THD vs Frequency
LTC2065 Crosstalk vs Frequency
–30
–60
85°C
–70
125°C
–80
125°C
–90
–100
–100
0
1
2
3
VSHDN (V)
25°C
–50
–90
–1
–40°C
–40
4
5
6
2063 G41
–1
–0.5
0
0.5
1
VSHDN (V)
1.5
2
2063 G42
Rev. C
For more information www.analog.com
LTC2063/LTC2064/LTC2065
TYPICAL PERFORMANCE CHARACTERISTICS
Shutdown Supply Current vs
Supply Voltage
SHDN Pin Current vs Temperature
400
VSHDN = 0V
–50
–60
250
300
IS PER AMPLIFIER (nA)
ISHDN (nA)
–40
300
IS PER AMPLIFIER (nA)
–30
Shutdown Supply Current vs
Temperature
125°C
200
85°C
25°C
100
–70
VS = 5V
200
150
100
VS = 1.8V
–40°C
–80
–50
–25
0
25
50
75
TEMPERATURE (°C)
100
0
125
Output Voltage Swing High
vs Load Current
10
10
10
VS = 1.8V
1
100m
100m
100m
125°C
85°C
25°C
–40°C
0.01
0.1
1
ISOURCE (mA)
10
10m
1m
10µ
0.001
100
0.01
2063 G46
Output Voltage Swing Low
vs Load Current
0.1
1
ISOURCE (mA)
10
6
VS = 1.8V
5
1
VOLTAGE (V)
10m
1m
125°C
85°C
25°C
–40°C
100µ
0.01
0.1
1
ISINK (mA)
10
100
10µ
0.001
100
0.01
0.1
1
ISINK (mA)
2063 G47
10
100
2063 G48
Output Short Circuit Current
vs Temperature
90
AV = +1
VS = +5V
VIN = 5.6VP-P
80
VS = 5V
70
60
3
2
SOURCING
50
40
SINKING
30
1
20
0
VOUT
VIN
–1
1ms/DIV
2063 G49
125°C
85°C
25°C
–40°C
100µ
4
100m
VS = 5V
1m
No Phase Reversal
10
10µ
0.001
125°C
85°C
25°C
–40°C
100µ
125
10m
ISC (mA)
10µ
0.001
VOL – V – (V)
1
100µ
100
Output Voltage Swing Low
vs Load Current
1
V + – V OH (V)
V + – V OH (V)
VS = 5V
1m
0
25
50
75
TEMPERATURE (°C)
2063 G45
Output Voltage Swing High
vs Load Current
10m
–25
2063 G44
2063 G43
VOL – V – (V)
50
–50
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5
VS (V)
2063 G50
10
0
–50
–25
0
25
50
75
TEMPERATURE (°C)
100
125
2063 G51
Rev. C
For more information www.analog.com
11
LTC2063/LTC2064/LTC2065
TYPICAL PERFORMANCE CHARACTERISTICS
Output Short Circuit Current
vs Temperature
20
Large Signal Response
VS = ±2.5V
AV = +1
VS = 1.8V
15
ISC (mA)
Large Signal Response
SINKING
VS = ±0.9V
AV = +1
VOUT
0.5V/DIV
VOUT
1V/DIV
10
SOURCING
5
2063 G53
1ms/DIV
0
–50
–25
0
25
50
75
TEMPERATURE (°C)
100
2063 G54
1ms/DIV
125
2063 G52
30
20
20
10
10
0
–10
–20
VS = 5V
VIN = ±25mV
AV = +1
0
–10
–40
–30
–40
TIME (100µs/DIV)
VS = 1.8V
VIN = ±25mV
AV = +1
5
0
+OS
1
10
100
CL (pF)
1000
2063 G57
Positive Output Overload
Recovery
VS = ±2.5V
AV = –100
20
–OS
10
VS = 1.8V
VIN = 50mV
AV = +1
25
+OS
15
Positive Output Overload
Recovery
30
OVERSHOOT (%)
20
2063 G56
Small Signal Overshoot
vs Load Capacitance
35
25
TIME (100µs/DIV)
2063 G55
40
VS = 5V
VIN = 50mV
AV = +1
35
30
–20
–30
40
CL = 100pF
CL = 3.9pF
30
VOUT (mV)
VOUT (mV)
40
CL = 100pF
CL = 3.9pF
OVERSHOOT (%)
40
Small Signal Overshoot
vs Load Capacitance
Small Signal Response
Small Signal Response
VS = ±0.9V
AV = –100
VOUT
1V/DIV
VOUT
0.5V/DIV
VIN
50mV/DIV
VIN
50mV/DIV
15
–OS
10
1ms/DIV
5
0
1
10
100
CL (pF)
12
2063 G59
2ms/DIV
2063 G60
1000
2063 G58
Rev. C
For more information www.analog.com
LTC2063/LTC2064/LTC2065
TYPICAL PERFORMANCE CHARACTERISTICS
Negative Output Overload
Recovery
Negative Output Overload
Recovery
Positive Input Overload Recovery
VS = ±0.9V
AV = –100
VS = ±2.5V
AV = –100
VS = ±2.5V
AV = +1
VOUT
0.5V/DIV
VOUT
1V/DIV
VIN
50mV/DIV
VIN
1V/DIV
VIN
50mV/DIV
1ms/DIV
VOUT
1V/DIV
2063 G61
2ms/DIV
Positive Input Overload Recovery
2063 G62
200µs/DIV
Negative Input Overload Recovery
Negative Input Overload Recovery
VS = ±2.5V
AV = +1
VS = ±0.9V
AV = +1
VIN
0.5V/DIV
VS = ±0.9V
AV = +1
VIN
0.5V/DIV
VIN
1V/DIV
VOUT
0.5V/DIV
VOUT
0.5V/DIV
VOUT
1V/DIV
200µs/DIV
2063 G64
2063 G63
200µs/DIV
2063 G65
200µs/DIV
2063 G66
Rev. C
For more information www.analog.com
13
LTC2063/LTC2064/LTC2065
PIN FUNCTIONS
V–: Negative Power Supply. A bypass capacitor should be
used between supply pins and ground.
OUT: Amplifier Output
–IN: Inverting Amplifier Input
+IN: Noninverting Amplifier Input
V+: Positive Power Supply. A bypass capacitor should be
used between supply pins and ground.
SHDN: Shutdown Control Pin. The SHDN pin threshold is
referenced to V–. If tied to V+, the part is enabled. If tied
to V–, the part is disabled and draws less than 170nA of
supply current per amplifier. It is recommended to not
float this pin.
BLOCK DIAGRAM
Amplifier
Shutdown Circuit
V+
V+
V+
50nA
10k
SHDN
+IN
V–
7k
V–
V+
EMI
FILTER
7k
SHDN
V+
V+
2063 BDb
V–
+
OUT
–
2063 BDa
V–
V–
–IN
V–
14
Rev. C
For more information www.analog.com
LTC2063/LTC2064/LTC2065
APPLICATIONS INFORMATION
Using the LTC2063/LTC2064/LTC2065
The LTC2063/LTC2064/LTC2065 are single, dual and
quad zero-drift operational amplifiers with the open-loop
voltage gain and bandwidth characteristics of a conventional operational amplifier. Advanced circuit techniques
allow the LTC2063/LTC2064/LTC2065 to operate continuously through its entire bandwidth while self-calibrating
unwanted errors.
Input Voltage Noise
Zero-drift amplifiers like the LTC2063/LTC2064/LTC2065
achieve low input offset voltage and 1/f noise by heterodyning DC and flicker noise to higher frequencies. In early
zero-drift amplifiers, this process resulted in idle tones
at the self-calibration frequency, often referred to as the
chopping frequency. These artifacts made early zero-drift
amplifiers difficult to use. The advanced circuit techniques
used by the LTC2063/LTC2064/LTC2065 suppress these
spurious artifacts, allowing for trouble-free use.
Input Current Noise
For applications with high source and feedback impedances, input current noise can be a significant contributor
to total output noise. For this reason, it is important to
consider noise current interaction with circuit elements
placed at the amplifier’s inputs.
CURRENT NOISE DENSITY (fA/√Hz)
1k
VS = 5V
VCM = 2.5V
100
10
0.1
1
10
100
1k
FREQUENCY (Hz)
10k 50k
2063 F01
Figure 1. Input Current Noise Spectrum
The current noise spectrum of the LTC2063/LTC2064/
LTC2065 is shown in Figure 1. Low input current noise
is achieved through the use of MOSFET input devices and
self-calibration techniques to eliminate 1/f current noise.
As with all zero-drift amplifiers, there is an increase in
current noise at the offset-nulling frequency. This phenomenon is discussed in the Input Bias Current and Clock
Feedthrough section.
Input current noise also rises with frequency due to
capacitive coupling of MOSFET channel thermal noise.
Input Bias Current and Clock Feedthrough
The input bias current of zero-drift amplifiers has different characteristics than that of a traditional operational
amplifier. The specified input bias current is the DC average of transient currents which conduct due to the input
stage’s switching circuitry. In addition to this, junction
leakages can contribute additional input bias current at
elevated temperatures. Through careful design and the
use of an innovative boot-strap circuit, the input bias current of the LTC2063/LTC2064/LTC2065 does not exceed
20pA at room and 100pA over the full temperature range.
This minimizes bias current induced errors even in high
impedance circuits.
Transient switching currents at the input interact with
source and feedback impedances, producing error voltages which are indistinguishable from a valid input signal.
The resulting error voltages are amplified by the amplifier’s closed-loop gain, which acts as a filter, attenuating
frequency components above the circuit bandwidth. This
phenomenon is known as clock feedthrough and is present in all zero-drift amplifiers. Understanding the cause
and effect of clock feedthrough is important when using
zero-drift amplifiers.
For zero-drift amplifiers, clock feedthrough is proportional
to source and feedback impedances, as well as the magnitude of the transient currents. These transient currents
have been minimized in the LTC2063/LTC2064/LTC2065
to allow use with high source and feedback impedances.
Rev. C
For more information www.analog.com
15
LTC2063/LTC2064/LTC2065
APPLICATIONS INFORMATION
In order to achieve accuracy on the microvolt level, thermocouple effects must be considered. Any connection
of dissimilar metals forms a thermoelectric junction and
generates a small temperature-dependent voltage. Also
known as the Seebeck Effect, these thermal EMFs can be
the dominant error source in low-drift circuits.
Connectors, switches, relay contacts, sockets, resistors,
and solder are all candidates for significant thermal EMF
generation. Even junctions of copper wire from different
manufacturers can generate thermal EMFs of 200nV/°C,
which significantly exceeds the maximum drift specification of the LTC2063/LTC2064/LTC2065. Figures 2 and 3
illustrate the potential magnitude of these voltages and
their sensitivity to temperature.
In order to minimize thermocouple-induced errors, attention must be given to circuit board layout and component
selection. It is good practice to minimize the number of
junctions in the amplifier’s input signal path and avoid connectors, sockets, switches, and relays whenever possible.
If such components are required, they should be selected
for low thermal EMF characteristics. Furthermore, the number, type, and layout of junctions should be matched for
both inputs with respect to thermal gradients on the circuit board. Doing so may involve deliberately introducing
dummy junctions to offset unavoidable junctions.
Air currents can also lead to thermal gradients and cause
significant noise in measurement systems. It is important
to prevent airflow across sensitive circuits. Doing so will
often reduce thermocouple noise substantially. A summary of techniques can be found in Figure 4.
16
3.0
2.8
2.6
2.4
2.2
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
MICROVOLTS REFERRED TO 25°C
Thermocouple Effects
25
35
30
40
45
TEMPERATURE (°C)
2063 F02
Figure 2. Thermal EMF Generated by Two Copper
Wires from Different Manufacturers
THERMALLY PRODUCED VOLTAGE IN MICROVOLTS
Many circuit designs require high feedback impedances
to minimize power consumption and/or require a sensor
which is intrinsically high impedance. In these cases, a
capacitor can be used, either at the input or across the
feedback resistor, to limit the bandwidth of the closedloop system. Doing so will effectively filter out the clock
feedthrough signal.
100
SLOPE ≈ 1.5µV/°C
BELOW 25°C
50
64% SN/36% Pb
0
60% Cd/40% SN
SLOPE ≈ 160nV/°C
BELOW 25°C
–50
–100
10
30
0
40
50
20
SOLDER-COPPER JUNCTION DIFFERENTIAL TEMPERATURE
SOURCE: NEW ELECTRONICS 02-06-77
2063 F03
Figure 3. Solder-Copper Thermal EMFs
Leakage Effects
Leakage currents into high impedance signal nodes can
easily degrade measurement accuracy of sub-nanoamp
signals. High voltage and high temperature applications
are especially susceptible to these issues. Quality insulation materials should be used, and insulating surfaces
should be cleaned to remove fluxes and other residues.
For humid environments, surface coating may be necessary to provide a moisture barrier.
Rev. C
For more information www.analog.com
LTC2063/LTC2064/LTC2065
APPLICATIONS INFORMATION
HEAT SOURCE/
POWER DISSIPATOR
RG**
+–
VIN
THERMAL
GRADIENT
+IN
OUT
LTC2063
†
NC
‡
VTHERMAL
RL§
–IN
RG
+–
VTHERMAL
RF§
RELAY
**
#
RF
MATCHING RELAY
#
*
2063 F04
* CUT SLOTS IN PCB FOR THERMAL ISOLATION.
** INTRODUCE DUMMY JUNCTIONS AND COMPONENTS TO OFFSET UNAVOIDABLE JUNCTIONS OR CANCEL THERMAL EMFs.
† ALIGN INPUTS SYMMETRICALLY WITH RESPECT TO THERMAL GRADIENTS.
‡ INTRODUCE DUMMY TRACES AND COMPONENTS FOR SYMMETRICAL THERMAL HEAT SINKING.
§ LOADS AND FEEDBACK CAN DISSIPATE POWER AND GENERATE THERMAL GRADIENTS. BE AWARE OF THEIR THERMAL EFFECTS.
# COVER CIRCUIT TO PREVENT AIR CURRENTS FROM CREATING THERMAL GRADIENTS.
Figure 4. Techniques for Minimizing Thermocouple-Induced Errors
NO SOLDER MASK
OVER GUARD RING
GUARD
RING
LEAKAGE
CURRENT
VBIAS
‡
–IN
HIGH-Z
SENSOR
RF
+IN
V–
§
V+
V–
OUT
VOUT
V+
‡ NO LEAKAGE CURRENT, V–IN = V+IN
§ AVOID DISSIPATING SIGNIFICANT AMOUNTS OF POWER IN THIS RESISTOR.
IT WILL GENERATE THERMAL GRADIENTS WITH RESPECT TO THE INPUT
PINS AND LEAD TO THERMOCOUPLE-INDUCED ERROR. THERMALLY
ISOLATE OR ALIGN WITH INPUTS IF RESISTOR WILL CAUSE HEATING.
GUARD RING
VBIAS
RF
HIGH-Z SENSOR
VIN
–+
V+
RIN
–
LEAKAGE
CURRENT
LTC2063
VOUT
+
V–
LEAKAGE CURRENT IS ABSORBED BY GROUND INSTEAD OF
CAUSING A MEASUREMENT ERROR.
2063 F05
Figure 5. Example Layout of Inverting Amplifier with Leakage Guard Ring
Rev. C
For more information www.analog.com
17
LTC2063/LTC2064/LTC2065
APPLICATIONS INFORMATION
Board leakage can be minimized by encircling the input
connections with a guard ring operated at a potential very
close to that of the inputs. The ring must be tied to a low
impedance node. For inverting configurations, the guard
ring should be tied to the potential of the positive input
(+IN). For noninverting configurations, the guard ring
should be tied to the potential of the negative input (–IN).
In order for this technique to be effective, the guard ring
must not be covered by solder mask. Ringing both sides
of the printed circuit board may be required. See Figure 5
for an example of proper layout.
Shutdown Mode
The LTC2063 in the SC70 package, the LTC2064 in the
DFN package, and the LTC2065 in the QFN package feature a shutdown mode for low-power applications. In the
OFF state, each amplifier draws less than 170nA of supply current and the outputs present a high impedance to
external circuitry.
Shutdown operation is accomplished by tying SHDN
below VL. If the shutdown feature is not required, it is
recommended that SHDN be tied to V+. A current source
pulls the SHDN pin high to automatically keep the amplifier in the ON state when the pin is floated, however this
may not be reliable at elevated temperatures due to board
leakage (see SHDN Circuit Block Diagram). For operation
in noisy environments, a capacitor between SHDN and V+
is recommended to prevent noise from changing the shutdown state. When there is a danger of SHDN being pulled
beyond the supply rails, resistance in series with the
SHDN pin is recommended to limit the resulting current.
A way to quantify the transient current loss is to integrate
the supply current during power-up to examine the total
charge loss. If there were no additional transient current,
the integrated supply current would appear as a smooth,
straight line with a slope equal to the DC supply current
of the part. Any deviation from a straight line indicates
additional transient current that is drawn from the supply.
The LTC2063/LTC2064/LTC2065 have been designed to
minimize this charge loss during power-up so that power
can be conserved in duty-cycled applications. Figure 6
shows the integrated supply current (i.e. charge) of the
LTC2063 during power-up. Likewise, Figure 7 shows the
charge loss due to enabling and disabling the part via the
SHDN pin.
V–
5V/DIV
1V/µs V– EDGE RATE
V+ = 5V
VOUT
2V/DIV
QV+
2nC/DIV
500µs/DIV
2063 F06
Figure 6. LTC2063 Charge Loss During Power-Up
VSHDN
5V/DIV
VOUT
2V/DIV
Start-Up Characteristics
Micropower op amps are often not micropower during
start-up, which can cause problems when used on low
current supplies. Large transient currents can conduct
during power-up until the internal bias nodes settle to
their final values. A large amount of current can be drawn
from the supplies during this transient, which can sustain
for several milliseconds in the case of a micropower part.
18
In the worst case, there may not be enough supply current
available to take the system up to nominal voltages. In
other cases, this transient power-up current will lead to
added power loss in duty-cycled applications.
QV+
2nC/DIV
500µs/DIV
2063 F07
Figure 7. LTC2063 Charge Loss Due to
Enabling and Disabling via SHDN Pin
Rev. C
For more information www.analog.com
LTC2063/LTC2064/LTC2065
APPLICATIONS INFORMATION
There are benefits when the SHDN pin is used to disable
and enable the part in duty-cycled applications, rather
than powering down the external supply voltage (V+).
Powering up and powering down the external supply will
tend to waste charge due to charging and discharging the
external decoupling capacitors. For these power-cycled
applications, a relay or MOS device can be located after
the decoupling capacitors to alleviate this, however there
are drawbacks to this approach. The LTC2063 draws an
initial charge of approximately 2nC when powered up.
This recurring charge loss is unavoidable in power-cycled
applications. Additionally, if the supply ramp rate exceeds
0.4V/µs, an internal transient ESD clamp will trigger, conducting additional current from V+ to V–. This will waste
charge and can make insignificant any savings that may
have been expected by power-cycling the supply. Figure 8
shows the charge loss at power-up.
The shutdown pin can be used to overcome these limitations in duty-cycled applications. The typical charge loss
transitioning into and out of shutdown is only 1nC. Since
the supply is not transitioned, the external decoupling
capacitors do not draw charge from the supply.
CHARGE CONSUMED TO
0.1% SETTLED POINT (nC)
100
10
Gas Sensor
This low power precision gas sensor circuit operates in
an oxygen level range of 0% to 30%, with a nominal output of 1V in normal atmospheric oxygen concentrations
(20.9%) when the gas sensor has been fully initialized.
Total active power consumption is less than 2.1μA on a
single rail supply.
Since this gas sensor produces 100μA in a normal oxygen environment and requires a 100Ω load resistor, the
resulting input signal is typically around 10mV. The
LTC2063’s rail-to-rail input means no additional DC level
shifting is necessary, all the way down to very low oxygen
concentrations.
Due to the extremely low input offset voltage of the
LTC2063, which is 1μV typically and 5μV maximum, it is
possible to gain up the mV-scale input signal substantially
without introducing significant error. In the configuration
shown in Figure 9, with a noninverting gain of 101V/V, the
worst-case input offset results in a maximum of 0.5mV
offset on the 1V output, or 0.05% error.
Although the 100kΩ resistor in series with the gas sensor does not strictly have the same precision requirement
as the 10MΩ and 100kΩ resistors that set the gain, it is
important to use a similar resistor at both input terminals.
This helps to minimize additional offset voltage at the inputs
due to thermocouple effects, hence the similar 0.1% precision requirement.
10M
0.1%
1
0.1
1
SUPPLY EDGE RATE (V/µs)
2
OXYGEN SENSOR
CITY TECHNOLOGY
40XV
2063 F08
100k
0.1%
100k
0.1%
100Ω
0.1%
Figure 8. LTC2063 Power-Up Charge vs Supply Edge Rate
www.citytech.com
1.8V
–
LTC2063
+
VOUT = 1V IN AIR
ISUPPLY = 1.4µA (ENABLED)
90nA (SHUTDOWN)
VSHDN
2063 F09
Figure 9. Micropower Precision Oxygen Sensor
Rev. C
For more information www.analog.com
19
LTC2063/LTC2064/LTC2065
APPLICATIONS INFORMATION
RTD Sensor
This low power platinum resistance temperature detector
(RTD) sensor circuit draws only 35μA total supply current
on a minimum 2.6V rail, and is accurate to within ±1°C
at room temperature, including all error intrinsic to the
Vishay PTS Class F0.3 Variant RTD. It covers the temperature range from –40°C to 85°C in 10mV/°C increments
and produces an output of 1V at nominal room temperature of 25°C.
The LTC2063’s extremely low typical offset of 1μV and
typical input bias current of 3pA allows for the use of a
very low excitation current in the RTD. Thus, self-heating
is negligible, improving accuracy.
The LT5400-3, B-grade, is used to provide a ±0.025%
matched resistor network that is effectively a precision
131:1 voltage divider. This precision divider forms one
half of a bridge circuit, with the 0.1% 110kΩ and RTD in
the other branch. Note that the 110kΩ’s precision requirement is to ensure matching with the RTD. The 11kΩ R2
serves to provide a DC offset for the entire bridge so
IN
2.6V ≤ VSUPPLY ≤ 18V
+
–
C1
0.1µF
LT6656-2.048
GND
that the output is 1V at room temperature. Since bridge
imbalances can lead to error, it is recommended to minimize the length of the leads connecting the RTD to reduce
additional lead resistance.
The LT6656-2.048 reference helps create a known excitation current in the RTD at each temperature of operation,
and also acts as a supply for the LTC2063, all while using
less than 1μA itself. The LT6656 can accept input voltages
anywhere between 2.6V and 18V, allowing for flexibility
in selection of supply voltage while maintaining a fixed
output range. The LT6656 reference can easily source
the 35μA required to run the entire circuit, thanks to the
LTC2063’s 2μA maximum supply current and ability to
handle microvolt signals produced by the RTD under low
excitation current.
Care should be taken to minimize thermocouple effects by
preventing significant thermal gradients between the two
op amp inputs. It is also important to choose feedback
and series resistors that are low-tempco to minimize error
due to drift over the entire temperature range.
OUT
C2
10µF
VISHAY PTS SERIES
1kΩ PtRTD, CLASS F0.3
PTS12061B1K00P100
www.vishay.com
110k
0.1%
±2ppm/°C
VOUT SCALE 10mV/°C
1V AT 25°C ROOM TEMP
ISUPPLY = 35µA
100k
RTD
1k
10k
10k
R2
11k
100k
+
OUT
LTC2063
–
RFB
1.58M
2063 F10
LT5400-3
131:1 VOLTAGE DIVIDER
Figure 10. RTD Sensor
20
Rev. C
For more information www.analog.com
LTC2063/LTC2064/LTC2065
APPLICATIONS INFORMATION
VIN
4.5V TO 90V
RIN
49.9Ω
0.1%
ISENSE
100µA TO 250mA
RSENSE
0.1Ω
C1
3.3µF
C4
10µF
–
R1
REF
49.9Ω
LT1389-4.096 0.1%
LTC2063
BSP322P
M1
+
D1
1N4148
LOAD
R2
100k
C3
100nF
C2
22µF
ROUT
4.99k
0.1%
VOUT = 10 • ISENSE
1mV TO 2.5V
BSP322P
M2
R3
499k
2063 F11
Figure 11. High Side Current Sense
90V High Side Current Sense
This micropower precision LTC2063 high side current
sense circuit measures currents from 100μA to 250mA
over a 4.5V to 90V input voltage range.
The output of this circuit is:
R
•R
VOUT = OUT SHUNT ISENSE = 500 •ISENSE
RIN
The LTC2063’s low typical input offset voltage of 1μV and
low input bias current of 3pA contribute output errors
that are much smaller than the error due to precision
limitations of the resistors used. Thus, output accuracy
is mainly set by the accuracy of the resistors RSENSE, RIN,
and ROUT.
The LT1389-4.096V reference, along with the bootstrap
circuit composed of M2, R3, and D1, establishes a very
low power isolated 3V rail that protects the LTC2063 from
reaching its absolute maximum voltage of 5.5V while
allowing for much higher input voltages.
Since the LTC2063’s gain-bandwidth product is 20kHz,
it is recommended to use this circuit to measure signals that are 2kHz or slower. Note that the output filter as
drawn will limit the frequency to 1.5Hz, which optimizes
for lowest noise. If this output filter bandwidth is too narrow, removing C2 leads to an output filter with 318Hz
bandwidth, created by C3 and ROUT.
Rev. C
For more information www.analog.com
21
LTC2063/LTC2064/LTC2065
TYPICAL APPLICATIONS
Precision Micropower Low Side Current Sense
12V
ILOAD
3.3V
LOAD
GAIN = 2.5V/10mV
VOUT = 2.5V/1A × ILOAD
+
10mΩ
LTC2063
10k
–
2.49M
2063 TA02
Micropower 16-Bit Data Acquisition
3V
INPUT
10k
1µF
+
10k
LTC2063
–
3
SPI
IN–
GND
22
VCC
LTC1864L
10µF
2.49M
REF
IN+
2063 TA04
Rev. C
For more information www.analog.com
LTC2063/LTC2064/LTC2065
TYPICAL APPLICATIONS
IN
BAT
>3.1V
12V
LT6656-3
OUT
10µF
2M
10µF
2M
2M
2M
14k
ILOAD CURRENT
TO BE MEASURED
(BI-DIRECTIONAL)
RSENSE
10mΩ
VREF
+
LTC2063
14k
–
VOUT = VREF/2 ±ILOAD × RSENSE × GAIN
GAIN = 2M/14k
2M
2063 TA03
0.1% RESISTORS TO MAINTAIN OFFSET ACCURACY
Parallel LTC2064 Amplifiers to Reduce Noise by √2
R2
909k
R1
100k
1.5V
–
1/2 LTC2064
+
R3
100Ω
–1.5V
IN
OUT
1.5V
R4
100Ω
+
R5
100k
1/2 LTC2064
–
–1.5V
R6
909k
2063 TA05
Rev. C
For more information www.analog.com
23
LTC2063/LTC2064/LTC2065
TYPICAL APPLICATIONS
Micropower 16-Bit Data Acquisition with Single-to-Differential Input Driver
R1
11k
1.25V
R2
100k
C2
100nF
+3.3V RAIL FOR WHOLE SYSTEM
+2.7V OK IF ADC INTERFACE PERMITS
–
TOTAL ISUPPLY:
193.6µA CONVERSION
< 38.6µA SLEEP MODE
R5
11k
R3
100Ω
1/2 LTC2064
+
C4
10nF
GAIN = +10V/V, FILTER BW = 10Hz
+3.3V
C6
0.1µF
GND
–
OUT
–
V+
REF
16-BIT
OUTPUT
GND
+3.3V
1/2 LTC2064
1.25V
+3.3V
R8
100Ω
1.25V
C7
1µF
+3.3V
LTC2480
R7
158k
C3
100nF
IN
OUT-NONINV
+
R6
15.8k
LT1790-1.25
R4
100Ω
C1
1µF
SINGLE-ENDED INPUT SIGNAL
1.25V OFFSET REQUIRED
MAX 250mVPP
IN
DIFFERENTIAL ANALOG OUTPUT SIGNAL
1.25V OFFSET
FULL SCALE ±1.25V
+3.3V
R9
100Ω
+
OUT-INV
C5
10nF
2063 TA06
GAIN = –10V/V, FILTER BW = 10Hz
24
Rev. C
For more information www.analog.com
LTC2063/LTC2064/LTC2065
PACKAGE DESCRIPTION
SC6 Package
6-Lead Plastic SC70
(Reference LTC DWG # 05-08-1638 Rev B)
0.47
MAX
0.65
REF
1.80 – 2.20
(NOTE 4)
1.00 REF
INDEX AREA
(NOTE 6)
1.80 – 2.40 1.15 – 1.35
(NOTE 4)
2.8 BSC 1.8 REF
PIN 1
RECOMMENDED SOLDER PAD LAYOUT
PER IPC CALCULATOR
0.10 – 0.40
0.65 BSC
0.15 – 0.30
6 PLCS (NOTE 3)
0.80 – 1.00
1.00 MAX
0.00 – 0.10
REF
GAUGE PLANE
0.15 BSC
0.26 – 0.46
0.10 – 0.18
(NOTE 3)
SC6 SC70 1205 REV B
NOTE:
1. DIMENSIONS ARE IN MILLIMETERS
2. DRAWING NOT TO SCALE
3. DIMENSIONS ARE INCLUSIVE OF PLATING
4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR
5. MOLD FLASH SHALL NOT EXCEED 0.254mm
6. DETAILS OF THE PIN 1 IDENTIFIER ARE OPTIONAL,
BUT MUST BE LOCATED WITHIN THE INDEX AREA
7. EIAJ PACKAGE REFERENCE IS EIAJ SC-70
8. JEDEC PACKAGE REFERENCE IS MO-203 VARIATION AB
Rev. C
For more information www.analog.com
25
LTC2063/LTC2064/LTC2065
PACKAGE DESCRIPTION
S5 Package
5-Lead Plastic TSOT-23
(Reference LTC DWG # 05-08-1635 Rev B)
0.62
MAX
0.95
REF
2.90 BSC
(NOTE 4)
1.22 REF
1.4 MIN
3.85 MAX 2.62 REF
2.80 BSC
1.50 – 1.75
(NOTE 4)
PIN ONE
RECOMMENDED SOLDER PAD LAYOUT
PER IPC CALCULATOR
0.30 – 0.45 TYP
5 PLCS (NOTE 3)
0.95 BSC
0.80 – 0.90
0.20 BSC
0.30 – 0.50 REF
0.09 – 0.20
(NOTE 3)
NOTE:
1. DIMENSIONS ARE IN MILLIMETERS
2. DRAWING NOT TO SCALE
3. DIMENSIONS ARE INCLUSIVE OF PLATING
4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR
5. MOLD FLASH SHALL NOT EXCEED 0.254mm
6. JEDEC PACKAGE REFERENCE IS MO-193
26
0.01 – 0.10
1.00 MAX
DATUM ‘A’
1.90 BSC
S5 TSOT-23 0302 REV B
Rev. C
For more information www.analog.com
LTC2063/LTC2064/LTC2065
PACKAGE DESCRIPTION
MS8 Package
8-Lead Plastic MSOP
(Reference LTC DWG # 05-08-1660 Rev G)
0.889 ±0.127
(.035 ±.005)
5.10
(.201)
MIN
3.20 – 3.45
(.126 – .136)
3.00 ±0.102
(.118 ±.004)
(NOTE 3)
0.65
(.0256)
BSC
0.42 ± 0.038
(.0165 ±.0015)
TYP
8
7 6 5
0.52
(.0205)
REF
RECOMMENDED SOLDER PAD LAYOUT
0.254
(.010)
3.00 ±0.102
(.118 ±.004)
(NOTE 4)
4.90 ±0.152
(.193 ±.006)
DETAIL “A”
0° – 6° TYP
GAUGE PLANE
0.53 ±0.152
(.021 ±.006)
DETAIL “A”
1
2 3
4
1.10
(.043)
MAX
0.86
(.034)
REF
0.18
(.007)
SEATING
PLANE
0.22 – 0.38
(.009 – .015)
TYP
0.65
(.0256)
BSC
0.1016 ±0.0508
(.004 ±.002)
MSOP (MS8) 0213 REV G
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
Rev. C
For more information www.analog.com
27
LTC2063/LTC2064/LTC2065
PACKAGE DESCRIPTION
DD Package
10-Lead Plastic DFN (3mm × 3mm)
(Reference LTC DWG # 05-08-1699 Rev C)
0.70 ±0.05
3.55 ±0.05
1.65 ±0.05
2.15 ±0.05 (2 SIDES)
PACKAGE
OUTLINE
0.25 ±0.05
0.50
BSC
2.38 ±0.05
(2 SIDES)
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
3.00 ±0.10
(4 SIDES)
R = 0.125
TYP
6
0.40 ±0.10
10
1.65 ±0.10
(2 SIDES)
PIN 1 NOTCH
R = 0.20 OR
0.35 × 45°
CHAMFER
PIN 1
TOP MARK
(SEE NOTE 6)
0.200 REF
5
0.75 ±0.05
0.00 – 0.05
1
(DD) DFN REV C 0310
0.25 ±0.05
0.50 BSC
2.38 ±0.10
(2 SIDES)
BOTTOM VIEW—EXPOSED PAD
NOTE:
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-2).
CHECK THE LTC WEBSITE DATA SHEET FOR CURRENT STATUS OF VARIATION ASSIGNMENT
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
28
Rev. C
For more information www.analog.com
LTC2063/LTC2064/LTC2065
PACKAGE DESCRIPTION
UD Package
16-Lead Plastic QFN (3mm × 3mm)
(Reference LTC DWG # 05-08-1782 Rev Ø)
Exposed Pad Variation BB
BOTTOM VIEW—EXPOSED PAD
3.00 ±0.10
(4 SIDES)
PIN 1 NOTCH R = 0.20 TYP
OR 0.25 × 45° CHAMFER
R = 0.115
TYP
0.75 ±0.05
15
16
PIN 1
TOP MARK
(NOTE 6)
0.40 ±0.10
1
2
1.60 ±0.10
(4-SIDES)
(UD16 VAR BB) QFN 0119 REV Ø
0.25 ±0.05
0.200 REF
0.00 – 0.05
NOTE:
1. DRAWING CONFORMS TO JEDEC PACKAGE OUTLINE MO-220 VARIATION (WEED-4)
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. NiPdAu PPF TERMINAL FINISH
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON THE TOP AND BOTTOM OF PACKAGE
0.50 BSC
0.70 ±0.05
3.50 ±0.05
1.60 ±0.05
2.10 ±0.05 (4 SIDES)
PACKAGE OUTLINE
0.25 ±0.05
0.50 BSC
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
Rev. C
For more information www.analog.com
29
LTC2063/LTC2064/LTC2065
PACKAGE DESCRIPTION
F Package
14-Lead Plastic TSSOP (4.4mm)
(Reference LTC DWG # 05-08-1650)
4.90 – 5.10*
(.193 – .201)
14 13 12 11 10 9 8
1.05 ±0.10
6.60 ±0.10
6.40
(.252)
BSC
4.50 ±0.10
0.45 ±0.05
0.65 BSC
1 2 3 4 5 6 7
RECOMMENDED SOLDER PAD LAYOUT
4.30 – 4.50**
(.169 – .177)
0.09 – 0.20
(.0035 – .0079)
0.25
REF
0.50 – 0.75
(.020 – .030)
NOTE:
1. CONTROLLING DIMENSION: MILLIMETERS
MILLIMETERS
2. DIMENSIONS ARE IN
(INCHES)
1.10
(.0433)
MAX
0° – 8°
0.65
(.0256)
BSC
0.19 – 0.30
(.0075 – .0118)
TYP
0.05 – 0.15
(.002 – .006)
F14 TSSOP 0204
3. DRAWING NOT TO SCALE
*DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED .152mm (.006") PER SIDE
**DIMENSIONS DO NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED .254mm (.010") PER SIDE
30
Rev. C
For more information www.analog.com
LTC2063/LTC2064/LTC2065
REVISION HISTORY
REV
DATE
DESCRIPTION
A
7/18
Added LTC2064, fixed typos.
PAGE NUMBER
All
B
4/20
Added LTC2065 to data sheet.
All
C
5/20
Corrected Order Information, QFN16 exposed pad, Figure 1 caption, minor typos.
2, 15, 18, 19,
21, 32
Rev. C
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog
Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications
subject to change without notice. No licenseFor
is granted
implication or
otherwise under any patent or patent rights of Analog Devices.
more by
information
www.analog.com
31
LTC2063/LTC2064/LTC2065
TYPICAL APPLICATION
C2
100nF
4CM CARBON MONOXIDE SENSOR
CITY TECHNOLOGY
70nA/ppm CO TYPICAL
R3
35.7k
2.5V
–
R1
402k
R2
100k
2.5V
2.5V
1/2 LTC2064
+
C1
100nF
CE
R4
1M
RE
4CM
WE
J1
MMBFJ270
C4
100nF
RBURDEN
5Ω
R5
35.7k
–
4CM COUNTER ELECTRODE (CE)
SELF-BIASES BELOW WE POTENTIAL
VWE – VCE = –0.3V TO –0.4V TYPICAL
2.5V
R6
402k
2.5V
1/2 LTC2064
+
R7
100k
INPUT RANGE: 0ppm TO 500ppm CO
TYPICAL GAIN: 2.5mV/ppm CO
OUTPUT: 1.7V (TYP), 2.0V (MAX) AT 500ppm CO
C3
100nF
R8
100k OUT
C5
10µF
2063 TA07
RELATED PARTS
DESCRIPTION
COMMENTS
ADA4051-1/ADA4051-2
PART NUMBER
Micropower, Single/Dual, Zero-Drift Operational Amplifiers
7μA IS, 15μV VOS, 11.8V to 5.5V VS, 115kHz, RRIO
LTC2066/LTC2067/
LTC2068
Micropower, Low IB Single/Dual/Quad, Zero-Drift Op Amps
2μA IS, 5μV VOS, 1.7V to 5.25V VS, 20kHz, RRIO
LTC2054/LTC2055
Micropower, Single/Dual, Zero-Drift Operational Amplifier
130μA IS, 5μV VOS, 2.7V to 11 V VS, 500kHz, RR Output
ADA4522-1/ADA4522-2/ 55V, Low Noise Zero-Drift Operational Amplifier
ADA4522-4
900μA IS, 5.8nV/√Hz, 5μV VOS, 4.5V to 55V VS, 3MHz, RR Output
LTC2057/LTC2057HV
High Voltage-Low Noise Zero-Drift Operational Amplifier
4μV VOS, 1.2mA IS, 4.75V to 60V VS, 1.5MHz, RR Output
LTC2058
36V, Low Noise Zero-Drift Operational Amplifier
5μV VOS, 1.2mA IS, 4.75V to 36V VS, 2.5MHz, RR Output
LTC2050/LTC2050HV
Zero-Drift Operational Amplifier
3μV VOS, 1.5mA IS, 2.7V to 12V VS, 3MHz, RR Output
LTC2051/LTC2052
Dual/Quad Zero-Drift Operational Amplifier
3μV VOS, 1.5mA IS, 2.7V to 12V VS, 3MHz, RR Output
ADA4528-1/ADA4528-2
5V Ultra Low Noise Zero-Drift Op Amps
5μV VOS, 5.6nV/√Hz, 1.7mA IS, 2.2V to 5.5V VS, 4MHz, RRIO
LT 1494/LT1495/
LT1496
1.5μA Max, Over-The-Top Precision Operational Amplifier
1.5μA IS, 375μV VOS, 2.2V to 36V VS, 2.7kHz, RRIO
®
LT6003/LT6004/LT6005 1.6V, 1μA Precision Rail-to-Rail Input and Output Op Amps 1μA IS, 500μV VOS, 1.6V to 16V VS, 2kHz, RRIO
LT6023
Micropower, Enhanced Slew Op Amp
20μA IS, 20μV VOS, 3V to 30V VS, 40kHz
LTC2053
Precision, Rail-to-Rail, Zero-Drift, PGIA
1.3mA IS, 10μV VOS, 2.7V to 12V VS, 200kHz, RRIO
LT5400
Quad Matched Resistor Network
0.01% Matching, 8ppm/°C Temp Drift , 0.2ppm/°C Temp Matching
32
Rev. C
5/20
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