LTC2207/LTC2206
16-Bit, 105Msps/80Msps
ADCs
DESCRIPTION
FEATURES
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Sample Rate: 105Msps/80Msps
78.2dBFS Noise Floor
100dB SFDR
SFDR >82dB at 250MHz (1.5VP-P Input Range)
PGA Front End (2.25VP-P or 1.5VP-P Input Range)
700MHz Full Power Bandwidth S/H
Optional Internal Dither
Optional Data Output Randomizer
Single 3.3V Supply
Power Dissipation: 900mW/725mW
Optional Clock Duty Cycle Stabilizer
Out-of-Range Indicator
Pin-Compatible Family
105Msps: LTC2207 (16-Bit), LTC2207-14 (14-Bit)
80Msps: LTC2206 (16-Bit), LTC2206-14 (14-Bit)
65Msps: LTC2205 (16-Bit), LTC2205-14 (14-Bit)
40Msps: LTC2204 (16-Bit)
25Msps: LTC2203 (16-Bit) Single-Ended Clock
10Msps: LTC2202 (16-Bit) Single-Ended Clock
48-Pin 7mm × 7mm QFN Package
APPLICATIONS
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The LTC®2207/LTC2206 are 105Msps/80Msps, sampling
16-bit A/D converters designed for digitizing high frequency, wide dynamic range signals up to input frequencies
of 700MHz. The input range of the ADC can be optimized
with the PGA front end.
The LTC2207/LTC2206 are perfect for demanding communications applications, with AC performance that
includes 78.2dB Noise Floor and 100dB spurious free
dynamic range (SFDR). Ultralow jitter of 80fsRMS allows
undersampling of high input frequencies with excellent
noise performance. Maximum DC specs include ±4LSB
INL, ±1LSB DNL (no missing codes) over temperature.
A separate output power supply allows the CMOS output
swing to range from 0.5V to 3.6V.
The ENC+ and ENC– inputs may be driven differentially
or single-ended with a sine wave, PECL, LVDS, TTL or
CMOS inputs. An optional clock duty cycle stabilizer allows high performance at full speed with a wide range of
clock duty cycles.
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
Telecommunications
Receivers
Cellular Base Stations
Spectrum Analysis
Imaging Systems
ATE
TYPICAL APPLICATION
LTC2207: 64K Point FFT,
fIN = 14.8MHz, –1dBFS,
PGA = 0, 105Msps
3.3V
SENSE
OVDD
2.2μF
AIN+
1.25V
COMMON MODE
BIAS VOLTAGE
+
ANALOG
INPUT
AIN–
INTERNAL ADC
REFERENCE
GENERATOR
16-BIT
PIPELINED
ADC CORE
S/H
AMP
–
0.5V TO 3.6V
0.1μF
OF
CLKOUT+
CLKOUT–
D15
•
•
•
D0
OUTPUT
DRIVERS
CORRECTION
LOGIC AND
SHIFT REGISTER
AMPLITUDE (dBFS)
VCM
OGND
CLOCK/DUTY
CYCLE
CONTROL
3.3V
VDD
GND
0.1μF
0.1μF
0.1μF
22076 TA01
ENC+
ENC–
PGA
SHDN
DITH
MODE
OE
ADC CONTROL INPUTS
RAND
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
–110
–120
–130
0
10
30
40
20
FREQUENCY (MHz)
50
22076 G05
22076fc
1
LTC2207/LTC2206
ABSOLUTE MAXIMUM RATINGS
PIN CONFIGURATION
OVDD = VDD (Notes 1, 2)
Supply Voltage (VDD) ................................... –0.3V to 4V
Digital Output Ground Voltage (OGND) ........ –0.3V to 1V
Analog Input Voltage (Note 3) .......–0.3V to (VDD + 0.3V)
Digital Input Voltage......................–0.3V to (VDD + 0.3V)
Digital Output Voltage ................ –0.3V to (OVDD + 0.3V)
Power Dissipation .............................................2000mW
Operating Temperature Range
LTC2207C/LTC2206C ............................... 0°C to 70°C
LTC2207I/LTC2206I.............................. –40°C to 85°C
Storage Temperature Range................... –65°C to 150°C
Digital Output Supply Voltage (OVDD) .......... –0.3V to 4V
48 GND
47 PGA
46 RAND
45 MODE
44 OE
43 OF
42 D15
41 D14
40 D13
39 D12
38 OGND
37 OVDD
TOP VIEW
SENSE 1
VCM 2
VDD 3
VDD 4
GND 5
AIN+ 6
AIN– 7
GND 8
ENC+ 9
ENC– 10
GND 11
VDD 12
36 OVDD
35 D11
34 D10
33 D9
32 D8
31 OGND
30 CLKOUT+
29 CLKOUT–
28 D7
27 D6
26 D5
25 OVDD
VDD 13
VDD 14
GND 15
SHDN 16
DITH 17
D0 18
D1 19
D2 20
D3 21
D4 22
OGND 23
OVDD 24
49
UK PACKAGE
48-LEAD (7mm s 7mm) PLASTIC QFN
EXPOSED PAD IS GND (PIN 49) MUST BE SOLDERED TO PCB BOARD
TJMAX = 150°C, θJA = 29°C/W
ORDER INFORMATION
LEAD FREE FINISH
TAPE AND REEL
PART MARKING*
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LTC2207CUK#PBF
LTC2207CUK#TRPBF
LTC2207UK
48-Lead (7mm × 7mm) Plastic Plastic QFN
0°C to 70°C
LTC2206CUK#PBF
LTC2206CUK#TRPBF
LTC2206UK
48-Lead (7mm × 7mm) Plastic Plastic QFN
0°C to 70°C
LTC2207IUK#PBF
LTC2207IUK#TRPBF
LTC2207UK
48-Lead (7mm × 7mm) Plastic Plastic QFN
–40°C to 85°C
LTC2206IUK#PBF
LTC2206IUK#TRPBF
LTC2206UK
48-Lead (7mm × 7mm) Plastic Plastic QFN
–40°C to 85°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
CONVERTER CHARACTERISTICS
The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. (Note 4)
PARAMETER
CONDITIONS
Integral Linearity Error
Differential Analog Input (Note 5) TA = 25°C
Integral Linearity Error
Differential Analog Input (Note 5)
Differential Linearity Error
Offset Error
MIN
TYP
MAX
±1.2
±4
LSB
●
1.5
±4.5
LSB
Differential Analog Input
●
±0.3
±1
LSB
(Note 6)
●
±1
±8.5
mV
Gain Error
External Reference
●
Full-Scale Drift
Internal Reference
External Reference
±10
Offset Drift
Transition Noise
±0.2
UNITS
μV/°C
±1.5
%FS
±30
±15
ppm/°C
ppm/°C
2.8
LSBRMS
22076fc
2
LTC2207/LTC2206
ANALOG INPUT
The ● denotes the specifications which apply over the full operating temperature range, otherwise
specifications are at TA = 25°C. (Note 4)
SYMBOL
PARAMETER
CONDITIONS
VIN
Analog Input Range (AIN+ – AIN–)
MIN
3.135V ≤ VDD ≤ 3.465V
●
VIN, CM
Analog Input Common Mode
Differential Input (Note 7)
●
IIN
Analog Input Leakage Current
0V ≤ AIN+, AIN– ≤ VDD (Note 10)
●
ISENSE
SENSE Input Leakage Current
0V ≤ SENSE ≤ VDD (Note 11)
●
IMODE
MODE Pin Pull-Down Current to GND
TYP
MAX
UNITS
1.5 to 2.25
1
1.25
–3
Sample Mode ENC+ < ENC–
Hold Mode ENC+ > ENC–
VP-P
1.5
V
1
μA
3
μA
10
μA
6.7
1.8
pF
pF
CIN
Analog Input Capacitance
tAP
Sample-and-Hold
Acquisition Delay Time
1
ns
tJITTER
Sample-and-Hold
Acquisition Delay Time Jitter
80
fsRMS
CMRR
Analog Input
Common Mode Rejection Ratio
1V < (AIN+ = AIN–)
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