LTC2919
Precision Triple/Dual Input
UV, OV and Negative
Voltage Monitor
FEATURES
DESCRIPTION
Two Low Voltage Adjustable Inputs (0.5V)
nn Accurate UVLO Provides a Third Monitor Input
nn Open-Drain RST, OUT1 and OUT2 Outputs
nn Pin Selectable Input Polarity Allows Negative, UV
and OV Monitoring
nn Guaranteed Threshold Accuracy: ±1.5%
nn 6.5V Shunt Regulator for High Voltage Operation
nn Low 50µA Quiescent Current
nn Buffered 1V Reference for Negative Supply Offset
nn Input Glitch Rejection
nn Adjustable Reset Timeout Period
nn Selectable Internal Timeout Saves Components
nn Outputs Guaranteed Low with V
CC = 0.5V
nn Space Saving 10-Lead 3mm × 2mm DFN and MSOP
Packages
nn AEC-Q100 Qualified for Automotive Applications
The LTC®2919 is a triple/dual input monitor intended for a
variety of system monitoring applications. Polarity selection and a buffered reference output allow the LTC2919 to
monitor positive and negative supplies for undervoltage
(UV) and overvoltage (OV) conditions.
nn
APPLICATIONS
Desktop and Notebook Computers
Network Servers
nn Core, I/O Monitor
nn Automotive
nn
The two adjustable inputs have a nominal 0.5V threshold,
featuring tight 1.5% threshold accuracy over the entire
operating temperature range. Glitch filtering ensures outputs operate reliably without false triggering. An accurate
threshold at the VCC pin provides a third input supply
monitor for a 2.5V, 3.3V or 5V supply.
Two independent output pins indicate the status of each
adjustable input. A third common output provides a
configurable reset timeout that may be set by an accurate internal 200ms timer, programmed with an external
capacitor, or disabled for a fast response. A three-state
input pin sets the input polarity of each adjustable input
without requiring any external components.
The LTC2919 provides a highly versatile, precise, spaceconscious, micropower solution for supply monitoring.
nn
All registered trademarks and trademarks are the property of their respective owners. Protected
by U.S. patents, including 6949965, 7292076.
TYPICAL APPLICATION
3.3V UV/OV (Window) Monitor Application with
200ms Internal Timeout (3.3V Logic Out)
3.3V
10k
LTC2919–2.5
10.7k
ADJ1
OUT1
REF
OUT2
76.8k
10k
UV
RST
ADJ2
SEL
POLARITY
0.1µF
VCC
453k
SEL Pin Connection for Input Polarity
Combinations
10k
OV
FAULT
TMR
GND
ADJ1
ADJ2
SEL PIN
+
+
VCC
+
–
OPEN
–
–
GND
2919 TA01a
Rev. A
Document Feedback
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1
LTC2919
ABSOLUTE MAXIMUM RATINGS
(Notes 1, 2)
Terminal Voltages
VCC (Note 3).............................................. –0.3V to 6V
OUT1, OUT2, RST...................................–0.3V to 7.5V
ADJ1, ADJ2.............................................–0.3V to 7.5V
TMR, SEL...................................–0.3V to (VCC + 0.3V)
Terminal Currents
ICC (Note 3)....................................................... ±10mA
IREF..................................................................... ±1mA
ADJ1, ADJ2.........................................................–1mA
Operating Temperature Range
LTC2919C................................................. 0°C to 70°C
LTC2919I..............................................– 40°C to 85°C
LTC2919H........................................... –40°C to 125°C
Maximum Junction Temperature........................... 150°C
Storage Temperature Range...................– 65°C to 150°C
Lead Temperature (Soldering, 10 sec)
MSOP-10............................................................ 300°C
PIN CONFIGURATION
TOP VIEW
SEL
1
10 ADJ1
VCC
2
9
ADJ2
OUT1
3
8
TMR
OUT2
4
7
REF
RST
5
6
GND
11
GND
TOP VIEW
SEL
VCC
OUT1
OUT2
RST
1
2
3
4
5
10
9
8
7
6
ADJ1
ADJ2
TMR
REF
GND
MS PACKAGE
10-LEAD PLASTIC MSOP
TJMAX = 150°C, θJA = 120°C/W
DDB PACKAGE
10-LEAD (3mm × 2mm) PLASTIC DFN
TJMAX = 150°C, θJA = 76°C/W
EXPOSED PAD (PIN 11) MAY BE LEFT OPEN OR TIED TO GND
ORDER INFORMATION
LEAD FREE FINISH
TAPE AND REEL
PART MARKING*
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LTC2919CDDB-2.5#TRMPBF
LTC2919CDDB-2.5#TRPBF
LDGT
10-Lead (3mm × 2mm) Plastic DFN
0°C to 70°C
LTC2919IDDB-2.5#TRMPBF
LTC2919IDDB-2.5#TRPBF
LDGT
10-Lead (3mm × 2mm) Plastic DFN
–40°C to 85°C
LTC2919HDDB-2.5#TRMPBF
LTC2919HDDB-2.5#TRPBF
LDGT
10-Lead (3mm × 2mm) Plastic DFN
–40°C to 125°C
LTC2919CDDB-3.3#TRMPBF
LTC2919CDDB-3.3#TRPBF
LDMW
10-Lead (3mm × 2mm) Plastic DFN
0°C to 70°C
LTC2919IDDB-3.3#TRMPBF
LTC2919IDDB-3.3#TRPBF
LDMW
10-Lead (3mm × 2mm) Plastic DFN
–40°C to 85°C
LTC2919HDDB-3.3#TRMPBF
LTC2919HDDB-3.3#TRPBF
LDMW
10-Lead (3mm × 2mm) Plastic DFN
–40°C to 125°C
LTC2919CDDB-5#TRMPBF
LTC2919CDDB-5#TRPBF
LDMX
10-Lead (3mm × 2mm) Plastic DFN
0°C to 70°C
LTC2919IDDB-5#TRMPBF
LTC2919IDDB-5#TRPBF
LDMX
10-Lead (3mm × 2mm) Plastic DFN
–40°C to 85°C
LTC2919HDDB-5#TRMPBF
LTC2919HDDB-5#TRPBF
LDMX
10-Lead (3mm × 2mm) Plastic DFN
–40°C to 125°C
LTC2919CMS-2.5#PBF
LTC2919CMS-2.5#TRPBF
LTDGS
10-Lead Plastic MSOP
0°C to 70°C
LTC2919IMS-2.5#PBF
LTC2919IMS-2.5#TRPBF
LTDGS
10-Lead Plastic MSOP
–40°C to 85°C
LTC2919HMS-2.5#PBF
LTC2919HMS-2.5#TRPBF
LTDGS
10-Lead Plastic MSOP
–40°C to 125°C
LTC2919CMS-3.3#PBF
LTC2919CMS-3.3#TRPBF
LTDMT
10-Lead Plastic MSOP
0°C to 70°C
LTC2919IMS-3.3#PBF
LTC2919IMS-3.3#TRPBF
LTDMT
10-Lead Plastic MSOP
–40°C to 85°C
LTC2919HMS-3.3#PBF
LTC2919HMS-3.3#TRPBF
LTDMT
10-Lead Plastic MSOP
–40°C to 125°C
2
Rev. A
For more information www.analog.com
LTC2919
LEAD FREE FINISH
TAPE AND REEL
PART MARKING*
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LTC2919CMS-5#PBF
LTC2919CMS-5#TRPBF
LTDMV
10-Lead Plastic MSOP
0°C to 70°C
LTC2919IMS-5#PBF
LTC2919IMS-5#TRPBF
LTDMV
10-Lead Plastic MSOP
–40°C to 85°C
LTC2919HMS-5#PBF
LTC2919HMS-5#TRPBF
LTDMV
10-Lead Plastic MSOP
–40°C to 125°C
AUTOMOTIVE PRODUCTS**
LTC2919IDDB-2.5#WTRMPBF
LTC2919IDDB-2.5#WTRPBF
LDGT
10-Lead (3mm × 2mm) Plastic DFN
–40°C to 85°C
LTC2919HDDB-2.5#WTRMPBF
LTC2919HDDB-2.5#WTRPBF
LDGT
10-Lead (3mm × 2mm) Plastic DFN
–40°C to 125°C
LTC2919IDDB-3.3#WTRMPBF
LTC2919IDDB-3.3#WTRPBF
LDMW
10-Lead (3mm × 2mm) Plastic DFN
–40°C to 85°C
LTC2919HDDB-3.3#WTRMPBF
LTC2919HDDB-3.3#WTRPBF
LDMW
10-Lead (3mm × 2mm) Plastic DFN
–40°C to 125°C
LTC2919IDDB-5#WTRMPBF
LTC2919IDDB-5#WTRPBF
LDMX
10-Lead (3mm × 2mm) Plastic DFN
–40°C to 85°C
LTC2919HDDB-5#WTRMPBF
LTC2919HDDB-5#WTRPBF
LDMX
10-Lead (3mm × 2mm) Plastic DFN
–40°C to 125°C
Contact the factory for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Tape and reel specifications. Some packages are available in 500 unit reels through designated sales channels with #TRMPBF suffix.
**Versions of this part are available with controlled manufacturing to support the quality and reliability requirements of automotive applications. These
models are designated with a #W suffix. Only the automotive grade products shown are available for use in automotive applications. Contact your
local Analog Devices account representative for specific product ordering information and to obtain the specific Automotive Reliability reports for
these models.
ELECTRICAL
CHARACTERISTICS l denotes the specifications which apply over the full operating
The
temperature range, otherwise specifications are at TA = 25°C. VCC = 2.5V (LTC2919-2.5), VCC = 3.3V (LTC2919-3.3), VCC = 5V
(LTC2919-5), ADJ1 = ADJ2 = 0.55V, SEL = floating, unless otherwise noted. (Note 2)
SYMBOL
PARAMETER
CONDITIONS
VCC(MIN)
Operating Supply Voltage
RST, OUT1, OUT2 in Correct State
l
MIN
0.5
VCC(SHUNT)
VCC Shunt Regulation Voltage
ICC = 1mA, IREF = 0
l
6.0
ICC
VCC Input Current
2.175V < VCC < 6V (C-Grade, I-Grade)
2.175V < VCC < 6V (H-Grade)
l
l
VRT
ADJ Input Threshold
TYP
MAX
UNITS
V
6.5
7.1
V
50
50
220
280
µA
µA
495.0
492.5
500
500
505.0
507.5
mV
mV
1.5
3.5
10.0
mV
0
0
±15
±40
nA
nA
2.175
2.871
4.350
2.213
2.921
4.425
2.250
2.970
4.500
V
V
V
0.3
0.7
2.0
%
l
0.990
0.985
1.000
1.000
1.010
1.015
V
V
l
DVRT
ADJ Hysteresis (Note 4)
TMR = VCC
IADJ
ADJ Input Current
VADJ = 0.55V (C-Grade, I-Grade)
VADJ = 0.55V (H-Grade)
l
l
VCC(UVLO)
VCC –10% UVLO Threshold
LTC2919-2.5
LTC2919-3.3
LTC2919-5
l
l
l
DVCC(UVLO)
UVLO Hysteresis (Note 4)
TMR = VCC
VREF
Buffered Reference Voltage
VCC > 2.175V, IREF = ±1mA
ITMR(UP)
TMR Pull-Up Current
VTMR = 1V
l
–1.5
–2.2
–2.9
µA
ITMR(DOWN)
TMR Pull-Down Current
VTMR = 1V
l
1.5
2.2
2.9
µA
tRST(EXT)
Reset Timeout Period, External
CTMR = 2.2nF
l
15
20
27
ms
tRST(INT)
Reset Timeout Period, Internal
VTMR = 0V
l
140
200
280
ms
Rev. A
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3
LTC2919
ELECTRICAL
CHARACTERISTICS l denotes the specifications which apply over the full operating
The
temperature range, otherwise specifications are at TA = 25°C. VCC = 2.5V (LTC2919-2.5), VCC = 3.3V (LTC2919-3.3), VCC = 5V
(LTC2919-5), ADJ1 = ADJ2 = 0.55V, SEL = floating, unless otherwise noted. (Note 2)
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
VTMR(DIS)
Timer Disable Voltage
VTMR Rising
l
VCC
– 0.40
VCC
– 0.20
VCC
– 0.10
V
DVTMR(DIS)
Timer Disable Hysteresis
VTMR Falling
l
40
100
160
mV
VTMR(INT)
Timer Internal Mode Voltage
VTMR Falling
l
0.10
0.20
0.40
V
DVTMR(INT)
Timer Internal Mode Hysteresis
VTMR Rising
l
40
100
160
mV
tPROP
ADJx Comparator Propagation Delay to
OUTX
ADJx Driven Beyond Threshold (VRTX) by
5mV
l
50
150
800
µs
tUV
VCC Undervoltage Detect to RST
VCC Less Than UVLO Threshold
(VCC(UVLO)) by 1%
l
50
150
800
µs
VOL
Output Voltage Low
VCC = 0.5V, I = 5µA
VCC = 1V, I = 100µA
VCC = 3V, I = 2500µA
l
l
l
0
0
0
0.01
0.01
0.10
0.15
0.15
0.30
V
V
V
IOH
Output Voltage High Leakage
Output = VCC (C-Grade, I-Grade)
Output = VCC (H-Grade)
l
l
0
0
±1
±5
µA
µA
Three-State Input SEL
VIL
Low Level Input Voltage
l
0
0.4
V
VIH
High Level Input Voltage
l
1.4
VCC
V
VZ
Pin Voltage when Left in Open State
1.0
V
ISEL(Z)
Allowable Leakage When Open
±5
µA
ISEL
SEL Input Current
±25
µA
ISEL = 0µA
0.9
l
SEL = VCC or SEL = GND
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: All currents into pins are positive; all voltages are referenced to
GND unless otherwise noted.
Note 3: VCC maximum pin voltage is limited by input current. Since the
VCC pin has an internal 6.5V shunt regulator, a low impedance supply
4
0.8
l
±17
which exceeds 6V may exceed the rated terminal current. Operation
from higher voltage supplies requires a series dropping resistor. See
Applications Information.
Note 4: Threshold voltages have no hysteresis unless the part is in
comparator mode. Hysteresis is one-sided, affecting only invalid-to-valid
transitions. See Applications Information.
Rev. A
For more information www.analog.com
LTC2919
506
504
502
500
498
496
494
492
–50 –25
0
25 50 75 100 125 150
TEMPERATURE (°C)
VCC UVLO Threshold Variation
vs Temperature
1.5
1.015
1.0
1.010
0.5
0
–0.5
VCC = 2.5V
0.4
TA = 150°C
0.2
TA = 25°C
0.0
TA = 125°C
–0.2
TA = –40°C
–0.4
–0.6
–1
–0.5
0
0.5
LOAD CURRENT (mA)
1
–1.0
–1.5
–50 –25
0
25 50 75 100 125 150
TEMPERATURE (°C)
0.985
–50 –25
0.6
90
IREF = 0A
TA = 150°C
0.4
0.2
TA = 25°C
0.0
TA = 125°C
–0.2
TA = –40°C
–0.4
–0.6
2
3
4
5
SUPPLY VOLTAGE (V)
300
200
100
0
1
10
100
0.1
GLITCH PERCENTAGE PAST THRESHOLD (%)
ADJ1 = 0.55V
ADJ2 = 0.45V
SEL = OPEN
70
60
VCC = 5V
50
VCC = 3.3V
VCC = 2.5V
40
30
20
–50 –25
6
0
25 50 75 100 125 150
TEMPERATURE (°C)
2919 G06
Reset Timeout Period
vs Capacitance
Reset Timeout Period
vs Temperature
260
RESET TIMEOUT PERIOD, tRST (ms)
400
80
2919 G05
RESET TIMEOUT PERIOD, tRST (ms)
500
25 50 75 100 125 150
TEMPERATURE (°C)
Quiescent Supply Current
vs Temperature
10000
600
0
2919 G03
REF Output Line Regulation
Propagation Delay vs Overdrive
PROPAGATION DELAY (µs)
1.000
0.990
2919 G04
700
1.005
2919 G02
REF VOLTAGE VARIATION (% OF 2.5V SUPPLY AND 25°C VALUE)
REF VOLTAGE, VARIATION (%OF NO LOAD AND 25°C VALUE)
0.6
IREF = 0A
0.995
2919 G01
REF Output Load Regulation
REF Output Voltage
vs Temperature
REF VOLTAGE, VREF (V)
THRESHOLD VOLTAGE, VRT (mV)
508
TA = 25°C, unless otherwise noted.
QUIESCENT SUPPLY CURRENT, ICC (µA)
ADJ Threshold Voltage
vs Temperature
THRESHOLD VOLTAGE VARIATION (% OF 25°C VALUE)
TYPICAL PERFORMANCE CHARACTERISTICS
1000
100
10
1
0.1
1
10
100
TMR PIN CAPACITANCE, CTMR (nF)
2919 G07
1000
2919 G08
240
INTERNAL
220
200
EXTERNAL, CTMR = 22nF
180
160
140
–50 –25
0
25 50 75 100 125 150
TEMPERATURE (°C)
2919 G09
Rev. A
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5
LTC2919
TYPICAL PERFORMANCE CHARACTERISTICS
Shunt Regulation Voltage
vs Supply Current
6.8
ICC = 10mA
6.6
ICC = 1mA
6.4
ICC = 100µA
6.2
6.0
–50 –25
0
25 50 75 100 125 150
TEMPERATURE (°C)
7.6
5
TA = 25°C
7.2
6.8
6.4
6.0
0.01
0.1
1
10
SUPPLY CURRENT, ICC (mA)
0
100
0.3
VCC
0.2
WITH 10k PULL-UP
0.1
0
0.2 0.3 0.4 0.5 0.6
SUPPLY VOLTAGE, VCC (V)
0.1
0.7
1
ADJ1 = 0.45V
ADJ2 = 0.55V
5 SEL = OPEN
4
OUTPUT AT 150mV
3
2
1
0
0.8
OUTPUT AT 50mV
0
1
2
3
4
SUPPLY VOLTAGE, VCC (V)
2919 G13
–10
VCC = 3V
NO PULL-UP R
0.8
LTC2919-3.3
1
0
3
4
2
SUPPLY VOLTAGE, VCC (V)
5
5
OUT1, OUT2, RST Pull-Down
Current vs VCC
OUTPUT AT 150mV
0.1
OUTPUT AT 50mV
0.01
0.001
0.0001
0
0.2
0.4
0.6
0.8
SUPPLY VOLTAGE, VCC (V)
1
2919 G15
2919 G14
OUT1, OUT2, RST VOL vs Output
Sink Current
1.0
LTC2919-5
2919 G12
OUTPUT PULL-DOWN CURRENT (mA)
OUTPUT PULL-DOWN CURRENT (mA)
OUTPUT VOLTAGE (V)
LTC2919-2.5
6
WITH 100k PULL-UP
ISEL vs Temperature
22
SEL = GND
–12
20
–14
18
ISEL vs Temperature
SEL = VCC
0.6
TA = 25°C
TA = 125°C
0.4
TA = –40°C
0.2
0
5
15
20
25
10
OUTPUT SINK CURRENT (mA)
30
ISEL (µA)
TA = 150°C
ISEL (µA)
OUTPUT, VOL (V)
2
OUT1, OUT2, RST Pull-Down
Current vs VCC
0.4
–16
16
–18
14
–20
12
–22
–50 –25
0
25 50 75 100 125 150
TEMPERATURE (°C)
2919 G17
2919 G16
6
3
2919 G11
OUT1, OUT2, RST Output Voltage
vs VCC
0
ADJ1 = 0.55V
ADJ2 = 0.45V
4 SEL = OPEN
10k PULL-UP R TO VCC
1
2919 G10
0
OUT1, OUT2, RST Output Voltage
vs VCC
OUTPUT VOLTAGE (V)
7.0
SHUNT REGULATION VOLTAGE, VCC(SHUNT) (V)
SHUNT REGULATOR VOLTAGE, VCC(SHUNT) (V)
Shunt Regulation Voltage
vs Temperature
TA = 25°C, unless otherwise noted.
10
–50 –25
0
25 50 75 100 125 150
TEMPERATURE (°C)
2919 G18
Rev. A
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LTC2919
PIN FUNCTIONS
(DFN/MSOP)
SEL (Pin 1): Input Polarity Select Three-State Input.
Connect to VCC, GND or leave unconnected in open state
to select one of three possible input polarity combinations
(refer to Table 1).
VCC (Pin 2): Power Supply. Bypass this pin to ground with
a 0.1μF (or greater) capacitor. Operates as a direct supply
input for voltages up to 6V. Operates as a shunt regulator
for supply voltages greater than 6V and should have a
resistor between this pin and the supply to limit VCC input
current to no greater than 10mA. When used without a
current-limiting resistor, pin voltage must not exceed 6V.
UVLO options allow VCC to be used as an accurate third
fixed -10% UV supply monitor.
OUT1 (Pin 3): Open-Drain Logic Output 1. Asserts low
when positive polarity ADJ1 voltage is below threshold or
negative polarity ADJ1 voltage is above threshold. Requires
an external pull-up resistor and may be pulled above VCC.
OUT2 (Pin 4): Open-Drain Logic Output 2. Asserts low
when positive polarity ADJ2 voltage is below threshold
or negative polarity ADJ2 voltage is above threshold.
Requires an external pull-up resistor and may be pulled
above VCC.
RST (Pin 5): Open-Drain Inverted Reset Logic Output.
Asserts low when any positive polarity input voltage is
below threshold or any negative polarity input voltage is
above threshold or VCC is below UVLO threshold. Held
low for a timeout period after all voltage inputs are valid.
Requires an external pull-up resistor and may be pulled
above VCC.
GND (Pin 6): Device Ground.
REF (Pin 7): Buffered Reference Output. 1V nominal reference used for the offset of negative-monitoring applications. The buffered reference can source and sink up to
1mA. The reference can drive a capacitive load of up to
1000pF. Larger capacitance may degrade transient performance. This pin does not require a bypass capacitor,
nor is one recommended. Leave open if unused.
TMR (Pin 8): Reset Timeout Control. Attach an external
capacitor (CTMR) to GND to set a reset timeout period
of 9ms/nF. A low leakage ceramic capacitor is recommended for timer accuracy. Capacitors larger than 1μF
(9 second timeout) are not recommended. See
Applications Information for further details. Leaving this
pin open generates a minimum timeout of approximately
400μs. A 2.2nF capacitor will generate a 20ms timeout.
Tying this pin to ground will enable the internal 200ms
timeout. Tying this pin to VCC will disable the reset timer
and put the part in comparator mode. Signals from the
comparator outputs will then go directly to RST.
ADJ2 (Pin 9): Adjustable Voltage Input 2. Input to voltage monitor comparator 2 (0.5V nominal threshold). The
polarity of the input is selected by the state of the SEL
pin (refer to Table 1). Tie to GND if unused (with SEL =
GND or Open).
ADJ1 (Pin 10): Adjustable Voltage Input 1. Input to voltage monitor comparator 1 (0.5V nominal threshold). The
polarity of the input is selected by the state of the SEL
pin (refer to Table 1). Tie to REF if unused (with SEL =
VCC or Open).
Exposed Pad (Pin 11, DFN Only): The Exposed Pad may
be left unconnected. For better thermal contact, tie to a
PCB trace. This trace must be grounded or unconnected.
Rev. A
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7
LTC2919
BLOCK DIAGRAM
SEL
VCC
VCC
THREE-STATE
DECODE
CONTROL 2
ADJ1
6.5V
OUT1
CONTROL 1
+
–
TMR
VCC
+
RST
EN
–
ADJ2
THREE-STATE
DECODE
ADJUSTABLE
PULSE
GENERATOR
GND
200ms
PULSE
GENERATOR
OUT2
+
–
+
–
SEL
GND
OPEN
VCC
500mV
REF
+
–
+
–
1.000V
CONTROL 1
H
L
L
CONTROL 2
H
H
L
CONTROL = H = NEGATIVE POLARITY
CONTROL = L = POSITIVE POLARITY
2919 BD
TIMING DIAGRAM
Positive Polarity Input Timing
VRT + ΔVRT
VRT
VADJ
tPROP
tRST
1V
RST
tPROP
1V
OUT
Negative Polarity Input Timing
tPROP
VRT
VADJ
VRT – ΔVRT
tPROP
tRST
1V
RST
tPROP
1V
OUT
UVLO Timing
tPROP
VCC VCC(UVLO)
VCC(UVLO) + ΔVCC(UVLO)
tUV
1V
RST
NOTES:
1. ΔVRT AND ΔVCC(UVLO) = 0, except in
Comparator Mode
2. IN COMPARATOR MODE, tRST = tPROP.
8
tPROP
OUT
tRST
tPROP
1V
2919 TD
Rev. A
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LTC2919
APPLICATIONS INFORMATION
The LTC2919 is a low power, high accuracy triple/dual
supply monitor with two adjustable inputs and an accurate
UVLO that can monitor a third supply. Reset timeout may
be selected with an external capacitor, set to an internally
generated 200ms, or disabled entirely.
The three-state polarity select pin (SEL) chooses one of
three possible polarity combinations for the adjustable
input thresholds, as described in Table 1. An individual
output is released when its corresponding ADJ input is
valid (above threshold if configured for positive polarity,
below threshold if configured for negative polarity).
Both input voltages (VADJ1 and VADJ2) must be valid and
VCC above the UVLO threshold for longer than the reset
timeout period before RST is released. The LTC2919
asserts the reset output during power-up, power-down
and brownout conditions on any of the voltage inputs.
Power-Up
The LTC2919 uses proprietary low voltage drive circuitry
for the RST, OUT1 and OUT2 pins which holds them low
with VCC as low as 200mV. This helps prevent indeterminate voltages from appearing on the outputs during
power-up.
In applications where the low voltage pull-down capability is important, the supply to which the external pull-up
resistor connects should be the same supply which powers the part. Using the same supply for both ensures that
RST, OUT1 and OUT2 never float above 200mV during
power-up, as the pull-down ability of the pin will then
increase as the required pull-down current to maintain a
logic low increases.
Once VCC passes the UVLO threshold, polarity selection
and timer initialization will occur. If the monitored ADJ
input is valid, the corresponding OUT will be released.
When both ADJ1 and ADJ2 are valid, the appropriate
timeout delay will begin, after which RST will be released.
Power-Down
On power-down, once VCC drops below the UVLO threshold or either VADJ becomes invalid, RST asserts logic low.
VCC of at least 0.5V guarantees a logic low of 0.15V at RST.
Shunt Regulator
The LTC2919 contains an internal 6.5V shunt regulator on
the VCC pin to allow operation from a high voltage supply.
To operate the part from a supply higher than 6V, the VCC
pin must have a current-limiting series resistor, RCC, to
the supply. This resistor should be sized according to the
following equation:
VS(MAX) – 6.2V
10mA
≤ R CC ≤
VS(MIN) – 6.8V
200µA + IREF
where VS(MIN) and VS(MAX) are the operating minimum
and maximum of the supply, and IREF is the maximum current the user expects to draw from the reference output.
As an example, consider operation from an automobile battery which might dip as low as 10V or spike to 60V. Assume
that the user will be drawing 100μA from the reference. We
must then pick a resistance between 5.4k and 10.7k.
When the VCC pin is connected to a low impedance supply,
it is important that the supply voltage never exceed 6V,
or the shunt regulator may begin to draw large currents.
Some supplies may have a nominal value sufficiently
close to the shunt regulation voltage to prevent sizing of
the resistor according to the above equation. For such
supplies, a 470Ω series resistor may be used.
Adjust Polarity Selection
The external connection of the SEL pin selects the polarities of the LTC2919 adjustable inputs. SEL may be connected to GND, connected to VCC or left unconnected
during normal operation. When left unconnected, the
maximum leakage allowable from the pin is ±5µA. Table 1
shows the three possible selections of polarity based on
SEL connection.
Table 1. Voltage Threshold Selection
ADJ1 INPUT
ADJ2 INPUT
SEL
Positive Polarity
(+) UV or (–) OV
Positive Polarity
(+) UV or (–) OV
VCC
Positive Polarity
(+) UV or (–) OV
Negative Polarity
(–) UV or (+) OV
Open
Negative Polarity
(–) UV or (+) OV
Negative Polarity
(–) UV or (+) OV
Ground
Note: Open = open circuit or driven by a three-state buffer in high impedance
state with leakage current less than 5μA.
Rev. A
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9
LTC2919
APPLICATIONS INFORMATION
If the user’s application requires, the SEL pin may be
driven using a three-state buffer which satisfies the VIL,
VIH and leakage conditions of this three-state input pin.
If the state of the SEL pin configures a given input as
“negative polarity,” the voltage at that ADJ pin must be
below the trip point (0.5V nominal), or the corresponding OUT and RST output will be pulled low. Conversely,
if a given input is configured as “positive polarity”, the
ADJ pin voltage must be above the trip point or the corresponding OUT and RST will assert low.
Thus, a “negative polarity” input may be used to determine whether a monitored negative voltage is smaller in
absolute value than it should be (–UV), or a monitored
positive voltage is larger than it should be (+OV). The
opposite is true for a “positive polarity” input (–OV or
+UV). These polarity definitions are also shown in Table 1.
For purposes of this data sheet, a negative voltage is considered “undervoltage” if it is closer to ground than it
should be (e.g., –4.3V for a –5V supply).
Proper configuration of the SEL pin and setting of the
trip-points via external resistors allows for any two fault
conditions to be detected. For example, the LTC2919 may
monitor two supplies (positive, negative or one of each)
for UV or for OV (or one UV and one OV). It may also
monitor a single supply (positive or negative) for both
UV and OV. Table 2a and Table 2b show example configurations for monitoring possible combinations of fault
condition and supply polarity.
Table 2a. Possible Combinations of Supply Monitoring. For Example Purposes, All Supplies are Monitored at 5% Tolerance and
Connections are Shown Only for ADJ1, ADJ2, REF, SEL, OUT1 and OUT2. Output Pull-up Resistors are Omitted for Clarity.
SEL = GND
SEL = VCC
15V
RP2A
309k
RP1A
11.5k
5V
–15V
RP2B
115k
RP1B
13.7k
ADJ1 OUT1
UV (15V)
ADJ2 OUT2
UV (5V)
REF
SEL
RN1A
10.7k
RN1B
13.3k
2 Positive UV
–15V
RN2A
1.02M
RN1A
30.9k
–5V
15V
RP2A
619k
ADJ1 OUT1
OV (–15V)
ADJ2 OUT2
OV (–5V)
REF
SEL
RP1A
20k
2 Negative OV
15V
RP2
309k
RP1
11.5k
15V
–15V
RP2
619k
ADJ1 OUT1
UV (15V)
ADJ2 OUT2
OV (–15V)
REF
SEL
1 Positive UV, 1 Negative OV
10
UV (–15V)
ADJ2 OUT2
UV (–5V)
REF
SEL
5V
RP2B
133k
RP1B
13.7k
ADJ1 OUT1
OV (15V)
ADJ2 OUT2
0V (5V)
REF
SEL
2 Positive OV
RN2
1.02M
RN1
30.9k
ADJ1 OUT1
2 Negative UV
RN2B
137k
RN1B
11.8k
–5V
RN2B
137k
RN2A
309k
RP1
20k
–15V
RN2
309k
RN1
10.7k
ADJ1 OUT1
OV (15V)
ADJ2 OUT2
UV (–15V)
REF
SEL
1 Positive OV, 1 Negative UV
Rev. A
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LTC2919
APPLICATIONS INFORMATION
Table 2b. Possible Combinations of Supply Monitoring. For Example Purposes, All Supplies are Monitored at 5% Tolerance and
Connections are Shown Only for ADJ1, ADJ2, REF, SEL, OUT1 and OUT2. Output Pull-up Resistors are Omitted for Clarity.
SEL OPEN
15V
–15V
RP6
2.37M
RN6
1.02M
RP5
10.7k
RP4
76.8k
ADJ1 OUT1
UV
ADJ2 OUT2
OV
REF
RN5
4.02k
RN4
30.9k
SEL
15V
RN1
10.7k
RN2
1.02M
ADJ1 OUT1
UV (15V)
ADJ2 OUT2
UV (–15V)
REF
RN1
30.9k
SEL
1 Positive UV, 1 Negative UV
15V
RP2A
309k
RP1A
11.5k
5V
–15V
ADJ1 OUT1
UV (15V)
ADJ2 OUT2
OV (5V)
REF
UV
SEL
15V
RP2
619k
RP1
20k
ADJ1 OUT1
OV (–15V)
ADJ2 OUT2
OV (15V)
REF
SEL
1 Negative OV, 1 Positive OV
RP2B
133k
RP1B
13.7k
ADJ2 OUT2
REF
–15V
–15V
RN2
309k
RP1
11.5k
OV
1 Negative UV and OV
1 Positive UV and OV
RP2
309k
ADJ1 OUT1
RN2A
1.02M
RN1A
30.9k
SEL
1 Positive UV, 1 Positive OV
–5V
RN2B
137k
RN1B
13.3k
ADJ1 OUT1
OV (–15V)
ADJ2 OUT2
UV (–5V)
REF
SEL
1 Negative UV, 1 Negative OV
Adjust Input Trip Point
The trip threshold for the supplies monitored by the
adjustable inputs is set with an external resistor divider,
allowing the user complete control over the trip point.
Selection of this trip voltage is crucial to the monitoring
of the system.
Any power supply has some tolerance band within which
it is expected to operate (e.g., 5V ±10%). It is generally undesirable that a supervisor issue a reset when the
power supply is inside this tolerance band. Such a “nuisance” reset reduces reliability by preventing the system
from functioning under normal conditions.
To prevent nuisance resets, the supervisor threshold must
be guaranteed to lie outside the power supply tolerance
band. To ensure that the threshold lies outside the power
supply tolerance range, the nominal threshold must lie
outside that range by the monitor’s accuracy specification.
All three of the LTC2919 inputs (ADJ1, ADJ2, VCC UVLO)
have the same maximum threshold accuracy of ±1.5%
of the programmed nominal input voltage (over the
full operating temperature range). Therefore, using the
LTC2919, the typical 10% UV threshold is at 11.5% below
the nominal input voltage level. For a 5V input, the threshold is nominally 4.425V. With ±1.5% accuracy, the trip
Rev. A
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11
LTC2919
APPLICATIONS INFORMATION
threshold range is 4.425V ±75mV over temperature (i.e.,
10% to 13% below 5V). The monitored system must thus
operate reliably down to 4.35V or 13% below 5V over
temperature.
The above discussion is concerned only with the DC value
of the monitored supply. Real supplies also have relatively
high frequency variations from sources such as load transients, noise and pickup.
The LTC2919 uses two techniques to combat spurious
outputs toggling from high frequency variation. First,
the timeout period helps prevent high frequency variation whose frequency is above 1/ tRST from appearing at
the RST output. Second, the propagation delay versus
overdrive function filters short glitches before the OUT1,
OUT2 toggling or RST pulling low.
TMR pin to VCC). If hysteresis is desired in other modes,
it may be added externally. See 48V Telecom UV/OV with
Hysteresis Applications on page 14 for an example.
Selecting External Resistors
In a typical positive supply monitoring application, the
ADJx pin connects to a tap point on an external resistive
divider between a positive voltage being monitored and
ground, as shown in Figure 1.
When monitoring a negative supply, the ADJx pin connects to a tap point on a resistive divider between the
negative voltage being monitored and the buffered reference (REF), as shown in Figure 2.
VMON
When an ADJ becomes invalid, the corresponding OUT
and RST pin assert low. When the supply recovers past
the valid threshold, the reset timer starts (assuming it is
not disabled) and RST does not go high until it finishes.
If the supply becomes invalid any time during the timeout
period, the timer resets and starts fresh when the supply
next becomes valid.
RP2
A common solution to the problem of spurious reset is
to introduce hysteresis around the nominal threshold.
However, this hysteresis degrades the effective accuracy
of the monitor and increases the range over which the
system must operate. The LTC2919 therefore does not
have hysteresis, except in comparator mode (by tying
12
+
RP1
–
0.5V
+
–
2919 F01
To reduce sensitivity of short glitches from toggling the
output pins, the comparator outputs go through a lowpass filter before triggering the output logic. Any transient
at the input of a comparator needs to be of sufficient
magnitude and duration to pass the filter before it can
change the monitor state.
The combination of the reset timeout and comparator
filtering prevents spurious changes in the output state
without sacrificing threshold accuracy. If further supply
glitch immunity is needed, the user may place an external
capacitor from the ADJ input to ground. The resultant RC
lowpass filter with the resistor divider will further reject
high frequency components of the supply, at the cost of
slowing the monitor’s response to fault conditions.
ADJx
Figure 1. Setting Positive Supply Trip Point
REF
RN1
ADJx
+
RN2
–
VMON
0.5V
+
–
2919 F02
Figure 2. Setting Negative Supply Trip Point
Normally the user will select a desired trip voltage based
on their supply and acceptable tolerances, and a value of
RN1 or RP1 based on current draw. Current used by the
resistive divider will be approximately:
I=
0.5V
R P1
.OR =
0.5V
R N1
Rev. A
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LTC2919
APPLICATIONS INFORMATION
To minimize errors arising from ADJ input bias and to
minimize loading on REF choose resistor RP1 (for positive
supply monitoring) or RN1 (for negative supply monitoring) in the range of 5k to 100k.
For a positive-monitoring application, RP2 is then chosen
by:
RP2 = RP1(2VTRIP – 1)
REF
ADJ1
+
RN4
RN5
–
ADJ2
+
RN6
–VMON
For a negative-monitoring application:
0.5V
+
–
–
RN2 = RN1(1 – 2VTRIP)
LOGIC
&
OPEN
DRAIN
MOSFET
LOGIC
&
OPEN
DRAIN
MOSFET
OUT1
OUT2
OV
UV
2919 F04
Note that the value VTRIP should be negative for a negative application.
Figure 4. Setting UV and OV Trip Point for a Negative Supply
The LTC2919 can also be used to monitor a single supply for both UV and OV. This may be accomplished with
three resistors, instead of the four required for two independent supplies. Configurations are shown in Figure 3 and
Figure 4. RP4 or RN4 may be chosen as is RP1 or RN1 above.
For example, consider monitoring a –5V supply at ±10%.
For this supply application: VOV = –5.575V and VUV =
–4.425V. Suppose we wish to consume about 5μA in the
divider, so RN4 = 100k. We then find RN5 = 21.0k, RN6 =
1.18M (nearest 1% standard values have been chosen).
For a given RP4, monitoring a positive supply:
VCC Monitoring/UVLO
V – VUV
R P5 = R P 4 OV
VUV
V
R P6 = R P 4 ( 2VUV – 1) OV
VUV
For monitoring a negative supply with a given RN4:
For applications that do not need VCC monitoring, the 2.5V
version should be used, and the UVLO will simply guarantee that the VCC is above the minimum required for proper
threshold and timer accuracy before the timeout begins.
V – VOV
R N5 = R N4 UV
1 – VUV
R N6 = R N4 ( 1 – 2VUV )
VMON
ADJ1
RP6
RP5
1 – VOV
1 – VUV
+
–
ADJ2
+
RP4
0.5V
+
–
–
The LTC2919 contains an accurate third -10% undervoltage monitor on the VCC pin. This monitor is fixed at a
nominal 11.5% below the VCC specified in the part number. The standard part (LTC2919-2.5) is configured to
monitor a 2.5V supply (UVLO threshold of 2.213V), but
versions to monitor 3.3V and 5.0V (UVLO of 2.921V and
4.425V, respectively) are available.
Setting the Reset Timeout
LOGIC
&
OPEN
DRAIN
MOSFET
LOGIC
&
OPEN
DRAIN
MOSFET
OUT1
OUT2
UV
OV
2919 F03
RST goes high after a reset timeout period set by the TMR
pin when the VCC and ADJ inputs are valid. This reset
timeout may be configured in one of three ways: internal
200ms, programmed by external capacitor and no timeout
(comparator mode).
In externally-controlled mode, the TMR pin is connected
by a capacitor to ground. The value of that capacitor allows
for selection of a timeout ranging from about 400μs to 9
seconds. See the following section for details.
Figure 3. Setting UV and OV Trip Point for a Positive Supply
Rev. A
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13
LTC2919
APPLICATIONS INFORMATION
If the user wishes to avoid having an external capacitor,
the TMR pin should be tied to ground, switching the part
to an internal 200ms timer.
If the user requires a shorter timeout than 400μs, or
wishes to perform application-specific processing of the
reset output, the part may be put in comparator mode by
tying the TMR pin to VCC. In comparator mode, the timer
is bypassed and comparator outputs go straight to the
reset output.
The current required to hold TMR at ground or VCC is
about 2.2μA. To force the pin from the floating state to
ground or VCC may require as much as 100μA during the
transition.
When the part is in comparator mode, one of the two
means of preventing false reset has been removed, so
a small amount of one-sided hysteresis is added to
the inputs to prevent oscillation as the monitored voltage passes through the threshold. This hysteresis is
such that the valid-to-invalid transition threshold is
unchanged, but the invalid-to-valid threshold is moved
by about 0.7%. Thus, when the ADJ input polarity is positive, the threshold voltage is 500mV nominal when the
input is above 500mV. As soon as the input drops below
500mV, the threshold moves up to 503.5mV nominal.
Conversely, when configured as a negative-polarity input,
the threshold is 500mV when the input is below 500mV,
and switches to 496.5mV when the input goes above
500mV.
The comparator mode feature is enabled by directly shorting the TMR pin to the VCC pin. Connecting the pin to any
other voltage may have unpredictable results.
Selecting the Reset Timing Capacitor
Connecting a capacitor, CTMR, between the TMR pin and
ground sets the reset timeout, tRST. The following formula approximates the value of capacitor needed for a
particular timeout:
Leaving the TMR pin open with no external capacitor generates a reset timeout of approximately 400μs.
Maximum length of the reset timeout is limited by the
ability of the part to charge a large capacitor on start-up.
Initially, with a large (discharged) capacitor on the TMR
pin, the part will assume it is in internal timer mode (since
the pin voltage will be at ground). If the 2.2μA flowing
out of the TMR pin does not charge the capacitor to the
ground-sense threshold within the first 200ms after supplies become good, the internal timer cycle will complete
and RST will go high too soon.
This imposes a practical limit of 1μF (9 second timeout) if
the length of timeout during power-up needs to be longer
than 200ms. If the power-up timeout is not important,
larger capacitors may be used, subject to the limitation
that the capacitor leakage current must not exceed 500nA,
or the function of the timer will be impaired.
Output Pins Characteristics
The DC characteristics of the OUT1, OUT2 and RST pulldown strength are shown in the Typical Performance
Characteristics section. OUT1, OUT2 and RST are opendrain pins and thus require external pull-up resistors to
the logic supply. They may be pulled above VCC, providing
the absolute maximum rating of the pin are observed.
As noted in the discussion of power up and power down,
the circuits that drive OUT1, OUT2 and RST are powered
by VCC. During a fault condition, VCC of at least 0.5V guarantees a VOL of 0.15V.
The open-drain nature of the RST pin allows for wired-OR
connection of several LTC2919s to monitor more than two
supplies (see Typical Applications). Other logic with opendrain outputs may also connect to the RST line, allowing
other logic-determined conditions to issue a reset.
CTMR = tRST • 110 [pF/ms]
14
Rev. A
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LTC2919
TYPICAL APPLICATIONS
Six Supply Undervoltage Monitor with 2.5V Reset Output and 20ms Timeout
15V
5V
–5V
–15V
3.3V
2.5V
SYSTEM
CBYP1
100nF
RPU5
10k
RPU1
10k
RPU2
10k
RN2A
137k
RN2B
309k
RN1A
13.3k
RPU3
10k
SYSTEM_OK
VCC
ADJ1
VCC
SEL
SEL
LTC2919-2.5
REF
ADJ2
TMR
OUT1
OUT2
GND
ADJ1
LTC2919-3.3
RST
RST
RN1B
10.7k
CTMR1
2.2nF
CBYP2
100nF
RPU4
10k
–5V_OK
5V_OK
–15V_OK
15V_OK
RP2A
115k
RP1A
13.7k
RP2B
309k
REF
RP1B
11.5k
OUT1
ADJ2
OUT2
TMR
GND
2919 TA02
CTMR2
2.2nF
Rev. A
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15
LTC2919
TYPICAL APPLICATIONS
48V Telecom UV/OV Monitor with Hysteresis
VIN
36V TO 72V
RP2A2
169k
SYSTEM
CBYP
100nF
RCC
27k
0.25W
RP2B
1.91M
RP2A
1.43M
5V
M2
RPU3
10k
VCC
RST
ADJ1
VUV(RISING): 43.3V
VUV(FALLING): 38.7V
VOV(RISING): 71.6V
VOV(FALLING): 70.2V
RP1A
18.7k
RP1B
13.7k
RP1B2
681k
M1
ADJ2
OUT1
REF
OUT2
SEL
GND
RPU1
10k
PWRGD
LTC2919-2.5
RPU2
10k
UV
OV
TMR
M1, M2: FDG6301N OR SIMILAR
2919 TA03
±12V UV Monitor Powered from
12V, 20ms Timeout (1.8V Logic Out)
12V
10k*
MANUAL
RESET
PUSHBUTTON
RP2
1.07M
RP1
49.9k
–12V
CBYP
100nF
RCC
10k
RN2
249k
RN1
10.7k
RPU3
10k
VCC
ADJ1
1.8V
RST
RPU1
10k
LTC2919-2.5
REF
OUT1
ADJ2
OUT2
SEL
TMR
RPU2
10k
12V_OK
–12V_OK
CTMR
2.2nF
GND
*OPTIONAL FOR ESD
16
2919 TA01b
Rev. A
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LTC2919
PACKAGE DESCRIPTION
DDB Package
10-Lead Plastic DFN (3mm × 2mm)
(Reference LTC DWG # 05-08-1722 Rev Ø)
0.64 ±0.05
(2 SIDES)
0.70 ±0.05
2.55 ±0.05
1.15 ±0.05
PACKAGE
OUTLINE
0.25 ±0.05
0.50 BSC
2.39 ±0.05
(2 SIDES)
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
3.00 ±0.10
(2 SIDES)
R = 0.05
TYP
R = 0.115
TYP
6
0.40 ±0.10
10
2.00 ±0.10
(2 SIDES)
PIN 1 BAR
TOP MARK
(SEE NOTE 6)
0.200 REF
0.75 ±0.05
0 – 0.05
0.64 ±0.05
(2 SIDES)
5
0.25 ±0.05
PIN 1
R = 0.20 OR
0.25 × 45°
CHAMFER
1
(DDB10) DFN 0905 REV Ø
0.50 BSC
2.39 ±0.05
(2 SIDES)
BOTTOM VIEW—EXPOSED PAD
NOTE:
1. DRAWING CONFORMS TO VERSION (WECD-1) IN JEDEC PACKAGE OUTLINE M0-229
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE
Rev. A
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17
LTC2919
PACKAGE DESCRIPTION
MS Package
10-Lead Plastic MSOP
(Reference LTC DWG # 05-08-1661 Rev F)
0.889 ±0.127
(.035 ±.005)
5.10
(.201)
MIN
3.20 – 3.45
(.126 – .136)
3.00 ±0.102
(.118 ±.004)
(NOTE 3)
0.50
0.305 ±0.038
(.0197)
(.0120 ±.0015)
BSC
TYP
RECOMMENDED SOLDER PAD LAYOUT
0.254
(.010)
10 9 8 7 6
3.00 ±0.102
(.118 ±.004)
(NOTE 4)
4.90 ±0.152
(.193 ±.006)
DETAIL “A”
0.497 ±0.076
(.0196 ±.003)
REF
0° – 6° TYP
GAUGE PLANE
1 2 3 4 5
0.53 ±0.152
(.021 ±.006)
DETAIL “A”
0.18
(.007)
SEATING
PLANE
0.86
(.034)
REF
1.10
(.043)
MAX
0.17 – 0.27
(.007 – .011)
TYP
0.50
(.0197)
BSC
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
18
0.1016 ±0.0508
(.004 ±.002)
MSOP (MS) 0213 REV F
Rev. A
For more information www.analog.com
LTC2919
REVISION HISTORY
REV
DATE
DESCRIPTION
A
08/19
Added AEC-Q100.
(Revision history begins at Rev B)
PAGE NUMBER
1, 3
Rev. A
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subject to change without notice. No license For
is granted
implication or
otherwise under any patent or patent rights of Analog Devices.
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19
LTC2919
TYPICAL APPLICATION
Powered from 12V, +5VOUT is Sequenced to Start-up First,
Followed by –5VOUT, with ±5V UV Monitor, 200ms Timeout
+12V
RCC
4.7k
CBYP
0.1µF
DC/DC
CONVERTER
+5V
VCC
RP2
115k
RP1
13.7k
RN2
–5V 137k
DC/DC
CONVERTER
+5V
LTC2919-2.5
SEL
ADJ1
RN1
13.3k
REF
OUT2
PWRGD
RST
ADJ2
OUT1
SHDN
RPU2
10k
TMR
GND
RPU3
10k
SYS_RESET
2919 TA06
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20
Rev. A
08/19
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