LTC3260EDE#PBF

LTC3260 Low Noise Dual Supply Inverting Charge Pump FEATURES DESCRIPTION VIN Range: 4.5V to 32V n Inverting Charge Pump Generates –V IN n Charge Pump Output Current Up to 100mA n Low Noise Negative LDO Post Regulator – n (I LDO = 50mA Max) n Low Noise Independent Positive LDO Regulator + n (I LDO = 50mA Max) n 100µA Quiescent Current in Burst Mode® Operation with Both LDO Regulators On n 50kHz to 500kHz Programmable Oscillator Frequency n Stable with Ceramic Capacitors n Short-Circuit/Thermal Protection n Low Profile 3mm × 4mm 14-Pin DFN and Thermally Enhanced 16-Pin MSOP Packages n AEC-Q100 Qualified for Automotive Applications The LTC®3260 is a low noise dual polarity output power supply that includes an inverting charge pump with both positive and negative LDO regulators. The charge pump operates over a wide 4.5V to 32V input range and can deliver up to 100mA of output current. Each LDO regulator can provide up to 50mA of output current. The negative LDO post regulator is powered from the charge pump output. The LDO output voltages can be adjusted using external resistor dividers. n APPLICATIONS Low Noise Bipolar/Inverting Supplies Industrial/Instrumentation Low Noise Bias Generators n Portable Medical Equipment n Portable Instruments n n The charge pump employs either low quiescent current Burst Mode operation or low noise constant frequency mode. In Burst Mode operation the charge pump VOUT regulates to –0.94 • VIN, and the LTC3260 draws only 100µA of quiescent current with both LDO regulators on. In constant frequency mode the charge pump produces an output equal to –VIN and operates at a fixed 500kHz or to a programmed value between 50kHz to 500kHz using an external resistor. The LTC3260 is available in low profile (0.75mm) 3mm x 4mm 14-pin DFN and thermally enhanced 16-pin MSOP packages. All registered trademarks and trademarks are the property of their respective owners. TYPICAL APPLICATION ±12V Outputs from a Single 15V Input 15V 10µF 1µF LDO+ VIN LTC3260 + EN ADJ+ EN– BYP+ MODE GND C+ BYP– C– – ADJ VOUT LDO– 10µF 10nF 10nF LDO Rejection of VOUT Ripple 12V 909k VLDO+ 10mV/DIV AC-COUPLED 100k VLDO– 10mV/DIV AC-COUPLED VOUT 10mV/DIV AC-COUPLED 100k 909k –15V 10µF RT 10µF –12V 3260 TA01a 200k VIN = 15V VLDO+ = 12V VLDO– = –12V fOSC = 500kHz ILDO+ = 50mA ILDO– –50mA 1µs/DIV 3260 TA01b Rev. B Document Feedback For more information www.analog.com 1 LTC3260 ABSOLUTE MAXIMUM RATINGS (Notes 1, 3) VIN, EN+, EN–, MODE.................................. –0.3V to 36V LDO+ ............................................................–16V to 36V VOUT, LDO – ................................................ –36V to 0.3V RT, ADJ+....................................................... –0.3V to 6V BYP+.......................................................... –0.3V to 2.5V ADJ–............................................................. –6V to 0.3V BYP–.......................................................... –2.5V to 0.3V VOUT, LDO+, LDO – Short-Circuit Duration......... Indefinite Operating Junction Temperature Range (Note 2)................................................... –55°C to 150°C Storage Temperature Range.................. –65°C to 150°C Lead Temperature (Soldering, 10 sec) MSE Only........................................................... 300°C PIN CONFIGURATION TOP VIEW EN+ 1 14 BYP+ RT 2 13 ADJ+ BYP– 3 ADJ– 4 LDO– 5 VOUT 6 C– 15 GND 7 TOP VIEW EN+ RT BYP– ADJ– LDO– VOUT C– NC 12 MODE 11 EN– 10 LDO+ 9 VIN 8 C+ DE PACKAGE 14-LEAD (4mm × 3mm) PLASTIC DFN TJMAX = 150°C, θJA = 43°C/W EXPOSED PAD (PIN 15) IS GND, MUST BE SOLDERED TO PCB 1 2 3 4 5 6 7 8 17 GND 16 15 14 13 12 11 10 9 BYP+ ADJ+ MODE EN– LDO+ VIN C+ NC MSE PACKAGE 16-LEAD PLASTIC MSOP TJMAX = 150°C, θJA = 43°C/W EXPOSED PAD (PIN 17) IS GND, MUST BE SOLDERED TO PCB ORDER INFORMATION LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE LTC3260EDE#PBF LTC3260EDE#TRPBF 3260 14-Lead (4mm × 3mm) Plastic DFN –40°C to 125°C LTC3260IDE#PBF LTC3260IDE#TRPBF 3260 14-Lead (4mm × 3mm) Plastic DFN –40°C to 125°C LTC3260EMSE#PBF LTC3260EMSE#TRPBF 3260 16-Lead Plastic MSOP –40°C to 125°C LTC3260IMSE#PBF LTC3260IMSE#TRPBF 3260 16-Lead Plastic MSOP –40°C to 125°C LTC3260HMSE#PBF LTC3260HMSE#TRPBF 3260 16-Lead Plastic MSOP –40°C to 150°C LTC3260MPMSE#PBF LTC3260MPMSE#TRPBF 3260 16-Lead Plastic MSOP –55°C to 150°C LTC3260HMSE#WTRPBF 3260 16-Lead Plastic MSOP –40°C to 150°C AUTOMOTIVE PRODUCTS** LTC3260HMSE#WPBF Contact the factory for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. Tape and reel specifications. Some packages are available in 500 unit reels through designated sales channels with #TRMPBF suffix. **Versions of this part are available with controlled manufacturing to support the quality and reliability requirements of automotive applications. These models are designated with a #W suffix. Only the automotive grade products shown are available for use in automotive applications. Contact your local Analog Devices account representative for specific product ordering information and to obtain the specific Automotive Reliability reports for these models. 2 Rev. B For more information www.analog.com LTC3260 ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating + – junction temperature range, otherwise specifications are at TA = 25°C (Note 2). VIN = EN = EN = 12V, MODE = 0V, RT = 200kΩ. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Charge Pump VIN Input Voltage Range VUVLO VIN Undervoltage Lockout Threshold VIN Rising VIN Falling IVIN VIN Quiescent Current Shutdown, EN+ = EN– = 0V EN– = 0V, ILDO+ = 0mA MODE = VIN, EN+ = 0V, IVOUT = ILDO– = 0mA MODE = VIN, IVOUT = ILDO+ = ILDO– = 0mA MODE = 0V, IVOUT = 0mA VRT RT Regulation Voltage VOUT VOUT Regulation Voltage MODE = 12V MODE = 0V fOSC Oscillator Frequency RT = GND ROUT Charge Pump Output Impedance MODE = 0V, RT = GND ISHORT_CKT Max IVOUT Short-Circuit Current VOUT = GND l l l 4.5 3.4 450 32 V 3.8 3.6 4 V V 2 30 80 100 3.5 5 50 160 200 5.5 1.200 V –0.94 • VIN –VIN V V 500 550 32 l VMODE(H) MODE Threshold Rising l VMODE(L) MODE Threshold Falling l IMODE MODE Pin Internal Pull-Down Current 100 0.4 VIN = MODE = 32V µA µA µA µA mA kHz Ω 160 250 1.1 2.0 mA V 1.0 V 0.7 µA 50mA Positive Regulator LDO+ Output Voltage Range VADJ ADJ+ Reference Voltage IADJ+ ADJ+ Input Current ILDO+(SC) LDO+ Short-Circuit Current + l 1.2 l 1.176 VADJ+ = 1.2V l 50 Load Regulation VDROPOUT 1.200 –50 Line Regulation + 32 mA 0.03 mV/mA ILDO 400 CBYP+ = 10nF 100 l VEN (L) EN+ Threshold Falling l IEN+ EN+ Pin Internal Pull-Down Current 1.1 0.4 VIN = EN+ = 32V nA mV/V Output Voltage Noise + V 50 100 + = 50mA EN+ Threshold Rising 1.224 0.04 LDO+ Dropout Voltage VEN+(H) V 800 mV µVRMS 2.0 V 1.0 V 0.7 µA 50mA Negative Regulator LDO– Output Voltage Range – VADJ ADJ– Reference Voltage IADJ ADJ– Input Current ILDO–(SC) LDO– Short-Circuit Current – VDROPOUT– l –1.224 – = –1.2V VADJ –1.200 –50 l 50 –1.2 V –1.176 V 50 100 nA mA 0.002 mV/V Load Regulation 0.02 mV/mA LDO– Dropout Voltage ILDO– = 50mA Output Voltage Noise CBYP– = 10nF EN– Threshold Rising VEN(L) EN– Threshold Falling IEN –32 Line Regulation VEN(H) – l EN– Pin Internal Pull-Down Current 200 100 1.1 l l VIN = EN– = 32V 500 0.4 mV µVRMS 2.0 V 1.0 V 1.4 µA Rev. B For more information www.analog.com 3 LTC3260 ELECTRICAL CHARACTERISTICS Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The LTC3260 is tested under pulsed load conditions such that TJ ≈ TA. The LTC3260E is guaranteed to meet specifications from 0°C to 85°C junction temperature. Specifications over the –40°C to 125°C operating junction temperature range are assured by design, characterization and correlation with statistical process controls. The LTC3260I is guaranteed over the –40°C to 125°C operating junction temperature range, the LTC3260H is guaranteed over the –40°C to 150°C operating junction temperature range and the LTC3260MP is tested and guaranteed over the full –55°C to 150°C operating junction temperature range. Note that the maximum ambient temperature consistent with these specifications is determined by specific operating conditions in conjunction with board layout, the rated package thermal impedance and other environmental factors. The junction temperature (TJ, in °C) is calculated from the ambient temperature (TA, in °C) and power dissipation (PD, in Watts) according to the formula: TJ = TA + (PD • θJA), where θJA = 43°C/W is the package thermal impedance. Note 3: This IC includes overtemperature protection that is intended to protect the device during momentary overload conditions. Junction temperatures will exceed 150°C when overtemperature protection is active. Continuous operation above the specified maximum operating junction temperature may result in device degradation or failure. TYPICAL PERFORMANCE CHARACTERISTICS (TA = 25°C, CFLY = 1µF, CIN = COUT = CLDO+ = CLDO– = 10µF unless otherwise noted) Oscillator Frequency vs Supply Voltage 600 400 300 RT = 200kΩ 200 100 0 0 5 20 15 25 10 SUPPLY VOLTAGE (V) 30 Shutdown Current vs Temperature 30 500 400 300 200 10 1 100 RT (kΩ) 1000 60 Burst Mode OPERATION WITH NEGATIVE LDO ON 40 0 –50 –25 0 25 50 75 100 125 150 TEMPERATURE (°C) 12 10 fOSC = 500kHz 8 6 fOSC = 200kHz 4 fOSC = 50kHz 0 VIN = 12V 0 5 25 20 15 SUPPLY VOLTAGE (V) 10 fOSC = 500kHz 8 7 6 5 4 fOSC = 200kHz 3 2 fOSC = 50kHz 1 30 3260 G04 4 25 50 75 100 125 150 TEMPERATURE (°C) 9 2 POSITIVE LDO ON 20 VIN = 5V 0 10 QUIESCENT CURRENT (mA) QUIESCENT CURRENT (mA) QUIESCENT CURRENT (µA) 80 VIN = 12V Quiescent Current vs Temperature (Constant Frequency Mode) 14 100 VIN = 32V 3260 G03 16 Burst Mode OPERATION WITH BOTH LDOs ON 10 Quiescent Current vs Supply Voltage (Constant Frequency Mode) VIN = 12V 120 15 3260 G02 Quiescent Current vs Temperature 140 20 0 –50 –25 10000 3260 G01 160 25 5 100 0 35 Oscillator Frequency vs RT SHUTDOWN CURRENT (µA) RT = GND 500 OSCILLATOR FREQUENCY (kHz) OSCILLATOR FREQUENCY (kHz) 600 35 3260 G05 0 –50 –25 0 25 50 75 100 125 150 TEMPERATURE (°C) 3260 G06 Rev. B For more information www.analog.com LTC3260 TYPICAL PERFORMANCE CHARACTERISTICS (TA = 25°C, CFLY = 1µF, CIN = COUT = CLDO+ = CLDO– = 10µF unless otherwise noted) Effective Open-Loop Resistance vs Temperature 250 50 40 30 20 VIN = 32V VIN = 25V VIN = 12V 10 0 –50 –25 0 200 100 RT = 200kΩ 50 0 5 20 10 25 15 SUPPLY VOLTAGE (V) 800 fOSC = 500kHz 30 20 1.212 1.200 1.188 0 5 10 15 20 25 SUPPLY VOLTAGE (V) 30 35 1.176 –50 –25 0 700 100 3260 G09 VIN = 12V ILDO+ = 50mA 600 500 400 300 200 60 0.14 LDO+ Load Regulation 1.2006 VIN = 12V 0 0.1 1 10 100 FREQUENCY (kHz) 1.2004 0.10 1.2002 0.08 1.2000 0.06 1.1998 0.04 1.1996 0.02 1000 0 0 1 10 100 ILOAD (mA) 3260 G13 VIN = 12V UNITY GAIN VLDO+ (V) GND PIN CURRENT (mA) 50 VIN = 6.5V VLDO+ = 5V ILDO+ = 50mA VRIPPLE = 50mVRMS CLDO+ = 10µF 25 50 75 100 125 150 TEMPERATURE (°C) 3260 G12 LDO+ GND Pin Current vs ILOAD 0.12 30 0 3260 G11 LDO+ Supply Rejection 40 0 –50 –25 25 50 75 100 125 150 TEMPERATURE (°C) 3260 G10 10 1 10 OUTPUT CURRENT (mA) 100 10 20 fOSC = 500kHz 0.1 LDO+ Dropout Voltage vs Temperature LDO+ DROPOUT VOLTAGE (mV) ADJ+ PIN VOLTAGE (V) EFFECTIVE OPEN-LOOP RESISTANCE (Ω) fOSC = 200kHz 40 1.0 ADJ+ Pin Voltage vs Temperature 60 0 LDO+ SUPPLY REJECTION (dB) 35 30 80 50 fOSC = 50kHz 1.5 0 1.224 70 2.0 3260 G08 90 fOSC = 200kHz 0.5 3620 G07 Effective Open-Loop Resistance vs Supply Voltage VIN = 12V 2.5 RT = GND 150 0 25 50 75 100 125 150 TEMPERATURE (°C) 3.0 VOLTAGE LOSS (V) fOSC = 500kHz VOUT SHORT-CIRCUIT CURRENT (mA) EFFECTIVE OPEN-LOOP RESISTANCE (Ω) 60 Voltage Loss (VIN – |VOUT|) vs Output Current (Constant Frequency Mode) VOUT Short-Circuit Current vs Supply Voltage 3260 G14 1.1994 0.1 1 ILDO+ (mA) 10 100 3260 G15 Rev. B For more information www.analog.com 5 LTC3260 TYPICAL PERFORMANCE CHARACTERISTICS + – (TA = 25°C, CFLY = 1µF, CIN = COUT = CLDO = CLDO = 10µF unless otherwise noted) LDO– Dropout Voltage vs Temperature ADJ– Pin Voltage vs Temperature 60 400 –1.188 –1.200 –1.212 VOUT = –12V – 350 ILDO = 50mA LDO– SUPPLY REJECTION (dB) LDO– DROPOUT VOLTAGE (mV) –1.176 ADJ– PIN VOLTAGE (V) LDO– Power Supply Rejection 300 250 200 150 100 50 –1.224 –50 –25 0 0 –50 –25 25 50 75 100 125 150 TEMPERATURE (°C) 0 VOUT = –12V UNITY GAIN VLDO– (V) –1.2000 –1.2002 –1.2004 ILDO– (mA) 10 1 10 100 FREQUENCY (kHz) 100 1000 3260 G18 VLDO+ 10mV/DIV AC-COUPLED VLDO+ 10mV/DIV AC-COUPLED 1 10 VOUT = –6.5V VLDO– = –5V ILDO– = –50mA VRIPPLE = 50mVRMS CLDO– = 10µF LDO+ Load Transient VLDO– 10mV/DIV AC-COUPLED VOUT 10mV/DIV AC-COUPLED 0.1 20 LDO Rejection of VOUT Ripple –1.1998 –1.2006 30 3260 G17 LDO– Load Regulation –1.1996 40 0 0.1 25 50 75 100 125 150 TEMPERATURE (°C) 3260 G16 –1.1994 50 ILDO+ VIN = 15V VLDO+ = 12V VLDO– = –12V fOSC = 500kHz ILDO+ = 50mA ILDO– –50mA 1µs/DIV 20mA 2mA 3260 G20 VIN = 12V VLDO+ = 5V 40µs/DIV 3260 G21 3260 G19 VOUT Transient (Burst Mode Operation, MODE = H) LDO – Load Transient VOUT Transient (MODE = Low to High) VLDO– 10mV/DIV AC-COUPLED VOUT 500mV/DIV AC-COUPLED VOUT 500mV/DIV AC-COUPLED – –2mA –5mA IOUT– –50mA MODE ILDO –20mA VIN = 12V 40µs/DIV VLDO– = –5V REFER TO FIGURE 3 6 3260 G22 VIN = 12V fOSC = 500kHz 2ms/DIV 3260 G23 VIN = 12V fOSC = 500kHz IOUT = –5mA 2ms/DIV 3260 G24 Rev. B For more information www.analog.com LTC3260 PIN FUNCTIONS (DFN/MSOP) EN+ (Pin 1/ Pin 1): Logic Input. A logic “high” on the EN+ pin enables the positive low dropout (LDO+) regulator. RT (Pin 2/Pin 2): Input Connection for Programming the Switching Frequency. The RT pin servos to a fixed 1.2V when the EN– pin is driven to a logic “high”. A resistor from RT to GND sets the charge pump switching frequency. If the RT pin is tied to GND, the switching frequency defaults to a fixed 500kHz. BYP– (Pin 3/ Pin 3): LDO– Reference Bypass Pin. Connect a capacitor from BYP– to GND to reduce LDO– output noise. Leave floating if unused. ADJ– (Pin 4/ Pin 4): Feedback Input for the Negative Low Dropout Regulator. This pin servos to a fixed voltage of –1.2V when the control loop is complete. LDO– (Pin 5/ Pin 5): Negative Low Dropout (LDO–) Linear Regulator Output. This pin requires a low ESR (equivalent series resistance) capacitor with at least 2µF capacitance to ground for stability. VOUT (Pin 6/ Pin 6): Charge Pump Output Voltage. In constant frequency mode (MODE = low) this pin is driven to –VIN. In Burst Mode operation, (MODE = high) this pin voltage is regulated to –0.94 • VIN using an internal burst comparator with hysteretic control. C– (Pin 7/ Pin 7): Flying Capacitor Negative Connection. C+ (Pin 8/ Pin 10): Flying Capacitor Positive Connection. NC (Pins 8, 9 MSOP Only): No Connect. These pins are not connected to the LTC3260 die. These pins should be left floating, connected to ground or shorted to adjacent pins. LDO+ (Pin 10/ Pin 12): Positive Low Dropout (LDO+) Output. This pin requires a low ESR capacitor with at least 2µF capacitance to ground for stability. EN– (Pin 11/ Pin 13): Logic Input. A logic “high” on the EN– pin enables the inverting charge pump as well as the negative LDO regulator. MODE (Pin 12/ Pin 14): Logic Input. The MODE pin determines the charge pump operating mode. A logic “high” on the MODE pin forces the charge pump to operate in Burst Mode operation regulating VOUT to approximately –0.94 • VIN with hysteretic control. A logic “low” on the MODE pin forces the charge pump to operate as an openloop inverter with a constant switching frequency. The switching frequency in both modes is determined by an external resistor from the RT pin to GND. In Burst Mode operation, this represents the frequency of the burst cycles before the part enters the low quiescent current sleep state. ADJ+ (Pin 13/ Pin 15): Feedback Input for the Positive Low Dropout (LDO+) Regulator. This pin servos to a fixed voltage of 1.2V when the control loop is complete. BYP+ (Pin 14/Pin 16): LDO+ Reference Bypass Pin. Connect a capacitor from BYP+ to GND to reduce LDO+ output noise. Leave floating if unused. GND (Exposed Pad Pin 15/ Exposed Pad Pin 17): Ground. The exposed package pad is ground and must be soldered to the PC board ground plane for proper functionality and for rated thermal performance. VIN (Pin 9/ Pin 11): Input Voltage for Both Charge Pump and Positive Low Dropout (LDO+) Regulator. VIN should be bypassed with a low impedance ceramic capacitor. Rev. B For more information www.analog.com 7 LTC3260 BLOCK DIAGRAM Note: Pin numbers are as per DFN package. Refer to the Pin Functions section for corresponding MSOP pin numbers. 1 EN+ INVERTING CHARGE PUMP 9 LDO+ VIN S1 8 7 C+ S3 C– S2 – + S4 11 12 RT EN– MODE BYP+ 1.2V REF 50kHz TO 500kHz OSC BYP– –1.2V REF ADJ– – 2 VOUT CHARGE PUMP AND INPUT LOGIC LDO– 15 13 14 3 4 + 6 ADJ+ 10 5 GND OPERATION (Refer to the Operation) The LTC3260 is a high voltage low noise dual output regulator. It includes an inverting charge pump and two LDO regulators to generate bipolar low noise supply rails from a single positive input. It supports a wide input power supply range from 4.5V to 32V. Shutdown Mode In shutdown mode, all circuitry except the internal bias is turned off. The LTC3260 is in shutdown when a logic low is applied to both the enable inputs (EN+ and EN–). The LTC3260 only draws 2µA (typical) from the VIN supply in shutdown. 8 Charge Pump Constant Frequency Operation The LTC3260 provides low noise constant frequency operation when a logic low is applied to the MODE pin. The charge pump and oscillator circuit are enabled using the EN– pin. At the beginning of a clock cycle, switches S1 and S2 are closed. The external flying capacitor across the C+ and C– pins is charged to the VIN supply. In the second phase of the clock cycle, switches S1 and S2 are opened, while switches S3 and S4 are closed. In this configuration the C+ side of the flying capacitor is grounded and charge is delivered through the C– pin to VOUT. In steady state the VOUT pin regulates at –VIN less any voltage drop due to the load current on VOUT or LDO. Rev. B For more information www.analog.com LTC3260 OPERATION (Refer to the Block Diagram) The charge transfer frequency can be adjusted between 50kHz and 500kHz using an external resistor on the RT pin. At slower frequencies the effective open-loop output resistance (ROL) of the charge pump is larger and it is able to provide smaller average output current. Figure 1 can be used to determine a suitable value of RT to achieve a required oscillator frequency. If the RT pin is grounded, the part operates at a constant frequency of 500kHz. Charge Pump Soft-Start 500 The LTC3260 has built in soft-start circuitry to prevent excessive current flow during start-up. The soft-start is achieved by internal circuitry that slowly ramps the amount of current available at the output storage capacitor. The soft-start circuitry is reset in the event of a commanded shutdown or thermal shutdown. 400 Charge Pump Short-Circuit/Thermal Protection 600 OSCILLATOR FREQUENCY (kHz) minimizes the charge pump ROL, quickly charges the output up to the burst threshold and optimizes the duration of the low current sleep state. 300 200 100 0 1 10 100 RT (kΩ) 1000 10000 3260 F01 Figure 1. Oscillator Frequency vs RT Charge Pump Burst Mode Operation The LTC3260 provides low power Burst Mode operation when a logic high is applied to the MODE pin. In Burst Mode operation, the charge pump charges the VOUT pin to –0.94 • VIN (typical). The part then shuts down the internal oscillator to reduce switching losses and goes into a low current state. This state is referred to as the sleep state in which the IC consumes only about 100µA with both LDOs enabled. When the output voltage droops enough to overcome the burst comparator hysteresis, the part wakes up and commences charge pump cycles until output voltage exceeds –0.94 • VIN (typical). This mode provides lower operating current at the cost of higher output ripple and is ideal for light load operation. The frequency of charging cycles is set by the external resistor on the RT pin. The charge pump has a lower ROL at higher frequencies. For Burst Mode operation it is recommended that the RT pin be tied to GND. This The LTC3260 has built-in short-circuit current limit as well as overtemperature protection. During a short-circuit condition, the part automatically limits its output current to approximately 160mA. If the junction temperature exceeds approximately 175°C the thermal shutdown circuitry disables current delivery to the output. Once the junction temperature drops back to approximately 165°C current delivery to the output is resumed. When thermal protection is active the junction temperature is beyond the specified operating range. Thermal protection is intended for momentary overload conditions outside normal operation. Continuous operation above the specified maximum operating junction temperature may impair device reliability. Positive Low Dropout Linear Regulator (LDO+) The positive low dropout regulator (LDO+) supports a load of up to 50mA. The LDO+ takes power from the VIN pin and drives the LDO+ output pin to a voltage programmed by the resistor divider connected between the LDO+, ADJ+ and GND pins. For stability, the LDO+ output must be bypassed to ground with a low ESR ceramic capacitor that maintains a capacitance of at least 2µF across operating temperature and voltage. The LDO+ is enabled or disabled via the EN+ logic input pin. When the LDO+ is enabled, a soft-start circuit ramps its regulation point from zero to the final value over a period of 75µs, reducing the inrush current on VIN. Rev. B For more information www.analog.com 9 LTC3260 OPERATION (Refer to the Operation) Figure 2 shows the LDO+ regulator application circuit. The LDO+ output voltage VLDO+ can be programmed by choosing suitable values of R1 and R2 such that: ⎛ R1 ⎞ VLDO+ = 1.2V • ⎜ + 1⎟ ⎝ R2 ⎠ An optional capacitor of 10nF can be connected from the BYP+ pin to ground. This capacitor bypasses the internal 1.2V reference of the LTC3260 and improves the noise performance of the LDO+. If this function is not used the BYP+ pin should be left floating. VIN LTC3260 EN+ 0 1 LDO+ R1 ADJ+ BYP+ 1.2V REF COUT LDO OUTPUT R2 CBYP+ GND 3260 F02 Figure 2. Positive LDO Application Circuit Negative Low Dropout Linear Regulator (LDO–) The negative low dropout regulator (LDO–) supports a load of up to 50mA. The LDO– takes power from the VOUT pin (output of the inverting charge pump) and drives the LDO– output pin to a voltage programmed by the resistor divider connected between the LDO–, ADJ– and GND pins. For stability, the LDO– output must be bypassed to ground with a low ESR ceramic capacitor that maintains a capacitance of at least 2µF across operating temperature and voltage. LDO– Figure 3 shows the LDO– regulator application circuit. The LDO– output voltage VLDO– can be programmed by choosing suitable values of R1 and R2 such that: ⎛ R1 ⎞ VLDO– = –1.2V • ⎜ + 1⎟ ⎝ R2 ⎠ When the inverting charge pump is in Burst Mode operation (MODE = high), the typical hysteresis on the VOUT pin is 2% of VIN voltage. The LDO– voltage should be set high enough above VOUT in order to prevent LDO– from entering dropout during normal operation. An optional capacitor of 10nF can be connected from the BYP– pin to ground. This capacitor bypasses the internal –1.2V reference of the LTC3260 and improves the noise performance of the LDO–. If this function is not used the BYP – pin should be left floating. In order to improve transient response, an optional capacitor, CADJ–, may be used as shown in Figure 3. A recommended value for CADJ– is 10pF. Experimentation with capacitor values between 2pF and 22pF may yield improved transient response. –1.2V REF LTC3260 GND BYP– CBYP– ADJ– LDO– 1 EN– CADJ– R2 R1 COUT LDO OUTPUT 3260 F03 0 EN– is enabled or disabled via the logic input The – pin. Initially, when the EN logic input is low, the charge pump circuitry is disabled and the VOUT pin is at GND. When EN– is switched high, the VOUT pin will be driven 10 negative by the charge pump circuitry. Soft-start circuitry in the charge pump also provides soft-start functionality for the LDO– and prevents excessive inrush currents. VOUT Figure 3. Negative LDO Application Circuit Rev. B For more information www.analog.com LTC3260 APPLICATIONS INFORMATION Effective Open-Loop Output Resistance The effective open-loop output resistance (ROL) of a charge pump is a very important parameter which determines the strength of the charge pump. The value of this parameter depends on many factors such as the oscillator frequency (fOSC), value of the flying capacitor (CFLY), the nonoverlap time, the internal switch resistances (RS) and the ESR of the external capacitors. Typical ROL values as a function of temperature are shown in Figure 4. EFFECTIVE OPEN-LOOP RESISTANCE (Ω) 60 fOSC = 500kHz 50 40 30 20 VIN = 32V VIN = 25V VIN = 12V 10 0 –50 –25 0 25 50 75 100 125 150 TEMPERATURE (°C) higher minimum turn-on time. The peak-to-peak output ripple at the VOUT pin is approximately given by the expression: VRIPPLE(P-P) ≈ IOUT COUT ⎤ ⎡ 1 – tON ⎥ ⎢ ⎣ fOSC ⎦ where COUT is the value of the output capacitor, fOSC is the oscillator frequency and tON is the on-time of the oscillator (1µs typical). Just as the value of COUT controls the amount of output ripple, the value of CIN controls the amount of ripple present at the input (VIN) pin. The amount of bypass capacitance required at the input depends on the source impedance driving VIN. For best results it is recommended that VIN be bypassed with at least 2µF of low ESR capacitance. A high ESR capacitor such as tantalum or aluminum will have higher input noise than a low ESR ceramic capacitor. Therefore, a ceramic capacitor is recommended as the main bypass capacitance with a tantalum or aluminum capacitor used in parallel if desired. Flying Capacitor Selection 3620 F04 Figure 4. Typical ROL vs Temperature Input/Output Capacitor Selection The style and value of capacitors used with the LTC3260 determine several important parameters such as regulator control loop stability, output ripple, charge pump strength and minimum turn-on time. To reduce noise and ripple, it is recommended that low ESR ceramic capacitors be used for the charge pump and LDO outputs. All capacitors should retain at least 2µF of capacitance over operating temperature and bias voltage. Tantalum and aluminum capacitors can be used in parallel with a ceramic capacitor to increase the total capacitance but should not be used alone because of their high ESR. In constant frequency mode, the value of COUT directly controls the amount of output ripple for a given load current. Increasing the size of COUT will reduce the output ripple at the expense of The flying capacitor controls the strength of the charge pump. A 1µF or greater ceramic capacitor is suggested for the flying capacitor for applications requiring the full rated output current of the charge pump. For very light load applications, the flying capacitor may be reduced to save space or cost. For example, a 0.2µF capacitor might be sufficient for load currents up to 20mA. A smaller flying capacitor leads to a larger effective openloop resistance (ROL) and thus limits the maximum load current that can be delivered by the charge pump. Ceramic Capacitors Ceramic capacitors of different materials lose their capacitance with higher temperature and voltage at different rates. For example, a capacitor made of X5R or X7R material will retain most of its capacitance from –40°C to 85°C whereas a Z5U or Y5V style capacitor will lose Rev. B For more information www.analog.com 11 LTC3260 APPLICATIONS INFORMATION considerable capacitance over that range. Z5U and Y5V capacitors may also have a poor voltage coefficient causing them to lose 60% or more of their capacitance when the rated voltage is applied. Therefore when comparing different capacitors, it is often more appropriate to compare the amount of achievable capacitance for a given case size rather than discussing the specified capacitance value. The capacitor manufacture’s data sheet should be consulted to ensure the desired capacitance at all temperatures and voltages. Table 1 is a list of ceramic capacitor manufacturers and their websites. Table 1. AVX www.avxcorp.com Kemet www.kemet.com Murata www.murata.com Taiyo Yuden www.t-yuden.com Vishay www.vishay.com TDK www.component.tdk.com Thermal Management At high input voltages and maximum output current, there can be substantial power dissipation in the LTC3260. If the junction temperature increases above approximately 175°C, the thermal shutdown circuitry will automatically deactivate the output. To reduce the maximum junction temperature, a good thermal connection to the PC board ground plane is recommended. Connecting the exposed pad of the package to a ground plane under the device on two layers of the PC board can reduce the thermal resistance of the package and PC board considerably. Derating Power at High Temperatures Layout Considerations Due to high switching frequency and high transient currents produced by LTC3260, careful board layout is necessary for optimum performance. A true ground plane and short connections to all the external capacitors will improve performance and ensure proper regulation under all conditions. Figure 5 shows an example layout for the LTC3260. To prevent an overtemperature condition in high power applications, Figure 6 should be used to determine the maximum combination of ambient temperature and power dissipation. The power dissipated in the LTC3260 should always fall under the line shown for a given ambient temperature. The power dissipated in the LTC3260 has three components. Power dissipated in the positive LDO: PLDO+ = (VIN – VLDO+) • ILDO+ GND Power dissipated in the negative LDO: PLDO– = (|VOUT| – |VLDO–|) • ILDO– and CFLY VIN VOUT CBYP– LDO+ LDO– RT CBYP+ The flying capacitor nodes C+ and C– switch large currents at a high frequency. These nodes should not be routed close to sensitive pins such as the LDO feedback pins (ADJ+ and ADJ–) and internal reference bypass pins (BYP+ and BYP–). Power dissipated in the inverting charge pump: PCP = (VIN – |VOUT|) • (IOUT + ILDO–) where IOUT denotes any additional current that might be pulled directly from the VOUT pin. The LDO– current is also supplied by the charge pump through VOUT and is therefore included in the charge pump power dissipation. The total power dissipation of the LTC3260 is given by: GND 3260 F05 PD = PLDO+ + PLDO– + PCP Figure 5. Recommended Layout 12 Rev. B For more information www.analog.com LTC3260 APPLICATIONS INFORMATION MAXIMUM POWER DISSIPATION (W) 6 The derating curve in Figure 6 assumes a maximum thermal resistance, θJA, of 43°C/W for the package. This can be achieved with a four layer PCB that includes 2oz Cu traces and six vias from the exposed pad of the LTC3260 to the ground plane. θJA = 43°C/W 5 4 3 2 1 It is recommended that the LTC3260 be operated in the region corresponding to TJ ≤ 150°C for continuous operation as shown in Figure 6. Operation beyond 150°C should be avoided as it may degrade part performance and lifetime. At high temperatures, typically around 175°C, the part is placed in thermal shutdown and all outputs are disabled. When the part cools back down to a low enough temperature, typically around 165°C, the outputs are reenabled and the part resumes normal operation. TJ = 150°C RECOMMENDED OPERATION 0 –50 –25 0 25 50 75 100 125 150 175 AMBIENT TEMPERATURE (°C) 3260 F06 Figure 6. Maximum Power Dissipation vs Ambient Temperature TYPICAL APPLICATIONS Low Power ±24V Power Supply from a Single-Ended 28V Input Supply 9 28V C1 4.7µF 1 11 12 C2 1µF 8 7 6 C3 4.7µF 10 LDO+ VIN LTC3260 EN+ ADJ+ EN– BYP+ 13 R2 100k 15 GND C+ BYP– C– – 4 – 5 R3 100k 3 ADJ LDO R1 1.91M 14 MODE VOUT 24V C4 4.7µF R4 1.91M C7 4.7µF RT 2 3260 TA02 –24V High Voltage Input to Bipolar Output with Highly Efficient Dividing/Inverting Charge Pump 13.5V TO 32V C2 1µF 50V D3 MBR0540 11 C1 4.7µF 50V 1 VIN 13 EN– 10 + C D1 MBR0540 12 ADJ+ 15 BYP+ C5 0.01µF 3 BYP– 4 – ADJ 7 C– LDO– R1 316k 16 LTC3260 D2 MBR0540 C3 1µF 50V LDO+ EN+ C6 0.01µF C8 4.7µF 25V 5V R2 100k R3 100k R4 316k 5 6 NOTE: THE LTC3260 WILL ALWAYS RUN VOUT IN CONTINUOUS FREQUENCY REGARDLESS OF THE MODE PIN SETTING BECAUSE VOUT MODE GND RT IS ALWAYS LESS THAN –1/2VIN 14 17 2 C4 4.7µF C7 4.7µF –5V 3260 TA04 !V –V –I $ • ROL VOUT ~ – # IN F OUT – VF & 2 " % Rev. B For more information www.analog.com 13 LTC3260 TYPICAL APPLICATIONS 28V Dual Tracking Bipolar Supply with Outputs from ±5V to ±25V 28V 11 C1 4.7µF 50V C2 1µF 50V 1 VIN 14 2 12 ADJ+ 15 EN+ 13 EN– 10 + C 7 LDO+ BYP+ 16 C4 0.01µF LTC3260 4 ADJ– 3 – BYP C– MODE LDO– RT VOUT GND 17 R1 732k C5 0.01µF C7 4.7µF 50V OUT R2 73.2k R3 500k R4 732k 5 6 C3 4.7µF 35V C6 4.7µF 35V –OUT 3260 TA05 14 Rev. B For more information www.analog.com LTC3260 PACKAGE DESCRIPTION DE Package 14-Lead Plastic DFN (4mm × 3mm) (Reference LTC DWG # 05-08-1708 Rev B) 0.70 ±0.05 3.30 ±0.05 3.60 ±0.05 2.20 ±0.05 1.70 ±0.05 PACKAGE OUTLINE 0.25 ±0.05 0.50 BSC 3.00 REF RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED 4.00 ±0.10 (2 SIDES) R = 0.115 TYP 8 R = 0.05 TYP 0.40 ±0.10 14 3.30 ±0.10 3.00 ±0.10 (2 SIDES) 1.70 ±0.10 PIN 1 NOTCH R = 0.20 OR 0.35 × 45° CHAMFER PIN 1 TOP MARK (SEE NOTE 6) 0.200 REF 0.75 ±0.05 (DE14) DFN 0806 REV B 7 1 0.25 ±0.05 0.50 BSC 3.00 REF 0.00 – 0.05 BOTTOM VIEW—EXPOSED PAD NOTE: 1. DRAWING PROPOSED TO BE MADE VARIATION OF VERSION (WGED-3) IN JEDEC PACKAGE OUTLINE MO-229 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE Rev. B For more information www.analog.com 15 LTC3260 PACKAGE DESCRIPTION MSE Package 16-Lead Plastic MSOP, Exposed Die Pad (Reference LTC DWG # 05-08-1667 Rev F) BOTTOM VIEW OF EXPOSED PAD OPTION 2.845 ±0.102 (.112 ±.004) 5.10 (.201) MIN 2.845 ±0.102 (.112 ±.004) 0.889 ±0.127 (.035 ±.005) 8 1 1.651 ±0.102 (.065 ±.004) 1.651 ±0.102 3.20 – 3.45 (.065 ±.004) (.126 – .136) 0.305 ±0.038 (.0120 ±.0015) TYP 16 0.50 (.0197) BSC 4.039 ±0.102 (.159 ±.004) (NOTE 3) RECOMMENDED SOLDER PAD LAYOUT 0.254 (.010) 0.35 REF 0.12 REF DETAIL “B” CORNER TAIL IS PART OF DETAIL “B” THE LEADFRAME FEATURE. FOR REFERENCE ONLY 9 NO MEASUREMENT PURPOSE 0.280 ±0.076 (.011 ±.003) REF 16151413121110 9 DETAIL “A” 0° – 6° TYP 3.00 ±0.102 (.118 ±.004) (NOTE 4) 4.90 ±0.152 (.193 ±.006) GAUGE PLANE 0.53 ±0.152 (.021 ±.006) DETAIL “A” 1.10 (.043) MAX 0.18 (.007) SEATING PLANE 0.17 – 0.27 (.007 – .011) TYP 1234567 8 0.50 (.0197) BSC NOTE: 1. DIMENSIONS IN MILLIMETER/(INCH) 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX 6. EXPOSED PAD DIMENSION DOES INCLUDE MOLD FLASH. MOLD FLASH ON E-PAD SHALL NOT EXCEED 0.254mm (.010") PER SIDE. 16 0.86 (.034) REF 0.1016 ±0.0508 (.004 ±.002) MSOP (MSE16) 0213 REV F Rev. B For more information www.analog.com LTC3260 REVISION HISTORY REV DATE DESCRIPTION A 09/12 Changed Operating Junction Temperature. Add H- and MP-grade options. 11/21 2 Throughout Add Junction to heading of Electrical Characteristics table. 3 Add H- and MP-grade into Note 2. 4 Modified Shutdown Current vs Temperature curve for operation to 150°C. 4 Modified Quiescent Current vs Temperature curve for operation to 150°C. 4 Corrected Figure 5 Pinout RT and CBYP. 12 Removed Thermal Shutdown curve from Figure 6. 13 Clarified 150°C Operation in Derating Power section. B PAGE NUMBER 12, 13 Updated Related Parts list. 18 Added AEC-Q100 Qualification in Progress statement. 1 Added #W models in Ordering Information table. 2 Rev. B Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license For is granted implication or otherwise under any patent or patent rights of Analog Devices. more by information www.analog.com 17 LTC3260 TYPICAL APPLICATION Low Noise ±12V Power Supply from a Single-Ended 15V Input Supply (Frequency = 200kHz) 9 15V C1 10µF 1 11 12 C2 1µF 8 7 6 C3 10µF LDO+ VIN LTC3260 EN+ ADJ+ – + EN BYP MODE GND C+ BYP– 10 13 14 C4 10µF 15 C5 10nF 3 C6 10nF 4 ADJ– C– VOUT LDO – 2 R5 200k R2 100k R3 100k R4 909k 5 RT 12V R1 909k C7 10µF 3260 TA03 –12V RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LTC1144 Switched-Capacitor Wide Input Range Voltage Converter with Shutdown Wide Input Voltage Range: 2V to 18V, ISD < 8µA, SO8 Package LTC1514/LTC1515 Step-Up/Step-Down Switched-Capacitor DC/DC Converters VIN: 2V to 10V, VOUT: 3.3V to 5V, IQ = 60µA, SO8 Package LT 1611 150mA Output, 1.4MHz Micropower Inverting Switching Regulator VIN: 0.9V to 10V, VOUT = ±34V, ThinSOT™ Package LT1614 250mA Output, 600kHz Micropower Inverting Switching Regulator VIN: 0.9V to 6V, VOUT = ±30V, IQ = 1mA, MS8, SO8 Packages LTC1911 250mA, 1.5MHz Inductorless Step-Down DC/DC Converter ® VIN: 2.7V to 5.5V, VOUT = 1.5V/1.8V, IQ = 180µA, MS8 Package LTC3250/LTC3250-1.2/ Inductorless Step-Down DC/DC Converters LTC3250-1.5 VIN: 3.1V to 5.5V, VOUT = 1.2V, 1.5V, IQ = 35µA, ThinSOT Package LTC3251 500mA Spread Spectrum Inductorless Step-Down DC/DC Converter VIN: 2.7V to 5.5V, VOUT: 0.9V to 1.6V, 1.2V, 1.5V, IQ = 9µA, MS10E Package LTC3252 Dual 250mA, Spread Spectrum Inductorless Step-Down DC/DC Converter VIN: 2.7V to 5.5V, VOUT: 0.9V to 1.6V, IQ = 50µA, DFN12 Package LT1054/LT1054L Switched-Capacitor Voltage Converters with Regulator VIN: 3.5V to 15V/7V, IOUT = 100mA/125mA, N8, S08, SO16 Packages LTC3261 High Voltage, Low Quiescent Current Inverting Charge Pump VIN: 4.5V to 32V, VOUT = –VIN, IOUT = 100mA, MSOP-12 Package 18 Rev. B 11/21 www.analog.com For more information www.analog.com  ANALOG DEVICES, INC. 2012-2021