LTC3337
Primary Battery SOH Monitor with
Precision Coulomb Counter
FEATURES
DESCRIPTION
Battery Input Voltage Range: 1.8V to 5.5V
n 100nA Quiescent Current
n 8 Primary Battery Peak Input Current Limits:
5mA/10mA/15mA/20mA/25mA/50mA/75mA/100mA
n SOH Monitor for Primary Battery
n Integrated Coulomb Counter (Q)
n Additional Monitors for Battery Voltage (V),
Battery Impedance (Z), and Temperature (T)
n Primary Battery Current (BAT_IN) or Load Current
(BAT_OUT) is Counted
n Integrated ±10mA Supercapacitor Balancer
n Programmable Coulomb Counter Prescaler for Wide
Range of Battery Sizes
n Programmable Discharge Alarm Threshold with
Interrupt Output
n I2C Interface
n Tiny 12-Lead 2mm × 2mm LFCSP
The LTC®3337 is a primary battery state of health (SOH)
monitor with a built-in precision coulomb counter. It is
designed to be placed in series with a primary battery
with minimal associated series voltage drop. The patented infinite dynamic range coulomb counter tallies ALL
accumulated battery discharge and stores it in an internal
register accessible via an I2C interface. A discharge alarm
threshold based on this state of charge (SOC) is programmable. When it is reached, an interrupt is generated at
the IRQ pin. Coulomb counter accuracy is constant down
to no load.
n
APPLICATIONS
Low Power Primary Battery Powered Systems
(e.g., 1× LiSOCl2, 2–3× Alkaline)
n Remote Industrial Sensors (e.g., Meters, Alarms)
n Asset Trackers
n Electronic Door Locks
n Keep-Alive Supplies/Battery Backup
n SmartMesh® Applications
n
The LTC3337 also integrates additional SOH monitoring
which measures and reports via I2C: battery voltage, battery impedance, and temperature.
To accommodate a wide range of primary battery inputs,
the peak input current limit is pin selectable from 5mA
to 100mA.
Coulombs can be calculated for either the BAT_IN or
BAT_OUT pin, determined by the AVCC pin connection.
A BAL pin is provided for applications utilizing a stack of
two supercapacitors (optional) at the output.
The LTC3337 is offered in a 12-lead 2mm × 2mm
LFCSP package.
All registered trademarks and trademarks are the property of their respective owners. Protected
by U.S. patents, including 9312815.
TYPICAL APPLICATION
5
4
+
BAT_IN
LiSOCl2
3
2
BAT_OUT
LTC3337
AVCC
DVCC
BAL
IPK[2:0]
2C
I
BATOUT_OK
GND
TO SYSTEM LOAD
100μF
6V
COUT = 100µF
3
2
ERROR (%)
3.6V
Total Coulomb Counter Error
(100mA IPEAK
PEAK Setting)
1
0
–1
–2
IRQ
–3
–4
3337 TA01a
–5
0.01
BAT_IN = 5.5V
BAT_IN = 3.6V
BAT_IN = 2V
0.1
1
10
BAT_OUT LOAD CURRENT (mA)
100
3337 TA01b
Rev. 0
Document Feedback
For more information www.analog.com
1
LTC3337
PIN CONFIGURATION
(Note 1)
1
AVCC
2
DVCC
3
SCL
4
12
11
10 IPK0
13
GND
5
6
IRQ
BAL
BAT_IN
TOP VIEW
BAT_OUT
BAT_IN, BAT_OUT, AVCC Voltage................... –0.3V to 6V
(BAT_OUT – BAT_IN) Differential Voltage.................0.3V
DVCC, SCL, SDA Voltage............................... –0.3V to 6V
IPK[2:0] Voltage.................................–0.3V to [Lesser of
(BAT_IN + 0.3V) or 6V]
BAL Voltage.......................................–0.3V to [Lesser of .
(BAT_OUT + 0.3V) or 6V]
IRQ, BATOUT_OK Current....................................... ±1mA
BAT_OUT Current .................................................150mA
SDA Current..............................................................5mA
Operating Junction Temperature
Range (Notes 2, 3).............................. –40°C to 125°C
Storage Temperature Range................... –65°C to 150°C
SDA
ABSOLUTE MAXIMUM RATINGS
9
IPK1
8
IPK2
7
BATOUT_OK
LFCSP PACKAGE
12-LEAD (2mm × 2mm × 0.75mm) PLASTIC QFN
TJMAX = 125°C, θJA = 52.78°C/W
EXPOSED PAD (PIN 13) IS GND, MUST BE SOLDERED TO PCB
ORDER INFORMATION
PART MARKING
TAPE AND REEL
TAPE AND REEL (MINI) DEVICE FINISH CODE
LTC3337ERC#TRPBF LTC3337ERC#TRMPBF
LHMM
e4
PACKAGE DESCRIPTION
MSL
RATING TEMPERATURE RANGE
12-Lead (2mm × 2mm × 0.75mm) LFCSP MSL1
–40°C to 125°C
Contact the factory for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Tape and reel specifications. Some packages are available in 500 unit reels through designated sales channels with #TRMPBF suffix.
Rev. 0
2
For more information www.analog.com
LTC3337
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating
junction temperature range, otherwise specifications are at TA = 25°C. (Note 2). BAT_IN = BAT_OUT = AVCC = DVCC = 3.6V unless
otherwise noted.
PARAMETER
CONDITIONS
Input Voltage Range (BAT_IN)
(Note 4)
AVCC Voltage Range
MIN
TYP
MAX
UNITS
l
1.8
5.5
V
l
1.8
5.5
V
Coulomb Counter
Input Current into BAT_IN
BAT_IN – BAT_OUT = 50mV
l
90
85
100
100
110
115
mA
mA
BAT_IN – BAT_OUT = 175mV (Current Source
Turned On), 75mA IPEAK Setting
l
67.5
65
75
75
82.5
85
mA
mA
BAT_IN – BAT_OUT = 175mV (Current Source
Turned On), 50mA IPEAK Setting
l
45
43
50
50
55
57
mA
mA
BAT_IN – BAT_OUT = 175mV (Current Source
Turned On), 25mA IPEAK Setting
l
22.5
21.5
25
25
27.5
28.5
mA
mA
BAT_IN – BAT_OUT = 175mV (Current Source
Turned On), 20mA IPEAK Setting
l
18
17
20
20
22
23
mA
mA
BAT_IN – BAT_OUT = 175mV (Current Source
Turned On), 15mA IPEAK Setting
l
13.5
13
15
15
16.5
17
mA
mA
BAT_IN – BAT_OUT = 175mV (Current Source
Turned On), 10mA IPEAK Setting
l
9
8.5
10
10
11
11.5
mA
mA
BAT_IN – BAT_OUT = 175mV (Current Source
Turned On), 5mA IPEAK Setting
l
4.5
4.2
5
5
5.5
5.8
mA
mA
Start-Up: BAT_OUT= 0V,
25mA/50mA/75mA/100mA IPEAK Settings
25
mA
Start-Up: BAT_OUT= 0V,
5mA/10mA/15mA/20mA IPEAK Settings
5
mA
AVCC Pin Input Quiescent Current
BAT_IN – BAT_OUT = 50mV
100mA IPEAK Setting
l
14.17
100
160
14.91
15.66
nA
mA • hr
75mA IPEAK Setting
11.18
mA • hr
50mA IPEAK Setting
7.457
mA • hr
25mA IPEAK Setting
3.728
mA • hr
20mA IPEAK Setting
2.983
mA • hr
15mA IPEAK Setting
2.237
mA • hr
10mA IPEAK Setting
1.491
mA • hr
5mA IPEAK Setting
745.7
µA • hr
5mA IPEAK Setting, M = 15 (Smallest Battery)
1.491
mA • hr
100mA IPEAK Setting, M = 0 (Largest Battery)
Total Coulomb Counter Error (Note 6)
nA
BAT_IN – BAT_OUT = 175mV (Current Source
Turned On), 100mA IPEAK Setting
qLSB (for Prescaler Setting M = 0) (Notes 5, 6)
Full-Scale Coulomb Count (Battery Capacity)
0
l
928.5
l
–3
–5
(Note 7)
977.3
1026
3
5
A • hr
%
%
Coulomb Counter Turn-On Threshold
(BAT_IN – BAT_OUT), BAT_OUT Rising
0.6
V
Coulomb Counter Turn-Off Threshold
(BAT_IN – BAT_OUT), BAT_OUT Falling
1.2
V
BATOUT_OK Threshold
(BAT_IN – BAT_OUT), BAT_OUT Rising
l
88
110
132
mV
BATOUT_OK Threshold
(BAT_IN – BAT_OUT), BAT_OUT Falling
l
375
400
425
mV
Rev. 0
For more information www.analog.com
3
LTC3337
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating
junction temperature range, otherwise specifications are at TA = 25°C. (Note 2). BAT_IN = BAT_OUT = AVCC = DVCC = 3.6V unless
otherwise noted.
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
IPEAK Turn-Off Threshold (VOUT_HIGH)
(BAT_IN – BAT_OUT), BAT_OUT Rising
l
88
110
132
mV
IPEAK Turn-On Threshold (VOUT_LOW)
(BAT_IN – BAT_OUT), BAT_OUT Falling
l
140
160
230
mV
BAT_OUT Hysteresis
VHYST = VOUT_LOW – VOUT_HIGH
l
40
mV
Voltage Monitor
1.465
VLSB
Total Voltage Error
l
–1.0
–2.5
mV
1.0
2.5
%
%
Full-Scale Voltage (111111111111 Code)
6
V
Zero Voltage (000000000000 Code)
0
V
0.784
°C
Temperature Monitor
TLSB
Code for Room Temperature 25°C
–5LSBs
01010101
+5LSBs
Full-Scale Temperature (11111111 Code)
159
°C
Zero-Scale Temperature (00000000 Code)
–41
°C
Hot Die Temperature Warning Threshold
(Die Temperature that Causes IRQ = 0)
00000000 Code for Register Bits H[15:8]
11111111 Code for Register Bits H[15:8] (Default)
–41
159
°C
°C
Cold Die Temperature Warning Threshold
(Die Temperature that Causes IRQ = 0)
00000000 Code for Register Bits H[7:0] (Default)
11111111 Code for Register Bits H[7:0]
–41
159
°C
°C
Supercapacitor Balancer
VSCAP (BAT_OUT Pin)
Supercapacitor Balancer Input Range
ISCAP (BAT_OUT Pin)
Supercapacitor Balancer Quiescent Current,
BAT_OUT = 5V, IBAL = 0
Supercapacitor Balancer Max Source Current
BAT_OUT = 5.0V, BAL = 2.4V
Supercapacitor Balancer Max Sink Current
BAT_OUT = 5.0V, BAL = 2.6V
Supercapacitor Balance Point (VBAL)
Percentage of BAT_OUT Voltage
l
2.5
62
5.5
V
150
nA
–10
mA
51
%
5.5
V
10
l
49
l
1.8
BAT_IN – 0.5
70
mA
50
Digital Inputs and Outputs
DVCC Voltage Range
Digital Input High Voltage (VIH)
For Pins IPK[2:0]
For Pins SDA, SCL
l
Digital Input Low Voltage (VIL)
For Pins IPK[2:0]
For Pins SDA, SCL
l
Digital Input High Current (IIH)
V
%DVCC
0.5
30
V
%DVCC
For Pins IPK[2:0]
For Pins SDA, SCL
10
10
nA
nA
Digital Input Low Current (IIL)
For Pins IPK[2:0]
For Pins SDA, SCL
10
10
nA
nA
Digital Output High Voltage (VOH)
For Pins IRQ, BATOUT_OK; 1μA Out of Pin
Digital Output Low Voltage (VOL)
For Pins IRQ, BATOUT_OK; 1μA into Pin
For Pin SDA; 3mA into Pin
DVCC – 0.5
V
0.5
0.4
V
V
400
kHz
I2C Timing Characteristics (See Figure 1)
I2C Read Address
I2C Write Address
Clock Operating Frequency
11001001
11001000
fSCL
Rev. 0
4
For more information www.analog.com
LTC3337
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating
junction temperature range, otherwise specifications are at TA = 25°C. (Note 2). BAT_IN = BAT_OUT = AVCC = DVCC = 3.6V unless
otherwise noted.
PARAMETER
CONDITIONS
MIN
Bus Free Time Between STOP/START
tBUF
1.3
TYP
MAX
UNITS
µs
Repeated START Set-Up Time
tSU,STA
600
ns
Hold Time (Repeated) START Condition
tHD,STA
600
ns
Set-Up Time for STOP Condition
tSU,STO
600
ns
Data Set-Up Time (Input)
tSU,DAT
100
ns
Data Hold Time (Input)
tHD,DATI
0
µs
Data Hold Time (Output)
tHD,DATO
0
0.9
µs
Clock/Data Fall Time
tf
20
300
ns
Clock/Data Rise Time
tr
20
300
ns
Clock LOW Period
tLOW
1.3
µs
Clock HIGH Period
tHIGH
0.6
µs
Spike Suppression Time
tSP
50
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTC3337 is tested under pulsed load conditions such that
TJ ≈ TA. The specifications over the –40°C to125°C operating junction
temperature range are assured by design, characterization, and correlation
with statistical process controls. Note that the maximum ambient
temperature consistent with these specifications is determined by specific
operating conditions in conjunction with board layout, the rated package
thermal impedance, and other environmental factors.
Note 3: TJ is calculated from the ambient TA and power dissipation PD
according to the following formula: TJ = TA + (PD • θJA).
Note 4: Coulomb counter and peak current limit accuracy are at their best
for BAT_IN voltages above 2V. Voltage and Temperature Monitor accuracy
ns
are at their best down to 1.8V. See Extended Battery Range Below 2V in
the Operation section.
Note 5: The equivalent charge of an LSB in the accumulated charge
register depends on the IPEAK setting and the internal prescaling factor
M. See Choosing the Coulomb Counter Prescaler M section for more
information. Note that:
1mA • hr = 3.6A • s = 3.6C.
Note 6: The specified accuracy of qLSB in percent is better than that
of the corresponding IPEAK because the timebase used for calculating
coulombs is internally adjusted to compensate for errors in the actual
IPEAK value. The Total Coulomb Counter Error specified includes any
inaccuracy in qLSB.
Note 7: This parameter is production tested only for the 100mA IPEAK
setting. For the other IPEAK settings it is guaranteed by extension due to
the internal design architecture and operation.
TIMING DIAGRAM
SDA
tLOW
tf
tSU,DAT
tr
tHD,STA
tf
tBUF
tr
tSP
SCL
S
tHD,STA
tHD,DAT
tHIGH
tSU,STA
Sr
tSU,STO
P
S
3337 TD
S = START, Sr = REPEATED START, P = STOP
Figure 1. Definition of Timing on I2C Bus
Rev. 0
For more information www.analog.com
5
LTC3337
TYPICAL PERFORMANCE CHARACTERISTICS
TA = 25°C, BAT_IN = BAT_OUT = AVCC = DVCC =
3.6V, 100mA IPEAK unless otherwise noted.
AVCC Quiescent Current,
Current
Source
is Off
Current
Source
is OFF
900
800
BAT_OUT QUIESCENT CURRENT (nA)
AVCC QUIESCENT CURRENT (nA)
1000
700
600
500
400
300
200
100
0
–50
–25
40
80
AVCC = 1.8V
AVCC = 2.5V
AVCC = 3.6V
AVCC = 4.5V
AVCC = 5.5V
1100
Supercapacitor Balancer Source/
Sink Current
Source/Sink Current
0
25
50
75
TEMPERATURE (°C)
100
125
BALANCER SOURCE/SINK CURRENT (mA)
1200
Supercapacitor Balancer
Quiescent Current
75
70
65
60
55
50
BAT_OUT = 2.5V
BAT_OUT = 3.6V
BAT_OUT = 5.0V
45
40
–50
–25
3337 G01
0
25
50
75
TEMPERATURE (°C)
100
30
25
20
15
10
5
0
–5
–10
–15
–20
125
BAT_OUT = 2.5V
BAT_OUT = 3.6V
BAT_OUT = 5.0V
35
0
10 20 30 40 50 60 70 80 90 100
VBAL/VBAT_OUT (%)
3337 G03
3337 G02
Supercapacitor Balancer
Source Current
Source Current
18
16
14
12
VBAL/VBAT_OUT = 48%
10
8
6
4
0
–25
0
25
50
75
TEMPERATURE (°C)
100
125
103
–5
–10
–15
–20
–25
–50
–25
0
25
50
75
TEMPERATURE (°C)
100
97
95
93
91
5
85
–50
125
Total Coulomb Counter Error
(5mA IPEAK Setting)
PEAK
5
COUT = 100µF
3
3
3
2
2
2
1
1
1
–2
–4
–5
–50
ERROR (%)
0
–1
–25
0
25
50
75
TEMPERATURE (°C)
100
125
3337 G07
–3
–4
–5
0.0005
0
25
50
75
TEMPERATURE (°C)
100
125
Total Coulomb Counter Error
(10mA IPEAK Setting)
PEAK
4
–2
BAT_IN = 2.0V
BAT_IN = 2.5V
BAT_IN = 3.6V
BAT_IN = 5.5V
–3
–25
3337 G06
4
–1
BAT_IN = 2.0V
BAT_IN = 2.5V
BAT_IN = 3.6V
BAT_IN = 5.5V
87
4
ERROR (%)
ERROR (%)
99
3337 G05
Coulomb Counter Error in
Continuous Mode
(100mA IPEAK Setting)
PEAK
0
PROPORTIONAL FOR OTHER IPEAK SETTINGS
89
BAT_OUT = 2.5V
BAT_OUT = 3.6V
BAT_OUT = 5.0V
3337 G04
5
IPEAK Current vs Temperature
(100mA I
Setting)
(100mA
IPEAK
Setting)
PEAK
101
2
0
–50
105
VBAL/VBAT_OUT = 52%
IPEAK CURRENT (mA)
BAT_OUT = 2.5V
BAT_OUT = 3.6V
BAT_OUT = 5.0V
BALANCER SINK CURRENT (mA)
BALANCER SOURCE CURRENT (mA)
20
Supercapacitor Balancer
Sink Current
Sink Current
BAT_IN = 3.6V, COUT = 100µF
0
–1
–2
–3
BAT_IN = 2.0V
BAT_IN = 3.6V
BAT_IN = 5.5V
0.005
0.05
0.5
BAT_OUT LOAD CURRENT (mA)
–4
5
3337 G08
–5
0.001
0.01
0.1
1
BAT_OUT LOAD CURRENT (mA)
10
3337 G09
Rev. 0
6
For more information www.analog.com
LTC3337
TYPICAL PERFORMANCE CHARACTERISTICS
TA = 25°C, BAT_IN = BAT_OUT = AVCC = DVCC =
3.6V, 100mA IPEAK unless otherwise noted.
5
Total Coulomb Counter Error
(20mA IPEAK Setting)
PEAK
4
4
3
3
3
2
2
0
–1
0
–1
–1
–2
–3
–3
–3
–4
–4
–4
–5
0.001
–5
0.001
5
0.01
0.1
1
BAT_OUT LOAD CURRENT (mA)
–5
0.001
10 20
Total Coulomb Counter Error
(50mA IPEAK Setting)
PEAK
5
Total Coulomb Counter Error
(75mA I(75mA
IPEAK Setting)
PEAK Setting)
5
4
4
3
3
3
2
2
0
–1
0
–1
0
–1
–2
–2
–3
–3
–3
–4
–4
–4
0.1
1
10
BAT_OUT LOAD CURRENT (mA)
–5
0.007
50
0.1
1
10
BAT_OUT LOAD CURRENT (mA)
3337 G13
40
36
160
32
BAT_OUT CURRENT (mA)
180
120
100
80
60
40
IPEAK TURN–OFF THRESHOLD
IPEAK TURN–ON THRESHOLD
20
0
–50
–25
0
25
50
75
TEMPERATURE (°C)
100
125
BAT_IN = 2.0V
BAT_IN = 3.6V
BAT_IN = 5.5V
0.1
1
10
BAT_OUT LOAD CURRENT (mA)
Start-Up Current Out of BAT_OUT
Pin (IPK[2]
= 1 Settings)
(IPK[2]
= 1 setting)
24
20
16
12
8
BAT_IN = 2.5V
BAT_IN = 3.6V
BAT_IN = 5.0V
4
0
–50
8
BAT_OUT = 0V
28
–25
0
25
50
75
TEMPERATURE (°C)
100
125
3337 G17
3337 G16
100
3337 G15
3337 G14
IPEAK Turn–On/Off Thresholds
140
–5
0.01
80
Start-Up Current Out of BAT_OUT
Pin (IPK[2] = 0 Settings)
BAT_OUT = 0V
7
BAT_OUT CURRENT (mA)
200
COUT = 100µF
1
–2
–5
0.005
Total Coulomb Counter Error
(100mA IPEAK Setting)
PEAK
2
BAT_IN = 3.6V, COUT = 100µF
1
ERROR (%)
BAT_IN = 3.6V, COUT = 100µF
30
3337 G12
4
1
0.01
0.1
1
10
BAT_OUT LOAD CURRENT (mA)
3337 G11
ERROR (%)
ERROR (%)
0
–2
10 20
BAT_IN = 3.6V, COUT = 100µF
1
–2
0.01
0.1
1
BAT_OUT LOAD CURRENT (mA)
Total Coulomb Counter Error
(25mA IPEAK Setting)
PEAK
2
BAT_IN = 3.6V, COUT = 100µF
1
ERROR (%)
BAT_IN = 3.6V, COUT = 100µF
1
3337 G10
BAT_IN – BAT_OUT (mV)
5
4
ERROR (%)
ERROR (%)
5
Total Coulomb Counter Error
(15mA IPEAK Setting)
PEAK
6
6
5
4
3
2
2
BAT_IN = 2.5V
BAT_IN = 3.6V
BAT_IN = 5.0V
1
0
–50
–25
0
25
50
75
TEMPERATURE (°C)
100
125
3337 G18
Rev. 0
For more information www.analog.com
7
LTC3337
TYPICAL PERFORMANCE CHARACTERISTICS
TA = 25°C, BAT_IN = BAT_OUT = AVCC = DVCC =
3.6V, 100mA IPEAK unless otherwise noted.
BAT_OUT
Voltage
ErrorError
BAT_OUT
Voltage
2.0
2.0
1.5
1.5
1.0
1.0
0.5
0.5
ERROR (%)
ERROR (%)
BAT_IN
Voltage
ErrorError
BAT_IN
Voltage
0
–0.5
BAT_IN = 1.8V
BAT_IN = 2.0V
BAT_IN = 2.5V
BAT_IN = 3.6V
BAT_IN = 5.5V
–1.0
–1.5
–2.0
–50
–25
0
25
50
75
TEMPERATURE (°C)
100
0
–0.5
BAT_OUT = 1.8V
BAT_OUT = 2.0V
BAT_OUT = 2.5V
BAT_OUT = 3.6V
BAT_OUT = 5.5V
–1.0
–1.5
–2.0
–50
125
–25
0
25
50
75
TEMPERATURE (°C)
100
3337 G20
3337 G19
AVCC Quiescent Current,
Current
Source
is ONis ON
Current
Source
Temperature
Sensor
Error
Temperature
Sensor
Error
300
5.0
290
AVCC QUIESCENT CURRENT (μA)
3.8
2.5
ERROR (°C)
125
1.3
0
–1.3
–2.5
–3.8
–5.0
–50
AVCC = 3.6V
–25
0
25
50
75
TEMPERATURE (°C)
100
125
280
270
260
250
240
230
AVCC = 1.8V
AVCC = 2.5V
AVCC = 3.6V
AVCC = 4.5V
AVCC = 5.5V
220
210
200
–50
–25
0
25
50
75
TEMPERATURE (°C)
100
3337 G22
3337 G21
BAT_OUT Load Step Transient
BAT_OUT Load Step Transient
BAT_OUT
50mV/DIV
BAT_OUT
50mV/DIV
IBAT_IN
50mA/DIV
IBAT_IN
50mA/DIV
CURRENT
LOAD
50mA/DIV
CURRENT
LOAD
50mA/DIV
3337 G23
1ms/DIV
COUT = 100μF
BAT_IN = 3.6V
LOAD STEP FROM 0mA TO 50mA
125
1ms/DIV
3337 G23
COUT = 100μF
BAT_IN = 3.6V
LOAD STEP FROM 5mA TO 50mA
Rev. 0
8
For more information www.analog.com
LTC3337
PIN FUNCTIONS
(LFCSP)
BAT_IN (Pin 11): Battery Input Voltage. Connect the battery as close as possible to this pin.
BAT_OUT (Pin 12): Battery Output Voltage. Connect the
load to this pin.
IPK0 (Pin 10): Input Current Limit Select Bit (with IPK1
and IPK2). IPK0 should be tied to BAT_IN to select high
or to GND to select low to program the desired IPEAK (see
Table 1 in the Operation section). Do not float.
IPK1 (Pin 9): Input Current Limit Select Bit (with IPK0 and
IPK2). See IPK0. Do not float.
IPK2 (Pin 8): Input Current Limit Select Bit (with IPK0 and
IPK1). See IPK0. Do not float.
AVCC (Pin 2): Supply Rail for the Coulomb Counter and
SOH Circuits. AVCC is normally connected to BAT_OUT,
but in some applications may connect to BAT_IN (see
Applications Information section).
DVCC (Pin 3): Supply Rail for the I2C Serial Bus and for the
IRQ and BATOUT_OK Outputs. DVCC sets the reference
level of the SDA and SCL pins for I2C compliance.
The external I2C pull-up resistors on SDA and SCL should
connect to DVCC. Depending on the application, DVCC can
be connected to AVCC or to a separate external supply
between 1.8V and 5.5V.
SCL (Pin 4): Serial Clock Input for the I2C Serial Port. The
I2C input levels are scaled with respect to DVCC for I2C
compliance. Do not float.
SDA (Pin 5): Serial Data Input/Output for the I2C Serial
Port. The I2C input levels are scaled with respect to DVCC
for I2C compliance. Do not float.
IRQ (Pin 6): Interrupt Output. Logic level output referenced to DVCC. Active low. This pin is normally logic high
but will transition low when either the coulomb counter
alarm level or one of the temperature warning levels is
reached.
BAL (Pin 1): Supercapacitor Balance Point. The common
node of a stack of two supercapacitors (optional) connected to BAT_OUT. A source/sink balancing current of
up to ±10mA is available. Tie BAL to GND to disable the
balancer and its associated quiescent current.
BATOUT_OK (Pin 7): BATOUT_OK Comparator Output.
Logic level output referenced to DVCC. This pin is logic
high when the BAT_OUT pin is high and in its normal
operating range where the coulomb counter is operating
properly.
GND (Exposed Pad Pin 13): Ground. The exposed pad
must be soldered to the PCB.
Rev. 0
For more information www.analog.com
9
LTC3337
BLOCK DIAGRAM
AVCC
(ALL CIRCUITS POWERED FROM AVCC)
(AVCC CAN CONNECT TO BAT_IN OR BAT_OUT)
IBAT_IN
VBAT_OUT
+
–
+
–
VHYST
IPEAK
VOUT_HIGH
0
IBAT_IN
+
PRIMARY
BATTERY
BAT_IN
VHYST
BAT_OUT
1 = CLOSED (IPEAK ON)
EN
0 = OPEN (IPEAK OFF)
CBAT_IN
IPK[2:0]
0
IPEAK
BAT_OUT
CBAT_OUT
BAL
3
SUPERCAPACITORS
(OPTIONAL)
OSC
CLK
COUNTER
16
VBAT_IN(ON)
VBAT_OUT(ON)
VBAT_IN(OFF)
VBAT_OUT(OFF)
–∆
ADC
DVCC
Q
12
V
12
Z
8
I 2C
SDA
SCL
Q, V, Z, T INFORMATION
T
VTEMP
IRQ
TEMP
MONITOR
BAT_OUT
BAT_IN –VOUT_HIGH
+
–
BATOUT_OK
GND
3337 BD
Figure 2. Block Diagram
Rev. 0
10
For more information www.analog.com
LTC3337
OPERATION
COULOMB COUNTER (Q)
IBAT_IN
The LTC3337 integrates a precision coulomb counter
which monitors the accumulated charge that is transferred
from a primary battery connected to its BAT_IN pin to an
output load connected to its BAT_OUT pin. IPEAK is a low
dropout current source between BAT_IN and BAT_OUT.
The current source value can be set via the input current
limit select pins IPK[2:0] (see Table 1).
IPEAK
Q = IPEAK • tP
CURRENT = 0A
Q
tP
VBAT_OUT
t
110mV VOUT_HIGH
VHYST
BAT_IN
160mV VOUT_LOW
Table 1. IPEAK Selection
BAT_OUT
t
IPK2
IPK1
IPK0
IPEAK
0
0
0
5mA
0
0
1
10mA
0
1
0
15mA
0
1
1
20mA
1
0
0
25mA
1
0
1
50mA
1
1
0
75mA
1
1
1
100mA
Referring to Figure 3, if BAT_OUT is less than
BAT_IN – VOUT_LOW (where VOUT_LOW is nominally
160mV), the current source is turned on and charge is
delivered from BAT_IN to BAT_OUT. After BAT_OUT
charges up to BAT_IN – VOUT_HIGH (where VOUT_HIGH is
nominally 110mV), the current source is turned off.
The capacitor connected between BAT_OUT and ground
supports the load while the current source is off and should
have a minimum value of 100μF for the 100mA IPEAK setting. See Table 11 in the Applications Information section.
A hysteretic comparator senses both thresholds and controls the current source timing. The output of the comparator in one state represents the time (tP) during which the
battery is delivering a current equal to IPEAK. This output
enables an oscillator having a period T (500ns typical)
which is used to increment a counter. The counter output
bits represent a precise count of the battery coulombs.
The last 2 bytes can be read via I2C.
The amount of charge represented by the least significant
bit (qLSB) of the accumulated charge register is given in
3337 F03
Figure 3. Coulomb Counter Operation
the Electrical Characteristics table for all 8 IPEAK settings
for the case of the default prescaler setting (M = 0). This
default prescaler setting uses the full length of the internal
counter. See Equation 1.
qLSB (M = 0) =
(246 – 1)•IPEAK • T
65535
(1)
CHOOSING THE COULOMB COUNTER PRESCALER M
To preserve adequate digital resolution for a wide range of
battery capacities and IPEAK current values, the LTC3337
includes a programmable prescaler. The user can set the
prescaler value from 0 to 15 by writing bits A[3:0] (see
Table 3). Note that the default value for the prescaler is 0.
To use the majority of the range of accumulated charge
register B, the prescaler value (M) should be chosen for
a given battery capacity QBAT based on Equation 2.
⎛ q • 65535 ⎞
M=log2 ⎜ LSB
⎟
QBAT
⎝
⎠
(2)
where QBAT is the battery capacity and qLSB is the typical
value (for M = 0) from the Electrical Characteristics table
for the selected IPEAK. M must be an integer, so the result
of Equation 2 must be rounded down to the nearest integer value. M has a maximum value of 15.
Rev. 0
For more information www.analog.com
11
LTC3337
OPERATION
A smaller capacity battery will require a higher prescaler
value M than a larger capacity battery for the same IPEAK.
Likewise, a lower IPEAK will require a lower prescaler
value M than a higher IPEAK for the same capacity battery.
The amount of charge represented by the least significant
bit (qLSB_M) of the accumulated charge register is given
by Equation 3.
qLSB_M =
qLSB
(3)
2M
where qLSB is the typical (M = 0) value in the Electrical
Characteristics table for the selected IPEAK.
AVCC PIN CONNECTION
The AVCC pin serves as the power supply for all internal
LTC3337 circuits and can be connected to BAT_IN or to
BAT_OUT. With AVCC connected to BAT_OUT, the coulomb counter counts all coulombs coming out of the battery, including those associated with the LTC3337's own
quiescent current, which effectively parallels the output
load at BAT_OUT. When connecting AVCC to BAT_IN, the
LTC3337’s own quiescent current represents an error on
coulombs out of the battery. However, coulombs associated purely with the output load are now more accurately counted, and this may be beneficial in output power
metering applications. In this second option a scaling
factor of minus 1.6% needs to be applied to all coulomb
counter measurements.
BATTERY VOLTAGE (V) AND BATTERY IMPEDANCE
(Z) MONITORS
The LTC3337 includes a 12-bit analog-to-digital converter (ADC), which is used to measure the battery voltage
at the BAT_IN pin, the BAT_OUT pin voltage, and the
LTC3337 die temperature.
The BAT_IN pin voltage is sampled when the coulomb
counter is delivering a known IPEAK pulse (VBAT_IN(ON)).
The ADC converts this sampled value to a 12-bit value
with an LSB = 1.465mV. The conversion time is typically
3.5ms. The BAT_IN voltage is then sampled a second
time when the coulomb counter is delivering zero current,
(VBAT_IN(OFF)). After a second conversion time, the last
stored value is readable from register D (for VBAT_IN(ON))
and register E (for VBAT_IN(OFF)). See Table 2, Table 6,
and Table 7.
The voltage measurement is performed only every 1024
on-cycles to minimize the AVCC quiescent current.
Battery impedance can be calculated from the above two
conversion values: Z = (VBAT_IN(OFF) – VBAT_IN(ON))/IPEAK
based on the last stored values in registers D and E.
The BAT_OUT voltage is also sampled when the IPEAK
current source turns on (VBAT_OUT(ON)) and sampled
a second time when the IPEAK current source turns off
(VBAT_OUT(OFF)). Again after two conversion times, the
last stored values are readable from register F (for VBAT_
OUT(ON)) and register G (for VBAT_OUT(OFF)). See Table 2,
Table 8, and Table 9. Just like for the BAT_IN voltages
these voltage measurements are performed only every
1024 on-cycles to minimize the AVCC quiescent current.
TEMPERATURE MONITOR (T)
The LTC3337 also measures its own die temperature and
stores it in an 8-bit register. This temperature measurement is also taken only every 1024 on-cycles. The last
stored value can be read from the 8MSBs in register C.
See Table 2 and Table 5.
I2C INTERFACE
The 7-bit hard wired I2C address of the LTC3337 is
1100100[R/W]. The LTC3337 is a slave-only device
meaning that the serial clock line (SCL) is only an input
while the serial data line (SDA) is bidirectional.
INTERNAL REGISTERS
The LTC3337 has 8 internal sub-addressed I2C registers,
as shown in Table 2. Registers A and H are write-only
registers, register B is read/write, and registers C, D, E, F,
and G are read-only, as shown in Table 2 through Table 10.
Rev. 0
12
For more information www.analog.com
LTC3337
OPERATION
Table 2. Register Map
Table 5. Read Register C (Address 03h)
SUB- REGISTER
ADDRESS NAME REGISTER DESCRIPTION
R/W DEFAULT
01h
A
Prescaler Selection, Clear
W
Interrupt, Coulomb Counter
Shutdown, Gross Test and
Coulomb Counter Alarm Threshold
FF00h
02h
B
Accumulated Charge,
16 Bits (Read), 8 Bits (Write)
03h
C
Status Register,
Die Temperature
R
0000h
R/W 0000h
04h
D
BAT_IN Voltage when IPEAK On
R
0000h
05h
E
BAT_IN Voltage when IPEAK Off
R
0000h
06h
F
BAT_OUT Voltage when IPEAK On
R
0000h
07h
G
BAT_OUT Voltage when IPEAK Off
R
0000h
08h
H
Cold and Hot Die Temperature
Alarms
W
00FFh
BIT
NAME
OPERATION
DEFAULT
C[0]
Coulomb Counter Coulomb Counter Operating Fault
Overflow
Due to an Improperly Chosen
Prescaler Causing the Ripple
Counter to Overflow
0
C[1]
Alarm Trip
Accumulator Register B Value
Has Met or Exceeded the Alarm
Threshold Set in Register A
0
C[2]
Alarm Minimum
Die Temperature
The Die Temperature Has
Reached the Min Die Temperature
Set with Bits H[7:0]
0
C[3]
Alarm Maximum
Die Temperature
The Die Temperature Has
Reached the Max Die
Temperature Set with Bits H[15:8]
0
C[4]
ADC
Measurements
Ready
Indicates when the ADC
Measurements are Ready After
a Read Request with Coulomb
Counter Turned Off (Bit A[7] = 1
and Bit A[6] = 1)
After this Bit is Read via I2C, It
Self-Resets
0
Table 3. Write Register A (Address 01h)
BIT
NAME
A[3:0] Prescaler Bits
OPERATION
DEFAULT
Set Coulomb Counter Prescaling
Factor M from 0 to 15
0000
A[4]
Clear_Int
Clear Interrupt (Alarm Reset)
0
A[5]
Counter Check
Counter Check Using IRQ Pin
0
A[6]
Coulomb Counter
Shutdown
Extend Battery Range
0
A[7]
Set ADC Conversion
when the Coulomb
Counter is
Turned Off
Start ADC Conversion of Battery
Measurement and Temperature
when A[6] = 1.
This Bit Self-Resets when the
ADC Measurements/Conversions
are Finished
0
Coulomb Counter Alarm Level
Threshold Calculated by the User
Based on Battery Capacity and
IPEAK Current
FFh
A[15:8] Alarm Level
BIT
NAME
OPERATION
000
C[15:8] DIE_TEMP
Read Back 8MSBs of Die
Temperature Measurement
00h
The die temperature DIE_TEMP can be calculated by using
Equation 4.
DIE _ TEMP = TLSB • COUNTC – 41°C
(4)
where TLSB is the typical value in the Electrical
Characteristics table and COUNTC is the 8MSBs of
Register C.
Table 6. Read Register D (Address 04h)
BIT
DEFAULT
Read Back 16MSBs of Counter
Data, Only 8MSBs B[15:8] are
Writable
Read Back of IPK[2:0] Pins
(Setting Latched at Start-Up)
Table 4. Read/Write Register B (Address 02h)
B[15:0] Accumulated
Charge
C[7:5] Pin-Strapped
IPK Pin
0000h
OPERATION
DEFAULT
D[11:0] VBAT_IN(ON)
NAME
Read Back BAT_IN Pin Voltage
Measurement when IPEAK Turns On
000000
000000
D[15:12]
Not Used
0000
The battery voltage VBAT_IN(ON) can be obtained from the
count in register D (COUNTD) by using Equation 5.
(5)
V
= VLSB • COUNTD
BAT _IN(ON)
where VLSB is the typical value in the Electrical
Characteristics table.
Rev. 0
For more information www.analog.com
13
LTC3337
OPERATION
Table 7. Read Register E (Address 05h)
BIT
NAME
Table 10. Write Register H (Address 08h)
OPERATION
DEFAULT
E[11:0] VBAT_IN(OFF)
Read Back BAT_IN Pin Voltage
Measurement when IPEAK Turns Off
000000
000000
E[15:12]
Not Used
0000
The battery voltage VBAT_IN(OFF) can be obtained from the
count in register E (COUNTE) by using Equation 6.
VBAT _IN(OFF) = VLSB • COUNTE
(6)
where VLSB is the typical value in the Electrical
Characteristics table.
Battery impedance can be calculated from the above two
conversion values: Z = (VBAT_IN(OFF) – VBAT_IN(ON))/IPEAK.
Table 8. Read Register F (Address 06h)
BIT
NAME
OPERATION
DEFAULT
F[11:0] VBAT_OUT(ON) Read Back BAT_OUT Pin Voltage
Measurement when IPEAK Turns On
000000
000000
F[15:12]
Not Used
0000
The BAT_OUT voltage VBAT_OUT(ON) can be obtained from
the count in register F (COUNTF) by using Equation 7.
VBAT _OUT(ON) = VLSB • COUNTF
(7)
where VLSB is the typical value in the Electrical
Characteristics table.
Table 9. Read Register G (Address 07h)
BIT
NAME
OPERATION
DEFAULT
G[11:0] VBAT_OUT(OFF) Read Back BAT_OUT Pin Voltage
Measurement when IPEAK Turns Off
G[15:12]
Not Used
000000
000000
0000
The BAT_OUT voltage VBAT_OUT(OFF) can be obtained from
the count in register G (COUNTG) by using Equation 8.
VBAT _OUT(OFF) = VLSB • COUNTG
(8)
where VLSB is the typical value in the Electrical
Characteristics table.
BIT
NAME
OPERATION
DEFAULT
H[7:0] Cold Die Temperature
Alarm Level
Minimum Temperature
Threshold
00h
H[15:8] Hot Die Temperature
Alarm Level
Maximum Temperature
Threshold
FFh
COUNTER CHECK TEST
Setting bit A[5] = 1 allows the user to verify that the coulomb counter is operating correctly without having to wait
for the accumulated charge register to increment from
0000h. In this mode the input clock of the ripple counter is
output to the IRQ pin. The coulombs represented by each
transition on the IRQ pin (time between two consecutive
rising edges) is: qLSB_M/2(24–M), where qLSB is given in
the Electrical Characteristics table for each IPEAK setting.
ALARMS
Alarms cause the IRQ pin to be pulled low. The user can
read register C to determine what caused the alarm. The
alarm can then be cleared by writing a 1 to bit A[4]. The
clear interrupt bit itself is self-clearing after action is taken
on the IRQ pin.
If another alarm occurs while clearing a previous alarm,
the IRQ pin will go high for 1μs (typical) before returning
low again. At this time, the clear interrupt bit A[4] is also
reset to zero.
There are 4 different fault/alarm conditions:
1. A coulomb counter overflow (C[0] is high) due to
an improperly chosen prescaler (M) value causing the ripple counter to overflow. After the alarm
is cleared the IRQ pin is released for 1μs and later
pulled low again unless register C is overwritten with
a lower value.
2. The preset alarm level is reached (C[1] is high) when
the 8MSBs of the ripple counter are equal to or higher
than the 8MSBs in register A (Coulomb Counter Alarm
Threshold). The user should increase the alarm
threshold in A[15:8] bits and write bit A[4] to 1 to
Rev. 0
14
For more information www.analog.com
LTC3337
OPERATION
clear the alarm. The alarm threshold is only checked
when the LSB of the accumulator register changes
or when a write to register B or register A is done via
I2C. Therefore, if bit A[4] is set to 1 to clear an alarm
interrupt without also changing the contents of register A and/or B, and this occurs during a long IPEAK
source off time, the IRQ pin is cleared and will not go
back high again until the LSB bit of register B again
changes. This could require several IPEAK cycles.
3. The cold threshold of the die temperature alarm is
reached (C[2] is high) due to the measured die temperature in C[15:8] being equal to or lower than the
cold temperature threshold set in register H.
4. The hot threshold of the die temperature alarm is
reached (C[3] is high) due to the measured die temperature in C[15:8] being equal to or higher than the
hot temperature threshold set in register H.
EXTENDED BATTERY RANGE BELOW 2V
When the coulomb counter is operating, the BAT_OUT
voltage is lower than the BAT_IN voltage by a controlled
amount (typically 110mV to 160mV). The coulomb
counter works properly for BAT_IN voltages down to 2V
and for BAT_OUT voltages down to 1.8V. The BAT_IN
range can be somewhat extended down below 2.0V by
setting bit A[6] = 1. This action disables the coulomb
counter and the peak current limit IPEAK and creates a low
impedance connection between BAT_IN and BAT_OUT.
Because the current limit circuitry is disabled in this mode,
care must be taken not to exceed the absolute maximum
current rating of the BAT_OUT pin. Although this mode
can be entered at any BAT_IN voltage, it is really only
intended (and recommended) for “last gasp” end-of-life
2V and below operation.
The temperature monitor and the BAT_IN voltage monitor
are still functional down to 1.8V on BAT_IN. These values
can still be read on request by issuing a read command
via I2C.
SUPERCAPACITOR BALANCER (OPTIONAL)
An integrated supercapacitor balancer with 62nA of quiescent current from the BAT_OUT pin is available to balance
a stack of two supercapacitors at the BAT_OUT pin. The
BAL pin is tied to the middle of the stack and can source or
sink 10mA to regulate the BAL pin’s voltage to half that of
the BAT_OUT pin’s voltage. To disable the balancer and its
associated quiescent current, tie the BAL pin to ground.
ADVANTAGES OF SUPERCAPACITORS
Supercapacitors are used in many power-management
applications requiring many rapid charge/discharge cycles
for short term power needs. Supercapacitors have many
advantages. For instance, they maintain a long cycle lifetime and thanks to their low equivalent series resistance,
supercapacitors provide high power density and high load
currents to achieve almost instant charge in seconds.
One disadvantage of supercapacitors is their low energy
density. Thus, they can not be used as a continuous power
source. Also, the maximum voltage of a single cell is typically only 2.7V. If higher voltage is needed, a second cell
must be connected in series.
Rev. 0
For more information www.analog.com
15
LTC3337
APPLICATIONS INFORMATION
BAT_OUT CAPACITOR SELECTION
BATTERY ESR AND VOLTAGE RIPPLE
A minimum value of capacitance (COUT) is required
between BAT_OUT and ground. This capacitor determines
the IPEAK pulse on and off durations. Its value should
be selected based on the maximum current load at the
BAT_OUT pin and the IPEAK setting. For best coulomb
counter accuracy, it is recommended to have 50μs minimum IPEAK on/off durations (see Equation 9).
The ripple voltage between BAT_IN and BAT_OUT is also
affected by the battery ESR value. For maximum coulomb
counter accuracy, it is recommended to choose a battery
such that ESR • IPEAK is much smaller than the hysteresis. ESR • IPEAK larger than the hysteresis generates
very short IPEAK pulses. If the duration is shorter than
typically 3µs the ADC cannot correctly measure the BAT_
IN and BAT_OUT voltages. An alternative is to increase
the BAT_IN capacitor to a minimum of 10µF. The input
capacitor helps in increasing the IPEAK pulse duration. If
the BAT_IN capacitor is too big the battery impedance
measurement accuracy will suffer because it slows down
BAT_IN voltage movement when IPEAK turns on/off.
IPEAK _ON time(min)=
COUT • VHYST
IPEAK
(9)
IPEAK _OFF time(min)=
COUT • VHYST
ILOAD(MAX)
where VHYST is the voltage ripple value between VOUT_HIGH
and VOUT_LOW. See Figure 3. The hysteresis is nominally
set to 50mV.
For the 100mA IPEAK setting and a maximum load current of 100mA, a 100μF COUT capacitor is recommended.
See Table 11 for recommended COUT values for the other
IPEAK settings.
Table 11. Raccomended Minimum COUT Values for Each
IPEAK Selection
IPK2
IPK1
IPK0
IPEAK
RECOMMENDED
COUT
0
0
0
5mA
4.7μF
0
0
1
10mA
10μF
0
1
0
15mA
15μF
0
1
1
20mA
22μF
1
0
0
25mA
33μF
1
0
1
50mA
47μF
1
1
0
75mA
82μF
1
1
1
100mA
100μF
The VOUT_HIGH and VOUT_LOW thresholds are DC levels.
The actual AC values seen in application will be outside of
these levels due to finite delay in the hysteretic comparator.
MAXIMUM LOAD AT BAT_OUT
The maximum continuous load at BAT_OUT cannot
exceed IPEAK or the output will lose regulation. The maximum instantaneous load, however, can exceed IPEAK for
short durations, provided that the overall average load
does not. During the “bursts”, extra current is provided
by the BAT_OUT capacitor and the BAT_OUT voltage discharges slightly. The length of the burst and the amount
of acceptable BAT_OUT voltage droop will determine the
required size of the BAT_OUT capacitor.
For low voltage (BAT_IN~2V) operation with bit A[6]=1,
the maximum load is no longer limited by IPEAK, but
rather by the absolute maximum rating of the BAT_OUT
pin itself.
BAT_IN
100mV/DIV
BAT_OUT
100mV/DIV
IBAT_IN
100mA/DIV
CURRENT
LOAD
100mA/DIV
100μs/DIV
3337 F04
COUT = 100μF
BAT_IN = 3.6V
LOAD STEP FROM 10mA TO 200mA
Figure 4. BAT_OUT Load Step Transient
with High Instantaneous Current
Rev. 0
16
For more information www.analog.com
LTC3337
APPLICATIONS INFORMATION
I2C INTERFACE
MASTER AND SLAVE TRANSMITTERS AND RECEIVERS
The LTC3337 communicates with a bus master using the
standard I2C 2-wire serial interface. The Timing Diagram
(Figure 1) shows the relationship of the signals on the bus.
Devices connected to an I2C bus may be classified as
either master or slave. A typical bus is composed of one
or more master devices and several slave devices.
The two bus lines, SDA and SCL, must be high when the
bus is not in use. External pull-up resistors are required
on these lines. The I2C control signals, SDA and SCL, are
referenced internally to the DVCC supply. DVCC should
be connected to the same power supply as the bus
pull-up resistors.
Some devices can act as either a master or a slave, but they
may not change roles while a transaction is in progress.
DVCC can be connected to AVCC or to a separate external
supply between 1.8V and 5.5V.
BUS SPEED
The I2C port is designed to operate at speeds of up
to 400kHz. It has built-in timing delays to ensure correct operation when addressed from an I2C compliant
master device. It also contains input filters designed to
suppress glitches.
START AND STOP CONDITIONS
A bus master signals the beginning of communications
by transmitting a START condition. A START condition is
generated by transitioning SDA from high to low while
SCL is high. The master may transmit either the slave
write address or the slave read address. Once data is
written to the LTC3337, the master may transmit a STOP
condition which commands the LTC3337 to act upon its
new command set. A STOP condition is sent by the master by transitioning SDA from low to high while SCL is
high.
BYTE FORMAT
Each frame sent to or received from the LTC3337 must
be eight bits long. The most significant bit (MSB) must
be sent first. The eight bits are followed by an extra clock
cycle for the acknowledge bit. The read or written data is
always 2 bytes. The least significant byte is sent before
the most significant byte.
The transmitter/receiver relationship is distinct from that
of master and slave. The transmitter is responsible for
control of the SDA line during the eight-bit data portion
of each frame. The receiver is responsible for control of
the SDA line during the ninth and final acknowledge clock
cycle of each frame.
All transactions are initiated by the master with a START
or repeat START condition. The master controls the active
(falling) edge of each clock pulse on SCL, regardless of its
status as transmitter or receiver. The slave device never
brings SCL low.
The LTC3337 does not clock stretch and will never hold
SCL low under any circumstance.
The master device begins each I2C transaction as the
transmitter and the slave device begins each transaction
as the receiver. For bus write operations, the master acts
as the transmitter and the slave acts as receiver for the
duration of the transaction. For bus read operations, the
master and slave exchange transmit/receive roles following the address frame for the remainder of the transaction.
ACKNOWLEDGE
The acknowledge signal (ACK) is used for handshaking
between the transmitter and receiver. When the LTC3337
is written to, it acknowledges its write address as well as
the subsequent data bytes as a slave receiver. When it is
read from, the LTC3337 acknowledges its read address
as a slave receiver. The LTC3337 then changes to a
slave transmitter and the master receiver may optionally acknowledge receipt of the following data byte from
the LTC3337.
Rev. 0
For more information www.analog.com
17
LTC3337
APPLICATIONS INFORMATION
The acknowledge related clock pulse is always generated by the bus master. The transmitter (master or slave)
releases the SDA line (high) during the acknowledge
clock cycle.
The receiver (slave or master) pulls down the SDA line
during the acknowledge clock pulse so that it is a stable
low during the high period of this clock pulse.
When the LTC3337 is read from, it releases the SDA line
after the eighth data bit so that the master may acknowledge receipt of the data. The I2C specification calls for a
not acknowledge (NACK) by the master receiver following the last data byte during a read transaction. Upon
receipt of the NACK, the slave transmitter is instructed to
release control of the bus. Because the LTC3337 transmits two bytes of data under all circumstances, a master
acknowledging or not acknowledging the data sent by the
LTC3337 has no consequence. The LTC3337 will release
the bus after 2 bytes in either case.
SLAVE ADDRESS
The LTC3337 responds to a 7-bit address which has been
factory programmed to 1100100[R/W]. The LSB of the
address byte, known as the read/write bit, should be 0
when writing data to the LTC3337, and 1 when reading
data from it. Considering the address an 8-bit word, then
the write address is 0xC8, and the read address is 0xC9.
The LTC3337 will acknowledge both its read and
write addresses.
SUB-ADDRESSED ACCESS
The LTC3337 has five read registers, two write registers and one read/write register. They are accessed by
the I2C port via a sub-addressed pointer system where
each sub-address value points to one of the eight registers within the LTC3337. See Table 2 for sub-address
information.
The sub-address pointer is always the first byte written
immediately following the LTC3337 write address during
bus write operations. The sub-address pointer value
persists after the bus write operation and will determine
FROM MASTER TO SLAVE
A: ACKNOWLEDGE (LOW)
A: NOT ACKNOWLEDGE (HIGH)
S: START CONDITION
P: STOP CONDITION
R: READ BIT (HIGH)
W: WRITE BIT (LOW)
FROM SLAVE TO MASTER
LSBYTE
MSBYTE
S ADDRESS W A REGISTER A S ADDRESS R A DATA A DATA A P
1100100 0 0
02h
1100100
0
1 0
80h
0
01h 1
EXAMPLE: READ REGISTER B (SUB-ADDR 02h) → DATA READ: 0180h → 00000001 10000000
LSBYTE
MSBYTE
S ADDRESS W A REGISTER A DATA A DATA A P
1100100 0 0
01h
0 F0h
0
01h 0
EXAMPLE: WRITE REGISTER A (SUB-ADDR 01h) → DATA WRITTEN: 01F0h → 00000001 11110000
3337 F05
Figure 5. I2C Reading and Writing Protocol
which data byte is returned by the LTC3337 during any
subsequent bus read operations. See Figure 5.
BUS WRITE OPERATION
The bus master initiates communication with the LTC3337
with a START condition and the LTC3337’s write address.
If the address matches that of the LTC3337, the LTC3337
returns an acknowledge. The bus master should then
deliver the sub-address. The sub-address value is transferred to a special pointer register within the LTC3337
upon the return of the sub-address acknowledge bit by
the LTC3337.
If the master wishes to continue the write transaction,
it may then deliver the 2 data bytes. The data bytes are
transferred to an internal pending data register at the
location of the sub-address pointer when the LTC3337
acknowledges both data bytes. The acknowledge bit is
sent at the end of each byte. The LTC3337 is then ready
to receive a new sub-address, optionally repeating the
[SUB-ADDRESS] [DATA-byte1] [DATA-byte2] cycle indefinitely. The master may terminate communication with the
LTC3337 with either a repeat START or a STOP condition.
If a repeat START condition is initiated by the master,
the LTC3337, or any other chip on the I2C bus, can then
be addressed.
The LTC3337 will remember, but not act on, the last input
of valid data that it received at each sub-address location.
Rev. 0
18
For more information www.analog.com
LTC3337
APPLICATIONS INFORMATION
This cycle can also continue indefinitely. Once all chips
on the bus have been addressed and sent valid data, a
global STOP can be sent and the LTC3337 will immediately update all of its command registers with the most
recent pending data that it had previously received.
BUS READ OPERATION
Only one sub-addressed data register is accessible
during each bus read operation. The data returned by
the LTC3337 is from the data register pointed to by the
contents of the sub-address pointer register. The pointer
register contents are determined by the previous bus write
operation. In preparation for a bus read operation, it may
be advantageous for a bus master to prematurely terminate a write transaction with a STOP or repeat START
condition. The last transmitted byte then represents a
pointer to the register of interest for the subsequent bus
read operation.
The bus master reads status data from the LTC3337
with a START or repeat START condition followed by the
LTC3337 read address. If the read address matches that
of the LTC3337, the LTC3337 returns an acknowledge.
Following the acknowledgement of its read address, the
LTC3337 returns one bit of status information for each
of the next eight clock cycles from the register selected
by the sub-address pointer (LSB first data byte). The
SDA line stays high for 1-clock cycle after the first 8 bits
and after LTC3337 returns the second data byte (MSB).
Additional clock cycles from the master after the 2 data
bytes have been read will leave the SDA line high. The
LTC3337 will never acknowledge any bytes during a bus
read operation except for its read address.
To read a different register, a write transaction must be
initiated with a START or repeat START followed by the
LTC3337 write address and sub-address pointer byte
before the read transaction may be repeated.
When the contents of the sub-address pointer register
point to write-only registers (A, H), the data returned in
a bus read operation is the pending command data at
that location if it had been modified since the last STOP
condition. After a STOP condition, all pending data is copied to the command registers for immediate effect.
When the contents of the sub-address pointer register
point to the writable and readable register B, the data
returned in a bus read operation is data at that location,
not the pending command data from the previous write
operation. After a STOP condition, all pending data is copied to the command registers for immediate effect and a
subsequent read operation can read the effect.
When the contents of the sub-address pointer register
point to the read-only registers (C, D, E, F, G), the data
returned is a snapshot of the state of the LTC3337 at
a particular instant in time. If no interrupt requests are
pending, the status data is sampled when the LTC3337
acknowledges its read address, just before the LTC3337
begins data transmission during a bus read operation. If
the read address is acknowledged during an ADC conversion or IPEAK pulse the status data reported is the
one from the previous ADC conversion or end of the last
IPEAK pulse.
When an alarm/fault occurs, the IRQ pin is driven low and
data is latched in bits C[3:0] of status register C at that
moment. Any subsequent read operation from register C
will return these frozen C[3:0] bits to facilitate determination of the cause of the interrupt request.
After the bus master clears the LTC3337 interrupt request,
bits C[3:0] of the status latches are cleared. Bus read
operations will then again return either a snapshot of the
data at the time of the read address acknowledge, after an
ADC conversion, after the IPEAK pulse, or at the time of the
next interrupt assertion, whichever comes first.
PC BOARD LAYOUT
Despite its ultralow current operation, all high impedance
nodes of the LTC3337 are inside the IC, and therefore,
no special layout is needed. The positive terminals of the
input and output capacitors should be connected as close
as possible to the BAT_IN and BAT_OUT pins, respectively, and the negative terminals as close as possible to
the GND pin.
Rev. 0
For more information www.analog.com
19
LTC3337
TYPICAL APPLICATIONS
Microprocessor Application with High Load Peak Current and Supercapacitor
IPEAK = 100mA
BAT_OUT
AVCC
BAL
DVCC
BAT_IN
+
LiSOCl2
BATTERY
IPK[2]
IPK[1]
LTC3337
IPK[0]
GND
10mF
2.7V
10k
10mF
2.7V
10k
SCL
SDA
IRQ
BATOUT_OK
I2C
μP
3337 TA03
Output Power Metering Application
qLSB_LOAD = qLSB –1.6%
IPEAK = 5mA
+
BAT_IN
LiSOCl2
BATTERY
IPK[2]
IPK[1]
LTC3337
IPK[0]
GND
BAT_OUT
AVCC
DVCC
BAL
500μF
10k
LOAD
10k
SCL
SDA
IRQ
BATOUT_OK
3337 TA04
μP
PGOOD
ALARM
I 2C
Rev. 0
20
For more information www.analog.com
LTC3337
TYPICAL APPLICATIONS
Battery with High ESR Powering a Step-Down Converter and a Microprocessor
with a Wireless Transmitter, All Coulombs Counted
4.8V
+
IPEAK = 100mA
IPEAK = 150mA
BAT_OUT
AVCC
BAL
DVCC
BAT_IN
3× AA
ALKALINE
390μF
6V
IPK[2]
IPK[1]
VIN
LTC3337
IPK[0]
GND
10k
STBY
SCL
SDA
IRQ
BATOUT_OK
D1
SW
CAP
10µF
6V
EN
μP
TX
1M
22µH
1.8V
VOUT
D0
I 2C
STBY
PGOOD
EN
100µF
6V
10k
ALARM
LTC3388-1
VIN2
CORE
GND
47µF
6V
GND
3337 TA05
Primary Battery SOH Monitor with 12V Converter
22nF
IPEAK = 100mA
+
IPEAK = 250mA
BAT_OUT
AVCC
BAL
DVCC
BAT_IN
3.6V
LiSOCl2
IPK[2]
IPK[1]
LTC3337
IPK[0]
GND
SW1
SW2
10k
150µF
6V
1µF VCC
6V
MPPC
BST2
VOUT
EXTVCC
RUN
10k
SCL
SDA
IRQ
BATOUT_OK
BST1
PVIN
VIN
22nF
6.8µH
LTC3130
ILIM
PGOOD
VOUT
12V
10pF 12mA
10µF
1M
3.74M
PGOOD
200k
FB
MODE
VCC
GND
3337 TA06
PGND
340k
4.7µF
Rev. 0
For more information www.analog.com
21
LTC3337
TYPICAL APPLICATIONS
Paralleling Two LTC3337s for Higher Current Loads
3.6V
+
BAT_IN
LiSOCl2
IPK[2]
2
BAT_OUT
LTC3337
DVCC
IPK[1]
BAL
IPK[0]
BATOUT_OK
I2C
IPK[2]
TO SYSTEM LOAD
(UP TO 200mA)
BAT_OUT
LTC3337
AVCC
DVCC
IPK[1]
BAL
IPK[0]
BATOUT_OK
I2C
100μF
6V
IRQ
GND
BAT_IN
2
AVCC
GND
IRQ
3337 TA07
NOTE: SINCE THE TWO LTC3337 HAVE THE SAME I2C ADDRESS,
EXTERNAL CHIP SELECT LOGIC MUST BE IMPLEMENTED
TO INDIVIDUALLY ADDRESS THEM.
Rev. 0
22
For more information www.analog.com
LTC3337
PACKAGE DESCRIPTION
RC Package
12-Lead Plastic LFCSP (2mm × 2mm)
(Reference LTC DWG # 05-08-1784 Rev A)
2.00 ±0.05
11
PIN 1 BAR
TOP MARK
(SEE NOTE 4)
12
10
2.00 ±0.05
(4 SIDES)
CO.20
1
0.50 BSC
2.00 ±0.05
0.25 ±0.05
0.25 REF
7
0.70 ±0.10
(RC12) LFCSP REV A 0121
5
0.40 ±0.10
0.75 ±0.05
0.200 REF
4 0.70 ±0.10
6
BOTTOM VIEW—EXPOSED PAD
0.00 – 0.05
NOTE:
1. DRAWING NOT TO SCALE
2. ALL DIMENSIONS ARE IN MILLIMETERS
3. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
4. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
0.70 ±0.05
1.10 ±0.05
2.50 ±0.05
0.50 BSC
0.70 ±0.10
PACKAGE
OUTLINE
0.25 ±0.05
0.25 BSC
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog
Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications
subject to change without notice. No license
is granted
by implicationwww.analog.com
or otherwise under any patent or patent rights of Analog Devices.
For
more information
23
LTC3337
TYPICAL APPLICATIONS
SmartMesh Mote with Supercapacitors for Wireless Mesh Networks
3.2V
+
IPEAK = 100mA
2× AA
ALKALINE
BAT_OUT
AVCC
BAL
DVCC
BAT_IN
IPK[2]
IPK[1]
3.09V TO 2.89V
LTC3337
IPK[0]
GND
180mF
2.5V
10k
SCL
SDA
IRQ
BATOUT_OK
10k
180mF
2.5V
VSUPPLY
MOTE
TX
PGOOD
3337 TA02
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LTC2941
Battery Gas Gauge with I2C Interface
2.7V to 5.5V Operation; High Side RSENSE; ±50mV Sense Voltage Range; 1%
Charge Accuracy
LTC2941-1
1A I2C Battery Gas Gauge with Internal Sense
Resistor
2.7V to 5.5V Operation; Integrated 50mΩ High Side RSENSE; ±1A Sense Current
Range; 1% Charge Accuracy
LTC2942
Battery Gas Gauge with Temperature, Voltage
Measurement
14-Bit ∆∑–ADC; Pin Compatible with LTC2941
LTC2942-1
1A Battery Gas Gauge with Internal Sense Resistor
and Temperature/Voltage Measurement
14-Bit ∆∑–ADC; Pin Compatible with LTC2941-1
LTC2943
Multicell Battery Gas Gauge with Temperature,
Voltage, and Current Measurement
3.6V to 20V Operation; High Side RSENSE; ±50mV Sense Voltage Range; 14-Bit
∆∑–ADC; 1% Voltage, Current, and Charge Accuracy
LTC3129/
LTC3129-1
Micropower 200mA Synchronous Buck-Boost
DC/DC Converter
VIN: 2.42V to 15V, VOUT: 1.4V to 15V, IQ = 1.3µA, ISD = 10nA,
MSOP-16E, 3mm × 3mm QFN-16 Packages
LTC3130
25V, 600mA Buck-Boost DC/DC Converter with
1.6μA Quiescent Current
VIN: 2.4V to 25V, VOUT: 1V to 25V, IQ = 1.2μA, ISD = 500nA,
20-Lead 3mm × 4mm QFN and 16-Lead MSOP Packages
LTC3330
Nanopower Buck-Boost DC/DC with Energy
Harvesting Battery Life Extender
VIN: 2.7V to 20V, BAT: 1.8V to 5.5V, 750nA IQ
5mm × 5mm QFN-32 Package
LTC3331
Nanopower Buck-Boost DC/DC with Energy
Harvesting Battery Charger
VIN: 2.7V to 20V, BAT Float: 3.45V/4V/4.1V/4.2V, 950nA IQ
5mm × 5mm QFN-32 Package
LTC3335
Nanopower Buck-Boost DC/DC with Integrated
Coulomb Counter
VIN: 1.8V to 5.5V; 680nA IQ, 3mm × 4mm QFN-20 Package
LTC3388-1/
LTC3388-3
20V, 50mA High Efficiency Nanopower
Step-Down Regulator
VIN: 2.7V to 20V, VOUT: Fixed 1.1V to 5.5V, IQ = 720nA, ISD = 400nA,
MSOP-10, 3mm × 3mm DFN-10 Packages
LTC3588-1/
LTC3588-2
Nanopower Energy Harvesting Power Supply with
Up to 100mA of Output Current
VIN: 2.7V to 20V, VOUT: Fixed 1.8V to 5V, IQ = 950nA, ISD = 450nA,
MSOP-10, 3mm × 3mm DFN-10 Packages
LTC4150
Coulomb Counter/Battery Gas Gauge
2.7V to 8.5V Operation; High Side RSENSE; ±50mV Sense Voltage Range
Rev. 0
24
05/21
www.analog.com
For more information www.analog.com
ANALOG DEVICES, INC. 2021
工商网监
湘ICP备2023018690号
