LTC3405AES6-1.8#TRMPBF 数据手册
LTC3405A-1.5/LTC3405A-1.8
1.5V, 1.8V, 1.5MHz, 300mA
Synchronous Step-Down
Regulators in ThinSOT
U
FEATURES
DESCRIPTIO
■
The LTC ®3405A-1.5/LTC3405A-1.8 are high efficiency
monolithic synchronous buck regulators using a constant
frequency, current mode architecture. Supply current
during operation is only 20µA and drops to 1.5V). In this mode, the
efficiency is lower at light loads, but becomes comparable
to Burst Mode operation when the output load exceeds
25mA. The advantage of pulse skipping mode is lower
output ripple and less interference to audio circuitry.
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LTC3405A-1.5/LTC3405A-1.8
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OPERATIO (Refer to Functional Diagram)
600
VOUT = 1.5V
MAXIMUM OUTPUT CURRENT (mA)
When the converter is in Burst Mode operation, the peak
current of the inductor is set to approximately 100mA regardless of the output load. Each burst event can last from
a few cycles at light loads to almost continuously cycling
with short sleep intervals at moderate loads. In between
these burst events, the power MOSFETs and any unneeded
circuitry are turned off, reducing the quiescent current to
20µA. In this sleep state, the load current is being supplied
solely from the output capacitor. As the output voltage
droops, the EA amplifier’s output rises above the sleep
threshold signaling the BURST comparator to trip and turn
the top MOSFET on. This process repeats at a rate that is
dependent on the load demand.
500
VOUT = 1.8V
400
300
200
100
0
2.5
3.0
3.5
4.0
4.5
SUPPLY VOLTAGE (V)
5.0
5.5
3405A1518 F02
Figure 2. Maximum Output Current vs Input Voltage
Short-Circuit Protection
When the output is shorted to ground, the frequency of the
oscillator is reduced to about 210kHz, 1/7 the nominal
frequency. This frequency foldback ensures that the inductor current has more time to decay, thereby preventing
runaway. The oscillator’s frequency will progressively
increase to 1.5MHz when VOUT rises above 0V.
Low Supply Operation
The LTC3405A series parts will operate with input supply
voltages as low as 2.5V, but the maximum allowable
output current is reduced at this low voltage. Figure 2
shows the reduction in the maximum output current as a
function of input voltage for both fixed output voltages.
Slope Compensation and Inductor Peak Current
Slope compensation provides stability in constant frequency architectures by preventing subharmonic oscillations at high duty cycles. It is accomplished internally by
adding a compensating ramp to the inductor current
signal at duty cycles in excess of 40%. Normally, this
results in a reduction of maximum inductor peak current
for duty cycles > 40%. However, the LTC3405A series
parts use a patent-pending scheme that counteracts this
compensating ramp, which allows the maximum inductor
peak current to remain unaffected throughout all duty
cycles.
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APPLICATIO S I FOR ATIO
The basic LTC3405A series parts application circuit is
shown in Figure 1. External component selection is driven
by the load requirement and begins with the selection of L
followed by CIN and COUT.
Inductor Selection
For most applications, the inductor value will fall in the
range of 2.2µH to 10µH. Its value is determined by the
desired ripple current. Large value inductors lower ripple
current and small value inductors result in higher ripple
currents. Higher VIN or VOUT also increases the ripple
current as shown in equation 1. A reasonable starting point
for setting ripple current is ∆IL = 120mA (40% of 300mA).
⎛ V ⎞
1
∆IL =
VOUT ⎜ 1 − OUT ⎟
( f)(L) ⎝ VIN ⎠
(1)
The DC current rating of the inductor should be at least
equal to the maximum load current plus half the ripple
current to prevent core saturation. Thus, a 360mA rated
inductor should be enough for most applications (300mA
+ 60mA). For better efficiency, choose a low DC-resistance
inductor.
The inductor value also has an effect on Burst Mode
operation. The transition to low current operation begins
when the inductor current peaks fall to approximately
100mA. Lower inductor values (higher ∆IL) will cause this
to occur at lower load currents, which can cause a dip in
efficiency in the upper range of low current operation. In
Burst Mode operation, lower inductance values will cause
the burst frequency to increase.
Inductor Core Selection
Different core materials and shapes will change the size/
current and price/current relationship of an inductor. Toroid or shielded pot cores in ferrite or permalloy materials
are small and don’t radiate much energy, but generally cost
more than powdered iron core inductors with similar
electrical characteristics. The choice of which style inductor to use often depends more on the price vs size requirements and any radiated field/EMI requirements than on
what the LTC3405A series parts require to operate. Table
1 shows some typical surface mount inductors that work
well in LTC3405A series parts applications.
Table 1. Representative Surface Mount Inductors
MANUFACTURER PART NUMBER
Taiyo Yuden
MAX DC
VALUE CURRENT DCR HEIGHT
LB2016T2R2M
LB2012T2R2M
LB2016T3R3M
2.2µH
2.2µH
3.3µH
315mA
240mA
280mA
0.13Ω 1.6mm
0.23Ω 1.25mm
0.2Ω 1.6mm
Panasonic
ELT5KT4R7M
4.7µH
950mA
0.2Ω 1.2mm
Murata
LQH32CN2R2M33 4.7µH
450mA
0.2Ω
Taiyo Yuden
LB2016T4R7M
4.7µH
210mA
0.25Ω 1.6mm
Panasonic
ELT5KT6R8M
6.8µH
760mA
0.3Ω 1.2mm
Panasonic
ELT5KT100M
10µH
680mA
0.36Ω 1.2mm
Sumida
CMD4D116R8MC 6.8µH
620mA
0.23Ω 1.2mm
2mm
CIN and COUT Selection
In continuous mode, the source current of the top MOSFET
is a square wave of duty cycle VOUT/VIN. To prevent large
voltage transients, a low ESR input capacitor sized for the
maximum RMS current must be used. The maximum
RMS capacitor current is given by:
1/ 2
VOUT ( VIN − VOUT )]
[
CIN required IRMS ≅ IOMAX
VIN
This formula has a maximum at VIN = 2VOUT, where
IRMS = IOUT/2. This simple worst-case condition is commonly used for design because even significant deviations
do not offer much relief. Note that the capacitor
manufacturer’s ripple current ratings are often based on
2000 hours of life. This makes it advisable to further derate
the capacitor, or choose a capacitor rated at a higher
temperature than required. Always consult the manufacturer if there is any question.
The selection of COUT is driven by the required effective
series resistance (ESR). Typically, once the ESR requirement for COUT has been met, the RMS current rating
generally far exceeds the IRIPPLE(P-P) requirement. The
output ripple ∆VOUT is determined by:
⎛
1 ⎞
∆VOUT ≅ ∆IL ⎜ ESR +
⎟
⎝
8 fCOUT ⎠
where f = operating frequency, COUT = output capacitance
and ∆IL = ripple current in the inductor. For a fixed output
voltage, the output ripple is highest at maximum input
voltage since ∆IL increases with input voltage.
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APPLICATIO S I FOR ATIO
Using Ceramic Input and Output Capacitors
Higher values, lower cost ceramic capacitors are now
becoming available in smaller case sizes. Their high ripple
current, high voltage rating and low ESR make them ideal
for switching regulator applications. Because the LTC3405A
series’ control loop does not depend on the output
capacitor’s ESR for stable operation, ceramic capacitors
can be used freely to achieve very low output ripple and
small circuit size.
Care must be taken when ceramic capacitors are used at
the input and the output. When a ceramic capacitor is used
at the input and the power is supplied by a wall adapter
through long wires, a load step at the output can induce
ringing at the input, VIN. At best, this ringing can couple to
the output and be mistaken as loop instability. At worst, a
sudden inrush of current through the long wires can
potentially cause a voltage spike at VIN, large enough to
damage the part.
When choosing the input and output ceramic capacitors,
choose the X5R or X7R dielectric formulations. These
dielectrics have the best temperature and voltage characteristics of all the ceramics for a given value and size.
Efficiency Considerations
The efficiency of a switching regulator is equal to the
output power divided by the input power times 100%. It is
often useful to analyze individual losses to determine what
is limiting the efficiency and which change would produce
the most improvement. Efficiency can be expressed as:
Efficiency = 100% – (L1 + L2 + L3 + ...)
where L1, L2, etc. are the individual losses as a percentage
of input power.
Although all dissipative elements in the circuit produce
losses, two main sources usually account for most of the
losses in LTC3405A series parts circuits: VIN quiescent
current and I2R losses. The VIN quiescent current loss
dominates the efficiency loss at very low load currents
whereas the I2R loss dominates the efficiency loss at
medium to high load currents. In a typical efficiency plot,
the efficiency curve at very low load currents can be
misleading since the actual power lost is of no consequence as illustrated in Figure 3.
1
VIN = 3.6V
0.1
POWER LOST (W)
Aluminum electrolytic and dry tantalum capacitors are
both available in surface mount configurations. In the case
of tantalum, it is critical that the capacitors are surge tested
for use in switching power supplies. An excellent choice is
the AVX TPS series of surface mount tantalum. These are
specially constructed and tested for low ESR so they give
the lowest ESR for a given volume. Other capacitor types
include Sanyo POSCAP, Kemet T510 and T495 series, and
Sprague 593D and 595D series. Consult the manufacturer
for other specific recommendations.
0.01
0.001
0.0001
0.1
VOUT = 1.8V
VOUT = 1.5V
1
100
10
LOAD CURRENT (mA)
1000
3405A1518 F03
Figure 3. Power Lost vs Load Current
1. The VIN quiescent current is due to two components:
the DC bias current as given in the electrical characteristics and the internal main switch and synchronous
switch gate charge currents. The gate charge current
results from switching the gate capacitance of the
internal power MOSFET switches. Each time the gate is
switched from high to low to high again, a packet of
charge, dQ, moves from VIN to ground. The resulting
dQ/dt is the current out of VIN that is typically larger than
the DC bias current. In continuous mode, IGATECHG =
f(QT + QB) where QT and QB are the gate charges of the
internal top and bottom switches. Both the DC bias and
gate charge losses are proportional to VIN and thus
their effects will be more pronounced at higher supply
voltages.
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APPLICATIO S I FOR ATIO
2. I2R losses are calculated from the resistances of the
internal switches, RSW, and external inductor RL. In
continuous mode, the average output current flowing
through inductor L is “chopped” between the main
switch and the synchronous switch. Thus, the series
resistance looking into the SW pin is a function of both
top and bottom MOSFET RDS(ON) and the duty cycle
(DC) as follows:
RSW = (RDS(ON)TOP)(DC) + (RDS(ON)BOT)(1 – DC)
The RDS(ON) for both the top and bottom MOSFETs can
be obtained from the Typical Performance Charateristics
curves. Thus, to obtain I2R losses, simply add RSW to
RL and multiply the result by the square of the average
output current.
Other losses including CIN and COUT ESR dissipative
losses and inductor core losses generally account for less
than 2% total additional loss.
Thermal Considerations
In most applications, the LTC3405A series parts do not
dissipate much heat due to their high efficiency. But, in
applications where they run at high ambient temperature
with low supply voltage, the heat dissipated may exceed
the maximum junction temperature of the part. If the
junction temperature reaches approximately 150°C, both
power switches will be turned off and the SW node will
become high impedance.
To keep the LTC3405A series parts from exceeding the
maximum junction temperature, the user will need to do
some thermal analysis. The goal of the thermal analysis is
to determine whether the power dissipated exceeds the
maximum junction temperature of the part. The temperature rise is given by:
TR = (PD)(θJA)
where PD is the power dissipated by the regulator and θJA
is the thermal resistance from the junction of the die to the
ambient temperature.
The junction temperature, TJ, is given by:
TJ = TA + TR
where TA is the ambient temperature.
As an example, consider the LTC3405A-1.8 with an input
voltage of 2.7V, a load current of 300mA and an ambient
temperature of 70°C. From the typical performance graph
of switch resistance, the RDS(ON) of the P-channel switch
at 70°C is approximately 0.94Ω and the RDS(ON) of the
N-channel synchronous switch is approximately 0.75Ω.
The series resistance looking into the SW pin is:
RSW = 0.95Ω (0.67) + 0.75Ω (0.33) = 0.88Ω
Therefore, power dissipated by the part is:
PD = ILOAD2 • RSW = 79.2mW
For the SOT-23 package, the θJA is 250°C/ W. Thus, the
junction temperature of the regulator is:
TJ = 70°C + (0.0792)(250) = 89.8°C
which is well below the maximum junction temperature of
125°C.
Note that at higher supply voltages, the junction temperature is lower due to reduced switch resistance (RDS(ON)).
Checking Transient Response
The regulator loop response can be checked by looking at
the load transient response. Switching regulators take
several cycles to respond to a step in load current. When
a load step occurs, VOUT immediately shifts by an amount
equal to (∆ILOAD • ESR), where ESR is the effective series
resistance of COUT. ∆ILOAD also begins to charge or
discharge COUT, which generates a feedback error signal.
The regulator loop then acts to return VOUT to its steadystate value. During this recovery time VOUT can be monitored for overshoot or ringing that would indicate a stability
problem. For a detailed explanation of switching control
loop theory, see Application Note 76.
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APPLICATIO S I FOR ATIO
PC Board Layout Checklist
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of the
LTC3405A series parts. These items are also illustrated
graphically in Figures 4 and 5. Check the following in your
layout:
1. The power traces, consisting of the GND trace, the SW
trace and the VIN trace should be kept short, direct and
wide.
2. Does the (+) plate of CIN connect to VIN as closely as
possible? This capacitor provides the AC current to the
internal power MOSFETs.
3. Keep the (–) plates of CIN and COUT as close as possible.
Design Example
As a design example, assume the LTC3405A-1.8 is used
in a single lithium-ion battery-powered cellular phone
application. The VIN will be operating from a maximum of
4.2V down to about 2.7V. The load current requirement
is a maximum of 0.25A but most of the time it will be in
1
RUN
MODE
standby mode, requiring only 2mA. Efficiency at both low
and high load currents is important. Output voltage is
1.8V. With this information we can calculate L using
equation (1),
L=
⎛ V ⎞
1
VOUT ⎜ 1 − OUT ⎟
( f)(∆IL ) ⎝ VIN ⎠
(3)
Substituting VOUT = 1.8V, VIN = 4.2V, ∆IL = 100mA and
f = 1.5MHz in equation (3) gives:
L=
1.8 V
⎛ 1.8 V ⎞
⎜1 −
⎟ ≅ 6.8µH
1.5MHz(100mA) ⎝ 4.2V ⎠
For best efficiency choose a 300mA or greater inductor
with less than 0.3Ω series resistance.
CIN will require an RMS current rating of at least 0.125A ≅
ILOAD(MAX)/2 at temperature and COUT will require an ESR
of less than 0.5Ω. In most cases, a tantalum capacitor will
satisfy this requirement.
Figure 6 shows the complete circuit along with its efficiency curve.
VIA TO VIN
6
VIN
VOUT
LTC3405A-1.8
2
–
GND
VOUT
PIN 1
5
COUT
VOUT
+
3
L1
SW
VIN
LTC3405A-1.8
4
L1
CIN
SW
VIN
3405A1518 F04
BOLD LINES INDICATE HIGH CURRENT PATHS
COUT
CIN
GND
3405A1518 F05
Figure 4. LTC3405A-1.8 Layout Diagram
Figure 5. LTC3405A-1.8 Suggested Layout
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APPLICATIO S I FOR ATIO
VIN
2.7V
TO 4.2V
4
CIN**
4.7µF
CER
VIN
3
SW
6.8µH*
VOUT
1.8V
LTC3405A-1.8
1
6
COUT**
4.7µF
CER
RUN
MODE
5
VOUT
GND
2
*SUMIDA CMD4D11-6R8MC
** TAIYO YUDEN JMK212BJ475MG
3405A1518 F06a
Figure 6a.
100
VIN = 2.7V
90
VIN = 4.2V
EFFICIENCY (%)
60
VIN = 3.6V
70
60
50
40
30
0.1
1
10
100
OUTPUT CURRENT (mA)
1000
3405A1518 F06b
Figure 6b.
VOUT
100mV/DIV
AC COUPLED
IL
200mA/DIV
IL
200mA/DIV
VIN = 3.6V
20µs/DIV
VOUT = 1.8V
ILOAD = 100mA TO 300mA
3405A1518 F06c
Figure 6c.
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LTC3405A-1.5/LTC3405A-1.8
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TYPICAL APPLICATIO S
Single Li-Ion to 1.5V/300mA Regulator
for High Efficiency and Small Footprint
VIN
2.7V
TO 4.2V
4
CIN**
4.7µF
CER
VIN
3
SW
4.7µH*
VOUT
1.5V
LTC3405A-1.5
1
6
COUT1**
4.7µF
CER
RUN
MODE
5
VOUT
GND
3405A1518 TA02a
2
*MURATA LQH32CN4R7M33
**TAIYO YUDEN CERAMIC JMK212BJ475MG
100
VIN = 2.7V
90
VIN = 4.2V
VIN = 3.6V
EFFICIENCY (%)
60
70
60
50
40
30
0.1
1
10
100
OUTPUT CURRENT (mA)
1000
3405A1518 TA02b
VOUT
100mV/DIV
AC COUPLED
IL
200mA/DIV
IL
200mA/DIV
VIN = 3.6V
20µs/DIV
VOUT = 1.5V
ILOAD = 100mA TO 300mA
3405A1518 TA02c
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LTC3405A-1.5/LTC3405A-1.8
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TYPICAL APPLICATIO S
Single Li-Ion to 1.5V/150mA Regulator
Using All Ceramic Capacitors Optimized for Smallest Footprint
VIN
2.7V
TO 4.2V
4
CIN**
2.2µF
CER
VIN
SW
3
2.2µH*
LTC3405A-1.5
1
6
COUT1**
2.2µF
CER
RUN
MODE
VOUT
GND
VOUT
1.5V
5
3405A1518 TA03a
2
*TAIYO YUDEN LB2012T2R2M
**TAIYO YUDEN CERAMIC LMK212BJ225MG
90
VOUT = 1.5V
VIN = 2.7V
EFFICIENCY (%)
80
VIN = 3.6V
70
VIN = 4.2V
60
50
40
30
0.1
1
100
10
OUTPUT CURRENT (mA)
1000
3405A1518 TA03b
VOUT
100mV/DIV
AC COUPLED
IL
200mA/DIV
IL
100mA/DIV
VIN = 3.6V
20µs/DIV
VOUT = 1.5V
ILOAD = 50mA TO 150mA
3405A1518 TA03c
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LTC3405A-1.5/LTC3405A-1.8
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PACKAGE DESCRIPTIO
S6 Package
6-Lead Plastic TSOT-23
(Reference LTC DWG # 05-08-1636)
0.62
MAX
2.90 BSC
(NOTE 4)
0.95
REF
1.22 REF
3.85 MAX 2.62 REF
1.4 MIN
2.80 BSC
1.50 – 1.75
(NOTE 4)
PIN ONE ID
RECOMMENDED SOLDER PAD LAYOUT
PER IPC CALCULATOR
0.30 – 0.45
6 PLCS (NOTE 3)
0.95 BSC
0.80 – 0.90
0.20 BSC
0.01 – 0.10
1.00 MAX
DATUM ‘A’
0.30 – 0.50 REF
0.09 – 0.20
(NOTE 3)
1.90 BSC
S6 TSOT-23 0302
NOTE:
1. DIMENSIONS ARE IN MILLIMETERS
2. DRAWING NOT TO SCALE
3. DIMENSIONS ARE INCLUSIVE OF PLATING
4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR
5. MOLD FLASH SHALL NOT EXCEED 0.254mm
6. JEDEC PACKAGE REFERENCE IS MO-193
3405a1518fa
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
15
LTC3405A-1.5/LTC3405A-1.8
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DESCRIPTION
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