LTC3526LBEDC-2#TRPBF 数据手册
LTC3526L-2/LTC3526LB-2
550mA 2MHz Synchronous
Step-Up DC/DC Converters
in 2mm × 2mm DFN
Features
Description
Delivers 3.3V at 100mA from a Single Alkaline/
NiMH Cell or 3.3V at 200mA from Two Cells
n V Start-Up Voltage: 680mV
IN
n 1.5V to 5.25V V
OUT Range
n Up to 94% Efficiency
n Output Disconnect
n 2MHz Fixed Frequency Operation
n V > V
IN
OUT Operation
n Integrated Soft-Start
n Current Mode Control with Internal Compensation
n Burst Mode® Operation with 9µA I (LTC3526L-2)
Q
n Low Noise PWM Operation (LTC3526LB-2)
n Internal Synchronous Rectifier
n Logic Controlled Shutdown (I < 1µA)
Q
n Anti-Ring Control
n Low Profile (2mm × 2mm × 0.75mm) 6-Lead
DFN Package
The LTC®3526L-2/LTC3526LB-2 are synchronous, fixed
frequency step-up DC/DC converters with output disconnect. Synchronous rectification enables high efficiency in
the low profile 2mm × 2mm DFN package. Battery life in
single AA/AAA powered products is extended further with
a 680mV start-up voltage and operation down to 500mV
once started.
n
A switching frequency of 2MHz minimizes solution footprint by allowing the use of tiny, low profile inductors
and ceramic capacitors. The current mode PWM design
is internally compensated, reducing external parts count.
The LTC3526L-2 features Burst Mode operation at light
load conditions allowing it to maintain high efficiency over
a wide range of load. The LTC3526LB-2 features fixed
frequency operation for low noise applications. Anti-ring
circuitry reduces EMI by damping the inductor in discontinuous mode. Additional features include a low shutdown
current of under 1µA and thermal shutdown.
Applications
n
n
n
n
The LTC3526L-2/LTC3526LB-2 are housed in a 2mm ×
2mm × 0.75mm DFN package.
Medical Instruments
Noise Canceling Headphones
Wireless Mice
Bluetooth Headsets
L, LT, LTC, LTM, Linear Technology, the Linear logo and Burst Mode are registered trademarks
and ThinSOT is a trademark of Linear Technology Corporation. All other trademarks are the
property of their respective owners. Patents pending.
Typical Application
Efficiency and Power Loss vs Load Current
100
2.2µH
90
EFFICIENCY
VIN
4.7µF
OFF ON
VOUT
LTC3526L-2
SHDN
GND
1.78M
33pF
4.7µF
FB
1M
3526lb2 TA01a
100
70
60
10
50
POWER LOSS
40
1
30
20
POWER LOSS (mW)
VIN
1.6V TO 3.2V
VOUT
3.3V
200mA
EFFICIENCY (%)
80
SW
1000
VIN = 2.4V
0.1
10
0
0.01
0.1
1
10
LOAD CURRENT (mA)
100
0.01
1000
3526lb2 TA01b
3526lb2fa
LTC3526L-2/LTC3526LB-2
Absolute Maximum Ratings
(Note 1)
Pin Configuration
VIN Voltage.................................................... –0.3V to 6V
SW Voltage
DC............................................................. –0.3V to 6V
Pulsed 1.230V (LTC3526L-2 Only)
N-Channel MOSFET Switch Leakage Current
VSW = 5V
0.1
5
µA
10
µA
P-Channel MOSFET Switch Leakage Current
VSW = 5V, VOUT = 0V
0.1
N-Channel MOSFET Switch On Resistance
VOUT = 3.3V
0.4
Ω
P-Channel MOSFET Switch On Resistance
VOUT = 3.3V
0.6
Ω
750
mA
60
ns
87
90
%
1.8
2
N-Channel MOSFET Current Limit
l
Current Limit Delay to Output
(Note 3)
Maximum Duty Cycle
VFB = 1.15V, VOUT = 5V
l
Minimum Duty Cycle
VFB = 1.3V
l
Switching Frequency
SHDN Pin Input High Voltage
SHDN Pin Input Low Voltage
l
550
0
2.4
0.8
%
MHz
V
0.3
V
3526lb2fa
LTC3526L-2/LTC3526LB-2
Electrical Characteristics
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTC3526LE-2/LTC3526LBE-2 are guaranteed to meet
performance specifications from 0°C to 85°C. Specifications over –40°C to
85°C operating temperature range are assured by design, characterization
and correlation with statistical process controls.
Note 3: Specification is guaranteed by design and not 100% tested in
production.
Note 4: Current measurements are made when the output is not switching.
Note 5: This IC includes overtemperature protection that is intended
to protect the device during momentary overload conditions. Junction
temperature will exceed 125°C when overtemperature protection is active.
Continuous operation above the specified maximum operating junction
temperature may result in device degradation or failure.
Note 6: Failure to solder the exposed backside of the package to the PC
board ground plane will result in a thermal resistance much higher than
102°C/W.
Typical Performance Characteristics
Efficiency vs Load Current and VIN
for VOUT = 1.8V (LTC3526L-2)
100
1000
100
100
80
100
1000
50
10
1
40
30
20
PLOSS AT VIN = 0.9V
PLOSS AT VIN = 1.2V
PLOSS AT VIN = 1.5V
10
0
0.01
0.1
1
10
100
LOAD CURRENT (mA)
60
10
50
VIN = 1.2V
VIN = 1.8V
1
VIN = 2.4V
VIN = 3.0V
40
30
10
0.01
1000
0
0.01
0.1
3526lb2 G01
Efficiency vs Load Current and VIN
for VOUT = 5V (LTC3526L-2)
100
1000
400
100
50
10
40
30
1
20
300
IOUT (mA)
60
POWER LOSS (mW)
70
VOUT = 2.5V
VOUT = 1.8V
50
40
30
0.1
20
10
0.5
0.01
1000
1.0
1.5
2.0
2.5
3.0
3.5
VIN (V)
3526lb2 G02
4.5
4.0
3526lb2 G03
Minimum Load Resistance
During Start-Up vs VIN
10000
VOUT = 3.3V
350
80
1
10
100
LOAD CURRENT (mA)
VOUT = 3.3V
60
Maximum Output Current vs VIN
90
VOUT = 3.3V
VOUT = 2.5V
VOUT = 1.8V
1000
250
200
VOUT = 5V
150
100
100
50
10
0
0.01
PLOSS AT VIN = 1.2V
PLOSS AT VIN = 1.8V
PLOSS AT VIN = 2.4V
PLOSS AT VIN = 3.0V
20
0.1
80
70
IIN (µA)
60
70
LOAD (Ω)
VIN = 0.9V
VIN = 1.2V
VIN = 1.5V
VOUT = 5V
90
100
POWER LOSS (mW)
70
EFFICIENCY (%)
90
POWER LOSS (mW)
EFFICIENCY (%)
No-Load Input Current vs VIN
(LTC3526L-2)
Efficiency vs Load Current and VIN
for VOUT = 3.3V (LTC3526L-2)
90
80
EFFICIENCY (%)
TA = 25°C, unless otherwise noted.
0.1
1
10
100
LOAD CURRENT (mA)
PLOSS AT VIN = 1.2V
PLOSS AT VIN = 2.4V
PLOSS AT VIN = 3.6V
PLOSS AT VIN = 4.2V
0.1
1000
0
0.5
L = 2.2µH
1.0
1.5
2.0
2.5
VIN (V)
VIN = 1.2V
VIN = 2.4V
VIN = 3.6V
VIN = 4.2V
3.0
3.5
4.0
4.5
3526lb2 G05
10
0.65
0.75
0.85
0.95
VIN (V)
1.05
1.15
3526lb2 G06
3526lb2 G04
3526lb2fa
LTC3526L-2/LTC3526LB-2
Typical Performance Characteristics
Burst Mode Threshold Current
vs VIN (LTC3526L-2)
Start-Up Delay Time vs VIN
35
VOUT = 1.8V
COUT = 10µF
30 L = 2.2µH
90
LOAD CURRENT (mA)
80
60
50
40
30
20
25
ENTER BURST
20
15
10
1.0
1.5
2.0
2.5 3.0
VIN (V)
3.5
4.0
0
4.5
Burst Mode Threshold Current
vs VIN (LTC3526L-2)
70
60
LOAD CURRENT (mA)
LOAD CURRENT (mA)
VOUT = 3.3V
COUT = 10µF
50 L = 2.2µH
40
LEAVE BURST
30
20
ENTER BURST
10
1.0
1.1
1.2
1.3
VIN (V)
1.4
1.5
1.0
ENTER BURST
20
10
8
FREQUECNY CHANGE (%)
0.75
0.70
PMOS
0.55
0.50
NMOS
1.6
VIN (V)
1.8
2.0
2.2
3526lb2 G08b
NORMALIZED TO VOUT = 3.3V
1
0
–1
–2
–3
1.5
2.0
2.5 3.0
VIN (V)
3.5
4.0
–4
1.5
4.5
2.0
3526lb2 G08d
2.5
3.0 3.5
VOUT (V)
4.0
4.5
5.0
3526lb2 G09
RDS(ON) Change vs Temperature
1.3
NORMALIZED TO 25°C
NORMALIZED TO 25°C
1.2
6
NORMALIZED RDS(ON)
0.80
1.4
2
Oscillator Frequency Change
vs Temperature
0.85
1.2
3
30
0.90
4
2
0
–2
–4
–6
1.1
1.0
0.9
0.8
–8
0.35
0.30
10
4
LEAVE BURST
40
RDS(ON) vs VOUT
0.40
15
Oscillator Frequency Change
vs VOUT
50
3526lb2 G08c
0.45
ENTER BURST
20
3526lb2 G08a
VOUT = 5V
COUT = 10µF
L = 2.2µH
0
1.0
1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 2.8 3.0
VIN (V)
0.60
25
0
1.6
10
0.65
30
Burst Mode Threshold Current
vs VIN (LTC3526L-2)
60
LEAVE BURST
5
3526lb2 G07
RDS(ON) (Ω)
VOUT = 2.5V
35 COUT = 10µF
L = 2.2µH
5
10
0
40
LEAVE BURST
FREQUENCY CHANGE (%)
DELAY (µs)
70
Burst Mode Threshold Current
vs VIN (LTC3526L-2)
LOAD CURRENT (mA)
100
0
TA = 25°C, unless otherwise noted.
1.5
2.0
2.5
3.0 3.5
VOUT (V)
4.0
4.5
5.0
3526lb2 G10
–10
–50
–30
–10 10
30
50
TEMPERATURE (°C)
70
90
3526lb2 G11
0.7
–50
–30
–10 10
30
50
TEMPERATURE (°C)
70
90
3526lb2 G12
3526lb2fa
LTC3526L-2/LTC3526LB-2
Typical Performance Characteristics
VFB vs Temperature
Start-Up Voltage vs Temperature
0.80
10.0
0.25
0.75
9.5
0
0.70
1mA LOAD
–0.25
0.65
NO LOAD
8.5
–0.50
0.60
8.0
–0.75
0.55
7.5
–1.00
20 40 60
–60 –40 –20 0
TEMPERATURE (°C)
80
0.50
–50
100
25
0
25
50
TEMPERATURE (°C)
75
3526lb2 G13
Load Regulation
0.5
VOUT = 1.8V
0.4
VOUT = 3.3V
0.4
0.3
0.2
0.2
0
–0.1
–0.2
–0.3
VIN = 0.9V
VIN = 1.2V
VIN = 1.5V
–0.4
–0.5
0.01
0.1
1
10
LOAD (mA)
100
1000
CHANGE IN VOUT (%)
0.3
0.2
0.1
0.1
0
–0.1
–0.2
–0.3
VIN = 1.2V
VIN = 1.8V
VIN = 2.4V
–0.4
–0.5
0.01
3526lb2 G23
Fixed Frequency Switching
Waveform and VOUT Ripple
0.1
1
10
LOAD (mA)
100
1000
3526lb2 G16
4.0
5.0
4.5
3526lb2 G15
VOUT = 5V
0
–0.1
–0.2
VIN = 1.2V
VIN = 2.4V
VIN = 3.6V
VIN = 4.2V
–0.3
–0.4
–0.5
0.01
0.1
1
10
LOAD (mA)
100
1000
3526lb2 G25
VOUT and IIN During Soft-Start
VOUT
1V/DIV
INPUT
CURRENT
0.2A/DIV
SHDN PIN
1V/DIV
VOUT
20mV/DIV
AC-COUPLED
VIN = 1.2V
200ns/DIV
VOUT = 3.3V AT 100mA
COUT = 4.7µF
3.0 3.5
VOUT (V)
3526lb2 G24
SW PIN
2V/DIV
VOUT
20mV/DIV
AC-COUPLED
2.5
0.1
Burst Mode Waveforms
(LTC3526L-2)
SW PIN
2V/DIV
2.0
Load Regulation
0.5
0.3
CHANGE IN VOUT (%)
CHANGE IN VOUT (%)
0.4
7.0
1.5
100
3526lb2 G14
Load Regulation
0.5
Burst Mode Quiesent Current
vs VOUT (LTC3526L-2)
9.0
IQ (µA)
NORMALIZED TO 25°C
VIN (V)
0.50
CHANGE IN VFB (%)
TA = 25°C, unless otherwise noted.
VIN = 1.2V
20µs/DIV
VOUT = 3.3V AT 5mA
COUT = 10µF
3526lb2 G17
VOUT = 3.3V
COUT = 4.7µF
200µs/DIV
3526lb2 G18
3526lb2fa
LTC3526L-2/LTC3526LB-2
Typical Performance Characteristics
TA = 25°C, unless otherwise noted.
Load Step Response (from Burst
Mode Operation) (LTC3526L-2)
Load Step Response
(Fixed Frequency)
VOUT
100mV/DIV
AC-COUPLED
VOUT
100mV/DIV
AC-COUPLED
LOAD
CURRENT
50mA/DIV
LOAD
CURRENT
50mA/DIV
VIN = 3.6V
100µs/DIV
VOUT = 5V
20mA TO 170mA STEP
COUT = 10µF
3526lb2 G19
VIN = 3.6V
100µs/DIV
VOUT = 5V
50mA TO 150mA STEP
COUT = 4.7µF
Load Step Response
(Fixed Frequency)
3526lb2 G20
Load Step Response (from Burst
Mode Operation) (LTC3526L-2)
VOUT
100mV/DIV
AC-COUPLED
VOUT
100mV/DIV
AC-COUPLED
LOAD
CURRENT
50mA/DIV
LOAD
CURRENT
50mA/DIV
VIN = 1.2V
100µs/DIV
VOUT = 3.3V
50mA TO 100mA STEP
COUT = 4.7µF
3526lb2 G21
VIN = 1.2V
50µs/DIV
VOUT = 3.3V
5mA TO 100mA STEP
COUT = 10µF
3526lb2 G22
Pin Functions
SW (Pin 1): Switch Pin. Connect inductor between SW and
VIN. Keep PCB trace lengths as short and wide as possible
to reduce EMI. If the inductor current falls to zero or SHDN
is low, an internal anti-ringing switch is connected from
SW to VIN to minimize EMI.
GND (Pin 2, Exposed Pad Pin 7): Signal and Power Ground.
Provide a short direct PCB path between GND and the
(–) side of the input and output capacitors. The Exposed
Pad must be soldered to the PCB ground plane. It serves
as an additional ground connection and as a means of
conducting heat away from the package.
VIN (Pin 3): Input Supply Pin. Connect a minimum of 1µF
ceramic decoupling capacitor from this pin to ground
using short direct PCB traces.
SHDN (Pin 4): Logic Controlled Shutdown Input. There
is an internal 4MΩ pull-down on this pin.
• SHDN = High: Normal operation
• SHDN = Low: Shutdown, quiescent current < 1µA
FB (Pin 5): Feedback Input to the gm Error Amplifier. Connect resistor divider tap to this pin. The top of the divider
connects to the output capacitor, the bottom of the divider
connects to GND. Referring to the Block Diagram, the output
voltage can be adjusted from 1.5V to 5.25V by:
R2
VOUT = 1.195V • 1+
R1
VOUT (Pin 6): Output voltage sense and drain of the internal
synchronous rectifier. PCB trace from VOUT to the output
filter capacitor (4.7µF minimum) should be as short and
wide as possible.
3526lb2fa
LTC3526L-2/LTC3526LB-2
Block Diagram
VIN
0.8V
TO 5V
L1
2.2µH
CIN
2.2µF
3
1
VIN
VOUT
SW
VSEL
VBEST
WELL
SWITCH
VB
VOUT
ANTI-RING
4
SHDN
SHUTDOWN
SHUTDOWN
GATE DRIVERS
AND
ANTI-CROSS
CONDUCTION
– +
4M
3
IPK
COMP
VREF
IPK
UVLO
IZERO
IZERO
COMP
2MHz
OSC
CLK
COUT
4.7µF
R1
ERROR AMP
SLEEP COMP
START-UP
LOGIC
R2
5
SLOPE
COMP
+
–
VREF
FB
VOUT
1.5V
TO 5.25V
6
+
–
MODE
CONTROL
VREF
CLAMP
THERMAL
SHUTDOWN
Operation
TSD
WAKE
CSS
EXPOSED
PAD
GND
7
2
3526lb2 BD
(Refer to Block Diagram)
The LTC3526L-2/LTC3526LB-2 are 2MHz synchronous
boost converters housed in a 6-lead 2mm × 2mm DFN
package. With a guaranteed ability to start up and operate from inputs less than 0.8V, this device features fixed
frequency, current mode PWM control for exceptional line
and load regulation. The current mode architecture with
adaptive slope compensation provides excellent transient
load response, requiring minimal output filtering. Internal
soft-start and internal loop compensation simplifies the
design process while minimizing the number of external
components.
range of load currents. Burst Mode operation maintains
high efficiency at very light loads, reducing the quiescent
current to just 9µA. Operation can be best understood by
referring to the Block Diagram.
With its low RDS(ON) and low gate charge internal N-channel
MOSFET switch and P-channel MOSFET synchronous rectifier, the LTC3526L-2 achieves high efficiency over a wide
When either VIN or VOUT exceeds 1.3V typical, the IC
enters normal operating mode. When the output voltage
Low Voltage Start-Up
The LTC3526L-2/LTC3526LB-2 include an independent
start-up oscillator designed to start up at an input voltage
of 0.68V (typical). Soft-start and inrush current limiting
are provided during start-up, as well as normal mode.
3526lb2fa
LTC3526L-2/LTC3526LB-2
Operation
(Refer to Block Diagram)
exceeds the input by 0.24V, the IC powers itself from
VOUT instead of VIN. At this point the internal circuitry has
no dependency on the VIN input voltage, eliminating the
requirement for a large input capacitor. The input voltage
can drop as low as 0.5V. The limiting factor for the application becomes the availability of the power source to
supply sufficient energy to the output at low voltages, and
maximum duty cycle, which is clamped at 90% typical.
Note that at low input voltages, small voltage drops due
to series resistance become critical, and greatly limit the
power delivery capability of the converter.
Low Noise Fixed Frequency Operation
Soft-Start
The LTC3526L-2/LTC3526LB-2 contain internal circuitry
to provide soft-start operation. The soft-start circuitry
slowly ramps the peak inductor current from zero to its
peak value of 750mA (typical) in approximately 0.5ms,
allowing start-up into heavy loads. The soft-start circuitry
is reset in the event of a shutdown command or a thermal
shutdown.
Oscillator
An internal oscillator sets the switching frequency to
2MHz.
Shutdown
Shutdown is accomplished by pulling the SHDN pin
below 0.3V and enabled by pulling the SHDN pin above
0.8V. Although SHDN can be driven above VIN or VOUT
(up to the absolute maximum rating) without damage,
the LTC3526L-2/LTC3526LB-2 have a proprietary test
mode that may be engaged if SHDN is held in the range
of 0.5V to 1V higher than the greater of VIN or VOUT. If
the test mode is engaged, normal PWM switching action
is interrupted, which can cause undesirable operation
in some applications. Therefore, in applications where
SHDN may be driven above VIN, a resistor divider or other
means must be employed to keep the SHDN voltage below
(VIN + 0.4V) to prevent the possibility of the test mode
being engaged. Please refer to Figure 1 for two possible
implementations.
LTC3526L-2/LTC3526LB-2
4M
±30%
VCNTRL
R
LTC3526L-2/LTC3526LB-2
VIN
4M
±30%
SHDN
1M
ZETEX ZC2811E
VCNTRL
R > (VCNTRL/(VIN + 0.4) – 1)MΩ
SHDN
1M
3526lb2 F01
Figure 1. Recommended Shutdown Circuits when Driving
SHDN above VIN
Error Amplifier
The positive input of the transconductance error amplifier
is internally connected to the 1.195V reference and the
negative input is connected to FB. Clamps limit the minimum and maximum error amp output voltage for improved
large-signal transient response. Power converter control
loop compensation is provided internally. An external
resistive voltage divider from VOUT to ground programs
the output voltage via FB from 1.5V to 5.25V.
R2
VOUT = 1.195V • 1+
R1
Current Sensing
Lossless current sensing converts the peak current signal of
the N-channel MOSFET switch into a voltage that is summed
with the internal slope compensation. The summed signal
is compared to the error amplifier output to provide a peak
current control command for the PWM.
Current Limit
The current limit comparator shuts off the N-channel
MOSFET switch once its threshold is reached. The current limit comparator delay to output is typically 60ns.
Peak switch current is limited to approximately 750mA,
independent of input or output voltage, unless VOUT falls
below 0.7V, in which case the current limit is cut in half.
3526lb2fa
LTC3526L-2/LTC3526LB-2
Operation
(Refer to Block Diagram)
Zero Current Comparator
Burst Mode OPERATION
The zero current comparator monitors the inductor current to the output and shuts off the synchronous rectifier
when this current reduces to approximately 30mA. This
prevents the inductor current from reversing in polarity,
improving efficiency at light loads.
The LTC3526L-2 will enter Burst Mode operation at light
load current and return to fixed frequency PWM mode
when the load increases. Refer to the Typical Performance
Characteristics to see the output load Burst Mode threshold current vs VIN. The load current at which Burst Mode
operation is entered can be changed by adjusting the
inductor value. Raising the inductor value will lower the
load current at which Burst Mode operation is entered.
Synchronous Rectifier
To control inrush current and to prevent the inductor
current from running away when VOUT is close to VIN, the
P-channel MOSFET synchronous rectifier is only enabled
when VOUT > (VIN + 0.24V).
Anti-Ringing Control
The anti-ring circuit connects a resistor across the inductor to prevent high frequency ringing on the SW pin
during discontinuous current mode operation. Although
the ringing of the resonant circuit formed by L and CSW
(capacitance on SW pin) is low energy, it can cause EMI
radiation.
Output Disconnect
The LTC3526L-2/LTC3526LB-2 are designed to allow true
output disconnect by eliminating body diode conduction
of the internal P-channel MOSFET rectifier. This allows for
VOUT to go to zero volts during shutdown, drawing no current from the input source. It also allows for inrush current
limiting at turn-on, minimizing surge currents seen by the
input supply. Note that to obtain the advantages of output
disconnect, there must not be an external Schottky diode
connected between SW and VOUT. The output disconnect
feature also allows VOUT to be pulled high, without any
reverse current into a battery connected to VIN.
Thermal Shutdown
If the die temperature exceeds 160°C, the LTC3526L-2/
LTC3526LB-2 will go into thermal shutdown. All switches
will be off and the soft-start capacitor will be discharged.
The device will be enabled again when the die temperature
drops by about 15°C.
In Burst Mode operation, the LTC3526L-2 still switches at
a fixed frequency of 2MHz, using the same error amplifier
and loop compensation for peak current mode control.
This control method eliminates any output transient
when switching between modes. In Burst Mode operation, energy is delivered to the output until it reaches the
nominal regulation value, then the LTC3526L-2 transitions to sleep mode where the outputs are off and the
LTC3526L-2 consumes only 9µA of quiescent current from
VOUT. When the output voltage droops slightly, switching
resumes. This maximizes efficiency at very light loads by
minimizing switching and quiescent losses. Burst Mode
output voltage ripple, which is typically 1% peak-to-peak,
can be reduced by using more output capacitance (10µF
or greater), or with a small capacitor (10pF to 50pF) connected between VOUT and FB.
As the load current increases, the LTC3526L-2 will automatically leave Burst Mode operation. Note that larger
output capacitor values may cause this transition to occur at lighter loads. Once the LTC3526L-2 has left Burst
Mode operation and returned to normal operation, it will
remain there until the output load is reduced below the
burst threshold current.
Burst Mode operation is inhibited during start-up and softstart and until VOUT is at least 0.24V greater than VIN.
The LTC3526LB-2 features continuous PWM operation at
2MHz. At very light loads, the LTC3526LB-2 will exhibit
pulse-skipping operation.
3526lb2fa
LTC3526L-2/LTC3526LB-2
Applications Information
VIN > VOUT Operation
COMPONENT SELECTION
The LTC3526L-2/LTC3526LB-2 will maintain voltage regulation even when the input voltage is above the desired
output voltage. Note that the efficiency is much lower in this
mode, and the maximum output current capability will be
less. Refer to the Typical Performance Characteristics.
Inductor Selection
Short-Circuit Protection
The LTC3526L-2/LTC3526LB-2 output disconnect feature
allows output short circuit while maintaining a maximum
internally set current limit. To reduce power dissipation
under short-circuit conditions, the peak switch current
limit is reduced to 400mA (typical).
The LTC3526L-2/LTC3526LB-2 can utilize small surface
mount chip inductors due to their fast 2MHz switching
frequency. Inductor values between 1.5µH and 4.7µH are
suitable for most applications. Larger values of inductance
will allow slightly greater output current capability (and
lower the Burst Mode threshold) by reducing the inductor
ripple current. Increasing the inductance above 6.8µH will
increase component size while providing little improvement
in output current capability.
The minimum inductance value is given by:
L>
Schottky Diode
Although not recommended, adding a Schottky diode from
SW to VOUT will improve efficiency by about 2%. Note
that this defeats the output disconnect and short-circuit
protection features.
(
VIN(MIN) • VOUT(MAX ) – VIN(MIN)
2 • Ripple • VOUT(MAX )
)
where:
Ripple = Allowable inductor current ripple (amps peakpeak)
VIN(MIN) = Minimum input voltage
PCB layout guidelines
The high speed operation of the LTC3526L-2/LTC3526LB‑2
demands careful attention to board layout. A careless
layout will result in reduced performance. Figure 2 shows
the recommended component placement. A large ground
pin copper area will help to lower the die temperature. A
multilayer board with a separate ground plane is ideal, but
not absolutely necessary.
VOUT(MAX) = Maximum output voltage
The inductor current ripple is typically set for 20% to
40% of the maximum inductor current. High frequency
ferrite core inductor materials reduce frequency dependent power losses compared to cheaper powdered iron
types, improving efficiency. The inductor should have
low ESR (series resistance of the windings) to reduce the
I2R power losses, and must be able to support the peak
LTC3526L-2
SW 1
GND 2
VIN
+
VIN 3
6 VOUT
5 FB
MINIMIZE
TRACE ON FB
AND SW
4 SHDN
MULTIPLE VIAS
TO GROUND PLANE
3526lb2 F02
Figure 2. Recommended Component Placement for Single Layer Board
3526lb2fa
10
LTC3526L-2/LTC3526LB-2
Applications Information
inductor current without saturating. Molded chokes and
some chip inductors usually do not have enough core
area to support the peak inductor current of 750mA seen
on the LTC3526L-2/LTC3526LB-2. To minimize radiated
noise, use a shielded inductor. See Table 1 for suggested
components and suppliers.
Table 1. Recommended Inductors
VENDOR
PART/STYLE
Coilcraft
(847) 639-6400
www.coilcraft.com
LPO4815
LPS4012,
LPS3314
MSS4020
ME3220
Coiltronics
www.cooperet.com
SD10, SD12, SD3114, SD3118
FDK
(408) 432-8331
www.fdk.com
MIP3226D
MIPF2520D
MIPWT3226D
MIPSZ2012D
MIPS2520D
Murata
(714) 852-2001
www.murata.com
LQH3NP
LQH32P
LQM2MPN
Sumida
(847) 956-0666
www.sumida.com
CDRH2D14
CDRH2D11
CDRH3D11
Taiyo-Yuden
www.t-yuden.com
NR3010T
NR3015T
NR3012T
TDK
(847) 803-6100
www.component.tdk.com
VLP
VLF, VLCF
Toko
(408) 432-8282
www.tokoam.com
D412C
Würth
(201) 785-8800
www.we-online.com
WE-TPC type S, M, TH, XS
Output and Input Capacitor Selection
Low ESR (equivalent series resistance) capacitors should
be used to minimize the output voltage ripple. Multilayer
ceramic capacitors are an excellent choice as they have
extremely low ESR and are available in small footprints. A
4.7µF to 10µF output capacitor is sufficient for most applications. Larger values may be used to obtain extremely
low output voltage ripple and improve transient response.
X5R and X7R dielectric materials are preferred for their
ability to maintain capacitance over wide voltage and
temperature ranges. Y5V types should not be used.
The internal loop compensation of the LTC3526L-2/
LTC3526LB-2 are designed to be stable with output capacitor values of 4.7µF or greater (without the need for
any external series resistor). Although ceramic capacitors
are recommended, low ESR tantalum capacitors may be
used as well.
A small ceramic capacitor in parallel with a larger tantalum
capacitor may be used in demanding applications that have
large load transients. Another method of improving the
transient response is to add a small feed-forward capacitor
across the top resistor of the feedback divider (from VOUT
to FB). A typical value of 22pF will generally suffice.
Low ESR input capacitors reduce input switching noise
and reduce the peak current drawn from the battery. It
follows that ceramic capacitors are also a good choice
for input decoupling and should be located as close as
possible to the device. A 2.2µF input capacitor is sufficient
for most applications, although larger values may be
used without limitations. Table 2 shows a list of several
ceramic capacitor manufacturers. Consult the manufacturers directly for detailed information on their selection of
ceramic capacitors.
Table 2. Capacitor Vendor Information
SUPPLIER
PHONE
WEBSITE
AVX
(803) 448-9411
www.avxcorp.com
Murata
(714) 852-2001
www.murata.com
Taiyo-Yuden
(408) 573-4150
www.t-yuden.com
TDK
(847) 803-6100
www.component.tdk.com
Samsung
(408) 544-5200
www.sem.samsung.com
3526lb2fa
11
LTC3526L-2/LTC3526LB-2
Typical Applications
1-Cell to 1.8V Converter with
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