LTC3704
Wide Input Range, No RSENSETM
Positive-to-Negative DC/DC Controller
U
FEATURES
DESCRIPTIO
■
The LTC®3704 is a wide input range, current mode,
positive-to-negative DC/DC controller that drives an
N-channel power MOSFET and requires very few external
components. Intended for low to high power applications,
it eliminates the need for a current sense resistor by
utilizing the power MOSFET’s on-resistance, thereby maximizing efficiency.
■
■
■
■
■
■
■
■
■
■
■
■
High Efficiency Operation (No Sense
Resistor Required)
Wide Input Voltage Range: 2.5V to 36V
Current Mode Control Provides Excellent Transient
Response
High Maximum Duty Cycle (Typ 92%)
±1% Internal Voltage Reference
±2% RUN Pin Threshold with 100mV Hysteresis
Micropower Shutdown: IQ = 10μA
Programmable Switching Frequency
(50kHz to 1MHz) with One External Resistor
Synchronizable to an External Clock Up to 1.3 × fOSC
User-Controlled Pulse Skip or Burst Mode® Operation
Internal 5.2V Low Dropout Voltage Regulator
Capable of Operating with a Sense Resistor for High
Output Voltage Applications (VDS >36V)
Small 10-Lead MSOP Package
U
APPLICATIO S
■
■
■
■
SLIC Power Supplies
Telecom Power Supplies
Portable Electronic Equipment
Cable and DSL Modems
Router Supplies
For applications requiring constant frequency operation,
the Burst Mode operation feature can be defeated using
the MODE/SYNC pin. Higher than 36V switch voltage
applications are possible with the LTC3704 by connecting
the SENSE pin to a resistor in the source of the power
MOSFET.
The LTC3704 is available in the 10-lead MSOP package.
, LTC, LT and LTM are registered trademarks of Linear Technology Corporation. Burst
Mode is a registered trademark of Linear Technology Corporation. No RSENSE is a
registered trademark of Linear Technology Corporation. All other trademarks are the
property of their respective owners. Protected by U.S. Patents including 5847554, 5731694.
U
■
The IC’s operating frequency can be set with an external
resistor over a 50kHz to 1MHz range, and can be synchronized to an external clock using the MODE/SYNC pin.
Burst Mode operation at light loads, a low minimum
operating supply voltage of 2.5V and a low shutdown
quiescent current of 10μA make the LTC3704 ideally
suited for battery-operated systems.
TYPICAL APPLICATIO
VIN
5V to 15V
•
L1*
•
SENSE
RUN
CDC
47μF
VIN
ITH
NFB
MODE/SYNC
CC1
4.7nF
GND
D1
70
VIN = 5V
VIN = 15V
60
VIN = 10V
50
40
RT
80.6k
1%
RFB1
1.21k
1%
COUT
100μF
(X2)
M1
GATE
90
80
INTVCC
FREQ
100
L2*
LTC3704
RC
3k
Conversion Efficiency
VOUT
–5.0V
3A to 5A
EFFICIENCY (%)
R1
1M
CVCC
4.7μF
CIN
47μF
GND
RFB2
3.65k
1%
CIN, CDC : TDK C5750X5R1C476M
COUT: TDK C5750X5R0J107M
CVCC: TAIYO YUDEN LMK316BJ475ML
3704 TA01
D1: MBRD835L (ON SEMICONDUCTOR)
L1, L2: BH ELECTRONICS BH510-1009
M1: Si4884 (SILICONIX/VISHAY)
30
20
0.001
0.01
1.0
0.1
OUTPUT CURRENT (A)
10
3704 TA01b
Figure 1. High Efficiency Positive to Negative Supply
3704fb
1
LTC3704
W W
W
AXI U
U
ABSOLUTE
RATI GS
U
U
W
PACKAGE/ORDER I FOR ATIO
(Note 1)
VIN Voltage ............................................... – 0.3V to 36V
INTVCC Voltage ........................................... – 0.3V to 7V
INTVCC Output Current ........................................ 50mA
GATE Voltage ........................... – 0.3V to VINTVCC + 0.3V
ITH Voltage ............................................... – 0.3V to 2.7V
NFB Voltage .............................................. –2.7V to 2.7V
RUN, MODE/SYNC Voltages ....................... – 0.3V to 7V
FREQ Voltage ............................................– 0.3V to 1.5V
SENSE Pin Voltage ................................... – 0.3V to 36V
Operating Temperature Range (Note 2) .. – 40°C to 85°C
LTC3704E ............................................ –40°C to 85°C
LTC3704I ........................................... –40°C to 125°C
Junction Temperature (Note 3) ............................ 125°C
Storage Temperature Range ................. – 65°C to 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C
TOP VIEW
RUN
ITH
NFB
FREQ
MODE/
SYNC
10
9
8
7
6
1
2
3
4
5
SENSE
VIN
INTVCC
GATE
GND
MS PACKAGE
10-LEAD PLASTIC MSOP
TJMAX = 125°C, θJA = 120°C/ W
ORDER PART
NUMBER
LTC3704EMS
LTC3704IMS
MS PART MARKING
LTYT
LTCFW
Order Options Tape and Reel: Add #TR
Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF
Lead Free Part Marking: http://www.linear.com/leadfree/
Consult LTC Marketing for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS
The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C.
VIN = VINTVCC = 5V, VRUN = 1.5V, RT = 80k, VMODE/SYNC = 0V, unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Main Control Loop
VIN(MIN)
Minimum Input Voltage
IQ
Input Voltage Supply Current
Continuous Mode
Burst Mode Operation, No Load
Shutdown Mode
(VINTVCC = Open, No Switching) (Note 4)
VMODE/SYNC = 5V, VITH = 0.75V
VMODE/SYNC = 0V, VITH = 0V (Note 5)
VRUN = 0V
VRUN+
Rising RUN Input Threshold Voltage
VINTVCC = Open
–
Falling RUN Input Threshold Voltage
VINTVCC = Open
VRUN
2.5
550
250
10
RUN Pin Input Threshold Hysteresis
IRUN
RUN Input Current
VNFB
Negative Feedback Voltage
VITH = 0.4V (Note 5)
VITH = 0.4V (Note 5)
VITH = 0.4V (I-Grade) (Notes 2 and 5)
INFB
NFB Pin Input Current
ΔVNFB
ΔVIN
Line Regulation
2.5V ≤ VIN ≤ 30V
ΔVNFB
ΔVITH
Load Regulation
VMODE/SYNC = 0V, VITH = 0.5V to 0.90V (Note 5)
gm
Error Amplifier Transconductance
VITH(BURST)
Burst Mode Operation ITH Pin Voltage
1000
500
20
1.348
●
VRUN(HYST)
V
●
●
●
μA
μA
μA
V
1.223
1.198
1.248
1.273
1.298
50
100
150
mV
1
100
nA
–1.230
–1.242
–1.248
–1.255
V
V
V
7.5
15
μA
0.002
0.02
%/V
–1.218
–1.212
–1.205
–1
V
V
– 0.1
%
ITH Pin Load = ±5μA (Note 5)
650
μmho
Falling ITH Voltage
0.17
V
VSENSE(MAX) Maximum Current Sense Input Threshold
Duty Cycle < 20%
150
180
mV
ISENSE(ON)
SENSE Pin Current (GATE High)
VSENSE = 0V
120
40
75
μA
ISENSE(OFF)
SENSE Pin Current (GATE Low)
VSENSE = 30V
0.1
5
μA
3704fb
2
LTC3704
ELECTRICAL CHARACTERISTICS
The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C.
VIN = VINTVCC = 5V, VRUN = 1.5V, RFREQ = 80k, VMODE/SYNC = 0V, unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
Oscillator Frequency
RFREQ = 80k
250
300
MAX
UNITS
Oscillator
fOSC
Oscillator Frequency Range
350
kHz
1000
kHz
92
97
%
1.25
1.30
50
DMAX
Maximum Duty Cycle
fSYNC/fOSC
Recommended Maximum Synchronized
Frequency Ratio
fOSC = 300kHz (Note 6)
87
tSYNC(MIN)
MODE/SYNC Minimum Input Pulse Width
VSYNC = 0V to 5V
25
tSYNC(MAX)
MODE/SYNC Maximum Input Pulse Width
VSYNC = 0V to 5V
0.8/fOSC
VIL(MODE)
Low Level MODE/SYNC Input Voltage
VIH(MODE)
High Level MODE/SYNC Input Voltage
RMODE/SYNC
MODE/SYNC Input Pull-Down Resistance
VFREQ
Nominal FREQ Pin Voltage
ns
ns
0.3
1.2
V
V
50
kΩ
0.62
V
Low Dropout Regulator
VINTVCC
ΔVINTVCC
ΔVIN1
ΔVINTVCC
ΔVIN2
INTVCC Regulator Output Voltage
VIN = 7.5V
5.2
5.4
V
INTVCC Regulator Line Regulation
7.5V ≤ VIN ≤ 15V
5.0
8
25
mV
INTVCC Regulator Line Regulation
15V ≤ VIN ≤ 30V
70
200
mV
VLDO(LOAD)
INTVCC Load Regulation
VIN = 7.5V, 0 ≤ IINTVCC ≤ 20mA
– 0.2
%
VDROPOUT
INTVCC Regulator Dropout Voltage
VINTVCC = Open, INTVCC Load = 20mA
280
mV
IINTVCC
Bootstrap Mode INTVCC Supply
Current in Shutdown
RUN = 0V, SENSE = 5V
10
20
μA
tr
GATE Driver Output Rise Time
CL = 3300pF (Note 7)
17
100
ns
tf
GATE Driver Output Fall Time
CL = 3300pF (Note 7)
8
100
ns
–2
GATE Driver
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliabilty and lifetime.
Note 2: The LTC3704E is guaranteed to meet performance specifications
from 0°C to 85°C. Specifications over the – 40°C to 85°C operating
temperature range are assured by design, characterization and correlation
with statistical process controls. The LTC3704I is guaranteed over the full
–40°C to 125°C operating temperature range.
Note 3: TJ is calculated from the ambient temperature TA and power
dissipation PD according to the following formula:
TJ = TA + (PD • 120°C/W)
Note 4: The dynamic input supply current is higher due to power MOSFET
gate charging (QG • fOSC). See Applications Information.
Note 5: The LTC3704 is tested in a feedback loop that servos VNFB to the
reference voltage with the ITH pin forced to a voltage between 0V and 1.4V
(the no load to full load operating voltage range for the ITH pin is 0.3V to
1.23V).
Note 6: In a synchronized application, the internal slope compensation
gain is increased by 25%. Synchronizing to a significantly higher ratio will
reduce the effective amount of slope compensation, which could result in
subharmonic oscillation for duty cycles greater than 50%.
Note 7: Rise and fall times are measured at 10% and 90% levels.
3704fb
3
LTC3704
U W
TYPICAL PERFOR A CE CHARACTERISTICS
NFB Voltage vs Temp
NFB Voltage Line Regulation
NFB Pin Current vs Temperature
8.0
–1.231
–1.25
7.9
7.8
–1.23
NFB CURRENT (μA)
NFB VOLTAGE (V)
NFB VOLTAGE (V)
–1.24
–1.230
–1.22
7.7
7.6
7.5
7.4
7.3
7.2
7.1
–1.21
–50 –25
7.0
–50 –25
–1.229
0
0
25 50 75 100 125 150
TEMPERATURE (°C)
5
10
15
20
VIN (V)
25
30
35
0
25 50 75 100 125 150
TEMPERATURE (°C)
3704 G03
3704 G02
3704 G01
Shutdown Mode IQ vs VIN
Shutdown Mode IQ vs Temperature
20
30
Burst Mode IQ vs VIN
600
VIN = 5V
20
10
Burst Mode IQ (μA)
SHUTDOWN MODE IQ (μA)
SHUTDOWN MODE IQ (μA)
500
15
10
400
300
200
5
100
0
0
10
20
VIN (V)
30
0
–50 –25
40
0
0
10
20
VIN (V)
30
3704 G05
3704 G04
Burst Mode IQ vs Temperature
18
Gate Drive Rise and Fall Time
vs CL
60
CL = 3300pF
IQ(TOT) = 550μA + Qg • f
16
40
3704 G06
Dynamic IQ vs Frequency
500
50
400
14
12
200
40
TIME (ns)
300
IQ (mA)
Burst Mode IQ (μA)
0
25 50 75 100 125 150
TEMPERATURE (°C)
10
8
6
RISE TIME
30
20
FALL TIME
4
100
10
2
0
–50 –25
0
25 50 75 100 125 150
TEMPERATURE (°C)
3704 G07
0
0
0
200
400
800
600
FREQUENCY (kHz)
1000
1200
3704 G08
0
2000
4000
6000 8000
CL (pF)
10000 12000
3704 G09
3704fb
4
LTC3704
U W
TYPICAL PERFOR A CE CHARACTERISTICS
RUN Thresholds vs VIN
RUN Thresholds vs Temperature
RT vs Frequency
1000
1.40
1.4
1.3
1.2
0
10
20
VIN (V)
30
1.35
RT (kΩ)
RUN THRESHOLDS (V)
RUN THRESHOLDS (V)
1.5
1.30
1.25
10
1.20
–50 –25
40
100
25 50 75 100 125 150
TEMPERATURE (°C)
0
3704 G10
0 100 200 300 400 500 600 700 800 900 1000
FREQUENCY (kHz)
3704 G12
3704 G11
Maximum Sense Threshold
vs Temperature
Frequency vs Temperature
325
SENSE Pin Current vs Temperature
45
160
GATE HIGH
VSENSE = 0V
GATE FREQUENCY (kHz)
315
310
305
300
295
290
285
SENSE PIN CURRENT (μA)
MAX SENSE THRESHOLD (mV)
320
155
150
145
40
280
275
–50 –25
0
140
–50 –25
25 50 75 100 125 150
TEMPERATURE (°C)
0
35
–50 –25
25 50 75 100 125 150
TEMPERATURE (°C)
25 50 75 100 125 150
TEMPERATURE (°C)
3704 G14
3704 G13
INTVCC Load Regulation
3704 G15
INTVCC Dropout Voltage
vs Current, Temperature
INTVCC Line Regulation
500
5.4
TA = 25°C
TA = 25°C
450
150°C
5.1
DROPOUT VOLTAGE (mV)
INTVCC VOLTAGE (V)
5.2
INTVCC VOLTAGE (V)
0
5.3
5.2
400
125°C
350
75°C
300
25°C
250
200
0°C
150
–50°C
100
50
5.0
0
10
20
30 40
50 60
INTVCC LOAD (mA)
70
80
3704 G16
5.1
0
5
10
15
20 25
VIN (V)
30
0
35
40
3704 G17
0
5
10
15
INTVCC LOAD (mA)
20
3704 G18
3704fb
5
LTC3704
U
U
U
PI FU CTIO S
RUN (Pin 1): The RUN pin provides the user with an
accurate means for sensing the input voltage and programming the start-up threshold for the converter. The
falling RUN pin threshold is nominally 1.248V and the
comparator has 100mV of hysteresis for noise immunity.
When the RUN pin is below this input threshold, the IC is
shut down and the VIN supply current is kept to a low
value (typ 10μA). The Absolute Maximum Rating for the
voltage on this pin is 7V.
operating frequency to an external clock. If the MODE/
SYNC pin is connected to ground, Burst Mode operation
is enabled. If the MODE/SYNC pin is connected to INTVCC,
or if an external logic-level synchronization signal is
applied to this input, Burst Mode operation is disabled
and the IC operates in a continuous mode.
ITH (Pin 2): Error Amplifier Compensation Pin. The current comparator input threshold increases with this
control voltage. Nominal voltage range for this pin is 0V
to 1.40V.
INTVCC (Pin 8): The Internal 5.20V Regulator Output. The
gate driver and control circuits are powered from this
voltage. Decouple this pin locally to the IC ground with a
minimum of 4.7μF low ESR tantalum or ceramic
capacitor.
NFB (Pin 3): Receives the feedback voltage from the
external resistor divider across the output. Nominal
voltage for this pin in regulation is –1.230V.
FREQ (Pin 4): A resistor from the FREQ pin to ground
programs the operating frequency of the chip. The nominal voltage at the FREQ pin is 0.62V.
MODE/SYNC (Pin 5): This input controls the operating
mode of the converter and allows for synchronizing the
GND (Pin 6): Ground Pin.
GATE (Pin 7): Gate Driver Output.
VIN (Pin 9): Main Supply Pin. Must be closely decoupled
to ground.
SENSE (Pin 10): The Current Sense Input for the Control
Loop. Connect this pin to the drain of the power MOSFET
for VDS sensing and highest efficiency. Alternatively, the
SENSE pin may be connected to a resistor in the source
of the power MOSFET. Internal leading edge blanking is
provided for both sensing methods.
3704fb
6
LTC3704
W
BLOCK DIAGRA
RUN
+
BIAS AND
START-UP
CONTROL
SLOPE
COMPENSATION
1
C2
–
1.248V
100mV
HYSTERESIS
(1.348V RISING)
FREQ
V-TO-I
4
VIN
OSC
9
0.62V
IOSC
MODE/SYNC
INTVCC
5
NFB
GATE
200k
3
50k
200k
–
S
Q
GND
R
+
BUFFER
PWM LATCH
0.30V
–
1.230V
+
7
LOGIC
EA
SENSE
+
+
–
gm
10
C1
–
BURST
COMPARATOR
CURRENT
COMPARATOR
ITH
V-TO-I
2
INTVCC
5.2V
8
ILOOP
LDO
RLOOP
1.230V
SLOPE
1.230V
–
2.00V
+
UV
TO
START-UP
CONTROL
GND
BIAS
VREF
6
3704 BD
VIN
3704fb
7
LTC3704
U
OPERATIO
Main Control Loop
The LTC3704 is a constant frequency, current mode
controller for DC/DC positive-to-negative converter applications. The LTC3704 is distinguished from conventional
current mode controllers because the current control loop
can be closed by sensing the voltage drop across the
power MOSFET switch instead of across a discrete sense
resistor, as shown in Figure 2. This sensing technique
improves efficiency, increases power density, and reduces the cost of the overall solution.
VIN
VSW
VIN
SENSE
GATE
GND
GND
2a. SENSE Pin Connection for
Maximum Efficiency (VSW < 36V)
VIN
VSW
VIN
GATE
SENSE
GND
GND
RSENSE
3704 F02
2b. SENSE Pin Connection for Precise
Control of Peak IIN/IOUT or for VSW > 36V
Figure 2. Using the SENSE Pin On the LTC3704
For circuit operation, please refer to the Block Diagram of
the IC and Figure 1. In normal operation, the power
MOSFET is turned on when the oscillator sets the PWM
latch and is turned off when the current comparator C1
resets the latch. The divided-down output voltage is compared to an internal 1.230V reference by the error amplifier
EA, which outputs an error signal at the ITH pin. The voltage
on the ITH pin sets the current comparator C1 input
threshold. When the load current increases, a fall in the
NFB voltage relative to the reference voltage causes the ITH
pin to rise, which causes the current comparator C1 to trip
at a higher peak inductor current value. The average
inductor current will therefore rise until it equals the load
current, thereby maintaining output regulation.
The nominal operating frequency of the LTC3704 is programmed using a resistor from the FREQ pin to ground
and can be controlled over a 50kHz to 1000kHz range. In
addition, the internal oscillator can be synchronized to an
external clock applied to the MODE/SYNC pin and can be
locked to a frequency between 100% and 130% of its
nominal value. When the MODE/SYNC pin is left open, it is
pulled low by an internal 50k resistor and Burst Mode
operation is enabled. If this pin is taken above 2V or an
external clock is applied, Burst Mode operation is disabled
and the IC operates in continuous mode. With no load (or
an extremely light load), the controller will skip pulses in
order to maintain regulation and prevent excessive output
ripple.
The RUN pin controls whether the IC is enabled or is in a
low current shutdown state. A micropower 1.248V reference and comparator C2 allow the user to program the
supply voltage at which the IC turns on and off (comparator C2 has 100mV of hysteresis for noise immunity). With
the RUN pin below 1.248V, the chip is off and the input
supply current is typically only 10μA.
The LTC3704 can be used either by sensing the voltage
drop across the power MOSFET or by connecting the
SENSE pin to a conventional shunt resistor in the source
of the power MOSFET, as shown in Figure 2. Sensing the
voltage across the power MOSFET maximizes converter
efficiency and minimizes the component count, but limits
the output voltage to the maximum rating for this pin
(36V). By connecting the SENSE pin to a resistor in the
source of the power MOSFET, the user is able to program
output voltages significantly greater than the 36V maximum input voltage rating for the IC.
Programming the Operating Mode
For applications where maximizing the efficiency at very
light loads (e.g., 1μF) supply bypass capacitors. The
discharged bypass capacitors are effectively put in parallel
with CO, causing a nearly instantaneous drop in VO. No
regulator can deliver enough current to prevent this problem if the load switch resistance is low and it is driven
quickly. The only solution is to limit the rise time of the
switch drive in order to limit the inrush current di/dt to the
load.
Design Example: A 5V to 15V Input, –5V at 2A Output
Positive-to-Negative Converter
The design example presented here will be for the circuit
shown in Figure 1. The input voltage range is 5V to 15V,
and the output is -5V. The maximum load current is 2A at
an input voltage of 5V (3A peak), and 3A at an input voltage
of 15V (5A peak).
1. The maximum duty cycle of the main switch is:
DMAX =
–5
VOUT
=
= 50%
VOUT − VIN(MIN) –10
2. Pulse-Skip operation is chosen, so the MODE/SYNC pin
is connected to the INTVCC pin.
3. The operating frequency is chosen to be 300kHz to
reduce the size of the inductors. From Figure 5, the resistor
from the FREQ pin to ground is 80.6k.
4. A total inductor ripple current of 40% of the maximum
is chosen, so the inductor ripple current is:
D
ΔIL1 = − χ • IO(MAX) • MAX
1 – DMAX
0.5
ΔIL1 = 0.4 • 2.0 •
= 0.8A
1 – 0.5
For a standard 1:1 coupled inductor, the inductance is
therefore:
VIN(MIN)
• DMAX
2 • ΔIL1 • f
5
=
• 0.5 = 5.2μH
2 • 0.8 • 300k
L1 = L2 =
The minimum saturation current for this inductor is:
χ⎞
1
⎟ • IO(MAX) •
⎠
2
1 – DMAX
1
= 1.2 • 2.0 •
= 4.8A
1 – 0.5
⎛
ILSAT (MIN) ≥ – ⎜ 1 +
⎝
The inductor chosen is a BH Electronics part # 510-1009,
which has an open circuit parallel inductance of 4.56μH
and a maximum dc current rating of 6.5A.
5. For the power MOSFET,
RDS(ON) ≤ VSENSE(MAX) •
DMAX – 1
⎛ χ⎞
⎜ 1 + ⎟ • IO(MAX) • ρΤ
⎝ 2⎠
At the maximum duty cycle of 50%, the maximum SENSE
pin voltage is reduced to 130mV due to slope compensation, as shown in Figure 11. Assuming a maximum
junction temperature of 125°C for the power MOSFET,
ρΤ = 1.5, and
RDS(ON) ≤ 0.130 •
0.5 – 1
= 18.1mΩ
–1.2 • 2.0 • 1.5
The MOSFET chosen was Siliconix/Vishay’s Si4884, which
has a maximum RDS(ON) = 16.5mΩ at VGS = 4.5V at 25°C.
The minimum BVDSS = 30V and the maximum gate charge
is QG = 20nC.
6. The output diode must withstand a reverse voltage of
VIN(MAX) – VO = 20V and a continuous current of
IO(MAX) = 5.0A (peak output current at VIN = 15V). The peak
current in the diode is:
⎛ χ⎞
ID(PEAK) = ⎜ 1 + ⎟ • IO(MAX) = 6A
⎝ 2⎠
The power dissipated in this diode at full load is:
3704fb
20
LTC3704
U
W
U U
APPLICATIO S I FOR ATIO
PD = IO(MAX) • VF
Assuming a maximum junction temperature of 125°C and
a forward voltage of approximately 0.33V at 3A (the
maximum output current at VIN = 15V), this diode will
dissipate 1W at full load. The diode selected was the
MBRD835L from On Semiconductor, packaged in a
D-Pak.
C1
1nF
7. The DC coupling capacitor must be capable of handling
an RMS current of:
ID(PEAK) = –IO(MAX) •
VIN
5V to 15V
•
R1
154k
1%
R2
68.1k 1%
2
10
VIN
LTC3704
3
4
5
CC1
4.7nF
L2*
SENSE
RUN
ITH
RC
3k
VOUT
–5.0V
2A to 3A
(5A PEAK)
•
L1*
1
DMAX
= 3A
1 – DMAX
NFB
8
INTVCC
FREQ
GATE
MODE/SYNC
9
GND
CDC
47μF
X5R
M1
7
COUT
100μF
X5R
(X2)
6
D1
D2
RT
80.6k
1%
CVCC
4.7μF
X5R
CIN
47μF
X5R
GND
Q1
RFB1
1.21k
1%
RSS1
750Ω
RSS2
100Ω
3704 F15
RFB2
3.65k
1%
CSS
10nF
CIN: TDK C5750X5R1C476M
CDC : TDK C5750X7R1C476M
COUT: TDK C5750X5R0J107M
CVCC: TAIYO YUDEN LMK316BJ475ML
D1: ON SEMICONDUCTOR MBRD835L
D2: CDMSH-3
L1, L2: BH ELECTRONICS BH510-1009
M1: SILICONICS/VISHAY Si4884
Q1: MMBT3904
Figure 15. 5V to 15V Input, –5V Output at 2A-3A(5A Peak)
Positive-to-Negative Converter with Soft-Start and Undervoltage Lockout.
6
100
EFFICIENCY (%)
80
70
VIN = 5V
5
VIN = 15V
4
IO(MAX) (A)
90
VIN = 10V
60
50
40
30
20
0.001
3
2
FET = Si4884
L = BH510-1009
VO = –5V
FREQ = 300kHz
1
0
0.01
1
0.1
OUTPUT CURRENT (A)
10
3704 F16
Figure 16. Efficiency vs Output Current
5
10
INPUT VOLTAGE (V)
15
3704 F17
Figure 17. Maximum Output Current vs Input Voltage
3704fb
21
LTC3704
U
W
U U
APPLICATIO S I FOR ATIO
VOUT (AC)
10mV/DIV
VOUT (AC)
100mV/DIV
IL2 (DC)
1A/DIV
IOUT (DC)
1A/DIV
2A
0.5A
1μs/DIV
VIN = 5V
IOUT = –2V
250μs/DIV
VIN = 5V
3704 F18
3704 F19
Figure 19. Load Step Response at VIN = 5V
for the Circuit in Figure 15
Figure 18. Output Ripple Voltage and
Inductor Current for the Circuit in Figure 15
VOUT
1V/DIV
VOUT (AC)
100mV/DIV
VOUT
IOUT
1A/DIV
IOUT
2A
IOUT (DC)
1A/DIV
0.5A
VIN = 15V
250μs/DIV
3704 F20
Figure 20. Load Step Response at VIN = 15V
for the Circuit in Figure 15
The capacitor used was a TDK 47μF, 16V X5R-dielectric
ceramic (C5750X5R1C476M), mainly because of its low
ESR (2.4mΩ) and high RMS current capability.
8. The peak-to-peak output ripple is:
1 – DMAX VO
•
f
L2
⎡
1 ⎤
⎢ – ESR –
⎥
8 • f • CO ⎦
⎣
ΔVO(P −P) =
As a first try, a TDK 100μF, 6.3V X5R-dielectric ceramic
capacitor was chosen (C5750X5R0J107M). This capacitor has a very low 1.6mΩ of ESR. As a result, the peak-topeak output ripple voltage is:
VIN = 5V
1ms/DIV
3704 F21
Figure 21. Soft-Start for the Circuit in Figure 15
ΔVO(P −P) =
1 – 0.5 5.0
•
300k 3.5μ
⎡
⎤
1
⎢ – 0.0016 –
⎥ = 13.7mV
8 • 300k • 100μ ⎦
⎣
This ripple voltage calculation also assumes no coupling
between the inductors, making the 13.7mV number very
conservative.
Figure 15 illustrates the same basic application shown in
Figure 1, with the added features of soft-start and
undervoltage lockout on the input supply. Figures 16
through 21 illustrate the measured performance for this
converter. The peak efficiency is 87% at a load current of
2A and the peak-to-peak output ripple is less than 10mV.
Figures 19 and 20 illustrate the load step response at 5V
and 15V input, and Figure 21, the start-up characteristics
with a resistive load.
3704fb
22
LTC3704
U
W
U U
APPLICATIO S I FOR ATIO
PC Board Layout Checklist
source of the power MOSFET or the bottom terminal of
the sense resistor, 4) the negative terminal of the input
capacitor and 5) at least one via to the ground plane
immediately adjacent to Pin 6. The ground trace on the
top layer of the PC board should be as wide and short
as possible to minimize series resistance and inductance.
1. In order to minimize switching noise and improve
output load regulation, the GND pin of the LTC3704
should be connected directly to 1) the negative terminal of the INTVCC decoupling capacitor, 2) the negative
terminal of the output decoupling capacitors, 3) the
R3
VIN
C3
CC2
CC1
RC
1
R4
PIN 1
R2
R1
2
CDC
CIN
11
L1
3
M1
LTC3704
12
10
4
5
RT
CVCC
9
L2
8
6
7
D1
PSEUDO-KELVIN
SIGNAL GROUND
CONNECTION
COUT
COUT
TRUE REMOTE
OUTPUT SENSING
VOUT
VIAS TO GROUND
PLANE
3704 F??
Figure 22. LTC3704 Positive-to-Negative Converter Suggested Layout
VIN
R3
C3
R4
VOUT
L1
CC2
RC
R1
R2
2
SENSE
VIN
ITH
L2
10
CDC
9
LTC3704
3
4
RT
RUN
+
1
CC1
5
NFB
INTVCC
FREQ
MODE/
SYNC
GATE
GND
8
7
6
M1
CVCC
COUT
D1
CIN
PSEUDO-KELVIN
GROUND CONNECTION
GND
3704 F23
BOLD LINES INDICATE HIGH CURRENT PATHS
Figure 23. LTC3704 Positive-to-Negative Converter Layout Diagram
3704fb
23
LTC3704
U
W
U U
APPLICATIO S I FOR ATIO
2. Beware of ground loops in multiple layer PC boards. Try
to maintain one central ground node on the board and
use the input capacitor to avoid excess input ripple for
high output current power supplies. If the ground plane
is to be used for high DC currents, choose a path away
from the small-signal components.
3. Place the CVCC capacitor immediately adjacent to the
INTVCC and GND pins on the IC package. This capacitor
carries high di/dt MOSFET gate drive currents. A low
ESR X5R-dielectric 4.7μF ceramic capacitor works well
here.
4. The high di/dt loop from the drain of the power MOSFET,
through the coupling capacitor and back through the
diode to ground should be kept as tight as possible to
reduce inductive ringing. Excess inductance can cause
increased stress on the power MOSFET and increase HF
noise on the drain node. It is also important to keep the
cathode of the diode as close as possible to the MOSFET
source or the bottom of the sense resistor.
5. Check the stress on the power MOSFET by measuring
its drain-to-source voltage directly across the device
terminals (reference the ground of a single scope probe
directly to the source pad on the PC board). Beware of
inductive ringing which can exceed the maximum specified voltage rating of the MOSFET. If this ringing cannot
be avoided and exceeds the maximum rating of the
device, either choose a higher voltage device or specify
an avalanche-rated power MOSFET. Not all MOSFETs
are created equal (some are more equal than others).
6. Place the small-signal components away from high
frequency switching nodes. In the layout shown in
Figure 22, all of the small-signal components have been
placed on one side of the IC and all of the power
components have been placed on the other. This also
allows the use of a pseudo-Kelvin connection for the
signal ground, where high di/dt gate driver currents
flow out of the IC ground pin in one direction (to the
bottom plate of the INTVCC decoupling capacitor) and
small-signal currents flow in the other direction.
7. If a sense resistor is used in the source of the power
MOSFET, minimize the capacitance between the SENSE
pin trace and any high frequency switching nodes. The
LTC3704 contains an internal leading edge blanking
time of approximately 180ns, which should be adequate for most applications.
8. For optimum load regulation and true remote sensing,
the top of the output resistor divider should connect
independently to the top of the output capacitor (Kelvin
connection), staying away from any high dV/dt traces.
Place the divider resistors near the LTC3704 in order to
keep the high impedance FB node short.
9. For applications with multiple switching power converters connected to the same input supply, make sure
that the input filter capacitor for the LTC3704 is not
shared with other converters. AC input current from
another converter could cause substantial input voltage
ripple, and this could interfere with the operation of the
LTC3704. A few inches of PC trace or wire (L ≈ 100nH)
between the CIN of the LTC3704 and the actual source
VIN should be sufficient to prevent current sharing
problems.
3704fb
24
LTC3704
U
W
U U
APPLICATIO S I FOR ATIO
VIN
3V to 5V
•
L1*
1
L2*
10
SENSE
RUN
2
VIN
ITH
LTC3704
3
RC
14.7k
VOUT
–8.0V
1.2A to 2.5A
•
NFB
4
8
INTVCC
FREQ
5
GATE
MODE/SYNC
9
GND
M1
7
CDC
22μF
X5R
COUT
100μF
X5R
6
CC1
4.7nF
D1
RT
80.6k
1%
CVCC
4.7μF
X5R
RFB1
2.49k
1%
CIN
47μF
X5R
GND
RFB2
13.7k
1%
3704 F24
D1: DIODES INC B320B
L1, L2: BH ELECTRONICS BH 510-1009
M1: SILICONIX Si9426
Figure 24. 3V to 5V Input, –8V at 1.2A Output Converter
3
100
95
VIN = 5V
90
85
IO(MAX) (A)
EFFICIENCY (%)
2
1
VIN = 3V
80
75
70
65
60
55
0
3.0
3.5
4.0
4.5
50
0.001
5.0
INPUT VOLTAGE (V)
0.01
1
0.1
OUTPUT CURRENT (A)
3704 F25
Figure 25. Maximum Output Current vs Input Voltage
10
3704 F26
Figure 26. Output Efficiency at 3V and 5V Input
VOUT (AC)
100mV/DIV
VOUT (AC)
100mV/DIV
IOUT (DC) 1.2A
0.5A/DIV
IOUT (DC) 1.2A
0.5A/DIV
0.6A
VIN = 3V
250μs/DIV
3704 F27
Figure 27. Load Step Response at 3V Input
0.6A
VIN = 3V
250μs/DIV
3704 F27
Figure 28.Load Step Response at 5V Input
3704fb
25
LTC3704
U
W
U U
APPLICATIO S I FOR ATIO
GND
•
R1
49.9k
1%
UV + = 5.4V
UV – = 5.0V
4
+
CIN
220μF
16V
TPS
VOUT1
–24V
200mA
•
T1*
1, 2, 3
5
NFB
•
6
INTVCC
FREQ
GATE
MODE/SYNC
RFB1
2.49k
1%
+
C4
10μF
25V
X5R
D4
10BQ060
+
C5
10μF
25V
X5R
•
LTC3704
RT
120k
D3
10BQ060
+
COUT
3.3μF
100V
VIN
ITH
CC1
1nF
C3
10μF
25V
X5R
SENSE
RUN
RC
82k
+
VIN
7V TO 12V
R2
150k
1%
CR
1nF
CC2
100pF
D2
10BQ060
f = 200kHz
RFB2
45.3k
1%
GND
+
C1
4.7μF
10V
X5R
IRL2910
RS
0.012Ω
VOUT2
–72V
200mA
C2
4.7μF
50V
X5R
* VP5-0155 (PRIMARY = 3 WINDINGS IN PARALLEL)
3704 F29
Figure 29. High Power SLIC Supply
3704fb
26
LTC3704
U
PACKAGE DESCRIPTIO
MS Package
10-Lead Plastic MSOP
(Reference LTC DWG # 05-08-1661)
0.889 ± 0.127
(.035 ± .005)
5.23
(.206)
MIN
3.20 – 3.45
(.126 – .136)
3.00 ± 0.102
(.118 ± .004)
(NOTE 3)
0.50
0.305 ± 0.038
(.0197)
(.0120 ± .0015)
BSC
TYP
RECOMMENDED SOLDER PAD LAYOUT
0.254
(.010)
0.497 ± 0.076
(.0196 ± .003)
REF
10 9 8 7 6
3.00 ± 0.102
(.118 ± .004)
(NOTE 4)
4.90 ± 0.152
(.193 ± .006)
DETAIL “A”
0° – 6° TYP
GAUGE PLANE
1 2 3 4 5
0.53 ± 0.152
(.021 ± .006)
DETAIL “A”
0.86
(.034)
REF
1.10
(.043)
MAX
0.18
(.007)
SEATING
PLANE
0.17 – 0.27
(.007 – .011)
TYP
0.50
(.0197)
BSC
0.127 ± 0.076
(.005 ± .003)
MSOP (MS) 0603
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
3704fb
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
27
LTC3704
U
TYPICAL APPLICATIO
High Efficiency Positive-to-Negative Converter
C9
1nF
OPTIONAL
R4
154k
1%
VIN
5V TO 15V
R5
68.1k
1%
L1*
ITH
RC
9.1k
VIN
LTC3704
NFB
CC2
330pF
CC1
10nF
FREQ
RT
80.6k
1%
CDC
22μF
25V
X7R
SENSE
MODE/SYNC
INTVCC
CIN
47μF
16V
GATE
GND
L2*
CVCC
4.7μF
M1
D1
VOUT
–5V
5A
COUT1
100μF
6.3V
+
RUN
COUT2
150μF
6.3V
GND
3704 TA02
R1
1.21k
1%
R2
3.65k
1%
CIN: TDK C5570X5R1C476M
COUT1: TDK C5750X5R0J107M
COUT2: PANASONIC EEFUE0J151R
CDC: TDK C5750X7R1E226M
CVCC: TDK C2012X5R0J475K
D1: FAIRCHILD MBR2035CT
L1, L2: COILTRONICS VP5-0053 (*COUPLED INDUCTORS, WITH 3
WINDINGS IN PARALLEL ON PRIMARY AND SECONDARY)
M1: INTERNATIONAL RECTIFIER IRF7822
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LT®1175
Negative Linear Low Dropout Regulator
User-Selectable Current Limit from 200mA to 800mA,
0.4V Dropout at 500mA, 45μA Operating Current
LT1619
Current Mode PWM Controller
300kHz Fixed Frequency, Boost, SEPIC, Flyback Topology
LTC1624
Current Mode DC/DC Controller
SO-8; 200kHz Operating Frequency; Buck, Boost, SEPIC Design;
VIN Up to 36V
LTC1700
No RSENSE Synchronous Step-Up Controller
Up to 95% Efficiency, Operation as Low as 0.9V Input
LTC1871
No RSENSE Boost, Flyback and SEPIC Controller
2.5V ≤ VIN ≤ 30V, Current Mode Control,
Programmable fOSC from 50kHz to 1MHz
LTC1872
SOT-23 Boost Controller
Delivers Up to 5A, 550kHz Fixed Frequency, Current Mode
LT1930
1.2MHz, SOT-23 Boost Converter
Up to 34V Output, 2.6V ≤ VIN ≤ 16V, Miniature Design
LT1931
Inverting 1.2MHz, SOT-23 Converter
Positive-to-Negative DC/DC Conversion, Miniature Design
LT1964
ThinSOTTM Linear Low Dropout Regulator
200mA Output Current, Low Noise, 340mV Drop Out at 200mA,
5-Lead ThinSOT
LTC3401/LTC3402
1A/2A 3MHz Synchronous Boost Converters
Up to 97% Efficiency, Very Small Solution, 0.5V ≤ VIN ≤ 5V
ThinSOT is a trademark of Linear Technology Corporation.
3704fb
28
Linear Technology Corporation
LT 0307 REV B • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507
●
www.linear.com
© LINEAR TECHNOLOGY CORPORATION 2006
工商网监
湘ICP备2023018690号
