LTC3824EMSE#TRPBF

LTC3824 High Voltage Step-Down Controller With 40µA Quiescent Current Description Features Wide Input Range: 4V to 60V Current Mode Constant Frequency PWM Very Low Dropout Operation: 100% Duty Cycle Programmable Switching Frequency: 200kHz to 600kHz Selectable High Efficient Burst Mode® Operation: 40µA Quiescent Current Easy Synchronization 8V, 2A Gate Drive (VCC > 10V) for Industrial High Voltage P-Channel MOSFET n Programmable Soft-Start n Programmable Current Limit n Available in a Small 10-Pin Thermally Enhanced MSE Package n n n n n n The LTC®3824 is a step-down DC/DC controller designed to drive an external P-channel MOSFET. With a wide input range of 4V to 60V and a high voltage gate driver, the LTC3824 is suitable for many industrial and automotive high power applications. Constant frequency current mode operation provides excellent performance. n The LTC3824 can be configured for Burst Mode operation. Burst Mode operation enhances low current efficiency (only 40µA quiescent current) and extends battery run time. The switching frequency can be programmed up to 600kHz and is easily synchronizable. Other features include current limit, soft-start, micropower shutdown, and Burst Mode disable. The LTC3824 is available in a 10-lead MSE power package. Applications L, LT, LTC, LTM and Burst Mode are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. Protected by U.S. Patents including 5731964. Industrial and Automotive Power Supplies Telecom Power Supplies n Distributed Power Systems n n Typical Application 5V/2A Buck Converter Efficiency and Power Loss vs Load Current 100 CCAP 0.1µF + CAP SENSE LTC3824 GATE 392k 22µH COUT 100µF ×2 GND 100pF 51Ω SYNC/MODE SS 0.1µF EFFICIENCY 422k VOUT 5V 2A 1.5 70 1.0 VIN = 40V 60 POWER LOSS 50 10 80.6k 10k 2.0 VIN = 40V 80 VFB VC VIN = 12V POWER LOSS (W) RS 0.025Ω RSET 2.5 90 VCC EFFICIENCY (%) VIN 5.5V TO 60V CIN 33µF 100V 0.5 VIN = 12V 100 LOAD CURRENT (mA) 1000 0 2000 3824 TA01a 3824 TA01 3.3nF 3824fh For more information www.linear.com/LTC3824 1 LTC3824 Absolute Maximum Ratings Pin Configuration (Note 1) VCC ............................................................................65V SS, RSET, VFB ..............................................................4V VC ...............................................................................3V SYNC/MODE................................................................6V VCC – VSENSE ...............................................................1V Operating Junction Temperature Range (Note 2)................................................... –55°C to 150°C Storage Temperature Range...................... –65° to 150°C Lead Temperature (Soldering, 10 sec)................... 300°C TOP VIEW GND SYNC/MODE RSET VC VFB 1 2 3 4 5 11 GND 10 9 8 7 6 CAP GATE VCC SENSE SS MSE PACKAGE 10-LEAD PLASTIC MSOP TJMAX = 150°C, θJA = 43°C/W, θJC = 3°C/W EXPOSED PAD (PIN 11) IS GND, MUST BE SOLDERED TO PCB order information LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE LTC3824EMSE#PBF LTC3824EMSE#TRPBF LTBRZ 10-Lead Plastic MSOP –40°C to 125°C LTC3824IMSE#PBF LTC3824IMSE#TRPBF LTCGZ 10-Lead Plastic MSOP –40°C to 125°C LTC3824HMSE#PBF LTC3824HMSE#TRPBF LTCGZ 10-Lead Plastic MSOP –40°C to 150°C LTC3824MPMSE#PBF LTC3824MPMSE#TRPBF LTCGZ 10-Lead Plastic MSOP –55°C to 150°C LEAD BASED FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE LTC3824EMSE LTC3824EMSE#TR LTBRZ 10-Lead Plastic MSOP –40°C to 125°C LTC3824IMSE LTC3824IMSE#TR LTCGZ 10-Lead Plastic MSOP –40°C to 125°C LTC3824HMSE LTC3824HMSE#TR LTCGZ 10-Lead Plastic MSOP –40°C to 150°C LTC3824MPMSE LTC3824MPMSE#TR LTCGZ 10-Lead Plastic MSOP –55°C to 150°C Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/. Some packages are available in 500 unit reels through designated sales channels with #TRMPBF suffix. 2 3824fh For more information www.linear.com/LTC3824 LTC3824 electrical characteristics The l denotes the specifications which apply over the specified operating junction temperature range, otherwise specifications are at TA = 25°C (Note 2). VCC = 12V, RSET = 392k, CCAP = 0.1µF. No load on any outputs, unless otherwise specified. PARAMETER CONDITIONS Supply Voltage (VCC) Supply Current (IVCC) MIN l TYP 4 MAX UNITS 60 V 1.3 mA VC ≤ 0.4V (Switching Off), VCC ≤ 60V VSYNC = 0V (Burst Mode operation Disable) 0.8 Supply Current (IVCC) Burst Mode Operation VCC ≤ 60V, SYNC/MODE Open, VC = 0.6V 40 65 µA Supply Current in Shutdown VC ≤ 25mV, VCC ≤ 60V 9 20 30 µA µA 5 10 15 µA µA 0.792 0.788 0.788 0.8 0.808 0.812 0.816 V V V 220 260 370 µmho 10 10 30 60 nA nA 0.5 V l VC ≤ 25mV, VCC = 12V l Voltage Amplifier gm Reference Voltage (VREF) LTC3824E/LTC3824I LTC3824MP/LTC3824H l l Transconductance VC = 0.8V, ∆IVC = ±2µA FB Input Current VFB = VREF (Note 3): LTC3824E/LTC3824I LTC3824MP/LTC3824H VC High IVC = 0 1.6 VC Low IVC = 0 0.35 l l V VC Source Current VVC = 0.5V to 1.3V, VFB = VREF –100mV (VSYNC = 0V) 15 µA VC Sink Current VVC = 0.7V to 1.3V, VFB = VREF +100mV (VSYNC = 0V) 15 µA VC Threshold for Switching Off VSYNC/MODE = 0V (Note 4) Soft-Start Current ISS VSS = 0.1V to 1.5V l l 3 2.5 5 0.4 V 7.5 8 µA µA VC Burst Mode Threshold VCC ≤ 60V, VC Rising, SYNC/MODE Open 0.84 V VC Burst Mode Threshold Hysteresis VCC ≤ 60V 0.04 V SENSE Voltage at Burst Mode Operation (VCC–VSENSE) at 30% Duty Cycle 70% Duty Cycle Current Limit Threshold (VCC–VSENSE) VCC ≤ 60V: LTC3824E/LTC3824I LTC3824MP/LTC3824H FB Overvoltage Threshold VC = 1.6V Sense Input Current VSENSE = VCC 30 20 l l 80 75 100 100 mV mV 120 120 8 mV mV % 0.1 2 µA Oscillator Switching Frequency RSET = 392k: LTC3824E/LTC3824I LTC3824MP/LTC3824H l l 170 170 200 200 230 240 kHz kHz RSET = 200k l 320 400 460 kHz 1.3 V 300 600 kHz kHz Synchronization Pulse Threshold on SYNC Pin Rising Edge VSYNC Synchronization Frequency Range RSET = 392k RSET = 200k VRSET RSET = 392k Minimum On-Time (Measured at GATE Pin) CCM Operation (Note 5) Switching Frequency Foldback VFB = 0.3V l l 230 460 1.2 V 350 l 35 50 ns 75 kHz 3824fh For more information www.linear.com/LTC3824 3 LTC3824 Electrical Characteristics The l denotes the specifications which apply over the specified operating junction temperature range, otherwise specifications are at TA = 25°C (Note 2). VCC = 12V, RSET = 392k, CCAP = 0.1µF. No load on any outputs, unless otherwise specified. PARAMETER CONDITIONS MIN TYP MAX 7.9 7.9 8.8 8.9 UNITS Gate Driver GATE Bias Voltage (VCC–VCAP) GATE Bias Voltage (VCAP–GND) GATE High Voltage (VCC–VGATE) 9V ≤ VCC ≤ 60V, IGATE = 10mA: LTC3824E/LTC3824I LTC3824MP/LTC3824H l l 7.0 6.8 VCC = 12V, IGATE = 15mA l 6.8 4V ≤ VCC ≤ 8V, IGATE = 10mA 6V ≤ VCC ≤ 8V, IGATE = 15mA l 0.2 4V ≤ VCC ≤ 60V, IGATE = –15mA V 0.85 1.5 2.8 V V 0.5 0.8 V 0.5 V V GATE Peak Source Current CGATE = 10nF 2.5 GATE Low Voltage (VGATE–VCAP) 8V ≤ VCC ≤ 60V, IGATE = 15mA 4V ≤ VCC < 8V, IGATE = 10mA 0.1 0.05 GATE Peak Sink Current CGATE = 10nF 2.5 Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The LTC3824 is tested under pulsed load conditions such that TJ ≈ TA. The LTC3824E is guaranteed to meet performance specifications from 0°C to 85°C operating junction temperature. Specifications over the –40°C to 125°C operating junction temperature range are assured by design characterization and correlation with statistical process controls. The LTC3824I is guaranteed over the –40°C to 125°C operating junction temperature range. The LTC3824H is guaranteed over the –40°C to 150°C operating junction temperature range. The LTC3824MP is guaranteed and tested over the full –55°C to 150°C operating junction temperature range. High junction temperatures degrade operating lifetimes; operating lifetime is derated for junction temperatures greater than 125°C. Note that the maximum ambient temperature consistent with these specifications is determined by specific operating conditions in conjunction with board 4 V V A A layout, the rated package thermal impedance and other environmental factors. The junction temperature (TJ, in °C) is calculated from the ambient temperature (TA, in °C) and power dissipation (PD, in Watts) according to the formula: TJ = TA + (PD • θJA) where θJA (in °C/W) is the package junction to ambient thermal impedance. Note 3: This parameter is tested in a feedback loop that servos VFB to the reference voltage with the VC pin forced to 1V. Note 4: This specification represents the maximum voltage on VC where switching (GATE pin) is guaranteed to be off. The nominal value of VC where switching turns off is 0.7V. Note 5: The LTC3824 typically enters Burst Mode operation when the load is less than one third the current limit. If minimum on-time is violated, cycle skipping may occur at higher current levels. 3824fh For more information www.linear.com/LTC3824 LTC3824 Typical Performance Characteristics 8.5 (VCC – VCAP) vs IGATE at VDRIVE Low 3 TA = 25°C unless otherwise noted. ICC vs VCC 3 8.4 2 8.2 ΔFREQUENCY (kHz) 8.3 VCC-VCAP (V) Switching Frequency Change vs VCC at RSET = 392kΩ 2 ICC (mA) 8.1 8.0 7.9 VFB = 0.75V 1 VFB = 0.85V 1 0 –1 7.8 –2 7.7 7.6 0 20 30 IGATE (mA) 10 40 0 50 0 10 20 3824 G01 VREF Change vs VCC 30 VCC (V) 40 50 –3 60 3824 G02 Switching Frequency vs RSET 0.4 5 600 4 400 300 0 10 20 30 VCC (V) 40 50 60 100 100 40 50 60 3824 G03 2 1 –1 200 300 RSET(kΩ) 3824 G04 30 VCC (V) 0 200 –0.4 20 3 500 ∆VREF (mV) FREQUENCY (kHz) ΔVREF (mV) –0.2 10 ΔVREF vs Temperature 700 0.2 0 0 400 –2 –75 –50 –25 0 25 50 75 100 125 150 DIE TEMPERATURE (°C) 3824 G05 3824 G06 3824fh For more information www.linear.com/LTC3824 5 LTC3824 Typical Performance Characteristics TA = 25°C unless otherwise noted. Burst Mode Disabled at ILOAD = 200mA, VOUT = 5V Burst Mode Operation VOUT = 3V ILOAD = 200mA VIN =12V, VOUT= 3V, ILOAD = 200mA VOUT 50mV/DIV VOUT 10mV/DIV INDUCTOR CURRENT 1A/DIV INDUCTOR CURRENT 1A/DIV 4µs/DIV 20µs/DIV 3824 G07 Burst Mode Operation VOUT = 5V 3824 G08 Load Current Step Response VIN =12V, VOUT= 5V, ILOAD = 200mA VOUT 50mV/DIV OUTPUT VOLTAGE AC COUPLED 100mV/DIV INDUCTOR CURRENT 1A/DIV INDUCTOR CURRENT 2A/DIV 50µs/DIV 6 3824 G09 100µs/DIV 3824 G10 3824fh For more information www.linear.com/LTC3824 LTC3824 pin functions GND (Pin 1, Exposed Pad Pin 11): Ground. Exposed pad must be soldered to PCB with expanded metal trace for rated thermal performance. SYNC/MODE (Pin 2): Synchronization Input and Burst Mode Operation Enable/Disable. If this pin is left open or pulled higher than 2V, Burst Mode operation will be enabled at light load and the typical threshold of entering Burst Mode operation is one third of current limit. If this pin is grounded or the synchronization pulse is present with a frequency greater than 20kHz then Burst Mode operation is disabled and the LTC3824 goes into pulse skipping at light loads. To synchronize the LTC3824, the duty cycle of the synchronizing pulse can range from 10% to 70% and the synchronizing frequency has to be higher than the programmed frequency. RSET (Pin 3): A resistor from RSET to ground sets the LTC3824 switching frequency. VC (Pin 4): The Output of the voltage error amplifier gm and the control signal of the current mode PWM control loop. Switching starts at 0.7V, and higher VC corresponds to higher inductor current. When VC is pulled below 25mV, the LTC3824 goes into micropower shutdown. VFB (Pin 5): Error Amplifier Inverting Input. A resistor divider to this pin sets the output voltage. When VFB is less than 0.5V, the switching frequency will fold back to 50kHz to reduce the minimum on-cycle. SS (Pin 6): Soft-Start Pin. A capacitor on this pin sets the output ramp-up rate. The typical time for SS to reach the programmed level is (C • 0.8V)/5µA. Connect a 1MΩ to 10MΩ resistor from SS to ground to reset the soft-start capacitor if shutdown mode is used. SENSE (Pin 7): Current Sense Input Pin. A sense resistor, RS, from VIN to SENSE sets the current limit to 100mV/RS. VCC (Pin 8): Chip Power Supply. Power supply bypassing is required. GATE (Pin 9): Gate Drive for The External P-channel MOSFET. Typical peak drive current is 2.5A and the drive voltage is clamped to 8V when VCC is higher than 9V. CAP (Pin 10): A Low ESR Capacitor of at Least 0.1µF is required from this pin to VCC to bypass the internal regulator for biasing the gate driver circuitry. 3824fh For more information www.linear.com/LTC3824 7 LTC3824 block diagram SENSE 1.1V VCC + + SS VIN Burst Mode DISABLE – REFERENCE RS 100k VREF GATE Q1 B1 1.8V L VOUT 0.3µA 100k – M2 – 50pF + + Y1 S Q R – – + 1 2V CAP D1 + C2 RF1 COUT E1 M1 1.5V RF2 OR1 Y2 RFREQ – OSC + RSET + 0.1V – Y6 + SHUTDOWN + 50KHz FOLDBACK SYNC DISABLE 6 ++ + 0.5V SLOPE COMP 0.025V + PWM GND Y5 – + + 250k 8V + SYNC/ MODE + 2.5V CCAP 0.1µF – GM Burst Mode OPERATION CONTROL FB D6 – D7 + VREF 0.8V D4 5µA VC SS R1 2k C1 470pF 2.5V 3824 BD CSS 0.1µF applications information Operation The LTC3824 is a constant frequency current mode buck controller with programmable switching frequency up to 600kHz. Referring to the Block Diagram, the LTC3824’s basic functions include a transconductance amplifier gm to regulate the output voltage and control the current mode PWM current loop, the necessary logic to control the PWM switching cycles, a high speed gate driver to drive an external high power P-channel MOSFET and a voltage regulator to bias the gate driver circuit. 8 In normal operation each switching cycle starts with switch turn-on and the inductor current is sampled through the current sense resistor. This current is amplified and then compared to the error amplifier output VC to turn the switch off. Voltage loop regulates the output voltage to the programmed level through the output resistor divider and the error amplifier. Amplifier E1 regulates the gate drive low to approximately 8V below VCC for VCC higher than 9V, and CCAP stabilizes the voltage. Note that when VCC is lower than 9V, gate drive high will be within 0.5V of VCC and gate drive low within 1V of ground. Important features include shutdown, current limit, softstart, synchronization and low quiescent current. 3824fh For more information www.linear.com/LTC3824 LTC3824 applications information Burst Mode Operation The LTC3824 can be configured for Burst Mode operation to enhance light load efficiency (only 40µA quiescent current) and extend battery run time by leaving the SYNC/ MODE pin open or pulling it higher than 2V. In this mode, when output load drops the loop control voltage VC also drops and when VC reaches approximately 0.9V at low duty cycle the LTC3824 goes into sleep mode with the switch turned off. During sleep mode the output voltage drops and VC rises up. When VC goes up to around 70mV the LTC3824 will turn on the switch and the burst cycle repeats. If the SYNC/MODE pin is grounded the Burst Mode operation will be disabled and the LTC3824 skips cycles at light load. Oscillation Frequency Setting and Synchronization The switching frequency of the LTC3824 can be set up to 600kHz by a resistor, RFREQ, from the RSET pin to ground. For 200kHz, RFREQ = 392k. See the Switching Frequency vs RFREQ graph in the Typical Performance Characteristics section. With a 100ns one-shot timer on-chip, the LTC3824 provides flexibility on the sync pulse width. The sync pulse threshold voltage level is about 1.2V. Short-Circuit Protection In normal operation when the output voltage is in regulation, VFB is regulated to 0.8V. If the output is shorted to ground and VFB drops below 0.5V the switching frequency will be reduced to 50kHz to allow the inductor current to discharge and prevent current runaway. Note that synchronization is enabled only when VFB is above 0.5V. Soft-Start During soft-start, the voltage on the SS pin (VSS) is the reference voltage that controls the output voltage and the output ramps up following VSS. The effective range of VSS is from 0V to 0.8V. The typical time for the output to reach the programmed level is: C • 0.8V t SS = SS 5μA where CSS is the capacitor connected from the SS pin to GND. If shutdown mode will be invoked after startup, it is recommended to connect a 1MΩ to 10MΩ resistor from SS to ground to reset the SS capacitor during shutdown. This ensures proper soft-start operation when exiting shutdown mode. Overvoltage Protection To achieve good output regulation in Burst Mode operation, an overvoltage comparator, OVP, with a threshold adaptive to the VC voltage is used to monitor the FB voltage. In Burst Mode operation with low VC voltage, the OVP threshold is approximately 2% above VREF and the VREF is also shifted lower by 2% to contain the output ripple and to keep output regulation constant. As output load increases, OVP threshold increases with VC voltage to up to 8% above VREF. Shutdown Mode Quiescent Current When the VC pin is pulled down below 25mV the LTC3824 goes into micropower shutdown mode and only draws 7µA. For proper operation, shutdown mode should not be engaged again too soon after exiting shutdown mode. This minimum time is a function of CSS and is calculated by tMIN = 5.5e5 • CSS. For example, if CSS = 0.1μF, then a minimum of 55ms must elapse after exiting shutdown before engaging it again. Output Voltage Programming With a 0.8V feedback reference voltage, VREF, the output voltage, VOUT, is programmed by a resistor divider as shown in the Block Diagram. VOUT = 0.8V (1+RF1/RF2) Current Sense Resistor RS and Current Limit The maximum current the LTC3824 can deliver is determined by: IOUT(MAX) = 100mV/RS – IRIPPLE/2 where 100mV is the internal 100mV threshold across VCC and VSENSE, and IRIPPLE is the inductor peak-to-peak ripple current. RS should be placed very close to the power switch with very short traces. Good kelvin sensing is required for accurate current limit. 3824fh For more information www.linear.com/LTC3824 9 LTC3824 applications information Inductor Selection The maximum inductor current is determined by : IRIPPLE 2 (V – V ) • D where IRIPPLE = IN OUT f •L +V V and Duty Cycle D = OUT D VIN + VD The power dissipated by the MOSFET when the LTC3824 is in continuous mode is given by : PMOSFET = IL(MAX) =IOUT(MAX) + VD is the catch diode D1 forward voltage and f is the switching frequency. A small inductance will result in larger ripple current, output ripple voltage and also larger inductor core loss. An empirical starting point for the inductor ripple current is about 40% of maximum DC current. L= (VIN– VOUT ) • D f • 0.4 •IOUT(MAX) The saturation current level of the inductor should be sufficiently larger than IL(MAX). Power MOSFET Selection Important parameters for the power MOSFET include the drain-to-source breakdown voltage (BVDSS), the threshold voltage (VGS(TH)), the on-resistance (RDS(ON)) versus gateto-source voltage, the gate-to-source and gate-to-drain charges (QGS and QGD, respectively), the maximum drain current (ID(MAX)) and the MOSFET’s thermal resistance (RTH(JC)) and RTH(JA). The gate drive voltage is set by the 8V internal regulator. Consequently, at least 10V VGS rated MOSFETs are required in high voltage applications. In order to calculate the junction temperature of the power MOSFET, the power dissipated by the device must be known. This power dissipation is a function of the duty cycle, the load current and the junction temperature itself (due to the positive temperature coefficient of RDS(ON)). The power dissipation calculation should be based on the worst-cast specifications for VSENSE(MAX), the required load current at maximum duty cycle, the voltage and temperature ranges, and the RDS(ON) of the MOSFET listed in the data sheet. 10 + K(VIN )2 (IOUT )(CRSS )(f) The first term in the equation represents the I2R losses in the device and the second term is the switching losses. K (estimated as 1.7) is an empirical factor inversely related to the gate drive current and has the unit of 1/Amps. The δ term accounts for the temperature coefficient of the RDS(ON) of the MOSFET, which is typically 0.4%/°C. CRSS is the MOSFET reverse transfer capacitance. Figure 1 illustrates the variation of normalized RDS(ON) over temperature for a typical power MOSFET. 2.0 δ NORMALIZED ON-RESISTANCE VOUT+ VD (IOUT )2 (1+ δ)RDS(ON) VIN + VD 1.5 1.0 0.5 0 –50 50 100 0 JUNCTION TEMPERATURE (°C) 150 3824 F01 Figure 1. Normalized RDS(ON) vs Temperature From a known power dissipated in the power MOSFET, its junction temperature can be obtained using the following formula: TJ = TA + PMOSFET • RTH(JA) The RTH(JA) to be used in this equation normally includes the RTH(JC) for the device plus the thermal resistance from the case to the ambient temperature (RTH(CA)). This value of TJ can then be compared to the original assumed value used in the calculation. Output Diode Selection The catch diode carries load current during the switch off-time. The average diode current is therefore dependent For more information www.linear.com/LTC3824 3824fh LTC3824 Applications Information on the P-channel switch duty cycle. At high input voltages the diode conducts most of the time. As VIN approaches VOUT the diode conducts only a small fraction of the time. The worst condition for the diode is when the output is shorted to ground. Under this condition the diode must safely handle the maximum current at close to 100% of the time. Therefore, the diode must be carefully chosen to meet the worst case voltage and current requirements. Under normal conditions, the average current conducted by the diode is: ID = IOUT • (1 – D) A fast switching Schottky diode must be used to optimize efficiency. CIN and COUT Selection A low ESR input capacitor, CIN, sized for the maximum RMS P-channel switch current is required to prevent large input voltage transients. The maximum RMS capacitor current is given by: IRMS =IOUT(MAX) VOUT VIN VIN –1 VOUT Efficiency Considerations The efficiency of a switching regulator is equal to the output power divided by the input power. Percentage efficiency can be expressed as: % Efficiency = 100%–(L1 + L2 + L3 +......) This formula has a maximum at VIN = 2VOUT, where IRMS = IOUT/2. This simple worst-case condition is commonly used for design because even significant deviations do not offer much relief. Note that ripple current ratings from capacitor manufacturers are often based on only 2000 hours of life which makes it advisable to further derate the capacitor, or choose a capacitor rated at a higher temperature than required. Several capacitors may also be paralleled to meet size or height requirements in the design. The selection of COUT is determined by the effective series resistance (ESR) that is required to minimize voltage ripple and load step transients as well as the amount of bulk capacitance that is necessary to ensure that the control loop is stable. The output ripple, ∆VOUT , is determined by:  1  ΔVOUT ≤ ΔIL ESR+  8fCOUT   The output ripple is highest at maximum input voltage since ∆IL increases with input voltage. Multiple capacitors placed in parallel may be needed to meet the ESR and RMS current handling requirements. Dry tantalum, special polymer, aluminum electrolytic and ceramic capacitors are all available in surface mount packages. Special polymer capacitors offer very low ESR but have lower capacitance density than other types. Tantalum capacitors have the highest capacitance density but it is important to only use types that have been surge tested for use in switching power supplies. Aluminum electrolytic capacitors have significantly higher ESR, but can be used in cost-sensitive applications provided that consideration is given to ripple current ratings and long-term reliability. Ceramic capacitors have excellent low ESR characteristics but can have a high voltage coefficient and audible noise. where L1, L2, L3...are the individual loss components as a percentage of the input power. It is often useful to analyze individual losses to determine what is limiting the efficiency and which change would produce the most improvement. Although all dissipative elements in the circuit produce losses, the following are the main sources: 1. The supply current into VCC. The VCC current is the sum of the DC supply current and the MOSFET driver and control currents. The DC supply current into the VCC pin is typically about 1mA. The driver current results from switching the gate capacitance of the power MOSFET; this current is typically much larger than the DC current. Each time the MOSFET is switched on and off, a packet of gate charge QG is transferred from the CAP pin to VCC throughout the external bypass capacitor, CCAP. The resulting dQ/dt is a current that must be supplied to the capacitor by the internal regulator. IQ = 1mA + f • QG PIC = VIN • IQ 3824fh For more information www.linear.com/LTC3824 11 LTC3824 applications information 2. Power MOSFET switching and conduction losses: PMOSFET = VOUT + VD (I )2 (1+ δ)RDS(ON) VIN + VD OUT + K(VIN )2 (IOUT )(CRSS )(f) 3. The I2R losses of the current sense resistor: P(SENSE R) = (IOUT)2 • R • D where D is the duty cycle 4. The inductor loss due to winding resistance: P(WINDING) = (IOUT)2 • RW Place the LTC3824 and associated components tightly together and next to the section with power components. Use a local via to ground plane for all pads that connect to ground. Use multiple vias for power components. Connect the current sense input directly to the current sense resistor pad. VCC and SENSE are the inputs of the internal current sense amplifier and should be connected as close to the sense resistor pads as possible. A 100pF capacitor is required across the VCC and sense pins for noise filtering and should be placed as close to the pins as possible. Design Example 5. Loss of the catch diode: P(DIODE) = IOUT • VD • (1–D) 6. Other losses, including CIN and COUT ESR dissipation and inductor core losses, generally account for less than 2% of total losses. As an example, the LTC3824 is designed for an automotive 5V power supply with the following specifications: Maximum IOUT = 2A, typical VIN = 6V to 18V and can reach 60V briefly during load dump condition, and operating switching frequency = 400kHz. PCB Layout Considerations For f = 400kHz, RSET is chosen to be 180k. To achieve best performance from a LTC3824 circuit, the PC board layout must be carefully designed. For lower power applications, a 2-layer PC board is sufficient. However, at higher power levels, a multiple layer PC board is recommended. Using a solid ground plane under the circuit is the easiest way to ensure that switching noise does not affect the operation. Allow inductor ripple current to be 0.8A (40% of the maximum output current) at VIN = 18V, In order to help dissipate the power from the MOSFET and diode, keep the ground plane on the layers closest to the layers where power components are mounted. Use power planes for the MOSFET and diode in order to improve the spreading of heat from these components into the PCB. For best electrical performance the LTC3824 circuit should be laid out as following: Place all power components in a tight area. This will minimize the size of high current loops. Orient the input and output capacitors and current sense resistor in a way that minimizes the distance between the pads connected to ground plane. 12 L= (18V – 5V)5V = 12μH (400kHz • 0.8A)18V COUT will be selected based on the ESR that is required to satisfy the output voltage ripple requirement and the bulk capacitance needed for loop stability. For this design a 220µF tantalum capacitor is used. For worse-case conditions CIN should be rated for at least 1A ripple current (half of the maximum output current). A 47µF tantalum capacitor is adequate. A current limit of 3.3A is selected and RSENSE can be calculated by : RSENSE = 100mV = 0.03Ω 3.3A and a 25mΩ resistor can be used. 3824fh For more information www.linear.com/LTC3824 LTC3824 typical application 12V 2A Buck Converter VIN 12.5V TO 60V CIN1 33µF 100V + CCAP 0.1µF CIN2 2.2µF 100V CAP VCC SYNC/MODE SENSE 100pF CIN1: SANYO 63MV68AX CIN2: TDK C4532X7R2A225M COUT: SANYO OSCON, 16SP270M, TDKC2012X7RIC105K L1: D104C919AS-330M D1: SS3H9 Q1: Si7465DP RS 0.025Ω LTC3824 RSET GATE 301k Q1 L1 33µH GND + 1000pF D1 68k SS 0.1µF 113k COUT 270µF VOUT 12V 1µF 2A 16V X7R VFB VC 8.06k 15k 3824 TA02 1000pF 3824fh For more information www.linear.com/LTC3824 13 LTC3824 package description Please refer to http://www.linear.com/product/LTC3824#packaging for the most recent package drawings. MSE Package 10-Lead Plastic MSOP, Exposed Die Pad (Reference LTC DWG # 05-08-1664 Rev I) BOTTOM VIEW OF EXPOSED PAD OPTION 1.88 ±0.102 (.074 ±.004) 5.10 (.201) MIN 1 0.889 ±0.127 (.035 ±.005) 1.68 ±0.102 (.066 ±.004) 0.05 REF 10 0.305 ± 0.038 (.0120 ±.0015) TYP RECOMMENDED SOLDER PAD LAYOUT 3.00 ±0.102 (.118 ±.004) (NOTE 3) DETAIL “B” CORNER TAIL IS PART OF DETAIL “B” THE LEADFRAME FEATURE. FOR REFERENCE ONLY NO MEASUREMENT PURPOSE 10 9 8 7 6 DETAIL “A” 0° – 6° TYP 1 2 3 4 5 GAUGE PLANE 0.53 ±0.152 (.021 ±.006) DETAIL “A” 0.18 (.007) SEATING PLANE 1.10 (.043) MAX 0.17 – 0.27 (.007 – .011) TYP 0.50 (.0197) NOTE: BSC 1. DIMENSIONS IN MILLIMETER/(INCH) 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX 6. EXPOSED PAD DIMENSION DOES INCLUDE MOLD FLASH. MOLD FLASH ON E-PAD SHALL NOT EXCEED 0.254mm (.010") PER SIDE. 14 0.497 ±0.076 (.0196 ±.003) REF 3.00 ±0.102 (.118 ±.004) (NOTE 4) 4.90 ±0.152 (.193 ±.006) 0.254 (.010) 0.29 REF 1.68 (.066) 3.20 – 3.45 (.126 – .136) 0.50 (.0197) BSC 1.88 (.074) 0.86 (.034) REF 0.1016 ±0.0508 (.004 ±.002) MSOP (MSE) 0213 REV I 3824fh For more information www.linear.com/LTC3824 LTC3824 Revision History (Revision history begins at Rev F) REV DATE DESCRIPTION F 12/10 E-grade Ordering Information updated to 125°C 2 EC header corrected to Operation Junction Temperature 2 Updated/corrected Note 2 3 Updated Block Diagram 7 G 3/11 PAGE NUMBER Shutdown section updated 8 Package updated 12 Related Parts updated per Marketing request 14 Updated Temperature Range for MP-grade part 2 Added LTC3824MP to Electrical Characteristics tables H 01/16 2, 3 Updated Note 2 3 Updated Typical Application 14 Updated soft-start and ground pin descriptions 6 Block Diagram updated 7 Added additional shutdown mode application information 9 Revised schematic 16 3824fh Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its information circuits as described herein will not infringe on existing patent rights. For more www.linear.com/LTC3824 15 LTC3824 Typical Application 3V 2A Buck Converter VIN 4.5V TO 60V CIN1 33µF 100V CIN2 2.2µF 100V + CIN1: SANYO 63MV68AX CIN2: TDK C4532X7R2A225M COUT: SANYO OSCON, 16SP270M, TDKC2012X7RIC105K L1: D104C919AS-330M D1: SS3H9 Q1: Si7465DP Q2: 2N7002 CCAP 0.1µF CAP VCC 100pF RS 0.025Ω SYNC/MODE SENSE LTC3824 RSET GATE Q1 L1 33µH 301k GND + 100pF D1 51Ω SS 4.7MΩ* COUT 270µF VOUT 3.3V 1µF 2A 16V 255k VFB VC 80.6k Q2* 0.1µF 15k SHUTDOWN 3824 TA02a 1000pF * OPTIONAL, SEE PAGE 9 FOR MORE INFORMATION Related Parts PART NUMBER DESCRIPTION COMMENTS LTC3864 60V Low IQ Step-Down DC/DC Controller with 100% Duty Cycle Capability 3.5V ≤ VIN ≤ 60V, 0.8V ≤ VOUT ≤ VIN, IQ = 40µA, Selectable Fixed Frequency 50kHz to 850kHz, 3mm × 4mm DFN-12, MSOP-12E LTC3891 60V, Low IQ, Synchronous Step-Down DC/DC Controller 4V ≤ VIN ≤ 60V, 0.8V ≤ VOUT ≤ 24V, IQ = 50µA, Phase-Lockable Fixed Frequency 50kHz to 900kHz, 3x4 QFN-20 LTC3892/LTC3892-1 60V, Low IQ, Dual 2-Phase Synchronous Step-Down DC/DC Controller with Adj Gate Drive Voltage 4.5V ≤ VIN ≤ 60V, 0.8V ≤ VOUT ≤ 0.99VIN, IQ = 29µA, PLL Fixed Frequency 50kHz to 900kHz, 4V ≤ VIN ≤ 60V, 0.8V ≤ VOUT ≤ 24V, IQ = 50µA, LTC3890/LTC3890-1/ 60V, Low IQ, Dual 2-Phase Synchronous LTC3890-2/LTC3890-3 Step-Down DC/DC Controller with Fixed Gate Drive Voltage PLL Fixed Frequency 50kHz to 900kHz LT3845A 60V, Low IQ , Single Output Synchronous Step-Down DC/DC Controller LT3840 60V Wide Input Range Synchronous Regulator Controller 2.5V≤ VIN ≤ 60V, 1.23V ≤ VOUT ≤ 60V, IQ = 120µA, Synchronizable Integrated Buck-Boost Supply for 7.5V MOSFET Gate Drive Fixed Frequency 50kHz to 1MHz, TSSOP-28, 4x6 QFN-38 LTC7860 High Efficiency Switching Surge Stopper High Efficiency VOUT Clamp Stops High Voltage Input Surges, MSOP-12E LTC3886 60V Dual Output Step-Down Controller with Digital Power System Management 4.5V ≤ VIN ≤ 60V, 0.5V ≤ VOUT0,1 (±0.5%) ≤ 13.8V, 70mS Start-Up, I2C/PMBus Interface, Input Current Sense LTC3810 100V Synchronous Step-Down DC/DC Controller Constant On-time Valley Current Mode 4V ≤ VIN ≤ 60V, 0.8V ≤ VOUT ≤ 0.93VIN, SSOP-28 LTC3638 High Efficiency, 140V 250mA Step-Down Regulator with Adjustable 20mA to 250mA Maximum Output Current 4V≤ VIN ≤ 140V, 0.8V ≤ VOUT ≤ VIN, IQ = 12µA, No Compensation Required, MSOP-16E (12) LTC7138 High Efficiency, 140V 400mA Step-Down Regulator with Adjustable 100mA to 400mA Maximum Output Current 4V≤ VIN ≤ 140V, 0.8V ≤ VOUT ≤ VIN, IQ = 12µA, MSOP-16(12) No Compensation Required, MSOP-16E (12) 16 Linear Technology Corporation 4V≤ VIN ≤ 60V, 1.23V ≤ VOUT ≤ 36V, IQ = 120µA, Synchronizable Fixed Frequency 100kHz to 600kHz, TSSOP-16 1630 McCarthy Blvd., Milpitas, CA 95035-7417 For more information www.linear.com/LTC3824 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com/LTC3824 3824fh LT 0116 REV H • PRINTED IN USA  LINEAR TECHNOLOGY CORPORATION 2006