LTC3851IMSE#PBF

LTC3851 Synchronous Step-Down Switching Regulator Controller DESCRIPTION FEATURES n n n n n n n n n n n n n n n Wide VIN Range: 4V to 38V Operation RSENSE or DCR Current Sensing ±1% Output Voltage Accuracy Phase-Lockable Fixed Frequency: 250kHz to 750kHz Dual N-Channel MOSFET Synchronous Drive Very Low Dropout Operation: 99% Duty Cycle Adjustable Output Voltage Soft-Start or Tracking Output Current Foldback Limiting Output Overvoltage Protection 5V Internal Regulator OPTI-LOOP® Compensation Minimizes COUT Selectable Continuous, Pulse-Skipping or Burst Mode® Operation at Light Loads Low Shutdown IQ: 20μA VOUT Range: 0.8V to 5.5V Thermally Enhanced 16-Lead MSOP, 16-Lead Narrow SSOP or 3mm × 3mm QFN Package n n n OPTI-LOOP compensation allows the transient response to be optimized over a wide range of output capacitance and ESR values. The LTC3851 features a precision 0.8V reference that is compatible with a wide 4V to 38V input supply range. The TK/SS pin ramps the output voltage during start-up. Current foldback limits MOSFET heat dissipation during short-circuit conditions. The MODE/PLLIN pin selects among Burst Mode operation, pulse skipping mode or continuous inductor current mode at light loads and allows the IC to be synchronized to an external clock. The LTC3851-1 is a version with a power good output signal instead of adjustable current limit. APPLICATIONS n The LTC®3851 is a high performance synchronous step-down switching regulator controller that drives an all N-channel synchronous power MOSFET stage. A constant frequency current mode architecture allows a phase-lockable frequency of up to 750kHz. L, LT, LTC, LTM, Burst Mode and OPTI-LOOP are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. Protected by U.S. Patents including 5408150, 5481178, 5705919, 5929620, 6304066, 6498466, 6580258, 6611131. Automotive Systems Telecom Systems Industrial Equipment Distributed DC Power Systems TYPICAL APPLICATION High Efficiency Synchronous Step-Down Converter VIN FREQ/PLLFLTR TG 82.5k 0.1μF 0.68μH 0.1μF 330μF s2 3.01k INTVCC 2200pF 4.7μF BG ITH SENSE– VFB EFFICIENCY 85 1000 80 75 POWER LOSS 70 100 60 SENSE+ MODE/PLLIN 90 65 GND 330pF 10000 VIN = 12V 95 VOUT = 3.3V POWER LOSS (mW) SW LTC3851 BOOST TK/SS 100 VOUT 3.3V 15A RUN 0.1μF 15k VIN 4.5V TO 36V 22μF EFFICIENCY (%) ILIM Efficiency and Power Loss vs Load Current 0.047μF 55 30.1k 154k 50 10 48.7k 100 1000 10000 LOAD CURRENT (mA) 10 100000 3851TA01b 3851 TA01a 3851fb 1 LTC3851 ABSOLUTE MAXIMUM RATINGS (Note 1) Input Supply Voltage (VIN) ......................... 40V to –0.3V Topside Driver Voltage (BOOST) ................ 46V to –0.3V Switch Voltage (SW) ..................................... 40V to –5V INTVCC, (BOOST – SW), RUN ...................... 6V to –0.3V TK/SS, ILIM............................................ INTVCC to –0.3V SENSE+, SENSE–.......................................... 6V to –0.3V MODE/PLLIN, FREQ/PLLFLTR ............... INTVCC to –0.3V ITH, VFB Voltages .......................................... 3V to –0.3V INTVCC Peak Output Current ..................................50mA Operating Temperature Range (Note 2)..–40°C to 125°C Junction Temperature (Note 3) ............................. 125°C Storage Temperature Range...................–65°C to 150°C Lead Temperature (Soldering, 10 sec) GN/MSE ............................................................ 300°C PIN CONFIGURATION 15 TG RUN 3 14 BOOST TK/SS 4 13 VIN ITH 5 12 INTVCC 6 11 BG SENSE– 7 10 GND SENSE+ 8 9 ILIM GN PACKAGE 16-LEAD PLASTIC SSOP NARROW 1 2 3 4 5 6 7 8 17 16 15 14 13 12 11 10 9 SW TG BOOST VIN INTVCC BG GND ILIM TJMAX = 125°C, θJA = 110°C/W 12 BOOST TK/SS 2 11 VIN 17 ITH 3 10 INTVCC FB 4 MSE PACKAGE 16-LEAD PLASTIC MSOP TJMAX = 125°C, θJA = 35°C/W TO 40°C/W EXPOSED PAD (PIN 17) IS GND, MUST BE SOLDERED TO PCB TG 16 15 14 13 RUN 1 9 5 6 7 8 GND 2 MODE/PLLIN FREQ/PLLFLTR RUN TK/SS ITH FB SENSE– SENSE+ ILIM FREQ/PLLFLTR FB TOP VIEW 16 SW SENSE+ 1 SENSE– MODE/PLLIN SW TOP VIEW MODE/PLLIN FREQ/PLLFLTR TOP VIEW BG UD PACKAGE 16-LEAD (3mm s 3mm) PLASTIC QFN TJMAX = 125°C, θJA = 68°C/W, θJC = 4.2°C/W EXPOSED PAD (PIN 17) IS GND, MUST BE SOLDERED TO PCB ORDER INFORMATION LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE LTC3851EGN#PBF LTC3851EGN#TRPBF 3851 16-Lead Plastic SSOP –40°C to 85°C LTC3851IGN#PBF LTC3851IGN#TRPBF 3851 16-Lead Plastic SSOP –40°C to 125°C LTC3851EMSE#PBF LTC3851EMSE#TRPBF 3851 16-Lead Plastic MSOP –40°C to 85°C LTC3851IMSE#PBF LTC3851IMSE#TRPBF 3851 16-Lead Plastic MSOP –40°C to 125°C LTC3851EUD#PBF LTC3851EUD#TRPBF LCXN 16-Lead (3mm × 3mm) Plastic QFN –40°C to 85°C LTC3851IUD#PBF LTC3851IUD#TRPBF LCXN 16-Lead (3mm × 3mm) Plastic QFN –40°C to 125°C Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. Consult LTC Marketing for information on non-standard lead based finish parts. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ 3851fb 2 LTC3851 ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VIN = 15V, VRUN = 5V unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Main Control Loops VIN Operating Input Voltage Range VFB Regulated Feedback Voltage ITH = 1.2V (Note 4) IFB Feedback Current (Note 4) VREFLNREG Reference Voltage Line Regulation VIN = 6V to 38V (Note 4) VLOADREG Output Voltage Load Regulation (Note 4) Measured in Servo Loop, ΔITH = 1.2V to 0.7V (Note 4) Measured in Servo Loop, ΔITH = 1.2V to 1.6V gm Transconductance Amplifier gm l 4 l 0.792 38 V 0.800 0.808 V –10 –50 nA 0.002 0.02 %/V l 0.01 0.1 % l –0.01 –0.1 % ITH = 1.2V, Sink/Source = 5μA (Note 4) 2 mmho MHz gm GBW Transconductance Amp Gain Bandwidth ITH = 1.2V 3 IQ Input DC Supply Current Normal Mode Shutdown (Note 5) VRUN = 5V VRUN = 0V 1.2 20 UVLO Undervoltage Lockout on INTVCC VINTVCC Ramping Down 3.25 V UVLO Hys UVLO Hysteresis 0.4 V Measured at VFB l VOVL Feedback Overvoltage Lockout ISENSE SENSE Pins Current ITK/SS Soft-Start Charge Current VTK/SS = 0V VRUN RUN Pin On Threshold VRUN Rising l VRUNHYS RUN Pin On Hysteresis l l l 0.86 35 mA μA 0.88 0.90 V ±1 ±2 μA 0.6 1 2 μA 1.10 1.25 1.35 V 130 20 40 65 30 50 75 mV VSENSE(MAX) Maximum Current Sense Threshold VFB = 0.7V, VSENSE = 3.3V, ILIM = 0V VFB = 0.7V, VSENSE = 3.3V, ILIM = Float VFB = 0.7V, VSENSE = 3.3V, ILIM = INTVCC 40 65 90 mV mV mV TG RUP TG Driver Pull-Up On-Resistance TG High 2.6 Ω TG RDOWN TG Driver Pull-Down On-Resistance TG Low 1.5 Ω BG RUP BG Driver Pull-Up On-Resistance BG High 2.4 Ω BG RDOWN BG Driver Pull-Down On-Resistance BG Low 1.1 Ω TG tr TG tf TG Transition Time Rise Time Fall Time (Note 6) CLOAD = 3300pF CLOAD = 3300pF 25 25 ns ns BG tr BG tf BG Transition Time Rise Time Fall Time (Note 6) CLOAD = 3300pF CLOAD = 3300pF 25 25 ns ns TG/BG t1D Top Gate Off to Bottom Gate On Delay Bottom Switch-On Delay Time CLOAD = 3300pF Each Driver (Note 6) 30 ns BG/TG t2D Bottom Gate Off to Top Gate On Delay Top Switch-On Delay Time CLOAD = 3300pF Each Driver (Note 6) 30 ns tON(MIN) Minimum On-Time (Note 7) 90 ns INTVCC Linear Regulator VINTVCC Internal VCC Voltage 6V < VIN < 38V VLDO INT INTVCC Load Regulation ICC = 0mA to 50mA 4.8 5 5.2 V 0.5 2 % 3851fb 3 LTC3851 ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VIN = 15V, VRUN = 5V unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Oscillator and Phase-Locked Loop fNOM Nominal Frequency RFREQ = 60k 480 500 530 kHz fLOW Lowest Frequency RFREQ = 160k 220 250 280 kHz fHIGH Highest Frequency RFREQ = 36k 710 750 790 kHz RMODE/PLLIN MODE/PLLIN Input Resistance 100 kΩ fMODE MODE/PLLIN Minimum Input Frequency VMODE = External Clock MODE/PLLIN Maximum Input Frequency VMODE = External Clock 250 750 kHz kHz IFREQ Phase Detector Output Current Sinking Capability Sourcing Capability –10 10 μA μA fMODE > fOSC fMODE < fOSC Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The LTC3851E is guaranteed to meet performance specifications from 0°C to 85°C. Specifications over the –40°C to 85°C operating temperature range are assured by design, characterization and correlation with statistical process controls. The LTC3851I is guaranteed to meet specifications over the –40°C to 125°C operating temperature range. Note 3: TJ is calculated from the ambient temperature TA and power dissipation PD according to the following formulas: LTC3851GN: TJ = TA + (PD • 110°C/W) LTC3851UD: TJ = TA + (PD • 68°C/W) LTC3851MSE: TJ = TA + (PD • 40°C/W) Note 4: The LTC3851 is tested in a feedback loop that servos VITH to a specified voltage and measures the resultant VFB. Note 5: Dynamic supply current is higher due to the gate charge being delivered at the switching frequency. See Applications Information. Note 6: Rise and fall times are measured using 10% and 90% levels. Delay times are measured using 50% levels. Note 7: The minimum on-time condition is specified for an inductor peak-to-peak ripple current ~40% of IMAX (see Minimum On-Time Considerations in the Applications Information section). TYPICAL PERFORMANCE CHARACTERISTICS Efficiency vs Output Current and Mode Efficiency vs Output Current and Mode 100 VIN = 12V 90 VOUT = 1.5V 80 90 BURST EFFICIENCY(%) EFFICIENCY(%) 70 PULSE SKIP 60 50 40 CCM 80 70 70 60 50 20 20 10 10 0 0 100000 3851 G01 PULSE SKIP CCM 40 30 100 1000 10000 LOAD CURRENT (mA) 90 BURST 80 30 10 100 EFFICIENCY (%) 100 Efficiency vs Output Current and Mode BURST PULSE SKIP 60 50 CCM 40 30 VIN = 12V VOUT = 3.3V FIGURE 11 CIRCUIT 10 100 1000 10000 LOAD CURRENT (mA) 100000 3851 G02 20 VIN = 12V VOUT = 5V 10 0 10 100 1000 10000 LOAD CURRENT (mA) 100000 3851 G03 3851fb 4 LTC3851 TYPICAL PERFORMANCE CHARACTERISTICS Efficiency and Power Loss vs Input Voltage Load Step (Burst Mode Operation) 100 10000 EFFICIENCY, IOUT = 5A ILOAD 5A/DIV 0.2A TO 7.5A POWER LOSS, IOUT = 5A 90 85 1000 EFFICIENCY, IOUT = 0.5A 80 POWER LOSS, IOUT = 0.5A POWER LOSS (mW) EFFICIENCY (%) 95 IL 5A/DIV VOUT 100mV/DIV AC-COUPLED VOUT = 1.5V 100μs/DIV VIN = 12V FIGURE 11 CIRCUIT VIN = 12V VOUT = 3.3V FIGURE 11 CIRCUIT 75 70 3851 G05 100 4 8 16 12 24 20 INPUT VOLTAGE (V) 28 32 3851 G04 Load Step (Forced Continuous Mode) Load Step (Pulse-Skip Mode) ILOAD 5A/DIV 0.2A TO 7.5A ILOAD 5A/DIV 0.2A TO 7.5A IL 5A/DIV IL 5A/DIV VOUT 100mV/DIV AC-COUPLED VOUT 100mV/DIV AC-COUPLED VOUT = 1.5V 100μs/DIV VIN = 12V FIGURE 11 CIRCUIT 3851 G06 VOUT = 1.5V 100μs/DIV VIN = 12V FIGURE 11 CIRCUIT Start-Up with Prebiased Output at 2V Inductor Current at Light Load FORCED CONTINOUS MODE 5A/DIV Coincident Tracking with Master Supply VMASTER 0.5V/DIV VOUT 2V/DIV Burst Mode OPERATION 5A/DIV 3851 G07 TK/SS 0.5V/DIV VOUT 2A LOAD 0.5V/DIV VFB 0.5V/DIV PULSE SKIP MODE 5A/DIV VOUT = 1.5V 1μs/DIV VIN = 12V ILOAD = 1mA FIGURE 11 CIRCUIT 3851 G08 20ms/DIV 3851 G09 10ms/DIV 3851 G10 3851fb 5 LTC3851 TYPICAL PERFORMANCE CHARACTERISTICS Ratiometric Tracking with Master Supply Input DC Supply Current vs Input Voltage INTVCC Line Regulation 5.3 3.0 5.1 ILOAD = 0mA 4.9 ILOAD = 25mA SUPPLY CURRENT (mA) VOUT 2A LOAD 0.5V/DIV 3851 G11 10ms/DIV INTVCC VOLTAGE (V) 2.5 VMASTER 0.5V/DIV 2.0 1.5 1.0 4.7 4.5 4.3 4.1 3.9 0.5 3.7 0 3.5 4 8 12 16 20 24 28 32 INPUT VOLTAGE (V) 36 4 40 8 12 16 20 24 28 32 INPUT VOLTAGE (V) 90 ILIM = FLOAT 50 40 ILIM = GND 30 50 ILIM = FLOAT 40 30 ILIM = GND 20 40 30 20 10 20 MINIMUIM 0 10 10 ILIM = FLOAT BURST COMPARATOR FALLING THESHOLD: VITH = 0.4V 0 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 VITH (V) –10 –20 0 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 VSENSE COMMON MODE VOLTAGE (V) 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 VITH (V) 5 3851 G16 3851 G15 3851 G14 Maximum Current Sense Threshold vs Feedback Voltage (Current Foldback) Maximum Current Sense Threshold vs Duty Cycle TK/SS Pull-Up Current vs Temperature 1.5 90 ILIM = INTVCC 80 60 MAXIMUM VSENSE (mV) 70 ILIM = FLOAT 50 40 ILIM = GND 30 1.4 ILIM = INTVCC 80 1.3 70 60 TK/SS CURRENT (μA) 90 CURRENT SENSE THRESHOLD (mV) VSENSE (mV) 60 60 VSENSE (mV) VSENSE THRESHOLD (mV) MAXIMUIM 50 ILIM = INTVCC 70 70 60 DUTY CYCLE RANGE: 0% TO 100% 80 ILIM = INTVCC 80 Burst Mode Peak Current Sense Threshold vs ITH Voltage Maximum Peak Current Sense Threshold vs ITH Voltage 90 40 3851 G13 3851 G12 Maximum Current Sense Threshold vs Common Mode Voltage 36 ILIM = FLOAT 50 40 ILIM = GND 30 1.2 1.1 1.0 0.9 0.8 20 20 0.7 10 10 0.6 0 0 0 20 60 40 DUTY CYCLE (%) 80 100 3851 G17 0 0.1 0.2 0.3 0.4 0.5 0.6 FEEDBACK VOLTAGE (V) 0.7 0.8 3851 G18 0.5 –50 –25 50 25 0 75 TEMPERATURE (°C) 100 125 3851 G19 3851fb 6 LTC3851 TYPICAL PERFORMANCE CHARACTERISTICS 1.4 RUN RISING THRESHOLD (ON) 1.2 RUN FALLING THRESHOLD (OFF) 1.1 1.0 –25 50 25 0 75 TEMPERATURE (°C) 100 802 800 798 796 794 –50 –25 125 50 25 75 0 TEMPERATURE (°C) 3851 G20 INTVCC VOLTAGE AT UVLO THRESHOLD (V) FREQUENCY (kHz) 410 405 400 395 390 385 380 30 25 20 INPUT VOLTAGE (V) 15 RFREQ = 60k 500 400 35 4 200 –50 –25 125 3 INTVCC RAMPING DOWN 2 1 40 35 30 25 20 15 10 5 0 –25 50 25 0 75 TEMPERATURE (°C) 100 125 10 5 5 10 15 20 25 30 INPUT VOLTAGE (V) 35 40 Maximum Current Sense Threshold vs INTVCC Voltage 90 80 ISET = INTVCC 2.5 MAXIMUM VSENSE (mV) INPUT DC SUPPLY CURRENT (mA) 15 0 3851 G25 3.0 20 125 3851 G22 Input DC Supply Current vs Temperature 25 100 3851 G24 Shutdown Input DC Supply Current vs Temperature 30 50 25 75 0 TEMPERATURE (°C) Shutdown Input DC Supply Current vs Input Voltage INTVCC RAMPING UP 0 –50 40 35 RFREQ = 150k 40 3851 G23 0 –50 –25 100 5 415 10 600 Undervoltage Lockout Threshold (INTVCC) vs Temperature RFREQ = 80k 5 700 3851 G21 Oscillator Frequency vs Input Voltage 420 RFREQ = 36k 300 SHUTDOWN SUPPLY CURRENT (μA) 0.9 –50 800 804 FREQUENCY (kHz) REGULATED FEEDBACK VOLTAGE (mV) RUN PIN VOLTAGE (V) 900 806 1.3 SHUTDOWN INPUT DC SUPPLY CURRENT (μA) Oscillator Frequency vs Temperature Regulated Feedback Voltage vs Temperature Shutdown (RUN) Threshold vs Temperature 2.0 1.5 1.0 70 60 ISET = FLOAT 50 40 30 ISET = GND 20 0.5 10 75 50 25 TEMPERATURE (°C) 0 100 125 3851 G26 0 –50 –25 50 25 75 0 TEMPERATURE (°C) 100 125 3851 G27 0 3.2 3.4 3.6 3.8 4.0 4.2 4.4 4.6 4.8 5.0 INTVCC VOLTAGE(V) 38511 G28 3851fb 7 LTC3851 PIN FUNCTIONS (GN and MSE/UD) MODE/PLLIN (Pin 1/Pin 15): Forced Continuous Mode, Burst Mode or Pulse-Skipping Mode Selection Pin and External Synchronization Input to Phase Detector Pin. Connect this pin to INTVCC to force continuous conduction mode of operation. Connect to GND to enable pulse-skipping mode of operation. To select Burst Mode operation, tie this pin to INTVCC through a resistor no less than 50k, but no greater than 250k. A clock on the pin will cause the controller to operate in forced continuous mode of operation and synchronize the internal oscillator. FREQ/PLLFLTR (Pin 2/Pin 16): The phase-locked loop’s lowpass filter is tied to this pin. Alternatively, a resistor can be connected between this pin and GND to vary the frequency of the internal oscillator. RUN (Pin 3/Pin 1): Run Control Input. A voltage above 1.25V on this pin turns on the IC. However, forcing this pin below 1.1V causes the IC to shut down the IC. There is a 2μA pull-up current on this pin. ILIM (Pin 9/Pin 7): Current Comparator Sense Voltage Range Input. Tying this pin to GND, FLOAT or INTVCC selects the maximum current sense threshold from three different levels. GND (Pin 10/Pin 8): Ground. All small-signal components and compensation components should be Kelvin connected to this ground. The (–) terminal of CVCC and the (–) terminal of CIN should be closely connected to this pin. BG (Pin 11/Pin 9): Bottom Gate Driver Output. This pin drives the gate of the bottom N-channel MOSFET between GND and INTVCC. INTVCC (Pin 12/Pin 10): Internal 5V Regulator Output. The control circuit is powered from this voltage. Decouple this pin to GND with a minimum 2.2μF low ESR tantalum or ceramic capacitor. VIN (Pin 13/Pin 11): Main Input Supply. Decouple this pin to GND with a capacitor. TK/SS (Pin 4/Pin 2): Output Voltage Tracking and Soft-Start Input. A capacitor to ground at this pin sets the ramp rate for the output voltage. An internal soft-start current of of 1μA charges this capacitor. BOOST (Pin 14/Pin 12): Boosted Floating Driver Supply. The (+) terminal of the boost-strap capacitor is connected to this pin. This pin swings from a diode voltage drop below INTVCC up to VIN + INTVCC. ITH (Pin 5/Pin 3): Current Control Threshold and Error Amplifier Compensation Point. The current comparator tripping threshold increases with its ITH control voltage. TG (Pin 15/Pin 13): Top Gate Driver Output. This is the output of a floating driver with a voltage swing equal to INTVCC superimposed on the switch node voltage. FB (Pin 6/Pin 4): Error Amplifier Feedback Input. This pin receives the remotely sensed feedback voltage from an external resistive divider across the output. SW (Pin 16/Pin 14): Switch Node Connection to the Inductor. Voltage swing at this pin is from a Schottky diode (external) voltage drop below ground to VIN. SENSE– (Pin 7/Pin 5): Current Sense Comparator Inverting Input. The (–) input to the current comparator is connected to the output. Exposed Pad (Pin 17, UD and MSE Packages Only): Ground. Must be soldered to PCB, providing a local ground for the IC. SENSE+ (Pin 8/Pin 6): Current Sense Comparator Noninverting Input. The (+) input to the current comparator is normally connected to the DCR sensing network or current sensing resistor. 3851fb 8 LTC3851 FUNCTIONAL DIAGRAM FREQ/PLLFLTR VIN MODE/PLLIN VIN + CIN 100k 5V REG 0.8V MODE/SYNC DETECT + – PLL-SYNC BOOST BURSTEN OSC CB TG S R PULSE SKIP Q M1 SW 5k + ON – ICMP IREV + – SWITCH LOGIC AND ANTISHOOT THROUGH SENSE+ DB L1 VOUT SENSE– RUN INTVCC + ILIM COUT BG OV M2 CVCC SLOPE COMPENSATION GND INTVCC UVLO 1 100k R2 VFB ITHB R1 + SLEEP VIN OV – – + SS + – RUN – 0.88V + 1μA EA – + + 0.8V REF 0.64V 1.25V 2μA 0.4V 3851 FD ITH RC RUN TK/SS CSS CC1 3851fb 9 LTC3851 OPERATION Main Control Loop The LTC3851 is a constant frequency, current mode stepdown controller. During normal operation, the top MOSFET is turned on when the clock sets the RS latch, and is turned off when the main current comparator, ICMP , resets the RS latch. The peak inductor current at which ICMP resets the RS latch is controlled by the voltage on the ITH pin, which is the output of the error amplifier EA. The VFB pin receives the voltage feedback signal, which is compared to the internal reference voltage by the EA. When the load current increases, it causes a slight decrease in VFB relative to the 0.8V reference, which in turn causes the ITH voltage to increase until the average inductor current matches the new load current. After the top MOSFET has turned off, the bottom MOSFET is turned on until either the inductor current starts to reverse, as indicated by the reverse current comparator, IREV, or the beginning of the next cycle. INTVCC Power Power for the top and bottom MOSFET drivers and most other internal circuitry is derived from the INTVCC pin. An internal 5V low dropout linear regulator supplies INTVCC power from VIN. The top MOSFET driver is biased from the floating bootstrap capacitor, CB, which normally recharges during each off cycle through an external diode when the top MOSFET turns off. If the input voltage, VIN , decreases to a voltage close to VOUT, the loop may enter dropout and attempt to turn on the top MOSFET continuously. The dropout detector detects this and forces the top MOSFET off for about 1/10 of the clock period every tenth cycle to allow CB to recharge. However, it is recommended that there is always a load present during the drop-out transition to ensure CB is recharged. Shutdown and Start-Up (RUN and TK/SS) The LTC3851 can be shut down using the RUN pin. Pulling this pin below 1.1V disables the controller and most of the internal circuitry, including the INTVCC regulator. Releasing the RUN pin allows an internal 2μA current to pull up the pin and enable that controller. Alternatively, the RUN pin may be externally pulled up or driven directly by logic. Be careful not to exceed the absolute maximum rating of 6V on this pin. The start-up of the controller’s output voltage, VOUT , is controlled by the voltage on the TK/SS pin. When the voltage on the TK/SS pin is less than the 0.8V internal reference, the LTC3851 regulates the VFB voltage to the TK/SS pin voltage instead of the 0.8V reference. This allows the TK/SS pin to be used to program a soft-start by connecting an external capacitor from the TK/SS pin to GND. An internal 1μA pull-up current charges this capacitor creating a voltage ramp on the TK/SS pin. As the TK/SS voltage rises linearly from 0V to 0.8V (and beyond), the output voltage VOUT rises smoothly from zero to its final value. Alternatively, the TK/SS pin can be used to cause the start-up of VOUT to “track” another supply. Typically, this requires connecting to the TK/SS pin an external resistor divider from the other supply to ground (see the Applications Information section). When the RUN pin is pulled low to disable the controller, or when INTVCC drops below its undervoltage lockout threshold of 3.2V, the TK/SS pin is pulled low by an internal MOSFET. When in undervoltage lockout, the controller is disabled and the external MOSFETs are held off. Light Load Current Operation (Burst Mode Operation, Pulse-Skipping or Continuous Conduction) The LTC3851 can be enabled to enter high efficiency Burst Mode operation, constant frequency pulse-skipping mode or forced continuous conduction mode. To select forced continuous operation, tie the MODE/PLLIN pin to INTVCC. To select pulse-skipping mode of operation, float the MODE/PLLIN pin or tie it to GND. To select Burst Mode operation, tie MODE/PLLIN to INTVCC through a resistor no less than 50k, but no greater than 250k. When the controller is enabled for Burst Mode operation, the peak current in the inductor is set to approximately one-forth of the maximum sense voltage even though the voltage on the ITH pin indicates a lower value. If the average inductor current is higher than the load current, 3851fb 10 LTC3851 OPERATION the error amplifier, EA, will decrease the voltage on the ITH pin. When the ITH voltage drops below 0.4V, the internal sleep signal goes high (enabling “sleep” mode) and both external MOSFETs are turned off. In sleep mode, the load current is supplied by the output capacitor. As the output voltage decreases, the EA’s output begins to rise. When the output voltage drops enough, the sleep signal goes low, and the controller resumes normal operation by turning on the top external MOSFET on the next cycle of the internal oscillator. When a controller is enabled for Burst Mode operation, the inductor current is not allowed to reverse. The reverse current comparator, IREV , turns off the bottom external MOSFET just before the inductor current reaches zero, preventing it from reversing and going negative. Thus, the controller operates in discontinuous operation. In forced continuous operation, the inductor current is allowed to reverse at light loads or under large transient conditions. The peak inductor current is determined by the voltage on the ITH pin, just as in normal operation. In this mode the efficiency at light loads is lower than in Burst Mode operation. However, continuous mode has the advantages of lower output ripple and less interference to audio circuitry. When the MODE/PLLIN pin is connected to GND, the LTC3851 operates in PWM pulse-skipping mode at light loads. At very light loads the current comparator, ICMP, may remain tripped for several cycles and force the external top MOSFET to stay off for the same number of cycles (i.e., skipping pulses). The inductor current is not allowed to reverse (discontinuous operation). This mode, like forced continuous operation, exhibits low output ripple as well as low audio noise and reduced RF interference as compared to Burst Mode operation. It provides higher low current efficiency than forced continuous mode, but not nearly as high as Burst Mode operation. Frequency Selection and Phase-Locked Loop (FREQ/PLLFLTR and MODE/PLLIN Pins) The selection of switching frequency is a trade-off between efficiency and component size. Low frequency operation increases efficiency by reducing MOSFET switching losses, but requires larger inductance and/or capacitance to maintain low output ripple voltage. The switching frequency of the LTC3851 can be selected using the FREQ/PLLFLTR pin. If the MODE/PLLIN pin is not being driven by an external clock source, the FREQ/PLLFLTR pin can be used to program the controller’s operating frequency from 250kHz to 750kHz. A phase-locked loop (PLL) is available on the LTC3851 to synchronize the internal oscillator to an external clock source that is connected to the MODE/PLLIN pin. The controller operates in forced continuous mode of operation when it is synchronized. A series RC should be connected between the FREQ/PLLFLTR pin and GND to serve as the PLL’s loop filter. It is suggested that the external clock be applied before enabling the controller unless a second resistor is connected in parallel with the series RC network. The second resistor prevents very low switching frequency operation if the controller is enabled before the clock. Output Overvoltage Protection An overvoltage comparator, OV, guards against transient overshoots (>10%) as well as other more serious conditions that may overvoltage the output. In such cases, the top MOSFET is turned off and the bottom MOSFET is turned on until the overvoltage condition is cleared. 3851fb 11 LTC3851 APPLICATIONS INFORMATION The Typical Application on the first page of this data sheet is a basic LTC3851 application circuit. The LTC3851 can be configured to use either DCR (inductor resistance) sensing or low value resistor sensing. The choice of the two current sensing schemes is largely a design trade-off between cost, power consumption and accuracy. DCR sensing is becoming popular because it saves expensive current sensing resistors and is more power efficient, especially in high current applications. However, current sensing resistors provide the most accurate current limits for the controller. Other external component selection is driven by the load requirement, and begins with the selection of RSENSE (if RSENSE is used) and the inductor value. Next, the power MOSFETs and Schottky diodes are selected. Finally, input and output capacitors are selected. The circuit shown on the first page can be configured for operation up to 38V at VIN. Current Limit Programming The ILIM pin is a tri-level logic input to set the maximum current limit of the controller. When ILIM is grounded, the maximum current limit threshold of the current comparator is programmed to be 30mV. When ILIM is floated, the maximum current limit threshold is 50mV. When ILIM is tied to INTVCC , the maximum current limit threshold is set to 75mV. SENSE+ and SENSE– Pins The SENSE+ and SENSE– pins are the inputs to the current comparators. The common mode input voltage range of the current comparators is 0V to 5.5V. Both SENSE pins are high impedance inputs with small base currents of less than 1μA. When the SENSE pins ramp up from 0V to 1.4V, the small base currents flow out of the SENSE pins. When the SENSE pins ramp down from 5V to 1.1V, the small base currents flow into the SENSE pins. The high impedance inputs to the current comparators allow accurate DCR sensing. However, care must be taken not to float these pins during normal operation. Low Value Resistors Current Sensing A typical sensing circuit using a discrete resistor is shown in Figure 1. RSENSE is chosen based on the required output current. VIN INTVCC VIN BOOST TG RSENSE LTC3851 SW VOUT BG GND SENSE+ SENSE– FILTER COMPONENTS PLACED NEAR SENSE PINS 3851 F01 Figure 1. Using a Resistor to Sense Current with the LTC3851 The current comparator has a maximum threshold, VMAX , determined by the ILIM setting. The current comparator threshold sets the maximum peak of the inductor current, yielding a maximum average output current, IMAX, equal to the maximum peak value less half the peak-to-peak ripple current, ΔIL. Allowing a margin of 20% for variations in the IC and external component values yields: RSENSE = 0.8 • VMAX IMAX + ΔIL/2 Inductor DCR Sensing For applications requiring the highest possible efficiency, the LTC3851 is capable of sensing the voltage drop across the inductor DCR, as shown in Figure 2. The DCR of the inductor represents the small amount of DC winding resistance of the copper, which can be less than 1mΩ for today’s low value, high current inductors. If the external R1||R2 • C1 time constant is chosen to be exactly equal to the L/DCR time constant, the voltage drop across the external capacitor is equal to the voltage drop across the inductor DCR multiplied by R2/(R1 + R2). Therefore, R2 may be used to scale the voltage across the sense terminals when the DCR is greater than the target sense resistance. Check the manufacturer’s data sheet for specifications regarding the inductor DCR, in order to properly dimension the external filter components. The DCR of the inductor can also be measured using a good RLC meter. 3851fb 12 LTC3851 APPLICATIONS INFORMATION VIN INTVCC Accepting larger values of ΔIL allows the use of low inductances, but results in higher output voltage ripple and greater core losses. A reasonable starting point for setting ripple current is ΔIL = 0.3(IMAX). The maximum ΔIL occurs at the maximum input voltage. VIN BOOST INDUCTOR TG LTC3851 L DCR VOUT SW BG GND R1 SENSE+ C1* R2 SENSE– *PLACE C1 NEAR SENSE+, SENSE– PINS R1||R2 • C1 = L DCR RSENSE(EQ) = DCR 3851 F02 R2 R1 + R2 The inductor value also has secondary effects. The transition to Burst Mode operation begins when the average inductor current required results in a peak current below ≈10% of the current limit determined by RSENSE. Lower inductor values (higher ΔIL) will cause this to occur at lower load currents, which can cause a dip in efficiency in the upper range of low current operation. In Burst Mode operation, lower inductance values will cause the burst frequency to increase. Figure 2. Current Mode Control Using the Inductor DCR Slope Compensation and Inductor Peak Current Slope compensation provides stability in constant frequency architectures by preventing sub-harmonic oscillations at high duty cycles. It is accomplished internally by adding a compensating ramp to the inductor current signal. Normally, this results in a reduction of maximum inductor peak current for duty cycles > 40%. However, the LTC3851 uses a novel scheme that allows the maximum inductor peak current to remain unaffected throughout all duty cycles. Inductor Value Calculation The operating frequency and inductor selection are interrelated in that higher operating frequencies allow the use of smaller inductor and capacitor values. A higher frequency generally results in lower efficiency because of MOSFET gate charge losses. In addition to this basic trade-off, the effect of inductor value on ripple current and low current operation must also be considered. The inductor value has a direct effect on ripple current. The inductor ripple current ΔIL decreases with higher inductance or frequency and increases with higher VIN: ΔIL = ⎛ V ⎞ 1 VOUT ⎜1– OUT ⎟ VIN ⎠ f •L ⎝ Inductor Core Selection Once the value for L is known, the type of inductor must be selected. High efficiency converters generally cannot afford the core loss found in low cost powdered iron cores, forcing the use of more expensive ferrite or molypermalloy cores. Actual core loss is independent of core size for a fixed inductor value, but it is very dependent on inductance selected. As inductance increases, core losses go down. Unfortunately, increased inductance requires more turns of wire and therefore copper losses will increase. Ferrite designs have very low core loss and are preferred at high switching frequencies, so design goals can concentrate on copper loss and preventing saturation. Ferrite core material saturates “hard,” which means that inductance collapses abruptly when the peak design current is exceeded. This results in an abrupt increase in inductor ripple current and consequent output voltage ripple. Do not allow the core to saturate! Power MOSFET and Schottky Diode (Optional) Selection Two external power MOSFETs must be selected for the LTC3851 controller: one N-channel MOSFET for the top (main) switch, and one N-channel MOSFET for the bottom (synchronous) switch. 3851fb 13 LTC3851 APPLICATIONS INFORMATION The peak-to-peak drive levels are set by the INTVCC voltage. This voltage is typically 5V during start-up. Consequently, logic-level threshold MOSFETs must be used in most applications. The only exception is if low input voltage is expected (VIN < 5V); then, sub-logic level threshold MOSFETs (VGS(TH) < 3V) should be used. Pay close attention to the BVDSS specification for the MOSFETs as well; most of the logic-level MOSFETs are limited to 30V or less. Selection criteria for the power MOSFETs include the onresistance, RDS(ON), Miller capacitance, CMILLER, input voltage and maximum output current. Miller capacitance, CMILLER, can be approximated from the gate charge curve usually provided on the MOSFET manufacturers’ data sheet. CMILLER is equal to the increase in gate charge along the horizontal axis while the curve is approximately flat divided by the specified change in VDS. This result is then multiplied by the ratio of the application applied VDS to the gate charge curve specified VDS. When the IC is operating in continuous mode, the duty cycles for the top and bottom MOSFETs are given by: Main Switch Duty Cycle = VOUT VIN Synchronous Switch Duty Cycle = VIN – VOUT VIN Both MOSFETs have I2R losses while the topside N-channel equation includes an additional term for transition losses, which are highest at high input voltages. For VIN < 20V, the high current efficiency generally improves with larger MOSFETs, while for VIN > 20V, the transition losses rapidly increase to the point that the use of a higher RDS(ON) device with lower CMILLER actually provides higher efficiency. The synchronous MOSFET losses are greatest at high input voltage when the top switch duty factor is low or during short-circuit when the synchronous switch is on close to 100% of the period. The term (1 + δ) is generally given for a MOSFET in the form of a normalized RDS(ON) vs Temperature curve, but δ = 0.005/°C can be used as an approximation for low voltage MOSFETs. The optional Schottky diode conducts during the dead time between the conduction of the two power MOSFETs. This prevents the body diode of the bottom MOSFET from turning on, storing charge during the dead time and requiring a reverse recovery period that could cost as much as 3% in efficiency at high VIN. A 1A to 3A Schottky is generally a good size due to the relatively small average current. Larger diodes result in additional transition losses due to their larger junction capacitance. Soft-Start and Tracking The MOSFET power dissipations at maximum output current are given by: PMAIN = VOUT 2 IMAX ) (1+ δ )RDS(ON) + ( VIN ⎞ ( VIN )2 ⎛⎜⎝ IMAX (R )(C )• 2 ⎟⎠ DR MILLER ⎡ 1 ⎤ 1 + ⎥ (f) ⎢ ⎢⎣ VINTVCC – VTH(MIN) VTH(MIN) ⎥⎦ PSYNC = VIN – VOUT 2 IMAX ) (1+ δ )RDS(ON) ( VIN where δ is the temperature dependency of RDS(ON) and RDR (approximately 2Ω) is the effective driver resistance at the MOSFET’s Miller threshold voltage. VTH(MIN) is the typical MOSFET minimum threshold voltage. The LTC3851 has the ability to either soft-start by itself with a capacitor or track the output of another channel or external supply. When the LTC3851 is configured to soft-start by itself, a capacitor should be connected to the TK/SS pin. The LTC3851 is in the shutdown state if the RUN pin voltage is below 1.25V. TK/SS pin is actively pulled to ground in this shutdown state. Once the RUN pin voltage is above 1.25V, the LTC3851 powers up. A soft-start current of 1μA then starts to charge its soft-start capacitor. Note that soft-start or tracking is achieved not by limiting the maximum output current of the controller but by controlling the output ramp voltage according to the ramp rate on the TK/SS pin. Current foldback is disabled during this phase to ensure smooth soft-start or tracking. The soft-start or tracking range is 3851fb 14 LTC3851 APPLICATIONS INFORMATION 0V to 0.8V on the TK/SS pin. The total soft-start time can be calculated as: t SOFT-START = 0.8 • CSS 1.0µA Regardless of the mode selected by the MODE/PLLIN pin, the regulator will always start in pulse-skipping mode up to TK/SS = 0.64V. Between TK/SS = 0.64V and 0.72V, it will operate in forced continuous mode and revert to the selected mode once TK/SS > 0.72V. The output ripple is minimized during the 80mV forced continuous mode window. When the regulator is configured to track another supply, the feedback voltage of the other supply is duplicated by a resistor divider and applied to the TK/SS pin. Therefore, the voltage ramp rate on this pin is determined by the ramp rate of the other supply’s voltage. Note that the small soft-start capacitor charging current is always flowing, producing a small offset error. To minimize this error, one can select the tracking resistive divider value to be small enough to make this error negligible. In order to track down another supply after the soft-start phase expires, the LTC3851 must be configured for forced continuous operation by connecting MODE/PLLIN to INTVCC. Output Voltage Tracking The LTC3851 allows the user to program how its output ramps up and down by means of the TK/SS pins. Through this pin, the output can be set up to either coincidentally or ratiometrically track with another supply’s output, as shown in Figure 3. In the following discussions, VMASTER refers to a master supply and VOUT refers to the LTC3851’s output as a slave supply. To implement the coincident tracking in Figure 3a, connect a resistor divider to VMASTER and connect its midpoint to the TK/SS pin of the LTC3851. The ratio of this divider should be selected the same as that of the LTC3851’s feedback divider as shown in Figure 4a. In this tracking mode, VMASTER must be higher than VOUT. To implement ratiometric tracking, the ratio of the resistor divider connected to VMASTER is determined by: VOUT VMASTER = R2 ⎛ R3+R4 ⎞ ⎜ ⎟ R4 ⎝ R1+R2 ⎠ So which mode should be programmed? While either mode in Figure 4 satisfies most practical applications, the coincident mode offers better output regulation. This concept can be better understood with the help of Figure 5. At the input stage of the error amplifier, two common anode diodes are used to clamp the equivalent reference voltage and an additional diode is used to match the shifted common mode voltage. The top two current sources are of the same amplitude. In the coincident VOUT VMASTER OUTPUT VOLTAGE OUTPUT VOLTAGE VMASTER VOUT TIME TIME (3a) Coincident Tracking 3851 F03 (3b) Ratiometric Tracking Figure 3. Two Different Modes of Output Voltage Tracking 3851fb 15 LTC3851 APPLICATIONS INFORMATION VMASTER VOUT R3 VMASTER R3 TO TK/SS PIN TO VFB PIN R4 VOUT R1 TO TK/SS PIN R4 R3 TO VFB PIN R2 R4 3851 F04 (4a) Coincident Tracking Setup (4b) Ratiometric Tracking Setup Figure 4. Setup for Coincident and Ratiometric Tracking I I + D1 D2 EA TK/SS 0.8V VFB – D3 3851 F05 Figure 5. Equivalent Input Circuit of Error Amplifier mode, the TK/SS voltage is substantially higher than 0.8V at steady-state and effectively turns off D1. D2 and D3 will therefore conduct the same current and offer tight matching between VFB and the internal precision 0.8V reference. In the ratiometric mode, however, TK/SS equals 0.8V at steady-state. D1 will divert part of the bias current to make VFB slightly lower than 0.8V. Although this error is minimized by the exponential I-V characteristic of the diode, it does impose a finite amount of output voltage deviation. Furthermore, when the master supply’s output experiences dynamic excursion (under load transient, for example), the slave channel output will be affected as well. For better output regulation, use the coincident tracking mode instead of ratiometric. what type of bulk capacitor is used, an additional 0.1μF ceramic capacitor placed directly adjacent to the INTVCC and GND pins is highly recommended. Good bypassing is needed to supply the high transient currents required by the MOSFET gate drivers. High input voltage applications in which large MOSFETs are being driven at high frequencies may cause the maximum junction temperature rating for the LTC3851 to be exceeded. The INTVCC current, which is dominated by the gate charge current, is supplied by the 5V LDO. Power dissipation for the IC in this case is highest and is approximately equal to VIN • IINTVCC . The gate charge current is dependent on operating frequency as discussed in the Efficiency Considerations section. The junction temperature can be estimated by using the equations given in Note 3 of the Electrical Characteristics. For example, the LTC3851 INTVCC current is limited to less than 14mA from a 36V supply in the GN package: TJ = 70°C + (14mA)(36V)(110°C/W) = 125°C To prevent the maximum junction temperature from being exceeded, the input supply current must be checked while operating in continuous conduction mode (MODE/PLLIN = INTVCC) at maximum VIN . INTVCC Regulator Topside MOSFET Driver Supply (CB, DB) The LTC3851 features a PMOS low dropout linear regulator (LDO) that supplies power to INTVCC from the VIN supply. INTVCC powers the gate drivers and much of the LTC3851 ’s internal circuitry. The LDO regulates the voltage at the INTVCC pin to 5V. An external bootstrap capacitor CB connected to the BOOST pin supplies the gate drive voltage for the topside MOSFET. Capacitor CB in the Functional Diagram is charged though external diode DB from INTVCC when the SW pin is low. When the topside MOSFET is to be turned on, the driver places the CB voltage across the gate source of the MOSFET. This enhances the MOSFET and turns on the topside switch. The switch node voltage, SW, rises to VIN The LDO can supply a peak current of 50mA and must be bypassed to ground with a minimum of 2.2μF ceramic capacitor or low ESR electrolytic capacitor. No matter 3851fb 16 LTC3851 APPLICATIONS INFORMATION and the BOOST pin follows. With the topside MOSFET on, the boost voltage is above the input supply: VBOOST = VIN + VINTVCC The value of the boost capacitor CB needs to be 100 times that of the total input capacitance of the topside MOSFET. The reverse breakdown of the external Schottky diode must be greater than VIN(MAX). Undervoltage Lockout The LTC3851 has two functions that help protect the controller in case of undervoltage conditions. A precision UVLO comparator constantly monitors the INTVCC voltage to ensure that an adequate gate-drive voltage is present. It locks out the switching action when INTVCC is below 3.2V. To prevent oscillation when there is a disturbance on the INTVCC, the UVLO comparator has 400mV of precision hysteresis. Another way to detect an undervoltage condition is to monitor the VIN supply. Because the RUN pin has a precision turn-on reference of 1.25V, one can use a resistor divider to VIN to turn on the IC when VIN is high enough. CIN Selection In continuous mode, the source current of the top N-channel MOSFET is a square wave of duty cycle VOUT/VIN . To prevent large voltage transients, a low ESR input capacitor sized for the maximum RMS current must be used. The maximum RMS capacitor current is given by: ⎛ V ⎞ V IRMS ≅IO(MAX) OUT ⎜ IN – 1⎟ VIN ⎝ VOUT ⎠ 1/ 2 This formula has a maximum at VIN = 2VOUT, where IRMS = IO(MAX)/2. This simple worst-case condition is commonly used for design because even significant deviations do not offer much relief. Note that capacitor manufacturers’ ripple current ratings are often based on only 2000 hours of life. This makes it advisable to further derate the capacitor or to choose a capacitor rated at a higher temperature than required. Several capacitors may also be paralleled to meet size or height requirements in the design. Always consult the manufacturer if there is any question. COUT Selection The selection of COUT is primarily determined by the effective series resistance, ESR, to minimize voltage ripple. The output ripple, ΔVOUT, in continuous mode is determined by: ⎛ 1 ⎞ ΔVOUT ≈ ΔIL ⎜ESR+ ⎟ 8fCOUT ⎠ ⎝ where f = operating frequency, COUT = output capacitance and ΔIL = ripple current in the inductor. The output ripple is highest at maximum input voltage since ΔIL increases with input voltage. Typically, once the ESR requirement for COUT has been met, the RMS current rating generally far exceeds the IRIPPLE(P-P) requirement. With ΔIL = 0.3IOUT(MAX) and allowing 2/3 of the ripple to be due to ESR, the output ripple will be less than 50mV at maximum VIN if the ILIM pin is configured to float and: COUT Required ESR < 2.2RSENSE COUT > 1 8fRSENSE The first condition relates to the ripple current into the ESR of the output capacitance while the second term guarantees that the output capacitance does not significantly discharge during the operating frequency period due to ripple current. The choice of using smaller output capacitance increases the ripple voltage due to the discharging term but can be compensated for by using capacitors of very low ESR to maintain the ripple voltage at or below 50mV. The ITH pin OPTI-LOOP compensation components can be optimized to provide stable, high performance transient response regardless of the output capacitors selected. The selection of output capacitors for applications with large load current transients is primarily determined by the voltage tolerance specifications of the load. The resistive component of the capacitor, ESR, multiplied by the load current change, plus any output voltage ripple must be within the voltage tolerance of the load. 3851fb 17 LTC3851 APPLICATIONS INFORMATION The required ESR due to a load current step is: RESR ≤ ΔV ΔI where ΔI is the change in current from full load to zero load (or minimum load) and ΔV is the allowed voltage deviation (not including any droop due to finite capacitance). The amount of capacitance needed is determined by the maximum energy stored in the inductor. The capacitance must be sufficient to absorb the change in inductor current when a high current to low current transition occurs. The opposite load current transition is generally determined by the control loop OPTI-LOOP components, so make sure not to over compensate and slow down the response. The minimum capacitance to assure the inductors’ energy is adequately absorbed is: COUT > L ( ΔI) 2 2 ( ΔV ) VOUT where ΔI is the change in load current. Manufacturers such as Nichicon, United Chemi-Con and Sanyo can be considered for high performance throughhole capacitors. The OS-CON semiconductor electrolyte capacitor available from Sanyo has the lowest (ESR)(size) product of any aluminum electrolytic at a somewhat higher price. An additional ceramic capacitor in parallel with OS-CON capacitors is recommended to reduce the inductance effects. In surface mount applications, ESR, RMS current handling and load step specifications may require multiple capacitors in parallel. Aluminum electrolytic, dry tantalum and special polymer capacitors are available in surface mount packages. Special polymer surface mount capacitors offer very low ESR but have much lower capacitive density per unit volume than other capacitor types. These capacitors offer a very cost-effective output capacitor solution and are an ideal choice when combined with a controller having high loop bandwidth. Tantalum capacitors offer the highest capacitance density and are often used as output capacitors for switching regulators having controlled soft-start. Several excellent surge-tested choices are the AVX TPS, AVX TPSV or the KEMET T510 series of surface mount tantalums, available in case heights ranging from 1.5mm to 4.1mm. Aluminum electrolytic capacitors can be used in cost-driven applications, provided that consideration is given to ripple current ratings, temperature and longterm reliability. A typical application will require several to many aluminum electrolytic capacitors in parallel. A combination of the above mentioned capacitors will often result in maximizing performance and minimizing overall cost. Other capacitor types include Nichicon PL series, NEC Neocap, Panasonic SP and Sprague 595D series. Consult manufacturers for other specific recommendations. Like all components, capacitors are not ideal. Each capacitor has its own benefits and limitations. Combinations of different capacitor types have proven to be a very cost effective solution. Remember also to include high frequency decoupling capacitors. They should be placed as close as possible to the power pins of the load. Any inductance present in the circuit board traces negates their usefulness. Setting Output Voltage The LTC3851 output voltage is set by an external feedback resistive divider carefully placed across the output, as shown in Figure 6. The regulated output voltage is determined by: ⎛ R ⎞ VOUT = 0.8V ⎜ 1+ B ⎟ ⎝ RA ⎠ To improve the transient response, a feed-forward capacitor, CFF , may be used. Great care should be taken to route the VFB line away from noise sources, such as the inductor or the SW line. VOUT LTC3851 RB CFF VFB RA 3851 F06 Figure 6. Settling Output Voltage 3851fb 18 LTC3851 APPLICATIONS INFORMATION Fault Conditions: Current Limit and Current Foldback Phase-Locked Loop and Frequency Synchronization The LTC3851 includes current foldback to help limit load current when the output is shorted to ground. If the output falls below 40% of its nominal output level, the maximum sense voltage is progressively lowered from its maximum programmed value to about 25% of the that value. Foldback current limiting is disabled during softstart or tracking. Under short-circuit conditions with very low duty cycles, the LTC3851 will begin cycle skipping in order to limit the short-circuit current. In this situation the bottom MOSFET will be dissipating most of the power but less than in normal operation. The short-circuit ripple current is determined by the minimum on-time tON(MIN) of the LTC3851 (≈90ns), the input voltage and inductor value: The LTC3851 has a phase-locked loop (PLL) comprised of an internal voltage-controlled oscillator (VCO) and a phase detector. This allows the turn-on of the top MOSFET to be locked to the rising edge of an external clock signal applied to the MODE/PLLIN pin. This phase detector is an edge sensitive digital type that provides zero degrees phase shift between the external and internal oscillators. This type of phase detector does not exhibit false lock to harmonics of the external clock. VIN L The resulting short-circuit current is: ΔIL(SC) = tON(MIN) • ISC = 1/4MaxVSENSE 1 – ΔIL(SC) RSENSE 2 Programming Switching Frequency To set the switching frequency of the LTC3851, connect a resistor, RFREQ, between FREQ/PLLFLTR and GND. The relationship between the oscillator frequency and RFREQ is shown in Figure 7. A 0.1μF bypass capacitor should be connected in parallel with RFREQ . 750 OSCILLATOR FREQUENCY (kHz) 700 The output of the phase detector is a pair of complementary current sources that charge or discharge the external filter network connected to the FREQ/PLLFLTR pin. Note that the LTC3851 can only be synchronized to an external clock whose frequency is within range of the LTC3851’s internal VCO.This is guaranteed to be between 250kHz and 750kHz. A simplified block diagram is shown in Figure 8. If the external clock frequency is greater than the internal oscillator’s frequency, fOSC , then current is sunk continuously from the phase detector output, pulling down the FREQ/PLLFLTR pin. When the external clock frequency is less than fOSC , current is sourced continuously, pulling up the FREQ/PLLFLTR pin. If the external and internal frequencies are the same but exhibit a phase difference, the current sources turn on for an amount of time corresponding to the phase difference. The voltage on the FREQ/PLLFLTR pin is adjusted until the phase and frequency of the internal and external oscillators are identical. At the stable operating point, the phase detector output is high impedance and the filter capacitor CLP holds the voltage. 650 2.7V RLP 600 CLP 550 500 FREQ/PLLFLTR MODE/ PLLIN 450 400 EXTERNAL OSCILLATOR 350 DIGITAL PHASE/ FREQUENCY DETECTOR VCO 300 250 20 40 60 80 100 RFREQ (k) 120 140 160 3851 F07 3851 F08 Figure 7. Relationship Between Oscillator Frequency and Resistor Connected Between FREQ/PLLFLTR and GND Figure 8. Phase-Locked Loop Block Diagram 3851fb 19 LTC3851 APPLICATIONS INFORMATION The loop filter components, CLP and RLP, smooth out the current pulses from the phase detector and provide a stable input to the voltage-controlled oscillator. The filter components CLP and RLP determine how fast the loop acquires lock. Typically RLP is 1k to 10k and CLP is 2200pF to 0.01μF. When the external oscillator is active before the LTC3851 is enabled, the internal oscillator frequency will track the external oscillator frequency as described in the preceding paragraphs. In situations where the LTC3851 is enabled before the external oscillator is active, a low free-running oscillator frequency of approximately 50kHz will result. It is possible to increase the free-running, pre-synchronization frequency by adding a second resistor in parallel with RLP and CLP. The second resistor will also cause a phase difference between the internal and external oscillator signals. The magnitude of the phase difference is inversely proportional to the value of the second resistor. The external clock (on MODE/PLLIN pin) input high threshold is nominally 1.6V, while the input low threshold is nominally 1.2V. Minimum On-Time Considerations Minimum on-time tON(MIN) is the smallest time duration that the LTC3851 is capable of turning on the top MOSFET. It is determined by internal timing delays and the gate charge required to turn on the top MOSFET. Low duty cycle applications may approach this minimum on-time limit and care should be taken to ensure that: tON(MIN) < VOUT VIN (f) If the duty cycle falls below what can be accommodated by the minimum on-time, the controller will begin to skip cycles. The output voltage will continue to be regulated, but the ripple voltage and current will increase. The minimum on-time for the LTC3851 is approximately 90ns. However, as the peak sense voltage decreases the minimum on-time gradually increases. This is of particular concern in forced continuous applications with low ripple current at light loads. If the duty cycle drops below the minimum on-time limit in this situation, a significant amount of cycle skipping can occur with correspondingly larger current and voltage ripple. Efficiency Considerations The percent efficiency of a switching regulator is equal to the output power divided by the input power times 100%. It is often useful to analyze individual losses to determine what is limiting the efficiency and which change would produce the most improvement. Percent efficiency can be expressed as: %Efficiency = 100% – (L1 + L2 + L3 + ...) where L1, L2, etc. are the individual losses as a percentage of input power. Although all dissipative elements in the circuit produce losses, four main sources usually account for most of the losses in LTC3851 circuits: 1) IC VIN current, 2) INTVCC regulator current, 3) I2R losses, 4) topside MOSFET transition losses. 1. The VIN current is the DC supply current given in the Electrical Characteristics table, which excludes MOSFET driver current. VIN current typically results in a small (1μF) supply bypass capacitors. The discharged bypass capacitors are effectively put in parallel with COUT, causing a rapid drop in VOUT. No regulator can alter its delivery of current quickly enough to prevent this sudden step change in output voltage if the load switch resistance is low and it is driven quickly. If the ratio of 3851fb 21 LTC3851 APPLICATIONS INFORMATION CLOAD to COUT is greater than 1:50, the switch rise time should be controlled so that the load rise time is limited to approximately 25 • CLOAD. Thus a 10μF capacitor would require a 250μs rise time, limiting the charging current to about 200mA. 2. Does the VFB pin connect directly to the feedback resistors? The resistive divider R1, R2 must be connected between the (+) plate of COUT and signal ground. The 47pF to 100pF capacitor should be as close as possible to the LTC3851. Be careful locating the feedback resistors too far away from the LTC3851. The VFB line should not be routed close to any other nodes with high slew rates. PC Board Layout Checklist When laying out the printed circuit board, the following checklist should be used to ensure proper operation of the LTC3851. These items are also illustrated graphically in the layout diagram of Figure 9. Check the following in your layout: 3. Are the SENSE– and SENSE+ leads routed together with minimum PC trace spacing? The filter capacitor between SENSE+ and SENSE– should be as close as possible to the LTC3851. Ensure accurate current sensing with Kelvin connections as shown in Figure 10. Series resistance can be added to the SENSE lines to increase noise rejection and to compensate for the ESL of RSENSE. 1. Are the board signal and power grounds segregated? The LTC3851 GND pin should tie to the ground plane close to the input capacitor(s). The low current or signal ground lines should make a single point tie directly to the GND pin. The synchronous MOSFET source pins should connect to the input capacitor(s) ground. + 1 RFREQ 2 MODE/PLLIN SW FREQ/PLLFLTR TG 16 15 M1 CIN + 0.1μF CB 3 RUN VIN LTC3851 CSS 4 RC BOOST 14 CC TK/SS VIN 13 DB CC2 5 ITH INTVCC VFB BG 12 47pF 6 7 SENSE– GND 8 SENSE+ ILIM 11 + M2 4.7μF 10 – 1000pF 10Ω 9 L1 10Ω – R1 COUT + R2 VOUT RSENSE 3851 F09 + Figure 9. LTC3851 Layout Diagram 3851fb 22 LTC3851 APPLICATIONS INFORMATION gest noise pick-up at the current or voltage sensing inputs or inadequate loop compensation. Overcompensation of the loop can be used to tame a poor PC layout if regulator bandwidth optimization is not required. HIGH CURRENT PATH 3851 F10 SENSE+ SENSE– CURRENT SENSE RESISTOR (RSENSE) Figure 10. Kelvin Sensing RSENSE 4. Does the (+) terminal of CIN connect to the drain of the topside MOSFET(s) as closely as possible? This capacitor provides the AC current to the MOSFET(s). 5. Is the INTVCC decoupling capacitor connected closely between INTVCC and GND? This capacitor carries the MOSFET driver peak currents. An additional 1μF ceramic capacitor placed immediately next to the INTVCC and GND pins can help improve noise performance. 6. Keep the switching node (SW), top gate node (TG) and boost node (BOOST) away from sensitive small-signal nodes, especially from the voltage and current sensing feedback pins. All of these nodes have very large and fast moving signals and therefore should be kept on the “output side” (Pin 9 to Pin 16) of the LTC3851EGN and occupy minimum PC trace area. PC Board Layout Debugging It is helpful to use a DC-50MHz current probe to monitor the current in the inductor while testing the circuit. Monitor the output switching node (SW pin) to synchronize the oscilloscope to the internal oscillator and probe the actual output voltage as well. Check for proper performance over the operating voltage and current range expected in the application. The frequency of operation should be maintained over the input voltage range down to dropout and until the output load drops below the low current operation threshold—typically 10% of the maximum designed current level in Burst Mode operation. The duty cycle percentage should be maintained from cycle to cycle in a well designed, low noise PCB implementation. Variation in the duty cycle at a subharmonic rate can sug- Reduce VIN from its nominal level to verify operation of the regulator in dropout. Check the operation of the undervoltage lockout circuit by further lowering VIN while monitoring the outputs to verify operation. Investigate whether any problems exist only at higher output currents or only at higher input voltages. If problems coincide with high input voltages and low output currents, look for capacitive coupling between the BOOST, SW, TG and possibly BG connections and the sensitive voltage and current pins. The capacitor placed across the current sensing pins needs to be placed immediately adjacent to the pins of the IC. This capacitor helps to minimize the effects of differential noise injection due to high frequency capacitive coupling. If problems are encountered with high current output loading at lower input voltages, look for inductive coupling between CIN, the Schottky and the top MOSFET to the sensitive current and voltage sensing traces. In addition, investigate common ground path voltage pickup between these components and the GND pin of the IC. Design Example As a design example, assume VIN = 12V (nominal), VIN = 22V (maximum), VOUT = 1.8V, IMAX = 5A, and f = 250kHz. Refer to Figure 13. The inductance value is chosen first based on a 30% ripple current assumption. The highest value of ripple current occurs at the maximum input voltage. Connect a 160k resistor between the FREQ/PLLFLTR and GND pins, generating 250kHz operation. The minimum inductance for 30% ripple current is: ΔIL = ⎛ V ⎞ 1 VOUT ⎜1− OUT ⎟ VIN ⎠ ( f) (L) ⎝ A 4.7μH inductor will produce 28% ripple current and a 3.3μH will result in 40%. The peak inductor current will be the maximum DC value plus one-half the ripple current, or 6A, for the 3.3μH value. Increasing the ripple 3851fb 23 LTC3851 APPLICATIONS INFORMATION current will also help ensure that the minimum on-time of 90ns is not violated. The minimum on-time occurs at maximum VIN: tON(MIN) = VOUT VIN(MAX) ( f ) = 1.8V = 327ns 22V ( 250kHz ) The RSENSE resistor value can be calculated by connecting ILIM to INTVCC and using the maximum current sense voltage specification with some accommodation for tolerances. Tie ILIM to INTVCC. RSENSE ≤ 75mV = 0.0125Ω, so 0.01Ω is selected 6A Choosing 1% resistors: R1 = 25.5k and R2 = 32.4k yields an output voltage of 1.816V. The power dissipation on the topside MOSFET can be easily estimated. Choosing a Fairchild FDS6982S dual MOSFET results in: RDS(ON) = 0.035Ω/0.022Ω, CMILLER = 215pF. At maximum input voltage with T (estimated) = 50°C: A short-circuit to ground will result in a folded back current of: ISC = 29mV 1 ⎛ 90ns ( 22V ) ⎞ – ⎜ = 2.02A 0.0125Ω 2 ⎝ 3.3µH ⎟⎠ with a typical value of RDS(ON) and δ = (0.005/°C)(25°C) = 0.125. The resulting power dissipated in the bottom MOSFET is: 22V (2.02A )2 (1.125)(0.022Ω) 22V = 101.0mW PSYNC = which is less than under full-load conditions. CIN is chosen for an RMS current rating of at least 3A at temperature. COUT is chosen with an ESR of 0.02Ω for low output ripple. The output ripple in continuous mode will be highest at the maximum input voltage. The output voltage ripple due to ESR is approximately: VORIPPLE = RESR (ΔIL) = 0.02Ω (2A) = 40mVP-P 1.8V 2 PMAIN = (5) ⎡⎣1+ (0.005)(50°C − 25°C)⎤⎦ • 22V ⎞ (0.035Ω) + (22V )2 ⎛⎜⎝ 5A (2Ω)(215pF ) • 2 ⎟⎠ 1 ⎤ ⎡ 1 ⎢ 5 − 2.3 + 2.3 ⎥ ( 250kHz ) = 185mW ⎣ ⎦ 3851fb 24 LTC3851 TYPICAL APPLICATIONS VIN 4.5V TO 32V MODE/PLLIN VIN + RFREQ 82.5k FREQ/PLLFLTR C20 0.1μF CSS 0.1μF RUN CB 0.1μF CIN 22μF BOOST L1 0.68μH LTC3851 TK/SS CC RC 2200pF 15k TG M1 HAT2170H DB CMDSH05-4 ITH INTVCC R27 3.01k C15 47pF R2 154k 1% 4.7μF VFB 30.1k VOUT 3.3V 15A SW CC2 330pF M2 HAT2170H BG SENSE– GND SENSE+ ILIM R1 48.7k 1% + COUT 330μF s2 C5 0.047μF COUT: SANYO 6TPE330MIL CIN: SANYO 63HVH22M L1: VISHAY IHLP5050-EZERR68MO1 3851 F11 Figure 11. High Efficiency 3.3V/15A Step-Down Converter VIN 6V TO 14V C2 0.01μF R5 10k PLLIN 350kHz MODE/PLLIN VIN FREQ/PLLFLTR CSS 0.1μF C1 1000pF RUN CC2 100pF CB 0.1μF M1 RJK0305DPB CIN 180μF BOOST L1 0.68μH LTC3851 TK/SS CC RC 1000pF 7.5k TG + ITH SW RSENSE 0.002Ω DB CMDSH-3 C10 33pF INTVCC R2 43.2k 1% 4.7μF VFB BG SENSE– GND SENSE+ ILIM M2 RJK0301DPB R1 20k 1% VOUT 1.5V 15A + COUT 330μF s2 1000pF R22 10Ω COUT: SANYO 2R5TPE330M9 L1: SUMIDA CEP125-OR6MC R20 10Ω 3851 F12 Figure 12. 1.5V/15A Synchronized at 350kHz 3851fb 25 LTC3851 PACKAGE DESCRIPTION GN Package 16-Lead Plastic SSOP (Narrow .150 Inch) (Reference LTC DWG # 05-08-1641) .189 – .196* (4.801 – 4.978) .045 p.005 16 15 14 13 12 11 10 9 .254 MIN .009 (0.229) REF .150 – .165 .229 – .244 (5.817 – 6.198) .0165 p.0015 .150 – .157** (3.810 – 3.988) .0250 BSC RECOMMENDED SOLDER PAD LAYOUT 1 .015 p .004 s 45o (0.38 p 0.10) .007 – .0098 (0.178 – 0.249) .0532 – .0688 (1.35 – 1.75) 2 3 4 5 6 7 8 .004 – .0098 (0.102 – 0.249) 0o – 8o TYP .016 – .050 (0.406 – 1.270) NOTE: 1. CONTROLLING DIMENSION: INCHES INCHES 2. DIMENSIONS ARE IN (MILLIMETERS) .008 – .012 (0.203 – 0.305) TYP .0250 (0.635) BSC GN16 (SSOP) 0204 3. DRAWING NOT TO SCALE *DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE **DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE 3851fb 26 LTC3851 PACKAGE DESCRIPTION MSE Package 16-Lead Plastic MSOP, Exposed Die Pad (Reference LTC DWG # 05-08-1667 Rev A) BOTTOM VIEW OF EXPOSED PAD OPTION 2.845 p 0.102 (.112 p .004) 5.23 (.206) MIN 2.845 p 0.102 (.112 p .004) 0.889 p 0.127 (.035 p .005) 8 1 1.651 p 0.102 (.065 p .004) 1.651 p 0.102 3.20 – 3.45 (.065 p .004) (.126 – .136) 0.305 p 0.038 (.0120 p .0015) TYP 16 0.50 (.0197) BSC 4.039 p 0.102 (.159 p .004) (NOTE 3) RECOMMENDED SOLDER PAD LAYOUT 0.254 (.010) 0.35 REF 0.12 REF DETAIL “B” CORNER TAIL IS PART OF DETAIL “B” THE LEADFRAME FEATURE. FOR REFERENCE ONLY 9 NO MEASUREMENT PURPOSE 0.280 p 0.076 (.011 p .003) REF 16151413121110 9 DETAIL “A” 0o – 6o TYP 3.00 p 0.102 (.118 p .004) (NOTE 4) 4.90 p 0.152 (.193 p .006) GAUGE PLANE 0.53 p 0.152 (.021 p .006) 1234567 8 DETAIL “A” 1.10 (.043) MAX 0.18 (.007) SEATING PLANE 0.17 – 0.27 (.007 – .011) TYP 0.86 (.034) REF 0.1016 p 0.0508 (.004 p .002) 0.50 (.0197) BSC NOTE: 1. DIMENSIONS IN MILLIMETER/(INCH) 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX MSOP (MSE16) 0608 REV A UD Package 16-Lead Plastic QFN (3mm × 3mm) (Reference LTC DWG # 05-08-1691) BOTTOM VIEW—EXPOSED PAD 3.00 p 0.10 (4 SIDES) 0.70 p0.05 15 PIN 1 TOP MARK (NOTE 6) 1 PACKAGE OUTLINE 0.25 p0.05 0.50 BSC 16 0.40 p 0.10 1.45 p 0.10 (4-SIDES) 3.50 p 0.05 1.45 p 0.05 2.10 p 0.05 (4 SIDES) PIN 1 NOTCH R = 0.20 TYP OR 0.25 s 45o CHAMFER R = 0.115 TYP 0.75 p 0.05 2 (UD16) QFN 0904 0.200 REF 0.00 – 0.05 0.25 p 0.05 0.50 BSC RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS NOTE: 1. DRAWING CONFORMS TO JEDEC PACKAGE OUTLINE MO-220 VARIATION (WEED-2) 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 3851fb Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 27 LTC3851 TYPICAL APPLICATION VIN 4.5V TO 22V MODE/PLLIN VIN + RFREQ 160k FREQ/PLLFLTR 0.1μF CSS 0.1μF RUN CC2 220pF CB 0.1μF M1A FDS6982S BOOST L1 3.3μH LTC3851 TK/SS CC RC 470pF 33k TG SW ITH INTVCC VFB BG CIN 22μF 25V RSENSE 0.01Ω VOUT 1.8V 5A DB CMDSH-3 R2 32.4k 1% 4.7μF SENSE– GND SENSE+ ILIM M1B FDS6982S COUT 150μF 6.3V s2 PANASONIC SP + R1 25.5k 1% 1000pF 10Ω COUT: PANASONIC EEFUEOG151R CIN: MARCON THCR70LE1H226ZT L1: PANASONIC ETQP6F3R3HFA RSENSE: IRC LR 2010-01-R010F 10Ω 3851 F13 Figure 13. 1.8V/5A Converter from Design Example with Pulse Skip Operation RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LTC3727A-1 Dual, 2-Phase Synchronous Controller Very Low Dropout, VOUT ≤ 14V LTC3728 2-Phase 550kHz, Dual Synchronous Step-Down Controller QFN and SSOP Packages ® LTC3729/ LTC3729L-6 20A to 200A PolyPhase Synchronous Controllers Expandable from 2-Phase to 12-Phase, Uses All Surface Mount Components, No Heat Sink LTC3731 3-Phase, 600kHz Synchronous Step-Down Controller 0.6V ≤ VOUT ≤ 6V, 4.5V ≤ VIN ≤ 32V, IOUT ≤ 60A, Integrated MOSFET Drivers LTC3810 100V Current Mode Synchronous Nonisolated Switching Regulator Controller 6.2V ≤ VIN ≤ 100V, 0.8V ≤ VOUT ≤ 0.9VIN, No RSENSE, Tracking and Synchronizable LTC3811 Dual, PolyPhase Synchronous Step-Down Controller, 20A to 200A Differential Remote Sense Amplifier, RSENSE or DCR Current Sense LTC3826/LTC3826-1 Low IQ Dual Synchronous Step-Down Controllers 4V ≤ VIN ≤ 36V, 0.8V ≤ VOUT ≤ 10V, 30μA Quiescent Current LTC3834/LTC3834-1 Low IQ Synchronous Step-Down Controllers Single Channel LTC3826/LTC3826-1 LT 3845 Low IQ Synchronous Step-Down Controller 4V ≤ VIN ≤ 60V, 1.23V ≤ VOUT ≤ 36V, 120μA Quiescent Current LTC3850/LTC3850-1/ LTC3850-2 Dual, 2-Phase Synchronous Step-Down Controller RSENSE or DCR Current Sensing, Tracking and Synchronizable LTC3853 Triple Output, Multiphase Synchronous Step-Down Controller RSENSE or DCR Current Sensing, Tracking and Synchronizable LTC3878 No RSENSE Wide Input Range Constant On-Time Synchronous Step-Down Controller Up to 97% Efficiency, 4V ≤ VIN ≤ 38V, 0.8V ≤ VOUT ≤ (0.9)(VIN), IOUT Up to 20A LTM4600HV 10A Complete Switch Mode Power Supply 92% Efficiency, VIN: 4.5V to 28V, True Current Mode Control, Ultrafast™ Transient Response LTM4601AHV 12A Complete Switch Mode Power Supply 92% Efficiency, VIN: 4.5V to 28V, True Current Mode Control, Ultrafast Transient Response ® PolyPhase is a registered trademark of Linear Technology Corporation. No RSENSE and Ultrafast are trademarks of Linear Technology Corporation. 3851fb 28 Linear Technology Corporation LT 0409 REV B • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com © LINEAR TECHNOLOGY CORPORATION 2008