LTC4364-1/LTC4364-2
Surge Stopper with Ideal Diode
FEATURES
DESCRIPTION
Wide Operating Voltage Range: 4V to 80V
Withstands Surges Over 80V with VCC Clamp
n Adjustable Output Clamp Voltage
n Ideal Diode Controller Holds Up Output Voltage
During Input Brownouts
n Reverse Input Protection to –40V
n Reverse Output Protection to –20V
n Overcurrent Protection
n Low 10μA Shutdown Current at 12V
n Adjustable Fault Timer
n 0.1% Retry Duty Cycle During Faults (LTC4364-2)
n Available in 4mm × 3mm 14-Lead DFN, 16-Lead MSOP,
and 16-Lead SO Packages
n AEC-Q100 Qualified for Automotive Applications
The LTC®4364 surge stopper with ideal diode controller
protects loads from high voltage transients. It limits and
regulates the output during an overvoltage event, such
as load dump in automobiles, by controlling the voltage
drop across an external N-channel MOSFET pass device.
The LTC4364 also includes a timed, current limited circuit
breaker. In a fault condition, an adjustable fault timer must
expire before the pass device is turned off. The LTC4364-1
latches off the pass device while the LTC4364-2 automatically restarts after a delay. The LTC4364 precisely monitors the input supply for overvoltage (OV) and undervoltage (UV) conditions. The external MOSFET is held off in
undervoltage and auto-retry is disabled in overvoltage.
n
n
An integrated ideal diode controller drives a second
MOSFET to replace a Schottky diode for reverse input
protection and output voltage holdup. The LTC4364 controls the forward voltage drop across the MOSFET and
minimizes reverse current transients upon power source
failure, brownout or input short.
APPLICATIONS
Automotive/Avionic Surge Protection
Hot Swap/Live Insertion
n Redundant Supply ORing
n Output Port Protection
n
n
All registered trademarks and trademarks are the property of their respective owners.
TYPICAL APPLICATION
Overvoltage Protector Regulates
Output at 27V During Input Transient
4A, 12V Overvoltage Output Regulator with Ideal Diode
Withstands 200V 1ms Transient at VIN
FDB33N25
VIN
12V
2.2k 6.8nF
VCC
SHDN
OV
60V
10mΩ
+
383k
CMZ5945B
68V
UV
6V
FDB3682
22µF
VOUT
CLAMPED
AT 27V
10Ω
OUT
FB
ENABLE
FAULT
FLT
TMR
27V CLAMP (ADJUSTABLE)
50ms/DIV
102k
ENOUT
OV
GND
12V
4364 TA01b
Ideal Diode Holds Up Output
During Input Short
4.99k
LTC4364
90.9k
CTMR = 6.8µF
ILOAD = 0.5A
VIN
20V/DIV
VOUT
20V/DIV 12V
HGATE SOURCE DGATE SENSE
UV
10k
92V INPUT SURGE
12V
VIN
10V/DIV
INPUT SHORTED
TO GND
CLOAD = 6300µF
ILOAD = 0.5A
436412 TA01a
0.22µF
VOUT 12V
10V/DIV
OUTPUT HELD UP
1ms/DIV
Document Feedback
For more information www.analog.com
4364 TA01c
Rev. A
1
LTC4364-1/LTC4364-2
ABSOLUTE MAXIMUM RATINGS (Notes 1, 2)
Supply Voltage: VCC .................................. –40V to 100V
SOURCE, OV, UV, SHDN Voltages.............. –40V to 100V
DGATE, HGATE Voltages
(Note 3)...................... SOURCE – 0.3V to SOURCE + 10V
ENOUT, FLT Voltages................................. –0.3V to 100V
OUT, SENSE Voltages.................................–20V to 100V
Voltage Difference (SENSE to OUT)............. –30V to 30V
Voltage Difference (OUT to VCC)...............–100V to 100V
Voltage Difference (SENSE to SOURCE)...–100V to 100V
FB, TMR Voltages...................................... –0.3V to 5.5V
Operating Ambient Temperature Range
LTC4364C................................................. 0°C to 70°C
LTC4364I..............................................–40°C to 85°C
LTC4364H........................................... –40°C to 125°C
Storage Temperature Range................... –65°C to 150°C
Lead Temperature (Soldering, 10 sec)
MS, SO Packages.............................................. 300°C
PIN CONFIGURATION
TOP VIEW
TOP VIEW
OUT
1
14 FB
SENSE
2
13 TMR
DGATE
3
12 ENOUT
SOURCE
4
15
11 FLT
HGATE
5
10 GND
VCC
6
9 OV
SHDN
7
8 UV
OUT 1
TOP VIEW
OUT
SENSE
NC
DGATE
SOURCE
HGATE
NC
VCC
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
FB
TMR
ENOUT
FLT
GND
OV
UV
SHDN
MS PACKAGE
16-LEAD PLASTIC MSOP
TJMAX = 150°C, θJA = 120°C/W
DE PACKAGE
14-LEAD (4mm × 3mm) PLASTIC DFN
TJMAX = 150°C, θJA = 45°C/W
EXPOSED PAD (PIN 15) PCB GND CONNECTION OPTIONAL
SENSE 2
NC 3
DGATE 4
SOURCE 5
16 FB
15 TMR
14 ENOUT
13 FLT
12 GND
HGATE 6
11 OV
NC 7
10 UV
VCC 8
9
SHDN
S PACKAGE
16-LEAD PLASTIC SO
TJMAX = 150°C, θJA = 100°C/W
ORDER INFORMATION
TUBE
TAPE AND REEL
PART MARKING*
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LTC4364CDE-1#PBF
LTC4364CDE-1#TRPBF
43641
14-Lead (4mm × 3mm) Plastic DFN
0°C to 70°C
LTC4364IDE-1#PBF
LTC4364IDE-1#TRPBF
43641
14-Lead (4mm × 3mm) Plastic DFN
–40°C to 85°C
LTC4364HDE-1#PBF
LTC4364HDE-1#TRPBF
43641
14-Lead (4mm × 3mm) Plastic DFN
–40°C to 125°C
LTC4364CDE-2#PBF
LTC4364CDE-2#TRPBF
43642
14-Lead (4mm × 3mm) Plastic DFN
0°C to 70°C
LTC4364IDE-2#PBF
LTC4364IDE-2#TRPBF
43642
14-Lead (4mm × 3mm) Plastic DFN
–40°C to 85°C
LTC4364HDE-2#PBF
LTC4364HDE-2#TRPBF
43642
14-Lead (4mm × 3mm) Plastic DFN
–40°C to 125°C
LTC4364CMS-1#PBF
LTC4364CMS-1#TRPBF
43641
16-Lead Plastic MSOP
0°C to 70°C
LTC4364IMS-1#PBF
LTC4364IMS-1#TRPBF
43641
16-Lead Plastic MSOP
–40°C to 85°C
LTC4364HMS-1#PBF
LTC4364HMS-1#TRPBF
43641
16-Lead Plastic MSOP
–40°C to 125°C
LTC4364CMS-2#PBF
LTC4364CMS-2#TRPBF
43642
16-Lead Plastic MSOP
0°C to 70°C
LTC4364IMS-2#PBF
LTC4364IMS-2#TRPBF
43642
16-Lead Plastic MSOP
–40°C to 85°C
LTC4364HMS-2#PBF
LTC4364HMS-2#TRPBF
43642
16-Lead Plastic MSOP
–40°C to 125°C
LTC4364CS-1#PBF
LTC4364CS-1#TRPBF
LTC4364S-1
16-Lead Plastic SO
0°C to 70°C
LTC4364IS-1#PBF
LTC4364IS-1#TRPBF
LTC4364S-1
16-Lead Plastic SO
–40°C to 85°C
LTC4364HS-1#PBF
LTC4364HS-1#TRPBF
LTC4364S-1
16-Lead Plastic SO
–40°C to 125°C
LTC4364CS-2#PBF
LTC4364CS-2#TRPBF
LTC4364S-2
16-Lead Plastic SO
0°C to 70°C
2
Rev. A
For more information www.analog.com
LTC4364-1/LTC4364-2
ORDER INFORMATION
TUBE
TAPE AND REEL
PART MARKING*
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LTC4364IS-2#PBF
LTC4364IS-2#TRPBF
LTC4364S-2
16-Lead Plastic SO
–40°C to 85°C
LTC4364HS-2#PBF
LTC4364HS-2#TRPBF
LTC4364S-2
16-Lead Plastic SO
–40°C to 125°C
LTC4364IMS-1#WPBF
LTC4364IMS-1#WTRPBF
43641
16-Lead Plastic MSOP
–40°C to 85°C
LTC4364HMS-1#WPBF
LTC4364HMS-1#WTRPBF 43641
16-Lead Plastic MSOP
–40°C to 125°C
LTC4364IMS-2#WPBF
LTC4364IMS-2#WTRPBF
43642
16-Lead Plastic MSOP
–40°C to 85°C
LTC4364HMS-2#WPBF
LTC4364HMS-2#WTRPBF 43642
16-Lead Plastic MSOP
–40°C to 125°C
AUTOMOTIVE PRODUCTS**
Contact the factory for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Tape and reel specifications. Some packages are available in 500 unit reels through designated sales channels with #TRMPBF suffix.
**Versions of this part are available with controlled manufacturing to support the quality and reliability requirements of automotive applications. These models
are designated with a #W suffix. Only the automotive grade products shown are available for use in automotive applications. Contact your local Analog
Devices account representative for specific product ordering information and to obtain the specific Automotive Reliability reports for these models.
ELECTRICAL
CHARACTERISTICS
The
l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VCC = 12V.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
80
V
l
370
750
µA
VCC
Operating Supply Range
ICC
Supply Current
VCC = SOURCE = SENSE = OUT = 12V, No Fault
ICC(SHDN)
Supply Current in Shutdown
Shutdown
l
10
50
μA
ICC(REV)
Reverse Input Current
VCC = −30V
l
0
–10
μA
∆VHGATE
HGATE Gate Drive, (VHGATE − VSOURCE)
VCC = 4V, DGATE Low, IHGATE = 0µA, −1µA
VCC = 8V to 80V, DGATE Low, IHGATE = 0µA, −1µA
l
l
5
10
7
12
9
16
V
V
IHGATE(UP)
HGATE Pull-Up Current
VCC = HGATE = DGATE = SOURCE = 12V
l
–10
–20
–30
IHGATE(DN)
HGATE Pull-Down Current
Overvoltage: FB = 1.5V, ∆VHGATE = 5V
l
60
130
Overcurrent: ∆VSNS = 100mV, ∆VHGATE = 5V
l
60
130
mA
Shutdown/Fault Turn-Off: ∆VHGATE = 5V
l
0.4
1
mA
l
4
Surge Stopper
ISRC
SOURCE Input Current
VCC = SOURCE = SENSE = OUT = 12V
VCC = SOURCE = 12V, Shutdown
VSOURCE = –30V
l
l
l
VFB
FB Servo Voltage
VCC = 12V to 80V
l
µA
mA
18
32
–2.0
40
90
–3.5
µA
µA
mA
1.22
1.25
1.28
V
0
±1
µA
45
43
18
50
50
25
55
57
32
mV
mV
mV
55
–2
110
–4
µA
mA
IFB
FB Input Current
FB = 1.25V
l
∆VSNS
Overcurrent Fault Threshold,
(VSENSE – VOUT)
VCC = 4V to 80V, OUT = 2.5V to VCC, 0°C to 125°C
VCC = 4V to 80V, OUT = 2.5V to VCC, –40°C to 125°C
VCC = 4V to 80V, OUT = 0V to 1.5V
l
l
l
ISNS
SENSE Input Current
SENSE = VCC = SOURCE = OUT = 12V
SENSE = –15V
l
l
ITMR(UP)
TMR Pull-Up Current, Overvoltage
TMR = 1V, FB = 1.5V, VCC – OUT = 0.5V
TMR = 1V, FB = 1.5V, VCC – OUT = 75V
l
l
–1.3
–40
–2.2
–50
–3
–60
µA
µA
TMR Pull-Up Current, Overcurrent
TMR = 1V, ∆VSNS = 60mV, VCC – OUT = 0.5V
TMR = 1V, ∆VSNS = 60mV, VCC – OUT = 75V
l
l
–6
–210
–10
–260
–14
–310
µA
µA
TMR Pull-Up Current, Warning
TMR = 1.3V, FB = 1.5V, VCC – OUT = 0.5V
l
–3
–5
–7
µA
TMR Pull-Up Current, Retry
TMR = 1V, FB = 1.5V
l
–1.3
–2
–3
µA
TMR Pull-Down Current
TMR = 1V, FB = 1.5V, Retry
Shutdown
l
l
1.1
0.3
2
0.75
2.7
1.5
µA
mA
ITMR(DN)
Rev. A
For more information www.analog.com
3
LTC4364-1/LTC4364-2
ELECTRICAL
CHARACTERISTICS
The
l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VCC = 12V.
SYMBOL
PARAMETER
CONDITIONS
VTMR(F)
TMR Fault Threshold
FLT Falling, VCC = 4V to 80V
l
MIN
TYP
MAX
UNITS
1.22
1.25
1.28
V
VTMR(G)
TMR Gate Off Threshold
HGATE Falling, VCC = 4V to 80V
l
1.32
1.35
1.38
V
VTMR(R)
TMR Retry Threshold
HGATE Rising (After 32 Cycles), VCC = 4V to 80V
l
0.125
0.15
0.175
V
∆VTMR
Early Warning Timer Window
VTMR(G) – VTMR(F), VCC = 4V to 80V
l
75
100
125
mV
VUV
UV Input Threshold
UV Falling, VCC = 4V to 80V
l
1.22
1.25
1.28
V
VUV(HYST)
UV Input Hysteresis
l
25
50
80
mV
VUV(RST)
UV Reset Threshold
UV Falling, VCC = 4V to 80V, LTC4364-1 Only
l
0.5
0.6
0.7
V
VOV
OV Input Threshold
OV Rising, VCC = 4V to 80V
l
1.22
1.25
1.28
VOV(HYST)
OV Input Hysteresis
IIN
UV, OV Input Current
UV, OV = 1.25V
UV, OV = –30V
l
l
0
–0.3
±1
–0.6
µA
mA
VOL
ENOUT, FLT Output Low
ISINK = 0.25mA
ISINK = 2mA
l
l
0.1
0.5
0.3
1.3
V
V
ILEAK
ENOUT, FLT Leakage Current
ENOUT, FLT = 80V
l
0
±2.5
µA
∆VOUT(TH)
OUT High Threshold (VCC – VOUT)
ENOUT from Low to High
l
0.4
0.7
1
V
VOUT(RST)
OUT Reset Threshold
ENOUT from High to Low
l
1.4
2.2
3
V
IOUT
OUT Input Current
VCC = OUT = 12V, SHDN Open
OUT = –15V
l
l
40
–4
80
–8
µA
mA
Output Current in Shutdown, ISNS + IOUT
VCC = SOURCE = SENSE = OUT = 12V, Shutdown
l
VSHDN
SHDN Input Threshold
VCC = 4V to 80V
l
0.5
VSHDN(FLT)
SHDN Pin Float Voltage
VCC = 12V to 80V
l
ISHDN
SHDN Input Current
SHDN = 0.5V
Maximum Allowable Leakage, VCC = 4V
SHDN = –30V
l
12
V
mV
12
40
µA
1.6
2.2
V
2.3
4
6.5
V
–1
l
–3.3
–1.5
–120
–300
µA
µA
µA
FB = 1.5V, VCC = 80V, OUT = 16V
∆VSNS = 60mV, VCC – OUT = 12V
l
l
0.125
0.075
0.2
0.12
%
%
tOFF,HGATE(UV) Undervoltage to HGATE Low
Propagation Delay
UV Steps from 1.5V to 1V
l
1.3
4
μs
tOFF,HGATE(OV) Overvoltage to HGATE Low
Propagation Delay
FB Steps from 1V to 1.5V
l
0.25
1
μs
tOFF,HGATE(OC) Overcurrent to HGATE Low
Propagation Delay
∆VSNS Steps from 0mV to 150mV, OUT = 0V
l
0.5
2
μs
D
Retry Duty Cycle, Overvoltage
Retry Duty Cycle, Output Short
Ideal Diode
ΔVDGATE
DGATE Gate Drive, (VDGATE − VSOURCE)
VCC = 4V, IDGATE = 0µA, −1µA, Fully On
VCC = 8V to 80V, IDGATE = 0µA, −1µA, Fully On
l
l
5
10
8.5
12
12
16
V
V
IDGATE(UP)
DGATE Pin Pull-Up Current
DGATE = SOURCE = VCC = 12V, ∆VSD = 0.1V
l
–5
–10
–15
µA
IDGATE(DN)
DGATE Pin Pull-Down Current
∆VDGATE = 5V, ∆VSD = –0.2V
∆VDGATE = 5V, Shutdown/Fault Turn-Off
l
l
60
0.4
130
1
∆VSD
Ideal Diode Regulation Voltage,
(VSOURCE − VSENSE)
∆VDGATE = 2.5V, VCC = SOURCE = 12V
∆VDGATE = 2.5V, VCC = SOURCE = 4V
l
l
10
24
30
48
45
72
mV
mV
tOFF(DGATE)
DGATE Turn-Off Propagation Delay
∆VSD Steps from 0.1V to –1V
l
0.35
1.5
μs
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
4
mA
mA
Note 2: All currents into device pins are positive and all currents out
of device pins are negative. All voltages are referenced to GND unless
otherwise specified.
Note 3: Internal clamps limit the HGATE and DGATE pins to a minimum
of 10V above the SOURCE pin. Driving these pins to voltages beyond the
clamp may damage the device.
Rev. A
For more information www.analog.com
LTC4364-1/LTC4364-2
TYPICAL PERFORMANCE CHARACTERISTICS
Supply Current vs VCC
VCC = SOURCE = SENSE = OUT
400
300
250
200
ISNS + IOUT
150
SHDN = 0
12
OUT = 0
40
30
20
OUT = VCC
10
50
0
10
20
30
40
50
60
0
80
70
20
10
0
30
40 50
VCC (V)
60
OUT = 0
8
OUT = 12V
6
ISNS + IOUT in Shutdown vs VCC
100
70
0
–50 –25
80
–24
SOURCE = VCC
20
20
30
40
∆VHGATE (V)
IGATE(UP) (µA)
50
–8
–4
SNS = OUT = 12V
10
DGATE
10
9
60
70
0
80
7
4
8
6
10
VCC (V)
12 20
VCC (V)
40
60
6
80
0
–10
–5
–15
436412 G05
436412 G06
∆VHGATE vs VIN in Figure 1
∆VDGATE vs IDGATE
VCC = 12V
13
–20
IHGATE (µA)
436412 G04
14
11
8
SNS = OUT = 24V
0
12
–16
–12
VCC = 12V
13
HGATE
40
125
∆VHGATE vs IHGATE
14
HGATE = DGATE = SOURCE = VCC
∆VSD = 100mV
–20
80
60
100
436412 G03
GATE Pull-Up Current vs VCC
SNS = OUT = 48V
75
50
25
TEMPERATURE (°C)
0
436412 G02
436412 G01
ISNS + IOUT IN SHUTDOWN (µA)
10
2
ISRC
VCC (V)
0
SHDN = 0
VCC = 12V
14
4
100
0
ICC(SHDN) vs Temperature
16
50
ICC
350
ICC(SHDN) (µA)
SUPPLY CURRENT (µA)
ICC(SHDN) vs VCC
60
ICC(SHDN) (µA)
450
∆VDGATE vs VIN in Figure 1
14
14
12
12
10
10
10
9
∆VDGATE (V)
11
∆VHGATE (V)
∆VDGATE (V)
12
8
6
4
7
6
0
–2
–6
–4
IDGATE (µA)
–8
–10
436412 G07
2
6
R4 IN FIGURE 1
0Ω
2.2k
4.7k
10k
8
4
8
12
16
VIN (V)
R4 IN FIGURE 1
0Ω
2.2k
4.7k
10k
4
24
20
8
436412 G08
2
4
8
12
16
VIN (V)
20
24
436412 G09
Rev. A
For more information www.analog.com
5
LTC4364-1/LTC4364-2
TYPICAL PERFORMANCE CHARACTERISTICS
HGATE Pull-Down Current
vs Temperature
175
150
125
100
125
50
25
75
0
TEMPERATURE (°C)
100
50
–50 –25
125
50
25
75
0
TEMPERATURE (°C)
100
10
125
–60
RETRY DUTY CYCLE (%)
ITMR(UP) (µA)
–150
–100
–50
30 40 50
VCC – VOUT (V)
60
70
0
80
0
10
20
30 40 50
VCC – VOUT (V)
60
70
35
∆VSD (mV)
∆VSD (mV)
VOL (V)
0
10
20
30 40 50
VCC – VOUT (V)
60
70
80
VCC = 4V
50
30
25
20
40
VCC = 12V
30
20
15
0
1
2
3
CURRENT (mA)
4
5
10
4
6
8
10
12
20
40
60
80
VCC (V)
436412 G16
6
0.2
60
40
1.00
0
OVERCURRENT CONDITION
OUT = 0V
0.3
Ideal Diode Regulation Voltage
vs Temperature
45
1.25
0.25
0.4
436412 G15
50
VCC = 12V
0.50
OVERVOLTAGE CONDITION
OUT = 16V
0.5
0
80
Ideal Diode Regulation Voltage
vs VCC
0.75
0.6
436412 G14
EN, FLT Output Low vs Current
3.5 4.0
0.1
436412 G13
1.50
3.0
0.7
–200
–10
20
1.5 2.0 2.5
VOUT (V)
0.8
OVERCURRENT CONDITION
OUT = 5V
–250 TMR = 1V
–20
1.0
Retry Duty Cycle vs VCC – VOUT
(LTC4364-2 Only)
–300
OVERVOLTAGE CONDITION
OUT = 5V
–50 TMR = 1V
–30
0.5
436412 G12
Overcurrent TMR Current
vs VCC – VOUT
–40
0
436412 G11
Overvoltage TMR Current
vs VCC – VOUT
10
30
20
436412 G10
0
40
100
75
50
–50 –25
ITMR(UP) (µA)
50
150
75
0
60
VSENSE – VSOURCE = 200mV
VCC = 12V
∆VDGATE = 5V
175
IDGATE(DN) (mA)
IHGATE(DN) (mA)
200
∆VSNS = 100mV OR FB = 1.5V
∆VHGATE = 5V
VCC = 12V
Overcurrent Threshold
vs OUT Voltage
∆VSNS (mV)
200
DGATE Pull-Down Current
vs Temperature
436412 G17
10
–50
–25
50
25
0
75
TEMPERATURE (°C)
100
125
436412 G18
Rev. A
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LTC4364-1/LTC4364-2
PIN FUNCTIONS
(DE/MS/S)
OUT (Pin 1/Pin 1/Pin 1): Output Voltage Sense Input.
This pin senses the voltage at the drain of the external
N-channel MOSFET connected to the DGATE pin. The
voltage difference between VCC and OUT sets the fault
timer current. When this difference drops below 0.7V,
the ENOUT pin goes high impedance. Bypass OUT with
at least 22μF low ESR electrolytic capacitor (Output
Bypassing section)
SENSE (Pin 2/Pin 2/Pin 2): Current Sense Input. Connect
this pin to the input side of the current sense resistor. The
current limit circuit controls the HGATE pin to limit the
sense voltage between the SENSE and OUT pins to 50mV
if OUT is above 2.5V. When OUT drops below 1.5V, the
sense voltage is reduced to 25mV for additional protection
during an output short. The sense amplifier also starts
a current source to charge up the TMR pin. The voltage
difference between SENSE and OUT must be limited to
less than 30V. Connect to OUT if unused.
DGATE (Pin 3/Pin 4/Pin 4): Diode Controller Gate Drive
Output. When the load current creates more than 30mV
of drop across the MOSFET, the DGATE pin is pulled high
by an internal charge pump current source and clamped
to 12V above the SOURCE pin. When the load current is
small, the DGATE pin is actively driven to maintain 30mV
across the MOSFET. If reverse current develops, a 130mA
fast pull-down circuit quickly connects the DGATE pin to
the SOURCE pin, turning off the MOSFET. DGATE is held
low even when VCC is not powered or drops below GND
if output is held high. For 24V or higher supplies, connect
a 15V Zener between DGATE and SOURCE. Connect to
SOURCE or leave open if unused.
SOURCE (Pin 4/Pin 5/Pin 5): Common Source Input
and Gate Drive Return. Connect this pin directly to the
sources of the external back-to-back N-channel MOSFETs.
SOURCE is the anode of the ideal diode and the voltage
sensed between this pin and the SENSE pin is used to
control the source-drain voltage across the N-channel
MOSFET (forward voltage of the ideal diode).
HGATE (Pin 5/Pin 6/Pin 6): Surge Stopper Gate Drive
Output. The HGATE pin is pulled up by an internal charge
pump current source and clamped to 12V above the
SOURCE pin. Both voltage and current amplifiers control
the HGATE pin to regulate the output voltage and limit the
current through the MOSFET. Connect a 6.8nF or larger
capacitor from HGATE to GND. For 24V or higher supply,
connect a 15V Zener between HGATE and SOURCE.
VCC (Pin 6/Pin 8/Pin 8): Positive Supply Voltage Input.
The positive supply input ranges from 4V to 80V for normal operation. It can also be pulled below ground potential
by up to 40V during a reverse battery condition, without
damaging the part. Shutting down the LTC4364 by pulling
the SHDN pin to ground reduces the VCC current to 10μA.
SHDN (Pin 7/Pin 9/Pin 9): Shutdown Control Input.
Pulling the SHDN pin below 0.5V shuts off the LTC4364
and reduces the VCC pin current to 10μA. Pull this pin
above 2.2V or disconnect it to allow the internal current
source to turn the part back on. When left open, the SHDN
voltage is internally clamped to 4V. The leakage current
to ground at the pin should be limited to no more than
1μA if no pull-up device is used to turn the part on. The
SHDN pin can be pulled up to 100V or below GND by 40V
without damage.
NC (Pins 3 and 7, MS and S Packages Only): No
Connection. Not internally connected. While these pins
can be connected to ground or any other voltage, leaving them open increases clearance to adjacent high
voltage pins.
UV (Pin 8/Pin 10/Pin 10): Undervoltage Comparator
Input. When the UV pin falls below its 1.25V threshold,
the HGATE pin is pulled down with a 1mA current. When
the UV pin rises above 1.25V plus the hysteresis, the
HGATE pin is pulled up by the internal charge pump. For
LTC4364-1, after HGATE is latched off, pulling the UV pin
below 0.6V resets the latch and allows HGATE to retry. If
unused, connect to the SHDN pin.
OV (Pin 9/Pin 11/Pin 11): Overvoltage Comparator Input.
When OV is above its threshold of 1.25V, the fault retry
function is inhibited. When OV falls below its threshold,
the HGATE pin is allowed to turn back on when fault conditions are cleared. At power-up, an OV voltage higher
than its threshold blocks turn-on of the external N-channel
MOSFET controlled by the HGATE pin (see Applications
Information). Connect to GND if unused.
Rev. A
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7
LTC4364-1/LTC4364-2
PIN FUNCTIONS
(DE/MS/S)
GND (Pin 10/Pin 12/Pin 12): Device Ground.
FLT (Pin 11/Pin 13/Pin 13): Fault Output. An open-drain
output that pulls low after the TMR pin reaches the warning threshold of 1.25V. An external pull-up resistor or
current source is required. A low state of FLT indicates
the pass device controlled by the HGATE pin is about to
turn off because either the supply voltage has stayed at
an elevated level for an extended period of time (overvoltage fault) or the device is in an overcurrent condition
(overcurrent fault). The internal FET is capable of sinking
up to 2mA and can withstand up to 80V. Connect to GND
or leave open if unused.
ENOUT (Pin 12/Pin 14/Pin 14): Enable Output. An opendrain output that goes high impedance when the voltage
at the OUT pin is above (VCC − 0.7V), indicating the external MOSFETs are fully on. An external pull-up resistor or
current source to OUT is required (see Output Monitor).
The state of the pin is latched and resets when the OUT pin
drops below 2.2V. The internal FET is capable of sinking
up to 2mA and can withstand up to 80V. Connect to GND
or leave open if unused.
TMR (Pin 13/Pin 15/Pin 15): Fault Timer Input. Connect an
accurate capacitor with low voltage and low temperature
coefficients between this pin and ground to set the times
for fault warning, fault turn-off, and cool down periods.
Either voltage regulation or current regulation starts pulling up the TMR pin. The current charging up this pin
during the fault conditions increases with the voltage
difference between VCC and OUT pins (see Applications
Information). When TMR reaches 1.25V, the FLT pin pulls
low to indicate the detection of a fault condition. If the
condition persists, the pass device controlled by HGATE
turns off when TMR reaches the threshold of 1.35V.
As soon as the fault condition disappears, a cool down
interval commences while the TMR pin cycles 32 times
between 0.15V and 1.35V with 2μA charge and discharge
currents. When TMR crosses 0.15V the 32nd time, the
HGATE pin is allowed to pull high turning the pass device
back on if the OV pin voltage is below its threshold for
the LTC4364-2 version. The HGATE pin latches low after
fault time-out for the LTC4364-1.
FB (Pin 14/Pin 16/Pin 16): Voltage Regulator Feedback
Input. Connect this pin to the resistive divider connected
between the OUT pin and ground. During an overvoltage condition, the HGATE pin is controlled to maintain
1.25V at the FB pin. Connect to GND to disable the
overvoltage clamp.
Exposed Pad (Pin 15, DE Package Only): Exposed pad
may be left open or connected to device ground (GND).
8
Rev. A
For more information www.analog.com
LTC4364-1/LTC4364-2
BLOCK DIAGRAM
VCC
SOURCE
HGATE
12V
HGATE OFF
10µA
CHARGE
PUMP
f = 620kHz
150k
DGATE
12V
150k
SENSE
DGATE OFF
20µA
FD
+
–
VA
–
IA
+
–
1.25V
+
–
+
+
–
DA
+
–
+
–
30mV
30mV
50mV/
25mV
OUT
FB
SHDN
–
OC
ENOUT SET
OV
ENOUT RESET
SHDN
+
UVIN
CONTROL
CIRCUITRY
RETRY
OV
–
1.35V
+
0.15V
VCC
–
VCC – 0.7V
+
1.25V
+
–
UV
–
+
2.2V
FLT
+
32x
ENOUT
–
+
2µA
1.25V
–
GND
TMR
436412 BD
Rev. A
For more information www.analog.com
9
LTC4364-1/LTC4364-2
OPERATION
The LTC4364 is designed to suppress high voltage surges
and limit the output voltage to protect load circuitry and
ensure normal operation in high availability power systems. It features an overvoltage protection regulator that
drives an external N-channel MOSFET (M1) as the pass
device and an ideal diode controller that drives a second
external N-channel MOSFET (M2) for reverse input protection and output voltage holdup.
The LTC4364 operates from a wide range of supply voltage, from 4V to 80V. With a clamp limiting the VCC supply, the input voltage may be higher than 80V. The input
supply can also be pulled below ground potential by up
to 40V without damaging the LTC4364. The low power
supply requirement of 4V allows it to operate even during
cold cranking conditions in automotive applications.
Normally, the pass device M1 is fully on, supplying current to the load with very little power loss. If the input voltage surges too high, the voltage amplifier (VA) controls
the gate of M1 and regulates the voltage at the OUT pin
to a level that is set by an external resistive divider from
the OUT pin to ground and the internal 1.25V reference.
The LTC4364 also detects an overcurrent condition by
monitoring the voltage across an external sense resistor
placed between the SENSE and OUT pins. An active current limit circuit (IA) controls the gate of M1 to limit the
sense voltage to 50mV if OUT is above 2.5V. In the case
of a severe output short that brings OUT below 1.5V, the
sense voltage is reduced to 25mV to reduce the stress
on M1.
During an overvoltage or overcurrent event, a current
source starts charging up the capacitor connected at the
TMR pin to ground. The pull-up current source in overcurrent condition is 5 times of that in overvoltage to accelerate turn-off. When TMR reaches 1.25V, the FLT pin pulls
low to warn of impending turn-off. The pass device M1
stays on and the TMR pin is further charged up until it
reaches 1.35V, at which point the HGATE pin pulls low and
turns off M1. The fault timer allows the load to continue
functioning during brief transient events while protecting
the MOSFET from being damaged by a long period of
input overvoltage, such as load dump in vehicles. The
10
fault timer period decreases with the voltage across the
MOSFET, to help keep the MOSFET within its safe operating area (SOA). The LTC4364-1 latches off M1 and keeps
FLT low after a fault timeout. The LTC4364-2 allows M1
to turn back on and FLT to go high impedance after a
cool down timer cycle, provided the OV pin is below its
threshold.
After the HGATE pin is latched low following fault,
momentarily pulling the SHDN pin below 0.5V resets the
fault and allows HGATE to pull high for both LTC4364-1
and LTC4364‑2. In addition, momentarily pulling the UV
pin below 0.6V allows HGATE to pull high after the cool
down timer delay for LTC4364-1, but has no effect on
LTC4364‑2.
The source and drain of MOSFET M2 serve as the anode
and cathode of the ideal diode. The LTC4364 controls the
DGATE pin to maintain a 30mV forward voltage across the
drain and source terminals of M2. It reduces the power
dissipation and increases the available supply voltage to
the load, as compared to using a discrete blocking diode.
If M2 is driven fully on and the load current results in
more than 30mV of forward voltage, the forward voltage
is equal to RDS(ON) • ILOAD.
In the event of an input short or a power supply failure,
reverse current temporarily flows through the MOSFET
M2 that is on. If the reverse voltage exceeds –30mV, the
LTC4364 pulls the DGATE pin low strongly and turns off
M2, minimizing the disturbance at the output. When the
HGATE pin pulls low in any fault condition, the DGATE pin
also pulls low, so both pass devices are turned off.
If the input or output (and so the SOURCE pin, through
the MOSFET body diode) drops below GND, both DGATE
and HGATE pins are pulled to the SOURCE pin voltage,
turning the MOSFETs off and shutting down the current
path in both directions.
An input undervoltage condition is accurately detected
using the UV pin. The HGATE and DGATE pins remain low
if UV is below its 1.25V threshold. The SHDN pin not only
turns off the pass devices but also shuts down the internal
circuitry, reducing the supply current to 10µA.
Rev. A
For more information www.analog.com
LTC4364-1/LTC4364-2
APPLICATIONS INFORMATION
Some power systems must cope with high voltage surges of
short duration such as those in automobiles. Load circuitry
must be protected from these transients, yet critical systems
may need to continue operating during these events.
The LTC4364 drives an N-channel MOSFET (M1) at the
HGATE pin to limit the voltage and current to the load circuitry during supply transients or overcurrent events. The
selection of M1 is critical for this application. It must stay
on and provide a low impedance path from the input supply to the load during normal operation and then dissipate
power during overvoltage or overcurrent conditions. The
LTC4364 also drives a second N-channel MOSFET (M2) at
the DGATE pin as an ideal diode to protect the load from
damage during reverse polarity input conditions, and to
block reverse current flow in the event the input collapses.
A typical application circuit using the LTC4364 to regulate
the output at 27V during input surges with reverse input
protection is shown in Figure 1.
Overvoltage Fault
The LTC4364 limits the voltage at the OUT pin during an
overvoltage situation. An internal voltage amplifier regulates the HGATE pin voltage to maintain 1.25V at the FB
pin. During this period of time, the N-channel MOSFET
M1 remains on and supplies current to the load. This
allows uninterrupted operation during brief overvoltage
transient events.
MAX DC:
100V/–24V VIN
MAX 1ms 12V
TRANSIENT:
200V
If the voltage regulation loop is engaged for longer than
the timeout period, set by the timer capacitor, an overvoltage fault is detected. The HGATE pin is pulled down to
the SOURCE pin by a 1mA current, turning M1 off. This
prevents M1 from being damaged during a long period of
overvoltage, such as during load dump in automobiles.
After the fault condition has disappeared and a cool down
period has transpired, the HGATE pin starts to pull high
again (LTC4364-2). The LTC4364-1 latches the HGATE pin
low after an overvoltage fault timeout and can be reset
using the SHDN or UV pin (see Resetting Faults).
Overcurrent Fault
The LTC4364 features an adjustable current limit that protects against short circuits and excessive load current.
During an overcurrent event, the HGATE pin is regulated
to limit the current sense voltage across the SENSE and
OUT pins (∆VSNS) to 50mV when OUT is above 2.5V. The
current limit sense voltage is reduced to 25mV when OUT is
below 1.5V for additional protection during an output short.
A current sense resistor is placed between SENSE and
OUT and its value (RSNS) is determined by:
RSNS =
where ILIM is the desired current limit.
M1
FDB33N25
D4
SMAJ24A
D3
1.5KE200A
R4
2.2k
0.5W
C1
0.1µF
D1
CMZ5945B
R1
68V
383k
1%
UV = 6V
R2
90.9k
OV = 60V
1%
R3
10k
1%
ΔVSNS
ILIM
M2
FDB3682
RSNS
10mΩ
+
R5
10Ω
R6
100Ω
D5
1N4148W
VCC HGATE
SHDN
CHG
0.1µF
SOURCE DGATE SENSE
UV
OUT
FB
LTC4364
R7
102k
1%
R8
4.99k
1%
R9
100k
ENOUT
OV
GND
ENABLE
FAULT
FLT
TMR
VOUT
4A
COUT CLAMPED AT 27V
22µF
436412 F01
CTMR
47nF
Figure 1. 4A, 12V Overvoltage Output Regulator with Reverse Current Protection
Rev. A
For more information www.analog.com
11
LTC4364-1/LTC4364-2
APPLICATIONS INFORMATION
An overcurrent fault occurs when the current limit circuitry has been engaged for longer than the timeout delay
set by the timer capacitor. The HGATE pin is then immediately pulled low by 1mA to the SOURCE pin, turning off
the MOSFET M1. After the fault condition has disappeared
and a cool down period has transpired, the HGATE pin
is allowed to pull back up and turn on the pass device
(LTC4364-2). The LTC4364-1 latches the HGATE pin low
after the overcurrent fault timeout and can be reset using
the SHDN or UV pin (see Resetting Faults).
Input Overvoltage Comparator
Input overvoltage is detected with the OV pin and an external resistive divider connected to the input (Figure 1). At
power-up, if the OV pin voltage is higher than its 1.25V
threshold before the 100μs internal power-on-reset expires,
or before the input undervoltage condition is cleared at the
UV pin, the HGATE pin will be held low until the OV pin voltage drops below its threshold. To prevent start-up in the
event the board is hot swapped into an overvoltage supply,
separate resistive dividers with filtering capacitors can be
used for the OV and UV pins (Figure 2). The RC constants
should be skewed so that τUV/τOV > 50. In Figure 2, if the
board is plugged into a supply that is higher than 60V, the
LTC4364 will not turn on the pass devices until the supply
voltage drops below 60V.
Once the HGATE pin begins pulling high, an input overvoltage condition detected by OV will not turn off the pass
device. Instead, OV prevents the LTC4364 from restarting
following a fault (see Cool Down Period and Restart). This
prevents the pass device from cycling between ON and
OFF states when the input voltage stays at an elevated
VIN
383k
475k
UV = 6V
10nF
UV
100k
LTC4364
0V = 60V
1nF
OV
10k
436412 F02
τUV = (383k||100k) • 10nF
τOV = (475k||10k) •1nF
Figure 2. External UV and OV Configuration Blocks Start-Up Into
an Overvoltage Condition
12
level for a long period of time, reducing the stress on
the MOSFET.
Input Undervoltage Comparator
The LTC4364 detects input undervoltage conditions such
as low battery using the UV pin. When the voltage at the
UV pin is below its 1.25V threshold, the HGATE pin pulls
low to keep the pass device off. Once the UV pin voltage rises above the UV threshold plus the UV hysteresis
(50mV typical), the HGATE pin is allowed to pull up without going through a timer cycle. In Figure 1 and Figure 2,
the input UV threshold is set by the resistive dividers to
6V. An undervoltage condition does not produce an output at the FLT pin.
Output Monitor
During normal start-up when the OUT pin voltage reaches
within 0.7V of VCC, the open drain ENOUT pin goes high
impedance, indicating the external MOSFET is fully on.
The state of the pin is latched until the OUT pin voltage drops below 2.2V, resetting the latch and pulling the
ENOUT pin low. When the OUT pin voltage is lower than
1V, the open drain device can no longer hold ENOUT low
if the pull-up of ENOUT is connected to a separate supply.
Connect the pull-up to OUT and use at least 100k pull-up
resistance to suppress ENOUT to below 0.6V (typical)
when OUT is lower than 1V. A level shifter can be used to
interface with downstream low voltage logic input.
Fault Timer
The LTC4364 includes an adjustable fault timer.
Connecting a capacitor from the TMR pin to ground sets
the delay period before the MOSFET M1 is turned off
during an overvoltage or overcurrent fault condition. The
same capacitor also sets the cool down period before M1
is allowed to turn back on after the fault condition has
disappeared. Once a fault condition is detected, a current
source charges up the TMR pin. The current level varies
depending on the voltage drop across the VCC pin and the
OUT pin, corresponding to the MOSFET VDS. The on time
is inversely proportional to the voltage drop across the
MOSFET. This scheme therefore takes better advantage
of the available safe operating area (SOA) of the MOSFET
than would a fixed timer current.
Rev. A
For more information www.analog.com
LTC4364-1/LTC4364-2
APPLICATIONS INFORMATION
When the voltage at the TMR pin, VTMR, reaches 1.25V,
the FLT pin pulls low to indicate the detection of a fault
condition and provide warning of the impending power
loss. In the case of an overvoltage fault, the timer current
then switches to a fixed 5μA. The interval between FLT
asserting low and the MOSFET M1 turning off is given by:
VTMR (V)
ITMR = 5µA
1.35
ITMR = 5µA
1.25
VCC – VOUT = 75V
(ITMR = 50µA)
VCC – VOUT 0
= 75V
VCC – VOUT = 10V
(ITMR = 8µA)
TIME
tFLT
25ms/µF
tWARNING
20ms/µF
tFLT
156ms/µF
=10V
tWARNING
20ms/µF
CTMR • 100mV
5µA
This constant early warning period allows the load to
perform necessary backup or housekeeping functions
before the supply is cut off. After VTMR crosses the 1.35V
threshold, the pass device M1 turns off immediately. Note
that during an overcurrent event, the timer current is not
reduced to 5μA after VTMR has reached 1.25V threshold,
since it would lengthen the overall fault timer period and
cause more stress on the power transistor during an overcurrent event.
(a) Overvoltage Fault Timer Current
VTMR (V)
1.35
1.25
VCC – VOUT = 75V
(ITMR = 260µA)
t WARNING =
VCC – VOUT = 10V
(ITMR = 42µA)
Assuming VCC – VOUT remains constant, the on-time of
HGATE during an overvoltage fault is:
0
VCC – VOUT
= 75V
=10V
tFLT
4.8ms/µF
TIME
tWARNING
0.38ms/µF
tFLT
29.8ms/µF
tOV =
tWARNING
2.38ms/µF
436412 F03
and that during an overcurrent fault is:
(b) Overcurrent Fault Timer Current
Figure 3. Fault Timer Current of the LTC4364
The timer current starts at around 2μA with 0.5V or less
of VCC – VOUT, increasing linearly to 50μA with 75V of
VCC – VOUT during an overvoltage fault (Figure 3a):
ITMR(UP)OV = 2μA + 0.644[μA/V] • (VCC – VOUT – 0.5V)
During an overcurrent fault, the timer current starts at
10μA with 0.5V or less of VCC – VOUT and increases to
260μA with 75V of VCC – VOUT (Figure 3b):
ITMR(UP)OC = 10μA + 3.36[μA/V] • (VCC – VOUT – 0.5V)
This arrangement allows the pass device to turn off
faster during an overcurrent event, since more power
is dissipated under this condition. Refer to the Typical
Performance Characteristics section for the timer current
at different VCC – VOUT in both overvoltage and overcurrent events.
CTMR • 1.25V CTMR • 100mV
+
ITMR(UP)OV
5µA
tOC =
CTMR • 1.35V
ITRM(UP)OC
If the fault condition disappears after TMR reaches 1.25V
but is lower than 1.35V, the TMR pin is discharged by
2μA. When TMR drops to 0.15V, the FLT pin resets to a
high impedance state.
Cool Down Period and Restart
As soon as TMR reaches 1.35V and HGATE pulls low in
a fault condition, the TMR pin starts discharging with a
2μA current. When the TMR pin voltage drops to 0.15V,
TMR charges with 2μA. When TMR reaches 1.35V, it
starts discharging again with 2μA. This pattern repeats
32 times to form a long cool down timer period before
retry (Figure 4). At the end of the cool down period (when
the TMR pin voltage drops to 0.15V the 32nd time), the
voltage at the OV pin is checked. If the OV voltage is above
Rev. A
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13
LTC4364-1/LTC4364-2
APPLICATIONS INFORMATION
above is asserted in the middle of the cool down period,
the TMR pin quickly discharges with 1mA and the
LTC4364-2 is allowed to restart once TMR drops below
0.15V. The OV pin gates the restart of either LTC4364-1
or LTC4364-2 with a SHDN reset pulse. The part will not
restart until OV drops below 1.25V.
its 1.25V threshold, retry is inhibited and the HGATE pin
remains low. If the OV pin voltage is below 1.25V minus
the OV hysteresis, the LTC4364-2 retries, pulling the
HGATE pin up and turning on the pass device M1. The
FLT pin will then go to a high impedance state. The total
cool down timer period is given by:
tCOOL =
63 • CTMR • 1.2V
2µA
Reverse Input Protection
The LTC4364 can withstand reverse voltage without damage. The VCC, SHDN, UV, OV, HGATE, SOURCE and DGATE
pins can all withstand up to –40V with respect to GND.
The latch-off version, LTC4364-1, latches the HGATE and
FLT pins low after a fault timeout. It also generates the
cool down TMR pulses as shown in Figure 4, but does
not retry after the cool down period. There are two ways
to restart the part. The first method is to pull the UV pin
below 0.6V momentarily (>10μs) after the cool down
timer period. If the UV reset pulse is asserted during the
cool down period, the TMR pulses are unaffected and
the part restarts after the cool down period ends. If OV
is higher than 1.25V while UV reset pulse is applied, the
part will not restart until OV drops below 1.25V even if
the cool down period ends.
The LTC4364 controls a second N-channel MOSFET (M2)
as an ideal diode to replace an in-line blocking diode for
reverse input protection with minimum voltage drop in
normal operation. In the event of an input short or a power
supply brownout, reverse current may temporarily flow
through M2. The LTC4364 detects this reverse current
and immediately pulls the DGATE pin to the SOURCE pin,
turning off M2. This minimizes discharge of the output
reservoir capacitor and holds up the output voltage. In
the case where the input supply drops below ground, the
SOURCE pin is pulled below ground through the body
diode of M1. The LTC4364 responds to this condition
by shorting the DGATE pin to the SOURCE pin, keeping
M2 off.
The second method of restarting the LTC4364-1 is to
pulse the SHDN pin low for more than 200μs. If this is
applied during the cool down period, the cool down timer
is reset with 1mA quickly discharging the TMR pin, and
the part will restart when TMR drops below 0.15V. If the
SHDN reset pulse is applied after the cool down period,
the part restarts immediately. Sufficient cool down time
should be allowed before toggling the SHDN pin to prevent overstressing the pass device.
MOSFET Selection
The LTC4364 drives two N-channel MOSFETs, M1 and M2,
as the pass devices to conduct the load current (Figure 1).
The important features are on-resistance, RDS(ON), the
maximum drain-source voltage, V(BR)DSS, the threshold
voltage, and the safe operating area, SOA (for M1).
A UV reset pulse has no effect on the operation of the
LTC4364-2. However, if a SHDN reset pulse as described
1.25V
> tr simplifying the above to:
1
2
P2t = ILOAD2 ( VPK − VREG ) τ
2
Figure 6. Safe Operating Area Required to Survive Prototypical
Transient Waveform
expense of slower turn-off time. The gate capacitor is
set at:
CHG =
IHGATE(UP)
IINRUSH
• CL
For the transient conditions of VPK = 80V, VIN = 12V, VREG
= 16V, tr = 10μs and τ = 1ms, and a load current of 3A,
P2t is 18.4W2s—easily handled by a MOSFET in a D-pak
package. The P2t of other transient waveshapes is evaluated by integrating the square of MOSFET power versus
time. LTspice® can be used to simulate timer behavior for
more complex transients and cases where overvoltage
and overcurrent faults coexist.
Short-Circuit Stress
The added gate capacitor slows down the turn-off time
during fault conditions and allows higher peak currents to
build up during an output short event. If this is a concern,
an extra resistor, R6, in series with CHG can restore the
turn-off time. A diode, D5, should be placed across R6
with the cathode connected to CHG as shown in Figure 1.
In a fast transient input step, D5 provides a bypass path to
CHG for the benefit of holding HGATE low and preventing
self enhancement.
SOA stress of M1 must also be calculated for output
short-circuit conditions. Short-circuit P2t is given by:
2
⎛
ΔV ⎞
P t = ⎜ VIN • SNS ⎟ • tOC
R
⎠
⎝
2
SNS
where ∆VSNS is the overcurrent fault threshold and tOC is
the overcurrent timer interval.
For VIN = 15V, OUT = 0V, ∆VSNS = 25mV, RSNS = 12mΩ
and CTMR = 100nF, P2t is 2.2W2s—less than the transient
SOA calculated in the previous example. Nevertheless,
to account for circuit tolerances this figure should be
doubled to 4.4W2s.
Limiting Inrush Current and HGATE Pin Compensation
The LTC4364 limits the inrush current to any load capacitance by controlling the HGATE pin voltage slew rate. An
external capacitor, CHG, can be connected from HGATE
to ground to slow down the inrush current further at the
16
where IHGATE(UP) is the HGATE pin pull-up current, IINRUSH
is the desired inrush current, CL is total load capacitance
at the output. In typical applications, a CHG of 6.8nF is
recommended for loop compensation during overvoltage
and overcurrent events. With input voltage steps faster
than 5V/μs, a larger gate capacitor helps prevent self
enhancement of the N-channel MOSFET.
Shutdown
The LTC4364 can be shut down to a low current mode
by pulling SHDN below 0.5V. The quiescent VCC current
drops to 10μA for both the LTC4364-1 and the LTC4364-2.
The SHDN pin can be pulled up to 100V or below GND by
up to 40V without damage. Leaving the pin open allows
an internal current source to pull it up to about 4V and
turn the part on. The leakage current at the pin should be
limited to no more than 1μA if no pull-up device is used
to help turn it on.
Rev. A
For more information www.analog.com
LTC4364-1/LTC4364-2
APPLICATIONS INFORMATION
Supply Transient Protection
The LTC4364 is tested to operate to 80V and guaranteed
to be safe from damage between 100V and −40V. Voltage
transients above 100V or below −40V may cause permanent damage. During a short-circuit condition, the large
change in current flowing through power supply traces
coupled with parasitic inductances from associated wiring
can cause destructive voltage transients in both positive
and negative directions at the VCC, SOURCE, and OUT
pins. To reduce the voltage transients, minimize the power
trace parasitic inductance by using short, wide traces. A
small RC filter (R4 and C1 in Figure 1) at the VCC pin filters
high voltage spikes of short pulse width.
Another way to limit supply transients above 100V at the
VCC pin is to use a Zener diode and a resistor, D1 and R4,
as shown in Figure 1. D1 clamps voltage spikes at the VCC
pin while R4 limits the current through D1 to a safe level
during the surge. In the negative direction, D1 along with
R4 clamps the VCC pin near GND. The inclusion of R4 in
series with the VCC pin increases the minimum required
supply voltage due to the extra voltage drop across the
resistor, which is determined by the supply current of the
LTC4364 and the leakage current of D1. 2.2k adds about
1V to the minimum operating voltage.
For sustained, elevated supply voltages, the power dissipation of R4 in Figure 1 becomes unacceptable. This
can be resolved by using an external depletion mode
N-channel MOSFET to replace R4 (M1 in Figure 7a) or
using an external NPN transistor (Q1 in Figure 7b) as a
buffer. To protect Q1 against supply reversal, block the
collector of Q1 with a series diode or tie it to the cathode
of D3 and D4 in Figure 1.
Transient suppressor D3 in Figure 1 clamps the input voltage to 200V for voltage transients higher than 200V, to
prevent breakdown of M1. It also blocks forward conduction in D4. D4 limits the SOURCE pin voltage to 24V below
GND when the input goes negative. COUT helps absorb the
inductive energy at the output upon a sudden input short,
protecting the OUT and SENSE pins.
VIN
200V
PEAK
M1
BSS126
DEPLETION
MODE
D1
CMZ5945B
68V
C1
100nF
VCC
LTC4364
GND
436412 F07a
(a) Using a Depletion Mode N-Channel MOSFET
VIN
200V
PEAK
C1
100nF
R4
22k
1/4W
D1
CMZ5945B
68V
Q1
PZTA42
VCC
LTC4364
GND
436412 F07b
(b) Using an NPN Transistor
Figure 7. Extend Surge Protection Range Using an
External Transistor Between VIN and VCC
Output Bypassing
The OUT and SENSE pins can withstand up to 100V above
and 20V below GND. In all applications the output must
be bypassed with at least 22μF low ESR electrolytic (COUT
in Figure 1) to stabilize the voltage and current limiting
loops, and to minimize capacitive feedthrough of input
transients. Total ceramic bypassing of up to one-tenth
the total electrolytic capacitance is permissible without
compromising performance. In output port protection
applications (see Output Port Protection section) where
output can go below ground and only ceramic capacitors
can be used to bypass the output, a 100mΩ series resistor is recommended as shown in Figure 16 to improve
stability in low load conditions.
Output Port Protection
In applications where the output is on a connector, as
shown in Figure 16, if the output is plugged into a supply
that is higher than the input, the ideal diode MOSFET, M2,
turns off to open the backfeeding path. In the case where
Rev. A
For more information www.analog.com
17
LTC4364-1/LTC4364-2
APPLICATIONS INFORMATION
the output port is plugged into a supply that is below GND,
the SOURCE pin is pulled below GND through the body
diode of M2. The LTC4364 responds to this condition by
shorting the HGATE pin to the SOURCE pin, turning M1
off and shutting down the current path from VIN to VOUT.
Select 4.99k for R8.
Design Example
Now, calculate the sense resistor, RSNS, value:
As a design example, consider an application with the
following specifications: VIN = 8V to 14V DC with a peak
transient of 200V and decay time constant τ of 1ms, VOUT
≤ 27V, minimum current limit ILIM(MIN) at 4A, low-battery
detection at 6V, input overvoltage level at 60V, and 1ms
of overvoltage early warning (Figure 1).
Selection of CMZ5945B for D1 will limit the voltage at
the VCC pin to less than 71V during the 200V surge. The
minimum required voltage at the VCC pin is 4V when VIN is
at 6V; the maximum supply current for LTC4364 is 750μA.
The maximum value for R4 to ensure proper operation is:
R4 =
Next, calculate the resistive divider value to limit VOUT to
27V during an overvoltage event:
Choosing 250μA for the resistive divider:
R8 =
18
ΔVSNS(MIN)
ILIM
=
45mV
= 11mΩ
4A
CTMR =
1ms • 5µA
= 50nF
100mV
The closest standard value for CTMR is 47nF.
Finally, calculate R1, R2 and R3 for 6V low battery detection and 60V input overvoltage level:
6V
1.25V
=
R1+ R2 + R3 R2 + R3
60V
1.25V
=
R1+ R2 + R3
R3
Simplify the equations and choose 10k for R3 to get:
⎛ 60V ⎞
R2 = ⎜
– 1⎟ • R3 = 9 • R3 = 90k
⎝ 6V
⎠
With a bypass capacitance of 0.1μF (C1), along with R4
of 2.2k, high voltage transients up to 250V with a pulse
width less than 20μs are filtered out at the VCC pin.
1.25V • (R7 + R8 )
= 27V
R8
RSNS =
CTMR is then chosen for 1ms of early warning time:
200V – 64V
= 62mA
2.2k
which can be handled by the CMZ5945B with a peak
power rating of 200W at 10/1000μs.
VREG =
1.25V
Choose 10mΩ for RSNS.
Select 2.2k for R4 to accommodate all conditions.
ID1(PK) =
(27V – 1.25V ) • R8 = 102.8k
The closest standard value for R7 is 102k.
6V – 4V
= 2.7k
0.75mA
With the minimum Zener voltage at 64V, the peak current
through R4 into D1 is then calculated as:
R7 =
⎛ 6V
⎞
– 1⎟ • (R2 + R3) = 3.8 • (R1+ R2) = 380k
R1= ⎜
⎝ 1.25V ⎠
Select 90.9kΩ for R2 and 383kΩ for R1.
The pass device, M1, should be chosen to withstand an
output short condition with VCC = 14V. In the case of a
severe output short where VOUT = 0V, ITMR(UP) = 55μA
and the total overcurrent fault time is:
tOC =
CTMR • VTMR(G)
ITRM(UP)
=
47nF • 1.35V
= 1.15ms
55µA
1.25V
= 5k
250µA
Rev. A
For more information www.analog.com
LTC4364-1/LTC4364-2
APPLICATIONS INFORMATION
The maximum power dissipation in M1 is:
P=
ΔVDS(M1) • ΔVSNS(MAX)
RSNS
=
14V • 32mV
= 45W
10mΩ
The corresponding P2t is 2.3W2s.
During an output overload or soft short, the voltage at the
OUT pin could stay at 2V or higher. The total overcurrent
fault time when VOUT = 2V is:
tOC =
47nF • 1.35V
= 1.3ms
49µA
The maximum power dissipation in M1 is:
P=
(14V – 2V ) • 55mV = 66W
10mΩ
The corresponding P2t is 5.7W2s. Both of the above conditions are well within the safe operating area of FDB33N25.
To select the pass device, M2, first calculate RDS(ON) to
achieve the desired forward drop VFW at maximum load
current (5.5A). If VFW = 0.25V:
RDS(ON) ≤
VFW
0.25V
=
= 45.5mΩ
ILOAD(MAX) 5.5A
The FDB3682 offers a maximum RDS(ON) of 36mΩ at
VGS = 10V so is a good fit. Its minimum BVDSS of 100V
is also sufficient to handle VOUT transients up to 100V
during an input short-circuit event.
Layout Considerations
To achieve accurate current sensing, use Kelvin connections to the current sense resistor, RSNS. Limit the
resistance from the SOURCE pin to the sources of the
MOSFETs to below 10Ω. The minimum trace width for 1oz
copper foil is 0.02" per amp to ensure the trace stays at
a reasonable temperature. Note that 1oz copper exhibits
a sheet resistance of about 530μΩ/square. Small resistances can cause large errors in high current applications.
Noise immunity will be improved significantly by locating
resistive dividers close to the pins with short VCC and
GND traces.
Rev. A
For more information www.analog.com
19
LTC4364-1/LTC4364-2
TYPICAL APPLICATIONS
RSNS
20mΩ
M1
SUD50N03-9
VIN
5V TO 28V
+
D1
SMAT70A
R1
118k
R2
44.2k
UV = 4.2V
OV = 36V
R3
5.9k
CHG
47nF
R5
10Ω D6
DDZ9702T
HGATE
VCC
SHDN
SOURCE DGATE SENSE
UV
CLOAD
100µF
VOUT
2A
OUT
FB
LTC4364
ENOUT
OV
GND
FLT
TMR
436412 F08
CTMR
0.22µF
Figure 8. 2A Wide Range Hot Swap Controller with Circuit Breaker
M1
FDB3632
VIN
18V TO 33V
M2
FDMS86101
RSNS
15mΩ
+
CHG
47nF
R1
100k
R2
6.04k
R3
3.01k
VCC
SHDN
UV = 15V
OV = 45V
R5
10Ω
D6
DDZ9702T
HGATE
UV
VOUT
2.5A
CLAMPED
CLOAD AT 36V
100µF
D7
DDZ9702T
SOURCE
DGATE SENSE
OUT
FB
R7
110k
R8
4.02k
LTC4364
ENOUT
OV
GND
FLT
TMR
436412 F09
CTMR
0.1µF
Figure 9. 28V Hot Swap with Overvoltage Output Regulation at 36V, Circuit Breaker, and Reverse Current Protection
20
Rev. A
For more information www.analog.com
LTC4364-1/LTC4364-2
TYPICAL APPLICATIONS
M1
FDB33N25
VIN
36V TO 72V
RSNS
10mΩ
M2
FDB3632
+
R4
2.2k CHG
47nF
D1
CMZ5945B
68V
R1
205k
R2
3.92k
UV = 36V
OV = 76V
VCC
SHDN
R5
10Ω
D6
DDZ9702T
HGATE
D7
DDZ9702T
SOURCE
UV
VOUT
4A
CLAMPED
CLOAD AT 72V
330µF
DGATE SENSE
OUT
FB
LTC4364
R7
226k
R8
4.02k
ENOUT
OV
R3
3.48k
GND
FLT
TMR
436412 F10
CTMR
0.1µF
Figure 10. 48V Hot Swap with Overvoltage Output Regulation at 72V, Circuit Breaker, and Reverse Current Protection
M1A
FDD16AN08A0
VINA
12V
CHGA
6.8nF
M2A
FDD16AN08A0
RSNSA
10mΩ
+
HGATE SOURCE DGATE SENSE
VCC
SHDN
UV
CHGB
6.8nF
M2B
FDD16AN08A0
+
HGATE SOURCE DGATE SENSE
CTMRB
0.22µF
OUT
FB
LTC4364
OV
TMR
RSNSB
10mΩ
COUTB
22µF
R5B
10Ω
SHDN
UV
FLT
GND
M1B
FDD16AN08A0
VCC
R8A
4.99k
ENOUT
TMR
VINB
12V
R7A
59k
OUT
FB
LTC4364
OV
CTMRA
0.22µF
COUTA
22µF
R5A
10Ω
VOUT
CLAMPED
AT 16V
R7B
59k
R8B
4.99k
ENOUT
GND
FLT
436412 F11
Figure 11. Redundant Supply Diode-OR with Overvoltage Surge Protection
Rev. A
For more information www.analog.com
21
LTC4364-1/LTC4364-2
TYPICAL APPLICATIONS
M1
FDB3632
VIN
12V
M2
FDMS86101
VOUT
CLOAD
100k
SHDN
SHDN
VCC
HGATE SOURCE DGATE SENSE OUT
FB
UV
M3
VN2222
LTC4364
ENOUT
OV
TMR
FLT
GND
436412 F12
Figure 12. High Side Switch with Ideal Diode for Load Protection
R9
1k, 1W
M1
FDD16AN08A0
VIN
12V
R4
2.2k CHG
6.8nF
D1
CMZ5945B
68V
R1
191k
R2
40.2k
R3
10k
UV = 6V
OV = 30V
VCC
SHDN
RSNS
M2
FDD16AN08A0 10mΩ
+
R5
10Ω
HGATE SOURCE DGATE SENSE
UV
OUT
FB
LTC4364
COUT
22µF
VOUT
4A
CLAMPED
D8
1N4746A AT 16V
18V, 1W
R7
287k
R8
24.9k
ENOUT
OV
GND
FLT
TMR
436412 F13
CTMR
0.1µF
Figure 13. Overvoltage Regulator with Output Keep Alive During Shutdown
22
Rev. A
For more information www.analog.com
LTC4364-1/LTC4364-2
TYPICAL APPLICATIONS
M1
PSMN4R8-100BSE
VINA
20V
M2
FDS3672
RSNS
0.15Ω
+
CHG
10nF
R1
10Ω
HGATE SOURCE DGATE SENSE
VCC
SHDN
UV
R2
182k
OUT
FB
R3
21k
LTC4364
OV
*THE OUTPUT LOAD STEP
RESPONSE IS SLOW DUE TO
THE RESPONSE TIME OF THE
INTERNAL CHARGE PUMP.
ENOUT
TMR
FLT
GND
VOUT
12V,
250mA
CLOAD
22µF
436412 F14
Figure 14. 250mA High Voltage Low Dropout Linear Regulator with Current Limit and Reverse Current Protection
M1
PSMN4R8-100BSE
VIN
12V
RSNS
6mΩ
M2
SiDR668ADP
+
D1
SMAJ70CA
R4
2.2k CHG
10nF
D2
CMZ5945B
68V
R1
383k
R2
90.9k
VCC
SHDN
UV = 6V
R5
10Ω
HGATE
UV
OV = 60V
SOURCE
DGATE
SENSE
LTC4364
R7
59k
R8
4.99k
ENOUT
OV
R3
10k
OUT
FB
VOUT
6.5A
CLAMPED
CLOAD AT 16V
22µF
GND
FLT
TMR
CTMR
100nF
436412 F15
D3
DDZ9699T
12V
R6
100k
M3
SSM3K361R
Figure 15. Overvoltage Regulator with Reverse Input Protection Up to –70V
Rev. A
For more information www.analog.com
23
LTC4364-1/LTC4364-2
PACKAGE DESCRIPTION
DE Package
14-Lead Plastic DFN (4mm × 3mm)
(Reference LTC DWG # 05-08-1708 Rev B)
0.70 ±0.05
3.30 ±0.05
3.60 ±0.05
2.20 ±0.05
1.70 ±0.05
PACKAGE
OUTLINE
0.25 ±0.05
0.50 BSC
3.00 REF
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED
4.00 ±0.10
(2 SIDES)
R = 0.115
TYP
8
R = 0.05
TYP
0.40 ±0.10
14
3.30 ±0.10
3.00 ±0.10
(2 SIDES)
1.70 ±0.10
PIN 1 NOTCH
R = 0.20 OR
0.35 × 45°
CHAMFER
PIN 1
TOP MARK
(SEE NOTE 6)
0.200 REF
0.75 ±0.05
(DE14) DFN 0806 REV B
7
1
0.25 ±0.05
0.50 BSC
3.00 REF
0.00 – 0.05
BOTTOM VIEW—EXPOSED PAD
NOTE:
1. DRAWING PROPOSED TO BE MADE VARIATION OF VERSION (WGED-3) IN JEDEC
PACKAGE OUTLINE MO-229
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
24
Rev. A
For more information www.analog.com
LTC4364-1/LTC4364-2
PACKAGE DESCRIPTION
MS Package
16-Lead Plastic MSOP
(Reference LTC DWG # 05-08-1669 Rev A)
0.889 ±0.127
(.035 ±.005)
5.10
(.201)
MIN
3.20 – 3.45
(.126 – .136)
4.039 ±0.102
(.159 ±.004)
(NOTE 3)
0.50
(.0197)
BSC
0.305 ±0.038
(.0120 ±.0015)
TYP
RECOMMENDED SOLDER PAD LAYOUT
0.254
(.010)
DETAIL “A”
3.00 ±0.102
(.118 ±.004)
(NOTE 4)
4.90 ±0.152
(.193 ±.006)
0° – 6° TYP
0.280 ±0.076
(.011 ±.003)
REF
16151413121110 9
GAUGE PLANE
0.53 ±0.152
(.021 ±.006)
DETAIL “A”
0.18
(.007)
SEATING
PLANE
1.10
(.043)
MAX
0.17 – 0.27
(.007 – .011)
TYP
1234567 8
0.50
(.0197)
BSC
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
0.86
(.034)
REF
0.1016 ±0.0508
(.004 ±.002)
MSOP (MS16) 0213 REV A
Rev. A
For more information www.analog.com
25
LTC4364-1/LTC4364-2
PACKAGE DESCRIPTION
S Package
16-Lead Plastic Small Outline (Narrow .150 Inch)
(Reference LTC DWG # 05-08-1610 Rev G)
.386 – .394
(9.804 – 10.008)
NOTE 3
.045 ±.005
.050 BSC
16
N
14
13
12
11
10
9
N
.245
MIN
.160 ±.005
.150 – .157
(3.810 – 3.988)
NOTE 3
.228 – .244
(5.791 – 6.197)
1
.030 ±.005
TYP
15
2
3
N/2
N/2
RECOMMENDED SOLDER PAD LAYOUT
.010 – .020
× 45°
(0.254 – 0.508)
.008 – .010
(0.203 – 0.254)
1
2
3
4
5
.053 – .069
(1.346 – 1.752)
NOTE:
1. DIMENSIONS IN
.014 – .019
(0.355 – 0.483)
TYP
7
8
.004 – .010
(0.101 – 0.254)
0° – 8° TYP
.016 – .050
(0.406 – 1.270)
6
.050
(1.270)
BSC
S16 REV G 0212
INCHES
(MILLIMETERS)
2. DRAWING NOT TO SCALE
3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm)
4. PIN 1 CAN BE BEVEL EDGE OR A DIMPLE
26
Rev. A
For more information www.analog.com
LTC4364-1/LTC4364-2
REVISION HISTORY
REV
DATE
DESCRIPTION
PAGE NUMBER
A
02/22
Added MS package AEC-Q100 qualification and “W” part number, added two new Typical Application
circuits with minor edits.
1–4, 7–14, 16,
17, 19, 24
Reorganized Pin Functions alphanumerically and added pin numbers.
7, 8
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog
Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications
subject to change without notice. No license For
is granted
implication or
otherwise under any patent or patent rights of Analog Devices.
more by
information
www.analog.com
27
LTC4364-1/LTC4364-2
TYPICAL APPLICATION
M1
FDB3632
VIN
12V
CIN
10µF
R1
383k
1%
UV= 6V
R2
90.9k
1%
OV = 60V
R3
10k
1%
CHG
6.8nF
VCC
SHDN
M2
FDMS86101
RSNS
0.2Ω
R7
49.9k
1%
R5
10Ω
HGATE SOURCE DGATE SENSE
UV
OUT
FB
LTC4364
R9
16.9k
1%
10µF
50V
CER
D2
DDZ9702T
15V
VOUT*
CLAMPED
AT 18V
10µF
50V
CER
RESR
100mΩ
R8
4.99k
1%
ENOUT
OV
GND
FLT
TMR
0.1µF
436412 F16
*PROTECTED AGAINST BACKFEEDING
OR FORWARD CONDUCTING
FROM –20V TO 50V
Figure 16. 0.25A, 12V Surge Stopper with Output Port Protection
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LT 4356-1/
LT4356-2
LT4356-3
Surge Stopper
LT4356-1: 7A Shutdown Mode
LT4356-2: Auxiliary Amplifier Alive in Shutdown Mode
LT4356-3: Fault Latchoff
LTC4363
High Voltage Surge Stopper
4V to 80V, VCC Clamp, Adjustable Output Voltage Clamp, 60V Reverse
Input Protection, Overcurrent Protection
LTC4366
Floating Surge Stopper
9V to >500V Operation, Adjustable Output Voltage Clamp
LTC4357
Positive High Voltage Ideal Diode Controller
0.5µs Turn-Off Time, 9V to 80V
LTC4359
Ideal Diode Controller with Reverse Input Protection
4V to 80V Operation, –40V Reverse-Input Protection, Low 13µA
Shutdown Current
LTC4352
Ideal MOSFET ORing Diode
External N-Channel MOSFETs Replace ORing Diodes, 0V to 18V
LTC4354
Negative Voltage Diode-OR Controller
Controls Two N-Channel MOSFETs, 1µs Turn-Off, 80V Operation
LTC4355
Positive Voltage Diode-OR Controller
Controls Two N-Channel MOSFETs, 0.5µs Turn-Off, 80V Operation
LTC4365
Window Passer – OV, UV and Reverse Supply Protection
Controller
2.5V to 34V Operation, Protects 60V to –40V
®
28
Rev. A
02/22
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