LTC4365ITS8#TRMPBF

LTC4365 Overvoltage, Undervoltage and Reverse Supply Protection Controller DESCRIPTION FEATURES Wide Operating Voltage Range: 2.5V to 34V Overvoltage Protection to 60V Reverse Supply Protection to –40V LTC4365: Blocks 50Hz and 60Hz AC Power LTC4365-1: Fast (1ms) Recovery from Fault No Input Capacitor or TVS Required for Most Applications n Adjustable Undervoltage and Overvoltage Protection Range n Charge Pump Enhances External N-Channel MOSFET n Low Operating Current: 125µA n Low Shutdown Current: 10µA n Compact 8-Lead, 3mm × 2mm DFN and TSOT-23 (ThinSOT™) Packages nn AEC-Q100 Qualified for Automotive Applications n n n n n n APPLICATIONS n n n n The LTC®4365 protects applications where power supply input voltages may be too high, too low or even negative. It does this by controlling the gate voltages of a pair of external N-channel MOSFETs to ensure that the output stays within a safe operating range.The LTC4365 can withstand voltages between –40V and 60V and has an operating range of 2.5V to 34V, while consuming only 125µA in normal operation. Two comparator inputs allow configuration of the overvoltage (OV) and undervoltage (UV) set points using an external resistive divider. A shutdown pin provides external control for enabling and disabling the MOSFETs as well as placing the device in a low current shutdown state. A fault output provides status of the gate pin pulling low. A fault is indicated when the part is in shutdown or the input voltage is outside the UV and OV set points. The LTC4365 has a 36ms turn-on delay that debounces live connections and blocks 50Hz to 60Hz AC power. For fast recovery after faults, the LTC4365-1 has a reduced 1ms turn-on delay. Portable Instrumentation Industrial Automation Laptops Automotive Surge Protection All registered trademarks and trademarks are the property of their respective owners. Protected by U.S. patents, including XXXXX, XXXXX. TYPICAL APPLICATION 12V Automotive Application SiSB46DN VIN 12V GATE VIN Load Protected from Reverse and Overvoltage at VIN VOUT 3A 30V VIN VALID WINDOW VOUT LTC4365 510k UV = 5V OV = 18V GND SHDN VOUT VOUT 2740k UV 10V/DIV FAULT 215k –30V OV 84.5k GND OV = 18V UV = 5V VIN 1s/DIV 4365 TA01b 4365 TA01a Rev. B Document Feedback For more information www.analog.com 1 LTC4365 ABSOLUTE MAXIMUM RATINGS Supply Voltage (Note 1) VIN........................................................... –40V to 60V Input Voltages (Note 3) UV, SHDN............................................... –0.3V to 60V OV............................................................. –0.3V to 6V VOUT....................................................... –0.3V to 40V Output Voltages (Note 4) FAULT...................................................... –0.3V to 60V GATE........................................................ –40V to 45V Input Currents UV, OV, SHDN.....................................................–1mA Operating Ambient Temperature Range LTC4365C................................................. 0°C to 70°C LTC4365I..............................................–40°C to 85°C LTC4365H........................................... –40°C to 125°C Storage Temperature Range................... –65°C to 150°C Lead Temperature (Soldering, 10 sec) for TSOT Only.................................................... 300°C PIN CONFIGURATION TOP VIEW GND 1 OV 2 UV 3 VIN 4 9 GND 8 SHDN 7 FAULT 6 VOUT 5 GATE TOP VIEW VIN UV OV GND 1 2 3 4 8 7 6 5 GATE VOUT FAULT SHDN TS8 PACKAGE 8-LEAD PLASTIC TSOT-23 TJMAX = 150°C, θJA = 195°C/W DDB PACKAGE 8-LEAD (3mm × 2mm) PLASTIC DFN TJMAX = 150°C, θJA = 76°C/W EXPOSED PAD (PIN 9) PCB GROUND CONNECTION OPTIONAL ORDER INFORMATION Lead Free Finish TAPE AND REEL (MINI) TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE LTC4365CDDB#TRMPBF LTC4365CDDB#TRPBF LFKS 8-Lead (3mm × 2mm) Plastic DFN 0°C to 70°C LTC4365CDDB-1#TRMPBF LTC4365CDDB-1#TRPBF LGMB 8-Lead (3mm × 2mm) Plastic DFN 0°C to 70°C LTC4365IDDB#TRMPBF LTC4365IDDB#TRPBF LFKS 8-Lead (3mm × 2mm) Plastic DFN –40°C to 85°C LTC4365IDDB-1#TRMPBF LTC4365IDDB-1#TRPBF LGMB 8-Lead (3mm × 2mm) Plastic DFN –40°C to 85°C LTC4365HDDB#TRMPBF LTC4365HDDB#TRPBF LFKS 8-Lead (3mm × 2mm) Plastic DFN –40°C to 125°C LTC4365HDDB-1#TRMPBF LTC4365HDDB-1#TRPBF LGMB 8-Lead (3mm × 2mm) Plastic DFN –40°C to 125°C LTC4365CTS8#TRMPBF LTC4365CTS8#TRPBF LTFKT 8-Lead Plastic TSOT-23 0°C to 70°C LTC4365CTS8-1#TRMPBF LTC4365CTS8-1#TRPBF LTGKZ 8-Lead Plastic TSOT-23 0°C to 70°C LTC4365ITS8#TRMPBF LTC4365ITS8#TRPBF LTFKT 8-Lead Plastic TSOT-23 –40°C to 85°C LTC4365ITS8-1#TRMPBF LTC4365ITS8-1#TRPBF LTGKZ 8-Lead Plastic TSOT-23 –40°C to 85°C LTC4365HTS8#TRMPBF LTC4365HTS8#TRPBF LTFKT 8-Lead Plastic TSOT-23 –40°C to 125°C LTC4365HTS8-1#TRMPBF LTC4365HTS8-1#TRPBF LTGKZ 8-Lead Plastic TSOT-23 –40°C to 125°C Rev. B 2 For more information www.analog.com LTC4365 ORDER INFORMATION Lead Free Finish AUTOMOTIVE PRODUCTS** TAPE AND REEL (MINI) TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE LTC4365ITS8#WTRMPBF LTC4365ITS8#WTRPBF LTFKT 8-Lead Plastic TSOT-23 –40°C to 85°C LTC4365ITS8-1#WTRMPBF LTC4365ITS8-1#WTRPBF LTGKZ 8-Lead Plastic TSOT-23 –40°C to 85°C LTC4365HTS8#WTRMPBF LTC4365HTS8#WTRPBF LTFKT 8-Lead Plastic TSOT-23 –40°C to 125°C LTC4365HTS8-1#WTRMPBF LTC4365HTS8-1#WTRPBF LTGKZ 8-Lead Plastic TSOT-23 –40°C to 125°C Contact the factory for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. Tape and reel specifications. Some packages are available in 500 unit reels through designated sales channels with #TRMPBF suffix. **Versions of this part are available with controlled manufacturing to support the quality and reliability requirements of automotive applications. These models are designated with a #W suffix. Only the automotive grade products shown are available for use in automotive applications. Contact your local Analog Devices account representative for specific product ordering information and to obtain the specific Automotive Reliability reports for these models. ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VIN = 2.5V to 34V, unless otherwise noted. (Note 2) SYMBOL PARAMETER CONDITIONS MIN VIN Input Voltage Range Operating Range Protection Range l l IVIN Input Supply Current SHDN = 0V, VIN = VOUT, –40°C to 85°C SHDN = 0V, VIN = VOUT, –40°C to 125°C SHDN = 2.5V l l l IVIN(R) Reverse Input Supply Current VIN = –40V, VOUT = 0V l VIN(UVLO) Input Supply Undervoltage Lockout VIN Rising l IVOUT VOUT Input Current SHDN = 0V, VIN = VOUT SHDN = 2.5V, VIN = VOUT VIN = –40V, VOUT = 0V l l l ΔVGATE N-Channel Gate Drive (GATE-VOUT) VIN = VOUT = 5.0V, IGATE = –1µA VIN = VOUT = 12V to 34V, IGATE = –1µA l l IGATE(UP) N-Channel Gate Pull Up Current GATE = VIN = VOUT = 12V IGATE(FAST) N-Channel Gate Fast Pull Down Current TYP MAX UNITS VIN, VOUT 2.5 –40 34 60 V V 10 10 25 50 100 150 µA µA µA –1.2 –1.8 mA 2.2 2.4 V 6 100 20 30 250 50 µA µA µA 3 7.4 3.6 8.4 4.2 9.8 V V l –12 –20 –30 µA Fast Shutdown, GATE = 20V, VIN = VOUT = 12V l 31 50 72 mA Gentle Shutdown, GATE = 20V, VIN = VOUT = 12V l 50 90 150 µA 2 4 µs 1.8 GATE IGATE(SLOW) N-Channel Gate Gentle Pull Down Current tGATE(FAST) N-Channel Gate Fast Turn Off Delay tGATE(SLOW) N-Channel Gentle Turn Off Delay tRECOVERY GATE Recovery Delay Time CGATE = 2.2nF, UV or OV Fault l CGATE = 2.2nF, SHDN Falling, VIN = VOUT = 12V l 150 250 350 µs VIN = 12V, Power Good to ΔVGATE > 0V LTC4365, CGATE = 2.2nF LTC4365-1, CGATE = 2.2nF l l 26 0.6 36 1 49 1.5 ms ms Rev. B For more information www.analog.com 3 LTC4365 ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VIN = 2.5V to 34V, unless otherwise noted. (Note 2) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS VUV UV Input Threshold Voltage UV Falling → ΔVGATE = 0V l 492.5 500 507.5 mV l VOV OV Input Threshold Voltage OV Rising → ΔVGATE = 0V VUVHYST 492.5 500 507.5 mV UV Input Hysteresis l 20 25 32 mV VOVHYST OV Input Hysteresis l 20 25 32 mV ILEAK UV, OV Leakage Current V = 0.5V, VIN = 34V l ±10 nA tFAULT UV, OV Fault Propagation Delay Overdrive = 50mV VIN = VOUT = 12V l 2 µs UV, OV 1 SHDN VSHDN SHDN Input Threshold SHDN Falling to ΔVGATE = 0V l ISHDN SHDN Input Current SHDN = 0.75V, VIN = 34V l tSTART Delay Coming Out of Shutdown Mode SHDN Rising to ΔVGATE > 0V, VIN = VOUT = 12V l tSHDN(F) SHDN to FAULT Asserted VIN = VOUT = 12V l tLOWPWR Delay from Turn Off to Low Power Operation VIN = VOUT = 12V LTC4365 LTC4365-1 l l 0.4 400 26 0.3 0.75 1.2 V ±10 nA 800 1200 µs 1.5 3 µs 36 0.7 55 2 ms ms 0.15 0.4 V ±20 nA FAULT VOL FAULT Output Voltage Low IFAULT = 500µA l IFAULT FAULT Leakage Current FAULT = 5V, VIN = 34V l Note 1. Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2. All currents into pins are positive; all voltages are referenced to GND unless otherwise noted. Note 3. These pins can be tied to voltages below –0.3V through a resistor that limits the current below 1mA. Note 4. The GATE pin is referenced to VOUT and does not exceed 44V for the entire operating range. Rev. B 4 For more information www.analog.com LTC4365 TYPICAL PERFORMANCE CHARACTERISTICS VIN Operating Current vs Temperature VIN Shutdown Current vs VIN 30 100 SHDN = 2.5V VOUT = VIN 80 VIN Current vs VIN (–40 to 60V) 400 VIN = VOUT SHDN = 0V 25 SHDN = UV = 0V 0 125°C VIN = 34V 70°C 15 IVIN (µA) VIN = 12V 40 IVIN (µA) IVIN (µA) 20 60 25°C –45°C –400 –800 125°C 10 20 VIN = 2.5V 0 –50 –25 –45°C 5 75 0 50 25 TEMPERATURE (°C) 100 0 125 5 0 10 15 20 VIN (V) –1200 25 30 –1600 –50 200 SHDN = 2.5V VIN = VOUT 20 15 IVOUT (µA) –45°C VOUT = 34V IVOUT (µA) VOUT = 34V 10 VOUT = 12V 40 15 25°C 10 125°C 5 VOUT = 2.5V 75 VOUT = 0V SHDN = 0V VIN = VOUT 80 50 VOUT Current vs Reverse VIN 25 20 VOUT = 12V 25 4365 G03 VOUT Shutdown Current vs Temperature 120 0 –25 4365 G02 VOUT Operating Current vs Temperature IVOUT (µA) 35 25°C VIN (V) 4365 G01 160 25°C 5 VOUT = 2.5V 0 –50 –25 0 75 25 50 TEMPERATURE (°C) 100 0 –50 125 –25 0 25 50 75 TEMPERATURE (°C) 100 4365 G04 GATE Drive vs VIN VOUT = VIN ∆VGATE (V) ∆VGATE (V) 4 IGATE = –1µA T = 25°C IGATE = –1µA 0 5 10 15 20 VIN (V) 25 30 35 4365 G07 –40 VIN = VOUT = 12V VIN = VOUT = 12V –20 4 0 –50 VIN = VOUT = 2.5V –25 75 0 50 25 TEMPERATURE (°C) –50 125°C 6 2 2 0 –25 VIN = VOUT = 34V 6 –30 –20 VIN (V) GATE Current vs GATE Drive GATE Drive vs Temperature 8 8 –10 4365 G06 10 VOUT = 0V 10 0 4365 G05 IGATE(UP) (µA) 12 0 125 –15 25°C –10 –45°C –5 100 125 4365 G08 0 0 2 6 4 ∆VGATE (V) 8 10 4365 G09 Rev. B For more information www.analog.com 5 LTC4365 TYPICAL PERFORMANCE CHARACTERISTICS OV Threshold vs Temperature UV Threshold vs Temperature 507.5 507.5 VIN = VOUT = 12V 505.0 505.0 502.5 502.5 UV/OV Leakage vs Temperature 1.00 VIN = VOUT = 12V VUV/OV = 0.5V VIN = 12V 500.0 ILEAK (nA) VOV (mV) VUV (mV) 0.75 500.0 497.5 497.5 495.0 495.0 492.5 –50 492.5 –50 0.50 0.25 OV –25 75 0 50 25 TEMPERATURE (°C) 100 125 –25 75 0 50 25 TEMPERATURE (°C) 100 4365 G10 50 tRECOVERY (ms) tFAULT (µs) 50 40 12 8 4 VIN = 12V 30 20 VIN = 2.5V 10 0 –50 1000 –25 75 0 25 50 TEMPERATURE (°C) 20V/DIV GND 5V/DIV 100µF, 12Ω LOAD ON VOUT 60V SI9945 DUAL NCH MOSFET VIN = 12V 100 20 0 125 5 0 10 15 20 VIN (V) 25 30 35 4365 G15 Turn-Off Timing GATE GATE 100µF, 12Ω LOAD ON VOUT 60V SI9945 DUAL NCH MOSFET 5V/DIV VOUT VOUT GND GATE 25°C 30 10 Turn-On Timing VIN 125°C 4365 G14 LTC4365 AC Blocking VOUT 175 LTC4365 Recovery Delay Time vs VIN 40 VIN = 34V 4365 G13 1V/DIV 75 25 125 TEMPERATURE (°C) –45°C 16 10 100 OVERDRIVE (mV) –25 4365 G12 Recovery Delay Time vs Temperature VIN = VOUT = 12V T = 25°C 1 125 tRECOVERY (ms) 20 0 –75 4365 G11 UV/OV Propagation Delay vs Overdrive 0 UV GND GND 10µF, 1k LOAD ON VOUT 60V DUAL NCH MOSFET 2.5ms/DIV 4365 G16 3V/DIV SHDN GND 250µs/DIV 4365 G17 3V/DIV SHDN GND 250µs/DIV 4365 G18 Rev. B 6 For more information www.analog.com LTC4365 PIN FUNCTIONS Exposed Pad: Connect to device ground. FAULT: Fault Indication Output. This high voltage open drain output is pulled low if UV is below its monitor threshold, if OV is above its monitor threshold, if SHDN is low, or if VIN has not risen above VIN(UVLO). GATE: Gate Drive Output for External N-channel MOSFETs. An internal charge pump provides 20µA of pull-up current and up to 9.8V of enhancement to the gate of an external N-channel MOSFET. When turned off, GATE is pulled just below the lower of VIN or VOUT. When VIN goes negative, GATE is automatically connected to VIN. GND: Device Ground. OV: Overvoltage Comparator Input. Connect this pin to an external resistive divider to set the desired VIN overvoltage fault threshold. The OV input connects to an accurate, fast (1µs) comparator with a 0.5V rising threshold and 25mV of hysteresis. When OV rises above its threshold, a 50mA current sink pulls down on the GATE output. When OV falls back below 0.475V, and after a 36ms recovery delay waiting period (1ms for LTC4365-1), the GATE charge pump is enabled. The low leakage current of the OV input allows the use of large valued resistors for the external resistive divider. Connect to GND if unused. SHDN: Shutdown Control Input. SHDN high enables the GATE charge pump which in turn enhances the gate of an external N-channel MOSFET. A low on SHDN generates a pull down on the GATE output with a 90µA current sink and places the LTC4365 in low current mode (10µA). If unused, connect to VIN. If VIN goes below ground, or if VIN rings to 60V, use a current limiting resistor of at least 100k. UV: Undervoltage Comparator Input. Connect this pin to an external resistive divider to set the desired VIN undervoltage fault threshold. The UV input connects to an accurate, fast (1µs) comparator with a 0.5V falling threshold and 25mV of hysteresis. When UV falls below its threshold, a 50mA current sink pulls down on the GATE output. When UV rises back above 0.525V, and after a 36ms recovery delay waiting period (1ms for LTC4365-1), the GATE charge pump is enabled. The low leakage current of the UV input allows the use of large valued resistors for the external resistive divider. If unused, connect to VIN. While connected to VIN, if VIN goes below ground, or if VIN rings to 60V, use a current limiting resistor of at least 100k. VIN: Power Supply Input. Maximum protection range: –40V to 60V. Operating range: 2.5V to 34V. VOUT: Output Voltage Sense Input. This pin senses the voltage at the output side of the external N-channel MOSFET. The GATE charge pump voltage is referenced to VOUT. It is used as the charge pump input when VOUT is greater than approximately 6.5V. Rev. B For more information www.analog.com 7 LTC4365 BLOCK DIAGRAM REVERSE PROTECTION VIN –40V TO 60V GATE – + CLOSES SWITCH WHEN VIN IS NEGATIVE 5V INTERNAL SUPPLY LDO 6.5V INTERNAL SUPPLY VOUT ENABLE 2.2V UVLO UV GATE CHARGE PUMP f = 400kHz DELAY TIMERS SHDN + + FAULT OFF TURN OFF SHDN LOGIC – OV IGATE 50mA 25mV HYSTERESIS 90µA FAULT GATE PULLDOWN – 0.5V GND 4365 BD OPERATION Many of today’s electronic systems get their power from external sources such as wall wart adapters, batteries and custom power supplies. A typical supply arrangement for a portable product is shown by the operational diagram in Figure 1. Power is supplied by an AC adaptor or, if the plug is withdrawn, by a removable battery. Trouble arises when any of the following occurs: • The battery is installed backwards • An AC adaptor of opposite polarity is attached • An AC adaptor of excessive voltage is attached • The battery is discharged below a safe level This can lead to supply voltages that are too high, too low, or even negative. If these power sources are applied directly to the electronic systems, the systems could be subject to damage. The LTC4365 is an input voltage fault protection N-channel MOSFET controller. The part isolates an input supply from its load to protect the load from unexpected supply voltage conditions, while providing a low loss path for qualified power. To protect electronic systems from improperly connected power supplies, system designers will often add discrete diodes, transistors and high voltage comparators. The high voltage comparators enable system power only if the input supply falls within a desired voltage window. A Schottky diode or P-channel MOSFET typically added in series with the supply protects against reverse supply connections. The LTC4365 provides accurate overvoltage and undervoltage comparators to ensure that power is applied to Rev. B 8 For more information www.analog.com LTC4365 OPERATION the system only if the input supply meets the user selectable voltage window. Reverse supply protection circuits automatically isolate the load from negative input voltages. During normal operation, a high voltage charge pump enhances the gate of external N-channel power MOSFETs. Power consumption is 10µA during shutdown and 125µA while operating. The LTC4365 integrates all these functions in tiny TSOT-23 and 3mm × 2mm DFN packages. –40V TO 60V PROTECTION RANGE AC ADAPTOR INPUT M1 + M2 LOAD CIRCUIT – BATTERY GATE VIN VOUT LTC4365 R5 SHDN R3 OV, UV PROTECTION THRESHOLDS SET TO SATISFY LOAD CIRCUIT UV FAULT R2 OV R1 2.5V TO 34V OPERATING RANGE GND 4365 F01 Figure 1. Operational Diagram Common to Many Portable Products APPLICATIONS INFORMATION The LTC4365 is an N-channel MOSFET controller that protects a load from faulty supply connections. A basic application circuit using the LTC4365 is shown in Figure 2 The circuit provides a low loss connection from VIN to VOUT as long as the voltage at VIN is between 5V and SiSB46DN 40V DUAL VIN 12V NOMINAL M1 R5 100k R3 2740k M2 GATE VIN + VOUT 5V TO 18V COUT 100µF VOUT The LTC4365 turns on the external N-channel MOSFETs by driving the GATE pin above VOUT. The voltage difference between the GATE and VOUT pins (gate drive) is a function of VIN and VOUT. SHDN FAULT R2 215k OV R1 84.5k During normal operation, the LTC4365 provides up to 9.8V of gate enhancement to the external back-to-back N-channel MOSFETs. This turns on the MOSFET, thus connecting the load at VOUT to the supply at VIN. GATE Drive LTC4365 UV 18V. Voltages at VIN outside of the 5V to 18V range are prevented from getting to the load and can be as high as 40V and as low as –40V. The circuit of Figure 2 protects against negative voltages at VIN as shown. No other external components are needed. OV = 18V UV = 5V GND 4365 F02 Figure 2. LTC4365 Protects Load from –40V to 40V VIN Faults Rev. B For more information www.analog.com 9 LTC4365 APPLICATIONS INFORMATION Figure 3 highlights the dependence of the gate drive on VIN and VOUT. When system power is first turned on (SHDN low to high, VOUT = 0V), gate drive is at a maximum for all values of VIN. This helps prevent start-up problems into heavy loads by ensuring that there is enough gate drive to support the load. As VOUT ramps up from 0V, the absolute value of the GATE voltage remains fixed until VOUT is greater than the lower of (VIN –1V) or 6V. Once VOUT crosses this threshold, gate drive begins to increase up to a maximum of 9.8V (for VIN ≥ 12V). The curves of Figure 3 were taken with a GATE load of –1µA. If there were no load on GATE, the gate drive for each VIN would be slightly higher. Note that when VIN is at the lower end of the operating range, the external N-channel MOSFET must be selected with a corresponding lower threshold voltage. The LTC4365 provides two accurate comparators to monitor for overvoltage (OV) and undervoltage (UV) conditions at VIN. If the input supply rises above the user adjustable OV threshold, the gate of the external MOSFET is quickly turned off, thus disconnecting the load from the input. Similarly, if the input supply falls below the user adjustable UV threshold, the gate of the external MOSFET also is quickly turned off. Figure 4 shows a UV/OV application for an input supply of 12V. 12V T = 25°C IGATE = –1µA 10 UV UVTH = 5V 0.5V – + 25mV OV COMPARATOR OV R1 84.5k 8 UV COMPARATOR R3 2470k OVTH = 18V VIN = 30V LTC4365 VIN R2 215k 12 ∆VGATE (V) Overvoltage and Undervoltage Protection DISCHARGE GATE WITH 50mA SINK + 25mV 0.5V – 6 4365 F04 VIN = 12V 4 VIN = 5V 2 0 Figure 4. UV, OV Comparators Monitor 12V Supply VIN = 3.3V VIN = 2.5V 0 3 6 9 VOUT (V) 12 15 4365 F03 Figure 3. Gate Drive (GATE – VOUT) vs VOUT Table 1 lists some external MOSFETs compatible with different VIN supply voltages. Table 1. Dual MOSFETs for Various Supply Ranges VIN MOSFET VTH(MAX) VGS(MAX) VDS(MAX) 2.5V SiB914 0.8V 5V 8V 3.3V Si5920 1.0V 5V 8V 5V Si7940 1.5V 8V 12V ≤30V Si4214 3.0V 20V 30V ≤60V Si9945 3.0V 20V 60V The external resistive divider allows the user to select an input supply range that is compatible with the load at VOUT. Furthermore, the UV and OV inputs have very low leakage currents (typically < 1nA at 100°C), allowing for large values in the external resistive divider. In the application of Figure 4, the load is connected to the supply only if VIN lies between 5V and 18V. In the event that VIN goes above 18V or below 5V, the gate of the external N-channel MOSFET is immediately discharged with a 50mA current sink, thus isolating the load from the supply. Rev. B 10 For more information www.analog.com LTC4365 APPLICATIONS INFORMATION Figure 5 shows the timing associated with the UV pin. Once a UV fault propagates through the UV comparator (tFAULT), the FAULT output is asserted low and a 50mA current sink discharges the GATE pin. As VOUT falls, the GATE pin tracks VOUT. UV VUV tFAULT FAULT tGATE(FAST) The following 3-step procedure helps select the resistor values for the resistive divider of Figure 4. This procedure minimizes UV and OV offset errors caused by leakage currents at the respective pins. 1. Choose maximum tolerable offset at the UV pin, VOS(UV). Divide by the worst case leakage current at the UV pin, IUV (10nA). Set the sum of R1 + R2 equal to VOS(UV) divided by 10nA. Note that due to the presence of R3, the actual offset at UV will be slightly lower: VUV + VUVHYST tFAULT Procedure for Selecting UV/OV External Resistor Values tRECOVERY EXTERNAL N-CHANNEL MOSFET TURNS OFF GATE R1 + R2 = 4365 F05 Figure 5. UV Timing (OV < (VOV – VOVHYST), SHDN > 1.2V) Figure 6 shows the timing associated with the OV pin. Once an OV fault propagates through the OV comparator (tFAULT), the FAULT output is asserted low and a 50mA current sink discharges the GATE pin. As VOUT falls, the GATE pin tracks VOUT. OV VOV I UV 2. Select the desired VIN UV trip threshold, UVTH. Find the value of R3: VOS(UV) R3 = I UV ⎛ UV TH – 0.5V⎞ • ⎜ ⎟⎠ 0.5V ⎝ 3. Select the desired VIN OV trip threshold, OVTH. Find the values of R1 and R2: VOV – VOVHYST tFAULT tFAULT R1 = FAULT tGATE(FAST) GATE VOS(UV) tRECOVERY EXTERNAL N-CHANNEL MOSFET TURNS OFF 4365 F06 Figure 6. OV Timing (UV > (VUV + VUVHYST), SHDN > 1.2V) When both the UV and OV faults are removed, the external MOSFET is not immediately turned on. The input supply must remain within the user selected power good window for at least 36ms (tRECOVERY) before the load is again connected to the supply. This recovery timeout period filters noise (including line noise) at the input supply and prevents chattering of power at the load. For applications that require faster turn-on after a fault, the LTC4365-1 provides a 1ms recovery timeout period. R2 = ⎛ VOS(UV) ⎞ ⎜ ⎟ + R3 ⎝ I UV ⎠ OV TH VOS(UV) I UV • 0.5V – R1 The example of Figure 4 uses standard 1% resistor values. The following parameters were selected: VOS(UV) = 3mV IUV = 10nA UVTH = 5V OVTH = 18V Rev. B For more information www.analog.com 11 LTC4365 APPLICATIONS INFORMATION As shown in Figure 7, external back-to-back N-channel MOSFETs are required for reverse supply protection. When VIN goes negative, the reverse VIN comparator closes the internal switch, which in turn connects the gates of the external MOSFETs to the negative VIN voltage. The body diode (D1) of M1 turns on, but the body diode (D2) of M2 remains in reverse blocking mode. This means that the common source connection of M1 and M2 remains about a diode drop higher than VIN. Since the gate voltage of M2 is shorted to VIN, M2 will be turned off and no current can flow from VIN to the load at VOUT. Note that the voltage rating of M2 must withstand the reverse voltage excursion at VIN. The resistor values can then be solved: 1. 1. R1 + R2 = 2. R3 = 2 • 3mV 10nA 3mV 10nA = 300k • ( 5V − 0.5V ) = 2.7M The closest 1% value: R3 = 2.74M: 3. R1= 300k + 1.82M 2 • 18V = 84.4k The closest 1% value: R1 = 84.5k: Figure 8 illustrates the waveforms that result when VIN is hot plugged to –20V. VIN, GATE and VOUT start out at ground just before the connection is made. Due to the parasitic inductance of the VIN and GATE connections, the voltage at the VIN and GATE pins ring significantly below –20V. Therefore, a 40V N-channel MOSFET was selected to survive the overshoot. R2 = 300k – 84.5k = 215.5k The closest 1% value: R2 = 215k Therefore: OV = 17.99V, UV = 5.07V. Reverse VIN Protection The LTC4365’s rugged and hot-swappable VIN input helps protect the more sensitive circuits at the output load. If the input supply is plugged in backwards, or a negative supply is inadvertently connected, the LTC4365 prevents this negative voltage from passing to the output load. The LTC4365 employs a novel, high speed reverse supply voltage monitor. When the negative VIN voltage is detected, an internal switch connects the gates of the external backto-back N-channel MOSFETs to the negative input supply. D1 The trace at VOUT, on the other hand, does not respond to the negative voltage at VIN, demonstrating the desired reverse supply protection. The waveforms of Figure 8 were captured using a 40V dual N-channel MOSFET, a 10µF ceramic output capacitor and no load current on VOUT. D2 VIN = –40V M1 VIN The speed of the LTC4365 reverse protection circuits is evident by how closely the GATE pin follows VIN during the negative transients. The two waveforms are almost indistinguishable on the scale shown. M2 GATE TO LOAD + COUT VOUT GND VOUT 5V/DIV LTC4365 REVERSE VIN COMPARATOR –20V + GND – VIN GATE CLOSES SWITCH WHEN VIN IS NEGATIVE 4365 F07 Figure 7. Reverse VIN Protection Circuits 500ns/DIV 4365 F07 Figure 8. Hot Swapping VIN to –20V Rev. B 12 For more information www.analog.com LTC4365 APPLICATIONS INFORMATION Recovery Timer The LTC4365 has a recovery delay timer that filters noise at VIN and helps prevent chatter at VOUT. After either an OV or UV fault has occurred, the input supply must return to the desired operating voltage window for at least 36ms (tRECOVERY) in order to turn the external MOSFET back on as illustrated in Figure 5 and Figure 6. For applications that require faster turn-on after a fault, the LTC4365-1 provides a 1ms recovery timeout period. Going out of and then back into fault in less than tRECOVERY will keep the MOSFET off continuously. Similarly, coming out of shutdown (SHDN low to high) triggers an 800µs start-up delay timer (see Figure 11). The recovery timer is also active while the part is powering up. The recovery timer starts once VIN rises above VIN(UVLO) and VIN lies within the user selectable UV/OV power good window. See Figure 9. MOSFET OFF GATE VOUT 5V/DIV SHDN GND 100µs/DIV 4365 F10 Figure 10. Gentle Shutdown: GATE Tracks VOUT as VOUT Decays The FAULT high voltage open drain output is driven low if SHDN is asserted low, if VIN is outside the desired UV/OV voltage window, or if VIN has not risen above VIN(UVLO). Figure 5, Figure 6 and Figure 11 show the FAULT output timing. tRECOVERY GATE VIN = 12V T = 25°C FAULT Status VIN(UVLO) VIN further decrease GATE pin slew rate, place a capacitor across the gate and source terminals of the external MOSFETs. The waveforms of Figure 10 were captured using the Si4214 dual N-channel MOSFETs, and a 2A load with 100µF output capacitor. MOSFET ON 4365 F09 SHDN Figure 9. Recovery Timing During Power-On (OV = GND, UV = SHDN = VIN) tGATE(SLOW) GATE tSTART ∆VGATE Gentle Shutdown GATE = VOUT The SHDN input turns off the external MOSFETs in a gentle, controlled manner. When SHDN is asserted low, a 90µA current sink slowly begins to turn off the external MOSFETs. Once the voltage at the GATE pin falls below the voltage at the VOUT pin, the current sink is throttled back and a feedback loop takes over. This loop forces the GATE voltage to track VOUT, thus keeping the external MOSFETs off as VOUT decays. Note that when VOUT < 4.5V, the GATE pin is pulled to within 400mV of ground. Gentle gate turn off reduces load current slew rates and mitigates voltage spikes due to parasitic inductances. To VOUT tSHDN(F) FAULT 4365 F11 Figure 11. Gentle Shutdown Timing Select Between Two Input Supplies With the part in shutdown, the VIN and VOUT pins can be driven by separate power supplies. The LTC4365 then automatically drives the GATE pin just below the lower of Rev. B For more information www.analog.com 13 LTC4365 APPLICATIONS INFORMATION the two supplies, thus turning off the external back-to-back MOSFETs. The application of Figure 12 uses two LTC4365s to select between two power supplies. Care should be taken to ensure that only one of the two LTC4365s is enabled at any given time. Limiting Inrush Current During Turn-On The LTC4365 turns on the external N-channel MOSFET with a 20µA current source. The maximum slew rate at the GATE pin can be reduced by adding a capacitor on the GATE pin: V1 M1 Slew Rate = M2 GATE VIN VOUT LTC4365 OUT SHDN V2 M1 Since the MOSFET acts like a source follower, the slew rate at VOUT equals the slew rate at GATE. M2 GATE IINRUSH = C OUT C GATE • 20µA For example, a 1A inrush current to a 330µF output capacitance requires a GATE capacitance of: VOUT LTC4365 SHDN SEL C GATE Therefore, inrush current is given by: SEL OUT 0 V1 1 V2 VIN 20µA 4365 F12 20µA • C OUT C GATE = IINRUSH Figure 12. Selecting One of Two Supplies Single MOSFET Application When reverse VIN protection is not needed, only a single external N-channel MOSFET is necessary. The application circuit of Figure 13 connects the load to VIN when VIN is less than 30V, and uses the minimal set of external components. SI7120DN 60V VIN 24V + R5 100k R2 2370k GATE VIN VOUT 20µA • 330µF M1 FAULT = 6.6nF VIN SHDN UV 1A The 6.8nF CGATE capacitor in the application circuit of Figure 14 limits the inrush current to approximately 1A. RGATE makes sure that CGATE does not affect the fast GATE turn off characteristics during UV/OV faults, or during reverse VIN connection. R4A and R4B help prevent high frequency oscillations with the external N-channel MOSFET and related board parasitics. LTC4365 VIN R4A 10Ω R4B 10Ω GATE M2 + COUT 330µF CGATE 6.8nF OV = 30V GND VOUT RGATE 5.1k VOUT LTC4365 OV R1 40.2k VOUT COUT 100µF C GATE = 4365 F14 4365 F13 Figure 13. Small Footprint Single MOSFET Application Protects Against 60V Figure 14. Limiting Inrush Current with CGATE Rev. B 14 For more information www.analog.com LTC4365 APPLICATIONS INFORMATION Transients During OV Fault pacitance at the VIN node. D1 is an optional power clamp (TVS, Tranzorb) recommended for applications where the DC input voltage can exceed 24V and with large VIN parasitic inductance. No clamp was used to capture the waveforms of Figure 16. In order to maintain reverse supply protection, D1 must be a bi-directional clamp rated for at least 225W peak pulse power dissipation. The circuit of Figure 15 was used to display transients during an overvoltage condition. The nominal input supply is 24V and it has an overvoltage threshold of 30V. The parasitic inductance is that of a 1 foot wire (roughly 300nH). Figure 16 shows the waveforms during an overvoltage condition at VIN. These transients depend on the parasitic inductance and resistance of the wire along with the ca- VIN 24V 12 INCH WIRE LENGTH + SI9945 60V CIN 1000µF M1 D1 OPTIONAL + M2 GATE VIN R3 100k VOUT COUT 100µF 9Ω VOUT LTC4365 SHDN UV FAULT R2 2370k OV R1 40.2k OV = 30V GND 4365 F15 Figure 15. OV Fault with Large VIN Inductance GATE VOUT VOUT GATE 20V/DIV GND VIN 20V/DIV GND IIN 2A/DIV 0A 250ns/DIV 4365 F16 Figure 16. Transients During OV Fault When No Tranzorb (TVS) Is Used Rev. B For more information www.analog.com 15 LTC4365 APPLICATIONS INFORMATION REGULATOR APPLICATIONS and duty cycle of the VIN glitch must not exceed the SOA rating of the external MOSFETs. Hysteretic Regulator Solar Charger Built-in hysteresis and the availability of both inverting and noninverting control inputs (OV and UV) facilitate the design of hysteretic regulators. Figure 17 shows how the LTC4365-1 can protect a load from OV transients, while regulating the output voltage at a user-defined level. When the output voltage reaches its OV limit, the LTC4365-1 turns off the external MOSFETs. The load current then discharges the output capacitance until OV falls below the hysteresis voltage. The external MOSFETs are turned back on after a 1ms delay. Figure 18 shows the waveforms for the circuit of Figure 17. Note that the duration, magnitude VIN 12V OPTIONAL SNUBBER Figure 19 shows a series regulator for a solar charger. The LTC4365-1 connects the solar charger to the battery when the battery voltage falls below 13.9V (after a 1ms delay). Conversely, when the battery reaches 14.6V, the LTC4365-1 immediately (2µs) opens the charging path. Regulation of the battery voltage is achieved by connecting a resistive divider from the battery to the accurate OV comparator input (with 5% hysteresis). The fast rising response of the OV comparator prevents the battery voltage from rising above the user-selected threshold. Si4946 DUAL NCH + R7 1Ω 1µF R5 510k GATE VIN UV VOUT CLOAD 47µF RLOAD 100Ω VIN VOUT LTC4365-1 FAULT SHDN 5V/DIV R2 1820k VOUT OV R1 59k GND 4365 F17 COV 220pF GND 2.5ms/DIV Figure 17. Hysteretic Regulation of VOUT During OV Transients 15W SOLAR PANEL Figure 18. VOUT Regulates at 16V When VIN Glitches Above Desired Level 1/2 OF Si4214 D1 D4 B130 1/2 OF Si4214 D2 M1 M2 + CBYP 100nF SHDN UV VOUT GATE 4365 F18 TO LOAD CBATT 100µF 12V, 8Ah GELCELL VIN R2 3.24M LTC4365-1 OV GND R1 115k 14.6V OFF 13.9V ON COV 220pF 4365 F19 Figure 19. Series Hysteretic Solar Charger with Reverse-Battery and Solar Panel Protection Rev. B 16 For more information www.analog.com LTC4365 APPLICATIONS INFORMATION Note that during initial start-up, the LTC4365-1 will not turn on the external MOSFETs until a battery is first connected to the VIN pin. To begin operation, VIN must initially rise above the 2.2V UVLO lockout voltage. Connecting the battery ensures that the LTC4365-1 comes out of UVLO. handling capability, drain and gate breakdown voltages, and threshold voltage. The drain to source breakdown voltage must be higher than the maximum voltage expected between VIN and VOUT. Note that if an application generates high energy transients during normal operation or during Hot Swap™, the external MOSFET must be able to withstand this transient voltage. 12V Application with 150V Transient Protection Figure 20 shows a 12V application that withstands input supply transients up to 150V. When the input voltage exceeds 17.9V, the OV resistive divider turns off the external MOSFETs. As VIN rises to 150V, the gate of transistor M1 remains in the Off condition, thus preventing conduction from VIN to VOUT. Note that M1 must have an operating range above 150V. Due to the high impedance nature of the charge pump that drives the GATE pin, the total leakage on the GATE pin must be kept low. The gate drive curves of Figure 2 were measured with a 1µA load on the GATE pin. Therefore, the leakage on the GATE pin must be no greater than 1µA in order to match the curves of Figure 2. Higher leakage currents will result in lower gate drive. The dual N-channel MOSFETs shown in Table 1 all have a maximum GATE leakage current of 100nA. Additionally, Table 1 lists representative MOSFETs that would work at different values of VIN. Resistor R6 and diode D3 clamp the LTC4365 supply voltage to 50V. To prevent R6 from interfering with reverse operation, the recommended value is 1k or less. Note that the power handling capability of R6 must be considered in order to avoid overheating during transients. D3 is shown as a bidirectional clamp in order to achieve reverse-polarity protection at VIN. M2 is also required in order to protect VOUT from negative voltages at VIN and should have an operating range beyond the breakdown of D3. If reverse protection is not desired remove M2 and connect the source of M1 directly to VOUT. Layout Considerations The trace length between the VIN pin and the drain of the external MOSFET should be minimized, as well as the trace length between the GATE pin of the LTC4365 and the gates of the external MOSFETs. Place the bypass capacitors at VOUT as close as possible to the external MOSFET. Use high frequency ceramic capacitors in addition to bulk capacitors to mitigate Hot Swap ringing. Place the high frequency capacitors closest to the MOSFET. Note that bulk capacitors mitigate ringing by virtue of their ESR. Ceramic capacitors have low ESR and can thus ring near their resonant frequency. MOSFET Selection To protect against a negative voltage at VIN, the external N-channel MOSFETs must be configured in a back-toback arrangement. Dual N-channel packages are thus the best choice. The MOSFET is selected based on its power FDB33N25 M1 VIN 12V M2 VOUT R6 1k R2 2050k D3 R3 510k GATE VIN SHDN UV FAULT OV R1 59k VOUT LTC4365 GND OV = 17.9V D3: SMAJ43CA BI-DIRECTIONAL 4365 F20 Figure 20. 12V Application Protected from 150V Transients Rev. B For more information www.analog.com 17 LTC4365 PACKAGE DESCRIPTION TS8 Package 8-Lead Plastic TSOT-23 (Reference LTC DWG # 05-08-1637 Rev A) 0.40 MAX 2.90 BSC (NOTE 4) 0.65 REF 1.22 REF 1.4 MIN 3.85 MAX 2.62 REF 2.80 BSC 1.50 – 1.75 (NOTE 4) PIN ONE ID RECOMMENDED SOLDER PAD LAYOUT PER IPC CALCULATOR 0.22 – 0.36 8 PLCS (NOTE 3) 0.65 BSC 0.80 – 0.90 0.20 BSC 0.01 – 0.10 1.00 MAX DATUM ‘A’ 0.30 – 0.50 REF 1.95 BSC 0.09 – 0.20 (NOTE 3) NOTE: 1. DIMENSIONS ARE IN MILLIMETERS 2. DRAWING NOT TO SCALE 3. DIMENSIONS ARE INCLUSIVE OF PLATING 4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR 5. MOLD FLASH SHALL NOT EXCEED 0.254mm 6. JEDEC PACKAGE REFERENCE IS MO-193 TS8 TSOT-23 0710 REV A DDB Package 8-Lead Plastic DFN (3mm × 2mm) (Reference LTC DWG # 05-08-1702 Rev B) 0.61 ±0.05 (2 SIDES) 3.00 ±0.10 (2 SIDES) 0.70 ±0.05 2.55 ±0.05 1.15 ±0.05 PACKAGE OUTLINE 0.25 ± 0.05 0.50 BSC 2.20 ±0.05 (2 SIDES) PIN 1 BAR TOP MARK (SEE NOTE 6) 0.200 REF R = 0.115 TYP 5 R = 0.05 TYP 0.40 ± 0.10 8 2.00 ±0.10 (2 SIDES) 0.56 ± 0.05 (2 SIDES) 0.75 ±0.05 0 – 0.05 RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS 4 0.25 ± 0.05 1 PIN 1 R = 0.20 OR 0.25 × 45° CHAMFER (DDB8) DFN 0905 REV B 0.50 BSC 2.15 ±0.05 (2 SIDES) BOTTOM VIEW—EXPOSED PAD NOTE: 1. DRAWING CONFORMS TO VERSION (WECD-1) IN JEDEC PACKAGE OUTLINE M0-229 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE Rev. B 18 For more information www.analog.com LTC4365 REVISION HISTORY REV DATE DESCRIPTION A 09/13 Added LTC4365-1 Information 8, 9 Table 1: MOSFET for ≤30V changed to Si4214 from Si4230 10 Figure 13: Inserted R5, 100k resistor to SHDN pin 14 Updated Typical Application 09/19 Multiple Operation section: Rewritten with new Figure 1 Added "Regulator Applications" with three subsections and Figures 17 to 20 B PAGE NUMBER 16, 17 20 Added AEC-Q100 qualification and "W” part numbers 1, 3 Revised application examples (Figures 2 and 4) to support VOUT = 5V to 18V 9-12 Rev. B Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license For is granted implication or otherwise under any patent or patent rights of Analog Devices. more by information www.analog.com 19 LTC4365 TYPICAL APPLICATION LTC4365 Protects Step Down Regulator from –40V to 40V VIN Faults SiSB46DN DUAL N-CHANNEL VIN 12V NOMINAL VOUT OUTPUT 5V 3.5A 10µF VOUT PROTECTED FROM –40V TO 40V VIN BD RUN/SS BOOST GATE VIN VOUT 15k LTC4365 510k 680pF SHDN 1820k UV FAULT 63.4k 97.6k OV 54.9k LT1913 VC 0.47µF 4.7µH SW RT PG FB SYNC GND 536k 100k 47µF OV = 18V UV = 6.5V GND 4365 TA02 RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LT4363 Surge Stopper Overvoltage/Overcurrent Protection Regulator Wide Operating Range: 4V to 80V, Reverse Protection to –60V, Adjustable Output Clamp Voltage LTC4364 Surge Stopper with Ideal Diode 4V to 80V Operation, –40V Reverse Input, –20V Reverse Output LTC4366 Floating Surge Stopper 9V to >500V Operation, 8-Pin TSOT and 3mm × 2mm DFN Packages LTC4361 Overvoltage/Overcurrent Protection Controllers 5.8V Overvoltage Threshold, 85V Absolute Maximum LTC2909 Triple/Dual Inputs UV/OV Negative Monitor Pin Selectable Input Polarity Allows Negative and OV Monitoring LTC2912/LTC2913 Single/Dual UV/OV Voltage Monitor Ads UV and OV Trip Values, ±1.5% Threshold Accuracy LTC2914 Quad UV/OV Monitor For Positive and Negative Supplies LTC2955 Pushbutton On/Off Controller Automatic Turn-On, 1.5V to 36V Input, ±36V PB Input LT4256 Positive 48V Hot Swap Controller with Open-Circuit Detect Foldback Current Limiting, Open-Circuit and Overcurrent Fault Output, Up to 80V Supply LTC4260 Positive High Voltage Hot Swap Controller with ADC and I2C Wide Operating Range 8.5V to 80V LTC4352 Ideal MOSFET ORing Diode External N-Channel MOSFETs Replace ORing Diodes, 0V to 18V LTC4354 Negative Voltage Diode-OR Controller Controls Two N-Channel MOSFETs, 1.2µs Turn-Off, –80V Operation LTC4355 Positive Voltage Diode-OR Controller Controls Two N-Channel MOSFETs, 0.4µs Turn-Off, 80V Operation LT1913 Step-Down Switching Regulator 3.6V to 25V Input, 3.5A Maximum Current, 200kHz to 2.4MHz Rev. B 20 09/19 www.analog.com For more information www.analog.com  ANALOG DEVICES, INC. 2013–2019