LTC4368
100V UV/OV and Reverse Protection
Controller with Bidirectional Circuit Breaker
FEATURES
DESCRIPTION
Wide Operating Voltage Range: 2.5V to 60V
nn Overvoltage Protection to 100V
nn Reverse Supply Protection to –40V
nn Bidirectional Electronic Circuit Breaker:
nn +50mV Forward Sense Threshold
nn –50mV Reverse (LTC4368-1)
nn –3mV Reverse (LTC4368-2)
nn Adjustable ±1.5% Undervoltage and Overvoltage
Thresholds
nn Low Operating Current: 80µA
nn Low Shutdown Current: 5µA
nn Controls Back-to-Back N-Channel MOSFETs
nn Blocks 50Hz and 60Hz AC Power
nn Hot Swappable Supply Input
nn Pin-Selectable Overcurrent Auto-Retry Timer or Latchoff
nn 10-Pin MSOP and 3mm × 3mm DFN Packages
nn AEC-Q100 Qualified for Automotive Applications
The LTC®4368 protects applications from power supply
voltages that may be too high, too low, or even negative
and from overcurrent faults in both forward and reverse
directions. The LTC4368 controls the gate voltage of a pair
of external N-channel MOSFETs to ensure that the load
is connected to the input supply only when there are no
voltage or current faults.
nn
APPLICATIONS
Reverse Battery Protection
Portable Instrumentation
nn Automotive and Industrial Surge Protection
nn Energy Storage Systems
nn
Two comparator inputs allow configuration of the overvoltage (OV) and undervoltage (UV) set points using an
external resistive divider. A current sense resistor sets the
forward and reverse circuit breaker current thresholds.
After a forward current fault, the LTC4368 will either latchoff power, or retry after a user adjustable delay. After a
reverse current fault, the LTC4368 waits for the output to
fall 100mV below the input to reconnect power to the load.
The LTC4368 has a 32ms turn-on delay that debounces
live supply input connections and blocks 50Hz and 60Hz
AC power. UV/OV faults also trigger the 32ms recovery
delay before the external MOSFETs are turned back on.
All registered trademarks and trademarks are the property of their respective owners.
nn
TYPICAL APPLICATION
Load Protected from Reverse and Overvoltage at VIN
24V Application with 10A Circuit Breaker
+50mV
VIN
24V
–40V TO 100V
SiR870
SiR870
0.005Ω
INRUSH
CONTROL
22k
VOUT
7V TO 36V
–3mV
+
IOUT
–0.6A TO 10A
100µF
+70V
20V/DIV
OV = 36V
UV = 7V
VALID WINDOW
3.3nF
VIN
GATE
SENSE
VOUT
GND
464k
UV
LTC4368-2
121k
OV
29.4k
VOUT
VOUT
FAULT
SHDN
1500k
OV = 36V
UV = 7V
VIN
RETRY
GND
1200ms COOLDOWN
AFTER FORWARD
OC FAULT
–40V
20V/DIV
0.22µF
VIN
200ms/DIV
4368 TA01b
4368 TA01a
Rev. B
Document Feedback
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1
LTC4368
ABSOLUTE MAXIMUM RATINGS
(Note 1, Note 2)
Supply Voltage
VIN......................................................... –40V to 100V
Input Voltages
UV, SHDN (Note 3).........................…….–0.3V to 80V
OV (Note 3)............................................. –0.3V to 20V
RETRY (Note 3)........................................ –0.3V to 5V
VOUT, SENSE.............................................–10V to 80V
VOUT to SENSE..........................................–10V to 10V
VIN to VOUT............................................ –60V to 100V
Output Voltages
FAULT (Note 3)........................................ –0.3V to 80V
GATE............................................... –40V to VIN + 14V
Input Currents
RETRY, UV, OV ,SHDN, FAULT............................–1mA
Operating Ambient Temperature Range
LTC4368C................................................ 0°C to 70°C
LTC4368I............................................. –40°C to 85°C
LTC4368H......................................... . –40°C to 125°C
Storage Temperature Range .................. –65°C to 150°C
Lead Temperature (Soldering, 10 sec)
MSOP Package.................................................. 300°C
PIN CONFIGURATION
TOP VIEW
VIN
1
10 GATE
UV
2
9 SENSE
OV
3
RETRY
4
8 VOUT
7 FAULT
GND
5
6 SHDN
TOP VIEW
VIN
UV
OV
RETRY
GND
1
2
3
4
5
10
9
8
7
6
GATE
SENSE
VOUT
FAULT
SHDN
MS10 PACKAGE
10-LEAD PLASTIC MSOP
DD PACKAGE
10-LEAD (3mm × 3mm) PLASTIC DFN
TJMAX = 150°C, θJA = 160°C/W
EXPOSED PAD (PIN 11) PCB GROUND CONNECTION OPTIONAL
TJMAX = 150°C, θJA = 43°C/W
ORDER INFORMATION
LEAD FREE FINISH
TAPE AND REEL
PART MARKING*
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LTC4368CDD-1#PBF
LTC4368CDD-1#TRPBF
LGTH
10-Lead (3mm × 3mm) Plastic DFN
0°C to 70°C
LTC4368CDD-2#PBF
LTC4368CDD-2#TRPBF
LGTK
10-Lead (3mm × 3mm) Plastic DFN
0°C to 70°C
LTC4368IDD-1#PBF
LTC4368IDD-1#TRPBF
LGTH
10-Lead (3mm × 3mm) Plastic DFN
–40°C to 85°C
LTC4368IDD-2#PBF
LTC4368IDD-2#TRPBF
LGTK
10-Lead (3mm × 3mm) Plastic DFN
–40°C to 85°C
LTC4368HDD-1#PBF
LTC4368HDD-1#TRPBF
LGTH
10-Lead (3mm × 3mm) Plastic DFN
–40°C to 125°C
LTC4368HDD-2#PBF
LTC4368HDD-2#TRPBF
LGTK
10-Lead (3mm × 3mm) Plastic DFN
–40°C to 125°C
LTC4368CMS-1#PBF
LTC4368CMS-1#TRPBF
LTGTG
10-Lead Plastic MSOP
0°C to 70°C
LTC4368CMS-2#PBF
LTC4368CMS-2#TRPBF
LTGTJ
10-Lead Plastic MSOP
0°C to 70°C
LTC4368IMS-1#PBF
LTC4368IMS-1#TRPBF
LTGTG
10-Lead Plastic MSOP
–40°C to 85°C
LTC4368IMS-2#PBF
LTC4368IMS-2#TRPBF
LTGTJ
10-Lead Plastic MSOP
–40°C to 85°C
LTC4368HMS-1#PBF
LTC4368HMS-1#TRPBF
LTGTG
10-Lead Plastic MSOP
–40°C to 125°C
LTC4368HMS-2#PBF
LTC4368HMS-2#TRPBF
LTGTJ
10-Lead Plastic MSOP
–40°C to 125°C
Rev. B
2
For more information www.analog.com
LTC4368
ORDER INFORMATION
AUTOMOTIVE PRODUCTS**
LTC4368IMS-1#WPBF
LTC4368IMS-1#WTRPBF
LTGTG
10-Lead Plastic MSOP
–40°C to 85°C
LTC4368IMS-2#WPBF
LTC4368IMS-2#WTRPBF
LTGTJ
10-Lead Plastic MSOP
–40°C to 85°C
LTC4368HMS-1#WPBF
LTC4368HMS-1#WTRPBF
LTGTG
10-Lead Plastic MSOP
–40°C to 125°C
LTC4368HMS-2#WPBF
LTC4368HMS-2#WTRPBF
LTGTJ
10-Lead Plastic MSOP
–40°C to 125°C
*Temperature grades are identified by a label on the shipping container. Consult ADI Marketing for parts specified with wider operating temperature ranges.
Tape and reel specifications. Some packages are available in 500 unit reels through designated sales channels with #TRMPBF suffix.
**Versions of this part are available with controlled manufacturing to support the quality and reliability requirements of automotive applications. These
models are designated with a #W suffix. Only the automotive grade products shown are available for use in automotive applications. Contact your
local Analog Devices account representative for specific product ordering information and to obtain the specific Automotive Reliability reports for
these models.
ELECTRICAL
CHARACTERISTICS
The
l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 2.5V to 60V, unless otherwise noted (Note 2). UV = 2.5V, OV = 0V,
SHDN = 2.5V, SENSE = VOUT = VIN unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
60
100
V
V
VIN, VOUT, SENSE
VIN
Input Voltage: Operating Range
Protection Range
l
l
2.5
–40
VIN(UVLO)
Input Supply Undervoltage Lockout
VIN Rising
l
IVIN
1.8
2.2
2.4
V
Input Supply Current: On
Off
SHDN = 2.5V, SENSE = VOUT = VIN
SHDN = 0V, SENSE = VOUT = VIN
l
l
30
5
100
25
µA
µA
IVIN(R)
Reverse Input Supply Current
VIN = –40V, SENSE = VOUT = 0V
l
–1.5
–2.5
mA
VOUT(UVLO) VOUT Undervoltage Lockout
VOUT Rising, VOUT – SENSE = 100mV, VIN = 12V
l
1.8
2.2
2.4
V
tVOUT(UVLO) VOUT Undervoltage Lockout Delay
VIN = 12V, VOUT:0V→12V, VOUT – SENSE = 100mV
l
40
120
280
µs
SHDN = 2.5V, SENSE = VOUT = VIN
SHDN = 0V, SENSE = VOUT = VIN
VIN = –40V, SENSE = VOUT = 0V
l
l
l
50
3
20
125
20
50
µA
µA
µA
1.2
0.1
1
2
2
10
µA
µA
µA
IVOUT
VOUT Input Current: On
Off
Reverse
Current Sense
ISENSE
SENSE Input Current: On
Off
Reverse
SHDN = 2.5V, SENSE = VOUT = VIN
SHDN = 0V, SENSE = VOUT = VIN
VIN = –40V, SENSE = VOUT = 0V
l
l
l
ΔVSENSE,F
Overcurrent Fault Threshold, Forward
(SENSE – VOUT)
VOUT = VIN
VIN = 12V, VOUT = 0.5V
VIN = 12V, VOUT = 0V
l
l
l
40
40
30
50
50
50
60
60
70
mV
mV
mV
ΔVSENSE,R
Overcurrent Fault Threshold, Reverse
(SENSE – VOUT)
LTC4368-1 VOUT = VIN
LTC4368-2 VOUT = VIN
l
l
–42
–1
–50
–3
–58
–5
mV
mV
ΔVRR
Reverse Overcurrent Re-Enable
Turn-On Threshold (VIN – VOUT)
VIN = SENSE = 6V to 60V
VIN = SENSE = 2.5V to 0V
l
22
32
45
ms
tp(GATE)
Overcurrent Fault Propagation Delay
CGATE = 2.2nF, Overcurrent Fault to ∆VGATE = 0V
SENSE – VOUT: 0 to +100mV, or
SENSE – VOUT: 0 to –100mV (LTC4368-1)
SENSE – VOUT: 0 to –10mV (LTC4368-2)
l
3
8
18
µs
VUV
UV Input Threshold Voltage
UV Falling
l
492.5
500
507.5
mV
VOV
OV Input Threshold Voltage
OV Rising
l
492.5
500
507.5
mV
VUVHYST
UV Input Hysteresis
l
20
25
32
mV
VOVHYST
OV Input Hysteresis
l
20
25
32
mV
ILEAK
UV, OV Leakage Current
V = 0.5V, VIN = 60V
l
±10
nA
tFAULT
UV, OV Fault Propagation Delay
Overdrive = 50mV, VIN = 12V
l
1
2
µs
VSHDN
SHDN Input Threshold
SHDN Falling
l
0.75
1.2
V
ISHDN
SHDN Input Current
SHDN = 10V, VIN = 60V
l
±15
nA
tSTART
Delay Coming Out of Shutdown Mode
SHDN Rising to FAULT, VIN = 12V
l
800
1400
µs
tSHDN(F)
SHDN To FAULT Asserted
VIN = 12V
l
1.5
3
µs
tLOWPWR
Delay From Turn Off to Low Power
Operation
VIN = 12V
l
32
48
ms
VOL
FAULT Output Voltage Low
IFAULT = 500µA, VIN = 12V
l
IFAULT
FAULT Leakage Current
FAULT = 5V, VIN = 60V
l
VRETRY
Configuration Threshold for GATE
Latch-Off
RETRY Falling to ΔIRETRY > 2µA
VIN = 12V
l
0.5
IRETRY
Output Current for RETRY Timer
RETRY = 2V, VIN = 12V
RETRY = 0V, VIN = 12V
l
l
2.5
–10
tCLEAR
Minimum SHDN Pulse to Clear Forward
Overcurrent RETRY Latch
RETRY = 0V, VIN = 12V
l
15
tRETRY
Forward Overcurrent Cool-Down Delay
FAULT Asserted to FAULT Released, CRETRY = 22nF
SENSE = VOUT = VIN = 12V
l
80
UV, OV
SHDN
0.4
400
20
FAULT
0.15
0.4
V
±20
nA
1
1.5
V
3.5
–17
4.5
–25
µA
µA
RETRY
Note 1. Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
µs
120
150
ms
Note 2. All currents into pins are positive; all voltages are referenced to
GND unless otherwise noted.
Note 3. These pins can be tied to voltages below –0.3V through a resistor
that limits the current below 1mA.
Rev. B
4
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LTC4368
TYPICAL PERFORMANCE CHARACTERISTICS
8
SHDN = 2.5V
VIN = VOUT
VIN = 60V
20
VIN = 2.5V
–25
4
2
10
0
25
50
75
TEMPERATURE (°C)
100
0
125
6
SHDN = 2.5V
VIN = VOUT
VOUT = 60V
0
10
30
VIN (V)
40
50
–2000
–50
60
–25
0
25
VIN (V)
50
75
100
4368 G03
VOUT Current vs Reverse VIN
20
SHDN = 0V
VIN = VOUT
5
TA = 125°C
TA = 25°C
TA = –45°C
4368 G02
VOUT = 0V
–45°C
15
VOUT = 60V
45
VOUT = 12V
30
3
VOUT = 12V
2
VOUT = 2.5V
25°C
10
5
15
125°C
1
–25
0
25
50
75
TEMPERATURE (°C)
100
125
4368 G04
14
VOUT = 2.5V
0
–50 –25
0
25
50
75
TEMPERATURE (°C)
0
125
0
12
VOUT = 0V
VIN = VOUT = 12V
10
VOUT = VIN
10
–10
–20
VIN (V)
–30
–40
4368 G06
GATE Drive vs GATE Current
GATE Drive vs VIN Supply Voltage
12
TA = 125°C
TA = 25°C
TA = –45°C
8
8
6
6
4
4
2
0
100
4368 G05
∆VGATE (V)
0
–50
20
–1500
4
∆VGATE (V)
IVOUT (µA)
60
–1000
VOUT Shutdown Current vs
Temperature
IVOUT (µA)
75
–500
TA = 125°C
TA = 70°C
TA = 25°C
TA = –45°C
4368 G01
VOUT Operating Current vs
Temperature
UV = SHDN = 0V
VOUT = 0V
0
6
VIN = 12V
0
–50
500
SHDN = 0V
VIN = VOUT
IVIN (µA)
30
VIN Supply Current vs Voltage
(–40V to 100V)
VIN Shutdown Current vs Voltage
IVOUT (µA)
IVIN (µA)
40
IVIN (µA)
50
VIN Operating Current vs
Temperature
2
TA = 25°C
IGATE = –1µA
0
4
8
12
VIN (V)
16
20
0
0
4368 G07
–10
–20
–30
–40
IGATE(UP) (µA)
–50
–60
4368 G08
Rev. B
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5
LTC4368
TYPICAL PERFORMANCE CHARACTERISTICS
508
UV, OV Thresholds vs
Temperature
120
∆VRR Threshold vs VOUT
10
VIN = 12V
VIN = VOUT = 12V
125°C
6
25°C
84
IFAULT (nA)
∆VRR (mV)
VUV (mV)
–45°C
500
VIN = 12V
FAULT = 5V
8
102
504
FAULT Leakage vs Temperature
66
4
2
496
48
492
–50
–25
0
25
50
75
TEMPERATURE (°C)
100
0
30
125
0
10
20
30
–2
–50
60
50
24
0
25
50
75
TEMPERATURE (°C)
50
40
40
12
6
30
t D(ON) (ms)
t FAULT (µs)
IFAULT (mA)
25°C
125
GATE Turn-On Delay Time vs VIN
TA = 125°C
18
100
4368 G11
VIN = VOUT = 12V
TA = 25°C
–45°C
–25
4368 G10
UV/OV Propagation Delay vs
Overdrive
FAULT Output Current vs Voltage
VIN = 12V
UV = SHDN = 0V
50
VOUT (V)
4368 G09
30
40
20
10
30
TA = –45°C
TA = 25°C
20
10
125°C
0
0
2
4
6
8
10
VOL (V)
12
0
10
100
OVERDRIVE (mV)
0
VOUT
VOUT
5ms/DIV
4368 G15
3V/DIV
30
VIN (V)
40
50
60
4368 G14
DUAL Si7942 MOSFET
100µF, 12Ω LOAD
VIN = 12V
VOUT
GND
DUAL Si7942
1k, 10µF LOAD ON VOUT
20
GATE
5V/DIV
5V/DIV
GATE
10
Turn-Off Timing
GATE
VIN
0
4368 G13
Turn-On Timing
1V/DIV
GND
20V/DIV
1k
4368 G12
AC Blocking
GND
1
VIN = 12V
DUAL Si7942 MOSFET
100µF, 12Ω LOAD
GND
3V/DIV
SHDN
400µs/DIV
4368 G16
SHDN
400µs/DIV
4368 G17
Rev. B
6
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LTC4368
PIN FUNCTIONS
Exposed Pad: The exposed pad may be left open or connected to device ground.
FAULT: Fault Indication Output. Connect to a pull-up resistor. This high voltage open drain output is pulled low if
there is a voltage or current fault, if SHDN is low, or if
VIN has not risen above VIN(UVLO). Leave unconnected if
unused.
GATE: Gate Drive Output for External N-channel MOSFETs.
An internal charge pump provides 35µA of pull-up current
and up to 13.1V of enhancement to the gate of an external
MOSFET. When turned off, GATE is pulled just below the
lower of VIN or VOUT. When VIN goes negative, GATE is
automatically connected to VIN.
GND: Device Ground.
OV: Overvoltage Comparator Input. Connect this pin to an
external resistive divider to set the desired VIN overvoltage fault threshold. This input connects an accurate, fast
(1µs) comparator with a 0.5V rising threshold and 25mV
of hysteresis. When OV rises above its threshold, a 60mA
current sink pulls down on the GATE output. When OV
falls back below 0.475V, and after a 32ms GATE turn-on
delay waiting period, the GATE charge pump is enabled.
The low leakage current on this input allows the use of
large valued resistors for the external resistive divider.
Connect to GND if unused.
RETRY: Retry or Latch-Off Selection Input. Connect to
ground to latch off the MOSFETs after a forward overcurrent fault. To turn the external MOSFETs back on, the
SHDN pin must be toggled low then high. Connect RETRY
to an external capacitor to configure a 5.5ms/nF delay
before the MOSFETs automatically turn on again. Leave
unconnected if unused.
SENSE: Overcurrent Sense Input. Connect a current
sense resistor between SENSE and VOUT. This input
detects overcurrent faults in both directions: forward
at ∆VSENSE = 50mV, and reverse at ∆VSENSE = –50mV
(LTC4368-1 option) or ∆VSENSE = –3mV (LTC4368-2
option). When an overcurrent fault is detected, a 60mA
current sink pulls down on the GATE output, thus quickly
disconnecting the load from the input. After a reverse current fault, when VOUT falls 100mV below VIN, the LTC4368
automatically turns on the external MOSFETs. A forward
overcurrent fault uses the RETRY pin to set the conditions
for reconnecting power to the load. Connect to VOUT if
unused.
SHDN: Shutdown Control Input. Assuming no voltage or
current faults, SHDN high enables the GATE charge pump
which in turn enhances the gate of the external N-channel
MOSFETs. A low on SHDN generates a pull down on the
GATE output with a 90µA current sink and places the
LTC4368 in low current mode (5µA). If a forward overcurrent condition latches off the external MOSFETs (RETRY
grounded), the SHDN pin must be toggled low then high
to re-enable the charge pump that enhances the external
MOSFETs. If VIN goes above 80V, the SHDN pin voltage
must be kept below 80V.
UV: Undervoltage Comparator Input. Connect this pin to
an external resistive divider to set the desired VIN undervoltage fault threshold. This input connects to an accurate, fast (1µs) comparator with a 0.5V falling threshold
and 25mV of hysteresis. When UV falls below its threshold, a 60mA current sink pulls down on the GATE output.
When UV rises back above 0.525V, and after a 32ms GATE
turn-on delay waiting period, the GATE charge pump is
enabled. The low leakage current on this input allows the
use of large valued resistors for the external resistive
divider. If unused and VIN is less than 80V, connect to
VIN with a 510k resistor.
VIN: Power Supply Input. Maximum protection range:
–40V to 100V. Operating range: 2.5V to 60V. This pin
can be hot swapped and has a 2.2V UVLO.
VOUT: Output Voltage Sense Input. Connect a current
sense resistor between VOUT and SENSE. The GATE
charge pump voltage is referenced to VOUT. It is used as
the charge pump input when VOUT is greater than approximately 5V. The reverse current fault comparators require
that VOUT rise above its 2.2V UVLO. VOUT cannot be hot
swapped with supplies above 24V. Place at least 1µF from
VOUT to GND.
Rev. B
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7
LTC4368
BLOCK DIAGRAM
VIN
–40V TO 100V
GATE
SENSE
50mV
–
5V
VOUT
ENABLE
GATE
CHARGE
PUMP
f = 400kHz
–+
50mV (4368-1)
3mV (4368-2)
CLOSES SWITCH
WHEN VIN IS NEGATIVE
REV_RESET
+
–
LDO
+
–
OC_REV
–+
REVERSE
PROTECTION
+
VOUT
VOUT
–+
+
–
OC_FWD
OVERCURRENT
COMPARATORS
VIN
100mV
IGATE
35µA
17µA
31 CYCLES
SLOW
OFF
FAST
OFF
FWD_RESET
START TIMER
RETRY
3.5µA
90µA
60mA
GATE PULLDOWN
LOGIC
FORWARD OVERCURRENT
TIMER
SHDN
VIN
2.2V
UVLO
UV
0.5V
OV
0.5V
DELAY TIMERS
LOGIC
–
FAULT
+
+
25mV
HYSTERESIS
–
GND
4368 BD
Rev. B
8
For more information www.analog.com
LTC4368
OPERATION
Many of today’s electronic systems get their power from
external sources such as wall adapters, batteries and custom power supplies. Figure 1 shows a supply arrangement using a DC barrel connector. Power is supplied by
an AC adapter or, if the plug is withdrawn, by a removable
battery. Note that the polarity of the AC adapter and barrel
connector varies by manufacturer. Trouble arises when
any of the following occurs:
of a single catastrophic event, or over time as devices
degrade from repeated overstress.
The LTC4368 limits these errant overvoltage and overcurrent conditions and helps extend the life of the electronic
systems it protects. When the part detects an overcurrent
or overvoltage fault, it isolates the input supply from the
load by turning off the external back-to-back MOSFETs.
The LTC4368 provides accurate overvoltage and undervoltage comparators to ensure that power is applied to
the load only if the input supply meets the user selectable
voltage window. Additionally, two accurate overcurrent
comparators disconnect the load from the supply when
excessive current flows in either the forward (+50mV/
RSENSE) or reverse (–50mV or –3mV/RSENSE) direction.
Reverse supply voltage protection circuits automatically
isolate the load from negative input voltages. During normal operation, a high voltage charge pump enhances the
gate of dual external N-channel power MOSFETs, thus
providing a low loss path for qualified power. Power consumption is 5µA during shutdown and 80µA while operating. The LTC4368 integrates all these functions in small
10-lead 3mm × 3mm DFN and MSOP packages.
• The battery is installed backwards
• A wall adapter of opposite polarity is attached
• A wall adapter of excessive voltage is attached
• A wall adapter with an AC output is attached
• The battery is discharged below a safe level
• The load or the input is shorted to ground or to
another supply
• Excessive current flows from the supply to the load
or from the load to the supply
These conditions, if unchecked, can damage electronic
systems and their connectors. Damage can take the form
BI-DIRECTIONAL
OVERCURRENT PROTECTION
–40V TO 100V PROTECTION RANGE
+
AC
ADAPTER
INPUT
BATTERY
2.5V TO 60V
OPERATING RANGE
M1
+50mV
M2
INRUSH
CONTROL
RGATE
–3mV
LOAD
CIRCUIT
CGATE
–
VIN
GATE
SENSE
VOUT
R4
SHDN
OV, UV PROTECTION
THRESHOLDS SET TO
SATISFY LOAD CIRCUIT
R3
LTC4368-2
UV
FAULT
OV
RETRY
R2
R1
GND
CRETRY
4368 F01
Figure 1. Polarity Protection for DC Barrel Connectors
Rev. B
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9
LTC4368
APPLICATIONS INFORMATION
VIN
24V
M1
M2
PSMN4R8-100BSE SiR662
INRUSH
CONTROL
+50mV
0.004Ω
VOUT
7V TO 36V
–0.75A TO 12.5A
–3mV
22k
2.2nF
R4
464k
OV = 36V
UV = 7V
R3
1500k
VIN
GATE
SENSE
VOUT
SHDN
LTC4368-2
UV
FAULT
OV
RETRY
1200ms COOLDOWN
AFTER FORWARD
OC FAULT
R2
121k
R1
29.4k
0.22µF
GND
4368 F02
Figure 2. LTC4368-2 Protects Load from Voltage (–40V to 100V) and Current (–0.75A to 12.5A) Faults
Voltages at VIN outside of the 7V to 36V range are
prevented from getting to the load and can be as high as
100V and as negative as –40V. Load currents (including
inrush currents) above 12.5A (forward from VIN to VOUT)
and below –0.75A (reverse from VOUT to VIN) will cause the
load to be disconnected from VIN. The circuit of Figure 2
protects against negative voltages at VIN as shown. Note
that the SOA and voltage requirements are not the same
for the two external MOSFETs. During power-up, the input
MOSFET (M1) will stand off more voltage (up to VIN) than
the output MOSFET (M2). The body diode of M2 will limit
its drain to source voltage. This allows the use of smaller
MOSFETs at the output.
During normal operation, the LTC4368 provides up to
13.1V of gate enhancement to the external back-to-back
N-channel MOSFETs. This turns on the MOSFETs, thus
connecting the load at VOUT to the supply at VIN.
GATE Drive
The LTC4368 turns on the external N-channel MOSFETs
by driving the GATE pin above VOUT. The voltage difference between the GATE and VOUT pins (gate drive) is a
function of VIN and VOUT.
Figure 3 highlights the dependence of the gate drive on
VIN and VOUT. When system power is first turned on
(SHDN low to high, SENSE = VOUT = 0V), gate drive is
at a maximum for all values of VIN. This helps prevent
startup problems into heavy loads by ensuring that there
is enough gate drive to support the load.
14
TA = 25°C
IGATE = –1µA
12
VIN = 12V, 60V
10
∆VGATE (V)
The LTC4368 is an N-channel MOSFET controller that protects a load from overvoltage faults (both positive and
negative) and from overcurrent faults (both forward and
reverse). A typical application circuit using the LTC4368-2
is shown in Figure 2. The circuit provides a low loss connection from VIN to VOUT as long as there are no voltage
or current faults.
8
VIN = 5V
6
VIN = 3.3V
4
VIN = 2.5V
2
0
0
5
10
VOUT (V)
15
4365 F03
Figure 3. Gate Drive (GATE – VOUT) vs VOUT
Rev. B
10
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LTC4368
APPLICATIONS INFORMATION
As VOUT ramps up from 0V, the absolute value of the GATE
voltage remains fixed until VOUT is greater than the lower
of (VIN – 1V) or 5V. Once VOUT crosses this threshold,
gate drive begins to increase up to a maximum of 13.1V.
The curves of Figure 3 were taken with a GATE load of
–1µA. If there were no DC load on GATE, the gate drive
for each VIN would be slightly higher.
Note that when VIN is at the lower end of the operating
range, the external N-channel MOSFET must be selected
with a correspondingly lower threshold voltage.
Overvoltage and Undervoltage Protection
The LTC4368 provides two accurate comparators to monitor for overvoltage (OV) and undervoltage (UV) conditions
at VIN. If the input supply rises above the user adjustable OV threshold, the gates of the external MOSFETs
are quickly turned off, thus disconnecting the load from
the input. Similarly, if the input supply falls below the
user adjustable UV threshold, the gates of the external
MOSFETs are quickly turned off. Figure 4 shows a UV/OV
application for an input supply of 12V.
The external resistive divider allows the user to select
an input supply range that is compatible with the load
at VOUT. Furthermore, the UV and OV inputs have very
low leakage currents (typically < 1nA at 100°C), allowing for large values in the external resistive divider. In
the application of Figure 4, the load is connected to the
supply only if VIN lies between 3.5V and 18V. In the event
that VIN goes above 18V or below 3.5V, the gate of the
external N-channel MOSFET is immediately discharged
with a 60mA current sink, thus isolating the load from
the supply.
Figure 5 shows the timing associated with the UV pin.
Once a UV fault propagates through the UV comparator
(tFAULT), the FAULT output is asserted low and a 60mA
current sink discharges the GATE pin. As VOUT falls, the
GATE pin tracks VOUT.
VUV
UV
VUV + VUVHYST
tFAULT
FAULT
tD(FAST)
12V
LTC4368
VIN
UV
R2
243k
0.5V
R1
59k
4368 F05
–
+
Figure 5. UV Timing (OV < (VOV – VOVHYST), SHDN > 1.2V)
25mV
OV
COMPARATOR
OV
OVTH = 18V
EXTERNAL N-CHANNEL MOSFETS
TURN OFF
GATE
UV
COMPARATOR
R3
1820k
UVTH = 3.5V
tD(ON)
DISCHARGE GATE
WITH 60mA SINK
+
25mV
0.5V
–
Figure 6 shows the timing associated with the OV pin.
Once an OV fault propagates through the OV comparator
(tFAULT), the FAULT output is asserted low and a 60mA
current sink discharges the GATE pin. As VOUT falls, the
GATE pin tracks VOUT.
VOV
OV
VOV – VOVHYST
4368 F04
tFAULT
Figure 4. UV, OV Comparators Monitor 12V Supply
FAULT
tD(FAST)
GATE
tD(ON)
EXTERNAL N-CHANNEL MOSFET
TURNS OFF
4368 F06
Figure 6. OV Timing (UV > (VUV + VUVHYST), SHDN > 1.2V)
Rev. B
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11
LTC4368
APPLICATIONS INFORMATION
When both the UV and OV faults are removed, the external MOSFETs are not immediately turned on. The input
supply must remain within the user selected power good
window for typically 32ms (tD(ON)) before the load is again
connected to the supply. This recovery timeout period
filters noise (including line noise) at the input supply and
prevents chattering of power at the load.
Procedure for Selecting UV/OV External Resistor Values
The following 3-step procedure helps select the resistor
values for the resistive divider of Figure 4. This procedure
minimizes UV and OV offset errors caused by leakage
currents at the respective pins.
1. Choose maximum tolerable offset at the UV pin,
VOS(UV). Divide by the worst case leakage current at
the UV pin, IUV (10nA). Set the sum of R1 + R2 equal
to VOS(UV) divided by 10nA. Note that due to the presence of R3, the actual offset at UV will be slightly
lower.
R1 + R2 =
VOS(UV)
I UV
⎛ UV TH – 0.5V⎞
• ⎜
⎟
0.5V
⎝
⎠
3. Select the desired VIN OV trip threshold, OVTH. Find
the values of R1 and R2:
⎞
⎛V
⎜ OS(UV) ⎟ + R3
⎟
⎜ I
UV ⎠
⎝
R1 =
• 0.5V
OV
TH
R2 =
VOS(UV)
I UV
IUV = 10nA
UVTH = 3.5V
OVTH = 18V
The resistor values can then be solved:
1. R1 + R2 =
2. R3 = 2 •
3mV
10nA
3mV
10nA
= 300k
• (3.5V – 0.5V) = 1.8M
The closest 1% value: R3 = 1.82M
3. R1 =
300k + 1.82M
2 • 18V
= 58.9 k
The closest 1% value: R1 = 59K
The closest 1% value: R2 = 243K
2. Select the desired VIN UV trip threshold, UVTH. Find
the value of R3:
R3 =
VOS(UV) = 3mV
R2 = 300K – 59K = 241K
I UV
VOS(UV)
The example of Figure 4 uses standard 1% resistor values.
The following parameters were selected:
Therefore: OV = 17.93V, UV = 3.51V.
Limiting Inrush Current During Turn On
Charging large capacitors on VOUT can lead to excessive
inrush currents when LTC4368 turns on the external
N-channel MOSFET. The maximum slew rate at the GATE
pin can be reduced by adding a capacitor on the GATE pin:
Slew Rate =
IGATE(UP)
C GATE
– R1
Rev. B
12
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LTC4368
APPLICATIONS INFORMATION
Since the MOSFET acts like a source follower, the slew
rate at VOUT equals the slew rate at GATE. Therefore, the
inrush current due to the capacitance on VOUT is given by:
C
IINRUSH = OUT • IGATE(UP)
C GATE
For example, a 1A inrush current into a 100µF output
capacitance requires a GATE capacitance of (using
IGATE(UP) = 35µA):
C GATE =
C GATE =
35µA • C OUT
IINRUSH
35µA • 100µF
1A
= 3.5nF
The 3.3nF CGATE capacitor in the application circuit of
Figure 7 limits the inrush current to just over 1A. RGATE
prevents CGATE from slowing down the reverse polarity
protection circuits. It also stabilizes the fast pull-down
circuits and prevents chatter during fault conditions. Set
RGATE to 22k for most applications.
2.5A
FDS3992
100V DUAL
M1
M2
VIN
24V
RSENSE
0.02Ω
RGATE
22k
INRUSH
CONTROL:
~1A
IOUT < 2.5A
+
–0.15A
COUT
100µF
CGATE
3.3nF
VOUT
SENSE
50mV
+
–
TURN OFF
MOSFETS
GATE
U2
TURN MOSFETS
BACK ON
U3
–+
VIN
IOUT
–+
+
U1
–
VOUT
VIN
LTC4368-2
+
–
100mV
TURN MOSFETS
BACK ON AFTER
31 CYCLES
SHDN
START
TIMER
31 CYCLES
Forward overcurrent protection prevents large currents
from flowing from VIN to VOUT. This threshold current is
determined by the external sense resistor (RSENSE) and an
internal comparator (Figure 7, U1) with a 50mV threshold:
IOC,FWD =
50mV
R SENSE
For the example of Figure 7, if 2.5A flows to the output
across the 20mΩ sense resistor, the external MOSFETs
(M1, M2) are immediately (8µs) turned off. This disconnects the load from the input supply.
Note that during initial startup, the output capacitance
(COUT) charges from ground to VIN. To prevent this
capacitive inrush current (IINRUSH) from falsely triggering the forward overcurrent comparator, place an inrush
limiting capacitor (CGATE) on the GATE pin (see Limiting
Inrush Current During Turn On). This inrush current plus
the output current must be less than the desired forward
overcurrent threshold:
IOC,FWD > IINRUSH + IOUT
For the example of Figure 7, the 3.3nF GATE capacitor
and the 100µF output capacitor limit the inrush current
(IINRUSH) to approximately 1A. This means that the output
current (IOUT) must be less than 1.5A during turn on in
order to avoid a forward overcurrent fault during turn on.
Once VOUT has ramped to its final value, the output current is limited to 2.5A.
Once a forward overcurrent fault is triggered, there are
two application choices for turning the external MOSFETs
back on:
3mV
–+
Forward Overcurrent Fault
RETRY
RESET FORWARD
OC LATCH
OC FORWARD TIMER/LATCH
CRETRY
0.22µF
4368 F07
Figure 7. Overcurrent Comparators Monitor 2.5A/–0.15A
Current Faults
1. Automatically restart by placing an external capacitor on the RETRY pin. An internal cool-down timer
will charge/discharge this capacitor 31 times with
a 5.5ms/nF total delay. At the end of this delay, the
external MOSFETs are turned back on, thus reconnecting the load to the input supply. The 0.22µF capacitor (CRETRY) in the application of Figure 7 yields a
1200ms cool-down timer delay. Note that the adjustable cool-down period provides the user with a means
of keeping the external MOSFETs within the rated SOA
(safe operating area). See Figure 8 timing diagram.
Rev. B
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13
LTC4368
APPLICATIONS INFORMATION
2. Latch off the MOSFETs by grounding the RETRY pin
(no external RETRY capacitor needed). This latches
the forward overcurrent fault. The external MOSFETs
are kept in the off condition until the SHDN input pin is
toggled low then high (tCLEAR pulse width < tLOWPWR).
See Figure 9 timing diagram.
Reverse overcurrent protection prevents large currents
from flowing from VOUT to VIN. There are two options for
reverse overcurrent protection thresholds. The LTC4368-1
(–50mV) bidirectional circuit breaker allows load current
to flow in either direction: from VIN to VOUT or from VOUT
to VIN. The LTC4368-2 provides diode-like behavior by
making the reverse overcurrent threshold (–3mV) significantly smaller than the forward overcurrent threshold (+50mV). The reverse overcurrent fault threshold is
determined by the external sense resistor (RSENSE) and
an internal comparator (Figure 7, U2). For the LTC4368-2
application of Figure 7:
–3mV
R SENSE
=
–3mV
20mΩ
STEADY STATE LOAD
t p(GATE)
EXTERNAL N-CHANNEL
MOSFETs TURN OFF
GATE
EXTERNAL N-CHANNEL
MOSFETs TURN BACK ON
31 CYCLES
(1200ms COOL-DOWN PERIOD)
t RETRY
FAULT
4368 F08
Figure 8. Forward Overcurrent Fault with 0.22µF RETRY Capacitor
50mV
SENSE – VOUT
0mV
STEADY STATE LOAD
IINRUSH
LIMITED
STEADY STATE LOAD
t p(GATE)
EXTERNAL N-CHANNEL
MOSFETs TURN OFF
GATE
EXTERNAL N-CHANNEL
MOSFETs TURN BACK ON
t
To turn the MOSFETs back on, an internal comparator
(Figure 7, U3) detects when VOUT drops 100mV below
VIN:
VOUT < VIN – 100mV
t CLEAR < t < tLOWPWR
FAULT
4368 F08
Figure 9. Forward Overcurrent Fault with RETRY Pin Grounded
FAULT
SENSE – VOUT
Once this condition is met, the gates of the external
MOSFETs are turned on again to reconnect the input supply to the load. See timing diagrams of Figure 10. Note
that if the LTC4368-1 option is used, the reverse current
threshold becomes:
IOC,REV =
IINRUSH
LIMITED
SHDN
= –0.15A
If –0.15A flows from the output across the 20mΩ sense
resistor, the external MOSFETs (M1,M2) are immediately
(8µs) turned off.
0mV
STEADY STATE LOAD
RETRY
Reverse Overcurrent Protection
IOC,REV =
50mV
SENSE – VOUT
0mV
–3mV
STEADY STATE LOAD
IINRUSH
LIMITED
t p(GATE)
11V
GATE – VOUT
0V
–50mV
VOUT
R SENSE
EXTERNAL N-CHANNEL
MOSFETs TURN BACK ON
VIN – 100mV
FAULT
4368 F10
Figure 10. Reverse Overcurrent Fault: SENSE – VOUT < –3mV
(LTC4368-2)
Rev. B
14
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LTC4368
APPLICATIONS INFORMATION
Reverse VIN Protection
The LTC4368’s rugged and hot swappable VIN helps protect the more sensitive circuits at the output load. If the
input supply is plugged in backwards, or a negative supply is inadvertently connected, the LTC4368 prevents this
negative voltage from passing to the output load.
As shown in Figure 11, external back-to-back N-channel
MOSFETs are required for reverse supply protection. When
VIN goes negative, the reverse VIN comparator closes the
internal switch, which in turn connects the gates of the
external MOSFETs to the negative VIN voltage. The body
diode (D1) of M1 turns on, but the body diode (D2) of M2
remains in reverse blocking mode. This means that the
common source connection of M1 and M2 remains about
a diode drop higher than VIN. Since the gate voltage of
M2 is shorted to VIN, M2 will be turned off and no current
can flow from VOUT to VIN. Note that the voltage rating of
M2 must withstand the reverse voltage excursion at VIN.
D1
VIN
–40V
Si7942 100V DUAL
M1
INRUSH
CONTROL
RGATE
22k
D2
M2
+
CHOTSWAP
(OPTIONAL
4.4nF)
TO
LOAD
COUT
100µF
CGATE
3.3nF
VIN
GATE
REVERSE VIN
COMPARATOR
–
+
GND
SENSE
VOUT
LTC4368
parasitic inductance of the VIN and GATE connections, the
voltage at the VIN and GATE pins ring significantly below
–20V. Therefore, hot swapping a negative input voltage
more negative than –20V should not be performed without additional overshoot mitigation techniques in place.
The front page application was used to generate the waveforms of Figure 12.
VOUT
5V/DIV
GATE
–20V
VIN
200ns/DIV
LTC4368 F12
Figure 12. Hot Swapping VIN to –20V
The speed of the LTC4368 reverse protection circuits is
evident by how closely the GATE pin follows VIN during
the negative transients. The two waveforms are almost
indistinguishable on the scale shown.
The trace at VOUT, on the other hand, does not respond
to the negative voltage at VIN, demonstrating the desired
reverse supply protection. The waveforms of Figure 12
were captured using a 40V dual N-channel MOSFET, a
10µF ceramic output capacitor and no load current on
VOUT.
Hot Swap VIN Protection
CLOSES SWITCH
WHEN VIN IS NEGATIVE
4368 F11
Figure 11. Reverse VIN Protection Circuits
To avoid large currents when the reverse voltage is hot
plugged, set RGATE to 22k. To further improve reverse
hot swap performance, place the optional CHOTSWAP ≥
4.4nF capacitor across the gate and source terminals of
the external MOSFETs.
Figure 12 illustrates the waveforms that result when VIN
is hot plugged to –20V. VIN, GATE and VOUT start out at
ground just before the connection is made. Due to the
The VIN input of the LTC4368 can be live inserted or hot
swapped into a backplane with minor disturbance to the
VIN supply. The idea is to keep the parasitic capacitances
of the external MOSFETs (CGD) from coupling onto the
GATE pin and enhancing the MOSFETs. To improve
positive VIN hot swap capability (without jeopardizing
reverse polarity protection), place CHOTSWAP across the
gate and source terminals of the back-to-back MOSFETs.
Figure 13 illustrates the waveforms that result when
the VIN of the front page application is hot plugged to
+48V. The top trace is VIN. The bottom two traces are the
MOSFETs gate and source terminals. Note that the bottom
two traces ring together and thus keep the MOSFETs off
Rev. B
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15
LTC4368
APPLICATIONS INFORMATION
Slow Shutdown
The SHDN input turns off the external MOSFETs in a
slow, controlled manner. When SHDN is asserted low, a
90µA current sink slowly begins to turn off the external
MOSFETs.
VIN
10V/DIV
GREEN (TOP): MOSFET GATE
BLUE (BOTTOM): MOSFET SOURCE
4368 F13
100ns/DIV
Figure 13. Hot Swapping VIN to +48V
during the fast transients. To further improve positive
hot swap, place the optional CHOTSWAP = 6.8nF capacitor
across the gate/source of the external MOSFETs. For even
more hot swap protection, add a diode (MBR0540) across
RGATE (connect cathode to CGATE). Make sure this diode
has a reverse breakdown of at least 40V.
Recovery Delay Timer
The LTC4368 has a recovery delay timer that filters noise
at VIN and helps prevent chatter at VOUT. After either an OV
or UV fault has occurred, the input supply must return to
the desired operating voltage window for typically 32ms
(tD(ON)) in order to turn the external MOSFET back on, as
illustrated in Figure 5 and Figure 6. Going out of and then
back into fault in fewer than 32ms will keep the MOSFET
off continuously. Similarly, coming out of shutdown (SHDN
low to high) triggers an 800µs startup delay timer (tSTART,
see Figure 16).
The recovery delay timer is also active while the LTC4368
is powering up. The 32ms timer starts once VIN rises
above VIN(UVLO) and VIN lies within the user selectable
UV/OV power good window. See Figure 14.
VIN
VIN(UVLO)
Once the voltage at the GATE pin falls below the voltage
at the VOUT pin, the current sink is throttled back and a
feedback loop takes over. This loop forces the GATE voltage to track VOUT, thus keeping the external MOSFETs off
as VOUT decays. Note that when VOUT < 2.5V, the GATE
pin is pulled all the way to ground.
Slow gate turn off reduces load current slew rates and
mitigates voltage spikes due to parasitic inductances. To
further decrease GATE pin slew rate, place a capacitor
(CHOTSWAP, see Figure 11) across the gate and source
terminals of the external MOSFETs. The waveforms of
Figure 15 were captured using the Si7942 Dual N-channel
MOSFETs, and a 2A load with 100µF output capacitor.
100µF, 6Ω LOAD ON VOUT
DUAL Si7942 MOSFET
VIN = 12V
GATE
VOUT
5V/DIV
SHDN
GND
Figure 15. Slow Shutdown: GATE Tracks VOUT as VOUT Decays
SHDN
tD(SLOW)
VUV
GATE
tD(ON)
4368 F15
400µs/DIV
tSTART
ΔVGATE
GATE = VOUT
GATE
MOSFET OFF
MOSFET ON
VOUT
4368 F14
tSHDN(F)
Figure 14. Recovery Timing During Power-On
OV = GND, UV = SHDN = VIN
FAULT
4368 F16
Figure 16. Slow Shutdown Timing
Rev. B
16
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LTC4368
APPLICATIONS INFORMATION
FAULT Status
The FAULT high voltage open drain output is driven low
if SHDN is asserted low, if VIN is outside the desired UV/
OV voltage window, if there is an overcurrent fault, or if
VIN has not risen above VIN(UVLO). Figures 5, 6, 8, 9, 10
and 16 show the FAULT output timing.
By driving the SHDN pins separately, this potential backflow can be avoided. VOUT can then be selected from either
V1 or V2, irrespective of which supply voltage is higher or
lower. While in shutdown, the LTC4368-2 drives the GATE
pin just below the lower of VIN and VOUT, thus allowing
VOUT to be larger than VIN while in the off condition.
Ideal Diode Alternative
Single MOSFET Higher Power Application
Figure 17 shows two LTC4368-2 connected in parallel.
With both devices turned on, the output will be the higher
of V1 or V2. Unlike ideal diode controllers, the LTC4368
always fully enhances the MOSFETs, even at light loads.
Note, however, that if the voltage difference between V1
and V2 is less than 3mV, the reverse overcurrent comparators will not detect a fault and up to 150mA can flow
from the higher to the lower supply. Similarly, disconnecting the higher supply may not generate sufficient reverse
current to turn off the MOSFETs. A subsequent reconnection may result in an inrush current that temporarily trips
the circuit breakers.
V1
When reverse VIN protection is not needed, only a single
external N-channel MOSFET is necessary. This provides
the user with a larger selection of MOSFETs (not just dual
packages), especially for higher power applications. Note
that care must be taken to stay within the SOA of the
external MOSFET. The RETRY pin of the LTC4368 can be
used to help keep the MOSFET within its SOA. The user
can ground the RETRY pin to latch off the MOSFET after a
forward current fault. For automatic retry after a forward
current fault, CRETRY must be large enough to maintain a
low on duty cycle for the MOSFET. See Figure 18.
+50mV
VIN
12V
MOSFETs TURN OFF WHEN REVERSE CURRENT EXCEEDS –150mA
RSENSE
0.02Ω
PSMN4R8-100BSE
INRUSH
CONTROL
VIN
SEL V1
SHDN
SENSE
IOUT
VOUT
3.5V TO 18V –1A TO 16.67A
–3mV
22k
VIN
VOUT
GATE
SENSE
453k
VOUT
LTC4368-2
SHDN
1330k
LTC4368-2
FAULT
1200ms COOLDOWN
AFTER FORWARD
OC FAULT
243k
MOSFETs TURN OFF WHEN REVERSE CURRENT EXCEEDS –150mA
RSENSE
0.02Ω
OV
59k
SEL V2
SHDN
GATE
SENSE
GND
RETRY
OV = 18V
UV = 3.5V
0.22µF
4368 F18
–3mV
VIN
100µF
VOUT
UV
V2
+
2.2nF
–3mV
GATE
0.003Ω
Figure 18. Single MOSFET High Power Application
VOUT
LTC4368-2
4368 F17
Figure 17. Alternative to Ideal Diode
Rev. B
For more information www.analog.com
17
LTC4368
APPLICATIONS INFORMATION
VIN
48V
300nH
(12 INCH WIRE LENGTH)
FDS3992
100V DUAL
RSENSE
0.02Ω
+
INRUSH
CONTROL: ~1A
RGATE
22k
COUT
100µF
48Ω
GATE
VOUT
20V/DIV
60V
CGATE
3.3nF
D1
R4
100k
VIN
GATE
SHDN
UV
SENSE
LTC4368-2
OV
R1
20.5k
60V
FAULT
1200ms COOLDOWN
AFTER FORWARD
OC FAULT
R2
2430k
OV = 60V
VIN
20V/DIV
VOUT
IIN
2A/DIV
RETRY
GND
400ns/DIV
CRETRY
0.22µF
4368 F20
0A
4368 F19
Figure 19. OV Fault with Large VIN Inductance
Figure 20. Transients During 0V Fault when
No TransZorb (TVS) Is Used
Transients During OV Fault
Layout Considerations
The circuit of Figure 19 is used to illustrate transients
commonly encountered during an overvoltage condition.
The nominal input supply is 48V and it has an overvoltage
threshold of 60V. The parasitic inductance is that of a 1
foot wire (roughly 300nH). Figure 20 shows the waveforms during on overvoltage condition at VIN. These transients depend on the parasitic inductance and resistance
of the wire along with the capacitance at the VIN node.
D1 is an optional power clamp (TVS, TransZorb) recommended for applications where the DC input voltage can
exceed 24V and with large VIN parasitic inductance. No
clamp was used to capture the waveforms of Figure 20. In
order to maintain reverse supply protection, D1 must be
a bidirectional clamp with appropriate voltage and power
ratings.
The trace length between the VIN pin and the drain of the
external MOSFET should be minimized, as well as the
trace length between the GATE pin of the LTC4368 and
the gates of the external MOSFETs. The SENSE and VOUT
pins must be connected with traces that tie directly and
solely to the sense resistor.
Place the bypass capacitors at VOUT as close as possible
to the external MOSFET. Use high frequency ceramic
capacitors in addition to bulk capacitors to mitigate hot
swap ringing. Place the high frequency capacitors closest
to the MOSFET. Note that bulk capacitors mitigate ringing
by virtue of their ESR. Ceramic capacitors have low ESR
and can thus ring near their resonant frequency. The trace
length of the GATE pin should be kept as small as possible, and the number of components connected to the
GATE pin should also be minimized.
The SOA of the external MOSFET might require the board
to have a minimum total area as well as a minimum amount
of trace volume connected to the drain and source pins.
Rev. B
18
For more information www.analog.com
LTC4368
PACKAGE DESCRIPTION
MS Package
10-Lead Plastic MSOP
(Reference LTC DWG # 05-08-1661 Rev F)
0.889 ±0.127
(.035 ±.005)
5.10
(.201)
MIN
3.20 – 3.45
(.126 – .136)
3.00 ±0.102
(.118 ±.004)
(NOTE 3)
0.50
0.305 ±0.038
(.0197)
(.0120 ±.0015)
BSC
TYP
RECOMMENDED SOLDER PAD LAYOUT
0.254
(.010)
10 9 8 7 6
3.00 ±0.102
(.118 ±.004)
(NOTE 4)
4.90 ±0.152
(.193 ±.006)
DETAIL “A”
0.497 ±0.076
(.0196 ±.003)
REF
0° – 6° TYP
GAUGE PLANE
1 2 3 4 5
0.53 ±0.152
(.021 ±.006)
DETAIL “A”
0.18
(.007)
SEATING
PLANE
0.86
(.034)
REF
1.10
(.043)
MAX
0.17 – 0.27
(.007 – .011)
TYP
0.50
(.0197)
BSC
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
0.1016 ±0.0508
(.004 ±.002)
MSOP (MS) 0213 REV F
Rev. B
For more information www.analog.com
19
LTC4368
PACKAGE DESCRIPTION
DD Package
10-Lead Plastic DFN (3mm × 3mm)
(Reference LTC DWG # 05-08-1699 Rev C)
0.70 ±0.05
3.55 ±0.05
1.65 ±0.05
2.15 ±0.05 (2 SIDES)
PACKAGE
OUTLINE
0.25 ±0.05
0.50
BSC
2.38 ±0.05
(2 SIDES)
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
3.00 ±0.10
(4 SIDES)
R = 0.125
TYP
6
0.40 ±0.10
10
1.65 ±0.10
(2 SIDES)
PIN 1 NOTCH
R = 0.20 OR
0.35 × 45°
CHAMFER
PIN 1
TOP MARK
(SEE NOTE 6)
0.200 REF
0.75 ±0.05
0.00 – 0.05
5
1
(DD) DFN REV C 0310
0.25 ±0.05
0.50 BSC
2.38 ±0.10
(2 SIDES)
BOTTOM VIEW—EXPOSED PAD
NOTE:
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-2).
CHECK THE LTC WEBSITE DATA SHEET FOR CURRENT STATUS OF VARIATION ASSIGNMENT
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
Rev. B
20
For more information www.analog.com
LTC4368
REVISION HISTORY
REV
DATE
DESCRIPTION
A
06/18
Attached Note 3 to OV and FAULT Absolute Maximum Ratings
B
06/19
Added AEC-Q100 qualification and “W” part numbers
PAGE NUMBER
2
1,3
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog
Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications
subject to change without notice. No license For
is granted
implication or
otherwise under any patent or patent rights of Analog Devices.
more by
information
www.analog.com
21
LTC4368
TYPICAL APPLICATION
LTC2966 Extends UV/OV Hysteresis Window
Si7942DP
VIN
12V
REF
1nF
100k
INLA
510k
RS1B
INHA
LTC2966
U1
301k
VIN
GATE
RS2B
SHDN
OUTA
UV
SENSE
VOUT
100k
FAULT
LTC4368-2
U2
RETRY
0.22µF
PSA
INHB
150k
OUTB
INLB
750k
100µF
22k
100k
RS2A
301k
698k
3.3nF
VINB
RS1A
200k
VOUT
+
1.96k
VINA
0.02Ω
PSB
GND
OV
UV: OFF AT 7V
ON AT 10V
GND
4368 TA02
OV: OFF AT 18V
ON AT 15V
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D17021-0-6/18(B)
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