LTC4444-5
High Voltage Synchronous
N-Channel MOSFET Driver
FEATURES
DESCRIPTION
n
The LTC®4444-5 is a high frequency high voltage gate
driver that drives two N-channel MOSFETs in a synchronous DC/DC converter with supply voltages up to 100V.
This powerful driver reduces switching losses in MOSFETs
with high gate capacitance.
n
n
n
n
n
n
n
n
n
n
n
n
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Bootstrap Supply Voltage to 114V
Wide VCC Voltage: 4.5V to 13.5V
Adaptive Shoot-Through Protection
1.4A Peak Top Gate Pull-Up Current
1.75A Peak Bottom Gate Pull-Up Current
1.5Ω Top Gate Driver Pull-Down
0.75Ω Bottom Gate Driver Pull-Down
5ns Top Gate Fall Time Driving 1nF Load
8ns Top Gate Rise Time Driving 1nF Load
3ns Bottom Gate Fall Time Driving 1nF Load
6ns Bottom Gate Rise Time Driving 1nF Load
Drives Both High and Low Side N-Channel MOSFETs
Undervoltage Lockout
Thermally Enhanced 8-Pin MSOP Package
n
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The LTC4444-5 contains undervoltage lockout circuits that
disable the external MOSFETs when activated. Adaptive
shoot-through protection prevents both MOSFETs from
conducting simultaneously.
For a similar driver in this product family, please refer to
the chart below.
APPLICATIONS
n
The LTC4444-5 is configured for two supply-independent inputs. The high side input logic signal is internally
level-shifted to the bootstrapped supply, which may function at up to 114V above ground.
PARAMETER
LTC4444-5
LTC4446
LTC4444
Shoot-Through Protection
Yes
No
Yes
Absolute Max TS
100V
100V
100V
MOSFET Gate Drive
4.5V to 13.5V 7.2V to 13.5V 7.2V to 13.5V
4V
6.6V
6.6V
VCC UV+
3.5V
6.15V
6.15V
VCC UV–
Distributed Power Architectures
Automotive Power Supplies
High Density Power Modules
Telecommunication Systems
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and
No RSENSE is a trademark of Linear Technology Corporation. All other trademarks are the
property of their respective owners. Protected by U.S. Patents, including 6677210.
TYPICAL APPLICATION
High Input Voltage Buck Converter
VCC
4.5V TO 13.5V
LTC4444-5 Driving a 1000pF Capacitive Load
BINP
5V/DIV
BG
5V/DIV
VIN
100V
BOOST
VCC
PWM1
(FROM CONTROLLER IC)
PWM2
(FROM CONTROLLER IC)
TG
LTC4444-5
TS
TINP
BINP
VOUT
TINP
5V/DIV
TG-TS
5V/DIV
BG
GND
44445 TA01a
20ns/DIV
44445 TA01b
44445fc
1
LTC4444-5
ABSOLUTE MAXIMUM RATINGS
PIN CONFIGURATION
(Note 1)
Supply Voltage
VCC......................................................... –0.3V to 14V
BOOST – TS ........................................... –0.3V to 14V
TINP Voltage ................................................. –2V to 14V
BINP Voltage ................................................. –2V to 14V
BOOST Voltage .........................................–0.3V to 114V
TS Voltage .................................................. –5V to 100V
Operating Junction Temperature Range
(Notes 2, 3) ........................................ –55°C to 150°C
Storage Temperature Range ..................–65°C to 150°C
Lead Temperature (Soldering, 10 sec)................... 300°C
TOP VIEW
TINP
BINP
VCC
BG
1
2
3
4
9
GND
8
7
6
5
TS
TG
BOOST
NC
MS8E PACKAGE
8-LEAD PLASTIC MSOP
TJMAX = 125°C, θJA = 40°C/W, θJC = 10°C/W (NOTE 4)
EXPOSED PAD (PIN 9) IS GND, MUST BE SOLDERED TO PCB
ORDER INFORMATION
LEAD FREE FINISH
TAPE AND REEL
PART MARKING*
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LTC4444EMS8E-5#PBF
LTC4444EMS8E-5#TRPBF
LTDPY
8-Lead Plastic MSOP
–40°C to 125°C
LTC4444IMS8E-5#PBF
LTC4444IMS8E-5#TRPBF
LTDPY
8-Lead Plastic MSOP
–40°C to 125°C
LTC4444HMS8E-5#PBF
LTC4444HMS8E-5#TRPBF
LTDPY
8-Lead Plastic MSOP
–40°C to 150°C
LTC4444MPMS8E-5#PBF
LTC4444MPMS8E-5#TRPBF
LTFDF
8-Lead Plastic MSOP
–55°C to 150°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating junction
temperature range, otherwise specifications are at TA = 25°C (Note 2). VCC = VBOOST = 6V, VTS = GND = 0V, unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
13.5
V
Gate Driver Supply, VCC
VCC
Operating Voltage
4.5
IVCC
DC Supply Current
TINP = BINP = 0V
UVLO
Undervoltage Lockout Threshold
VCC Rising
VCC Falling
Hysteresis
l
l
3.60
3.20
320
520
μA
4.00
3.55
450
4.40
3.90
V
V
mV
0.1
2
μA
Bootstrapped Supply (BOOST – TS)
IBOOST
DC Supply Current
TINP = BINP = 0V
Input Signal (TINP, BINP)
VIH(BG)
BG Turn-On Input Threshold
BINP Ramping High
l
2.25
2.75
3.25
V
VIL(BG)
BG Turn-Off Input Threshold
BINP Ramping Low
l
1.85
2.3
2.75
V
VIH(TG)
TG Turn-On Input Threshold
TINP Ramping High
l
2.25
2.75
3.25
V
VIL(TG)
TG Turn-Off Input Threshold
TINP Ramping Low
l
1.85
2.3
2.75
V
44445fc
2
LTC4444-5
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating junction
temperature range, otherwise specifications are at TA = 25°C (Note 2). VCC = VBOOST = 6V, VTS = GND = 0V, unless otherwise noted.
SYMBOL
PARAMETER
ITINP(BINP)
Input Pin Bias Current
CONDITIONS
MIN
TYP
MAX
±0.01
±2
UNITS
μA
High Side Gate Driver Output (TG)
VOH(TG)
TG High Output Voltage
ITG = –10mA, VOH(TG) = VBOOST – VTG
0.7
VOL(TG)
TG Low Output Voltage
ITG = 100mA, VOL(TG) = VTG –VTS
IPU(TG)
TG Peak Pull-Up Current
l
RDS(TG)
TG Pull-Down Resistance
l
l
150
1
V
300
1.4
1.5
mV
A
3.0
Ω
Low Side Gate Driver Output (BG)
VOH(BG)
BG High Output Voltage
IBG = –10mA, VOH(BG) = VCC – VBG
0.7
VOL(BG)
BG Low Output Voltage
IBG = 100mA
IPU(BG)
BG Peak Pull-Up Current
l
RDS(BG)
BG Pull-Down Resistance
l
0.75
1.5
Ω
l
75
1.15
V
150
1.75
mV
A
Switching Time [BINP (TINP) is Tied to Ground While TINP (BINP) is Switching. Refer to Timing Diagram]
tPLH(TG)
TG Low-High Propagation Delay
l
33
60
ns
tPHL(TG)
TG High-Low Propagation Delay
l
24
45
ns
tPLH(BG)
BG Low-High Propagation Delay
l
27
50
ns
tPHL(BG)
BG High-Low Propagation Delay
l
15
35
ns
tr(TG)
TG Output Rise Time
10% – 90%, CL = 1nF
10% – 90%, CL = 10nF
8
80
ns
ns
tf(TG)
TG Output Fall Time
10% – 90%, CL = 1nF
10% – 90%, CL = 10nF
5
50
ns
ns
tr(BG)
BG Output Rise Time
10% – 90%, CL = 1nF
10% – 90%, CL = 10nF
6
60
ns
ns
tf(BG)
BG Output Fall Time
10% – 90%, CL = 1nF
10% – 90%, CL = 10nF
3
30
ns
ns
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTC4444-5 is tested under pulsed load conditions such that
TJ ≈ TA. The LTC4444E-5 is guaranteed to meet specifications from 0°C
to 85°C junction temperature. Specifications over the –40°C to 125°C
operating junction temperature range are assured by design,
characterization and correlation with statistical process controls. The
LTC4444I-5 is guaranteed over the –40°C to 125°C operating temperature
range, LTC4444H-5 is guaranteed over the –40°C to 150°C operating
temperature range and the LTC4444MP-5 is tested and guaranteed over
the full –55°C to 150°C operating junction temperature range.
High junction temperatures degrade operating lifetimes; operating lifetime
is derated for junction temperatures greater than 125°C. Note that the
maximum ambient temperature consistent with these specifications is
determined by specific operating conditions in conjunction with board
layout, the rated package thermal impedance and other environmental
factors.
Note 3: The junction temperature (TJ, in °C) is calculated from the ambient
temperature (TA , in °C) and power dissipation (PD, in watts) according to
the formula:
TJ = TA + (PD • θJA)
where θJA (in °C/W) is the package thermal impedance.
Note 4: Failure to solder the exposed back side of the MS8E package to the
PC board will result in a thermal resistance much higher than 40°C/W.
44445fc
3
LTC4444-5
TYPICAL PERFORMANCE CHARACTERISTICS
VCC Supply Quiescent Current
vs Voltage
400
325
TINP = 6V, BINP = 0V
320
350
TINP = BINP = 0V
350
QUIESCENT CURRENT (μA)
QUIESCENT CURRENT (μA)
400
TA = 25°C
BOOST = 6V
TS = GND
VCC Supply Current
vs Temperature
300
TINP (BINP) = 6V
250
200
150
100
TINP = 0V, BINP = 6V
300
250
200
150
100
50
50
0
0
TINP = BINP = 0V
TA = 25°C
VCC = 6V
TS = GND
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14
VCC SUPPLY VOLTAGE (V)
44445 G01
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14
BOOST SUPPLY VOLTAGE (V)
Boost Supply Current
vs Temperature
Output Low Voltage (VOL)
vs Supply Voltage
VCC SUPPLY CURRENT (μA)
450
BOOST-TS Supply Quiescent
Current vs Voltage
300
295
290
TINP (BINP) = 6V
125 150
44445 G03
Output High Voltage (VOH)
vs Supply Voltage
250
200
150
100
TINP = BINP = 0V
0
–55
–25
13
VOL(TG)
120
100
80
VOL(BG)
60
40
TA = 25°C
ITG(BG) = 100mA
BOOST = VCC
TS = GND
20
VCC = BOOST = 6V
TS = GND
5
35
65
95
TEMPERATURE (°C)
14
140
0
4.5 5.5 6.5 7.5 8.5 9.5 10.5 11.5 12.5 13.5
SUPPLY VOLTAGE (V)
44445 G05
125 150
44445 G04
Input Thresholds (TINP, BINP)
vs Supply Voltage
VIL(TG,BG)
2.2
TA = 25°C
BOOST = VCC
TS = GND
1.8
4.5 5.5 6.5 7.5 8.5 9.5 10.5 11.5 12.5 13.5
SUPPLY VOLTAGE (V)
44445 G07
TG OR BG INPUT THRESHOLD (V)
2.6
11
10
9
8
VCC = BOOST = 6V
2.9 TS = GND
VIH(TG,BG)
2.8
2.7
2.6
2.5
2.4
VIL(TG,BG)
2.3
2.2
2.1
2.0
–55
–25
5
35
65
95
TEMPERATURE (°C)
–10mA
–1mA
–100mA
7
6
5
Input Thresholds (TINP, BINP)
Hysteresis vs Voltage
3.0
VIH(TG,BG)
12
Input Thresholds (TINP, BINP)
vs Temperature
3.0
TA = 25°C
BOOST = VCC
TS = GND
4
3
4.5 5.5 6.5 7.5 8.5 9.5 10.5 11.5 12.5 13.5
SUPPLY VOLTAGE (V)
44445 G06
TG OR BG INPUT THRESHOLD HYSTERESIS (mV)
TINP = 0V, BINP = 6V
160
TG OR BG OUTPUT VOLTAGE (V)
OUTPUT VOLTAGE (mV)
BOOST SUPPLY CURRENT (μA)
300
50
TG OR BG INPUT THRESHOLD (V)
305
15
350
2.0
310
VCC = BOOST = 6V
TS = GND
280
–55 –25
5
35
65
95
TEMPERATURE (°C)
44445 G02
TINP = 6V, BINP = 0V
2.4
315
285
400
2.8
TINP = BINP = 0V
125 150
44445 G08
500
475
TA = 25°C
BOOST = VCC
TS = GND
450
425
400
375
350
325
300
4.5 5.5 6.5 7.5 8.5 9.5 10.5 11.5 12.5 13.5
SUPPLY VOLTAGE (V)
44445 G09
44445fc
4
LTC4444-5
TYPICAL PERFORMANCE CHARACTERISTICS
4.2
VCC = BOOST = 6V
TS = GND
450
425
400
4.0
RISING THRESHOLD
3.9
3.8
3.7
FALLING THRESHOLD
3.6
3.5
375
–55
–25
5
35
65
95
TEMPERATURE (°C)
3.4
–55
125 150
5
35
65
95
TEMPERATURE (°C)
125 150
44445 G11
70
3.0
PULL-UP CURRENT (A)
60
tr(TG)
50
tr(BG)
40
tf(TG)
30
tf(BG)
20
OUTPUT DRIVER PULL-DOWN RESISTANCE (Ω)
TA = 25°C
VCC = BOOST = 6V
TS = GND
IPU(BG)
VCC = 12V
IPU(TG)
BOOST–TS = 12V
2.5
2.0
IPU(BG)
VCC = 6V
1.5
IPU(TG)
BOOST–TS = 6V
10
5
6
3
4
7
8
LOAD CAPACITANCE (nF)
9
10
1.0
–55
44445 G13
–25
5
35
65
95
TEMPERATURE (°C)
Propagation Delay
vs VCC Supply Voltage
TA = 25°C
BOOST = VCC
TS = GND
40
35
30
tPLH(TG)
25
20
tPLH(BG)
tPHL(TG)
15
TA = 25°C
BOOST = VCC
TS = GND
CL = 3.3nF
tr(TG)
tr(BG)
tf(TG)
tf(BG)
4.5 5.5 6.5 7.5 8.5 9.5 10.5 11.5 12.5 13.5
SUPPLY VOLTAGE (V)
44445 G12
125 150
44445 G14
3.0
2.8
BOOST–TS = 4.5V
2.6
BOOST–TS = 6V
2.4
2.2
2.0 BOOST–TS = 12V
1.8
1.6 RDS(TG)
1.4
VCC = 4.5V
1.2
VCC = 6V
1.0
0.8 RDS(BG)
VCC = 12V
0.6
0.4
–55 –25
5
35
65
95
125 150
TEMPERATURE (°C)
44445 G15
Propagation Delay vs Temperature
52
45
tPHL(BG)
10
4.5 5.5 6.5 7.5 8.5 9.5 10.5 11.5 12.5 13.5
SUPPLY VOLTAGE (V)
44445 G16
47
PROPAGATION DELAY (ns)
2
PROPAGATION DELAY (ns)
1
34
32
30
28
26
24
22
20
18
16
14
12
10
8
6
Output Driver Pull-Down
Resistance vs Temperature
Peak Driver (TG, BG) Pull-Up
Current vs Temperature
3.5
80
0
–25
44445 G10
Rise and Fall Time
vs Load Capacitance
RISE/FALL TIME (ns)
BOOST = VCC
TS = GND
4.1
475
Rise and Fall Time
vs VCC Supply Voltage
RISE/FALL TIME (ns)
500
VCC Undervoltage Lockout
Thresholds vs Temperature
VCC SUPPLY VOLTAGE (V)
TG OR BG INPUT THRESHOLD HYSTERESIS (mV)
Input Thresholds (TINP, BINP)
Hysteresis vs Temperature
VCC = BOOST = 6V
TS = GND
tPLH(TG)
42
37
tPHL(TG)
32
27
tPLH(BG)
22
17
tPHL(BG)
12
7
2
–55
–25
5
35
65
95
TEMPERATURE (°C)
125 150
44445 G17
44445fc
5
LTC4444-5
TYPICAL PERFORMANCE CHARACTERISTICS
Switching Supply Current
vs Input Frequency
SUPPLY CURRENT (mA)
1000
TA = 25°C
VCC = BOOST = 6V
TS = GND
1.6
1.4
1.2
IBOOST
(TG SWITCHING)
1.0
IVCC
(BG SWITCHING)
0.8
0.6
IVCC (TG SWITCHING)
0.4
SUPPLY CURRENT (mA)
1.8
Switching Supply Current
vs Load Capacitance
IVCC
(BG SWITCHING
AT 1MHz)
100
IBOOST
(TG SWITCHING
IBOOST
AT 1MHz)
(TG SWITCHING AT 1MHz)
IVCC
IVCC
1 (TG SWITCHING AT 500kHz) (TG SWITCHING
AT 1MHz)
10
IBOOST (BG SWITCHING)
0.2
IVCC
(BG SWITCHING
AT 500kHz)
IBOOST (BG SWITCHING AT 500kHz)
0
0
0
800
200
600
400
SWITCHING FREQUENCY (kHz)
1000
44445 G18
1
2
3
4
5
6
7
8
LOAD CAPACITANCE (nF)
9
10
44445 G19
PIN FUNCTIONS
TINP (Pin 1): High Side Input Signal. Input referenced
to GND. This input controls the high side driver output
(TG).
BINP (Pin 2): Low Side Input Signal. This input controls
the low side driver output (BG).
VCC (Pin 3): Supply. This pin powers input buffers, logic
and the low side gate driver output directly and the high
side gate driver output through an external diode connected between this pin and BOOST (Pin 6). A low ESR
ceramic bypass capacitor should be tied between this pin
and GND (Pin 9).
BG (Pin 4): Low Side Gate Driver Output (Bottom Gate).
This pin swings between VCC and GND.
BOOST (Pin 6): High Side Bootstrapped Supply. An external capacitor should be tied between this pin and TS
(Pin 8). Normally, a bootstrap diode is connected between
VCC (Pin 3) and this pin. Voltage swing at this pin is from
VCC – VD to VIN + VCC – VD , where VD is the forward voltage drop of the bootstrap diode.
TG (Pin 7): High Side Gate Driver Output (Top Gate). This
pin swings between TS and BOOST.
TS (Pin 8): High Side MOSFET Source Connection (Top
Source).
GND (Exposed Pad Pin 9): Ground. Must be soldered to
PCB ground for optimal thermal performance.
NC (Pin 5): No Connect. No connection required.
44445fc
6
LTC4444-5
BLOCK DIAGRAM
6
4.5V TO
13.5V
3
9
BOOST
VCC
GND
VINT
TS
7
8
ANTISHOOT-THROUGH
PROTECTION
TINP
VCC
2
TG
HIGH SIDE
LEVEL SHIFTER
LDO
1
VIN
UP TO 100V
VCC UVLO
VCC
BG
LOW SIDE
LEVEL SHIFTER
BINP
4
NC
5
44445 BD
TIMING DIAGRAMS
Adaptive Shoot-Through Protection
BINP
BINP
BG
BG
TINP
TINP
TG-TS
TG-TS
44445 TD01
Switching Time
INPUT RISE/FALL TIME < 10ns
TINP (BINP)
90%
10%
BINP (TINP)
BG (TG)
90%
TG (BG)
90%
10%
tr
tPHL
10%
tf
tPLH
44445 TD02
44445fc
7
LTC4444-5
OPERATION
Overview
Output Stage
The LTC4444-5 receives ground-referenced, low voltage
digital input signals to drive two N-channel power MOSFETs
in a synchronous buck power supply configuration. The
gate of the low side MOSFET is driven either to VCC or GND,
depending on the state of the input. Similarly, the gate of
the high side MOSFET is driven to either BOOST or TS by
a supply bootstrapped off of the switching node (TS).
A simplified version of the LTC4444-5’s output stage is
shown in Figure 1. The pull-up devices on the BG and
TG outputs are NPN bipolar junction transistors (Q1 and
Q2). The BG and TG outputs are pulled up to within an
NPN VBE (~0.7V) of their positive rails (VCC and BOOST,
respectively). Both BG and TG have N-channel MOSFET
pull-down devices (M1 and M2) which pull BG and TG
down to their negative rails, GND and TS. The large voltage
swing of the BG and TG output pins is important in driving external power MOSFETs, whose RDS(ON) is inversely
proportional to the gate overdrive voltage (VGS − VTH).
Input Stage
The LTC4444-5 employs CMOS compatible input thresholds
that allow a low voltage digital signal to drive standard
power MOSFETs. The LTC4444-5 contains an internal
voltage regulator that biases both input buffers for high
side and low side inputs, allowing the input thresholds
(VIH = 2.75V, VIL = 2.3V) to be independent of variations in
VCC . The 450mV hysteresis between VIH and VIL eliminates
false triggering due to noise during switching transitions.
However, care should be taken to keep both input pins
(TINP and BINP) from any noise pickup, especially in high
frequency, high voltage applications. The LTC4444-5 input
buffers have high input impedance and draw negligible
input current, simplifying the drive circuitry required for
the inputs.
LTC4444-5
BOOST
The LTC4444-5’s rise and fall times are determined by the
peak current capabilities of Q1 and M1. The predriver that
drives Q1 and M1 uses a nonoverlapping transition scheme
to minimize cross-conduction currents. M1 is fully turned
off before Q1 is turned on and vice versa.
Since the power MOSFET generally accounts for the majority of the power loss in a converter, it is important to
quickly turn it on or off, thereby minimizing the transition
time in its linear region. An additional benefit of a strong
VIN
UP TO 100V
6
Q1
Rise/Fall Time
TG
CGD
7
M1
CGS
TS
VCC
HIGH SIDE
POWER
MOSFET
LOAD
INDUCTOR
8
3
Q2
BG
CGD
4
M2
GND
CGS
LOW SIDE
POWER
MOSFET
9
44445 FO1
Figure 1. Capacitance Seen by BG and TG During Switching
44445fc
8
LTC4444-5
OPERATION
pull-down on the driver outputs is the prevention of crossconduction current. For example, when BG turns the low
side (synchronous) power MOSFET off and TG turns the
high side power MOSFET on, the voltage on the TS pin
will rise to VIN very rapidly. This high frequency positive
voltage transient will couple through the CGD capacitance
of the low side power MOSFET to the BG pin. If there is
an insufficient pull-down on the BG pin, the voltage on
the BG pin can rise above the threshold voltage of the low
side power MOSFET, momentarily turning it back on. With
both the high side and low side MOSFETs conducting,
significant cross-conduction current will flow through the
MOSFETs from VIN to ground and will cause substantial
power loss. A similar effect occurs on TG due to the CGS
and CGD capacitances of the high side MOSFET.
The powerful output driver of the LTC4444-5 reduces the
switching losses of the power MOSFET, which increase
with transition time. The LTC4444-5’s high side driver is
capable of driving a 1nF load with 8ns rise and 5ns fall
times using a bootstrapped supply voltage VBOOST-TS of
12V while its low side driver is capable of driving a 1nF
load with 6ns rise and 3ns fall times using a supply voltage VCC of 12V.
Undervoltage Lockout (UVLO)
The LTC4444-5 contains an undervoltage lockout detector
that monitors VCC supply. When VCC falls below 3.55V,
the output pins BG and TG are pulled down to GND and
TS, respectively. This turns off both external MOSFETs.
When VCC has adequate supply voltage, normal operation
will resume.
Adaptive Shoot-Through Protection
Internal adaptive shoot-through protection circuitry monitors the voltages on the external MOSFETs to ensure that
they do not conduct simultaneously. This feature improves
efficiency by eliminating cross-conduction current from
flowing from the VIN supply through both of the MOSFETs
to ground during a switch transition. If both TINP and
BINP are high at the same time, BG will be kept off and
TG will be turned on (refer to the Timing Diagram). If BG
is still high when TINP turns on, TG will not be turned on
until BG goes low.
When TINP turns off, the adaptive shoot-through protection circuitry monitors the level of the TS pin. BG can be
turned on if the TS pin goes low. If the TS pin stays high,
BG will be turned on 150ns after TINP turns off.
APPLICATIONS INFORMATION
Power Dissipation
To ensure proper operation and long-term reliability,
the LTC4444-5 must not operate beyond its maximum
temperature rating. Package junction temperature can
be calculated by:
TJ = TA + PD (θJA)
where:
TJ = Junction temperature
TA = Ambient temperature
PD = Power dissipation
θJA = Junction-to-ambient thermal resistance
Power dissipation consists of standby and switching
power losses:
PD = PDC + PAC + PQG
where:
PDC = Quiescent power loss
PAC = Internal switching loss at input frequency, fIN
PQG = Loss due turning on and off the external MOSFET
with gate charge QG at frequency fIN
The LTC4444-5 consumes very little quiescent current.
The DC power loss at VCC = 12V and VBOOST-TS = 12V is
only (350μA)(12V) = 4.2mW.
44445fc
9
LTC4444-5
APPLICATIONS INFORMATION
At a particular switching frequency, the internal power loss
increases due to both AC currents required to charge and
discharge internal node capacitances and cross-conduction currents in the internal logic gates. The sum of the
quiescent current and internal switching current with no
load are shown in the Typical Performance Characteristics
plot of Switching Supply Current vs Input Frequency.
The gate charge losses are primarily due to the large AC
currents required to charge and discharge the capacitance
of the external MOSFETs during switching. For identical
pure capacitive loads CLOAD on TG and BG at switching
frequency fIN, the load losses would be:
PCLOAD = (CLOAD)(f)[(VBOOST-TS)2 + (VCC)2]
In a typical synchronous buck configuration, VBOOST-TS
is equal to VCC – VD, where VD is the forward voltage
drop across the diode between VCC and BOOST. If this
drop is small relative to VCC, the load losses can be
approximated as:
PCLOAD = 2(CLOAD)(fIN)(VCC)2
Unlike a pure capacitive load, a power MOSFET’s gate
capacitance seen by the driver output varies with its VGS
voltage level during switching. A MOSFET’s capacitive load
power dissipation can be calculated using its gate charge,
QG. The QG value corresponding to the MOSFET’s VGS
value (VCC in this case) can be readily obtained from the
manufacturer’s QG vs VGS curves. For identical MOSFETs
on TG and BG:
PQG = 2(VCC)(QG)(fIN)
To avoid damage due to power dissipation, the LTC4444-5
includes a temperature monitor that will pull BG and TG
low if the junction temperature rises above 160°C. Normal
operation will resume when the junction temperature cools
to less than 135°C.
Bypassing and Grounding
The LTC4444-5 requires proper bypassing on the VCC
and VBOOST-TS supplies due to its high speed switching
(nanoseconds) and large AC currents (Amperes). Careless
component placement and PCB trace routing may cause
excessive ringing.
To obtain the optimum performance from the LTC4444-5:
A. Mount the bypass capacitors as close as possible
between the VCC and GND pins and the BOOST and
TS pins. The leads should be shortened as much as
possible to reduce lead inductance.
B. Use a low inductance, low impedance ground plane
to reduce any ground drop and stray capacitance.
Remember that the LTC4444-5 switches greater than
3A peak currents and any significant ground drop will
degrade signal integrity.
C. Plan the power/ground routing carefully. Know where
the large load switching current is coming from and
going to. Maintain separate ground return paths for
the input pin and the output power stage.
D. Keep the copper trace between the driver output pin
and the load short and wide.
E. Be sure to solder the Exposed Pad on the back side of
the LTC4444-5 package to the board. Correctly soldered
to a 2500mm2 double sided 1oz copper board, the
LTC4444-5 has a thermal resistance of approximately
40°C/W for the MS8E package. Failure to make good
thermal contact between the exposed back side and
the copper board will result in thermal resistances far
greater than 40°C/W.
44445fc
10
LTC4444-5
TYPICAL APPLICATION
LTC3780 High Efficiency 36V to 72V VIN to 48V/6A Buck-Boost DC/DC Converter
VBIAS
6V
VBIAS
10k
0.022μF
SENSE+
1000pF
100pF
0.1μF
100V
1
68pF
SENSE–
100Ω
2
8.25k
1%
47pF
D5
2.2μF
100V
s4
SW1
–
VIN
6
7
9
VIN
11
12
SENSE
ITH
EXTVCC
VOSENSE
INTVCC
SGND
RUN
PGND
FCB
BG2
PLLFLTR
SW2
PLLIN
TG2
STBYMD
21
4
0.1μF
16V
20
19
18
10μF
10V
17
BG
TS
8
+
VIN
36V TO 72V
C1
100μF
100V
0.22μF
16V
VOS+
GND
1μF
16V
10W
9
L1
10μH
D3
16
D4
2.2μF
100V
s8
+
VOUT
48V
C2,C3 6A
220μF
63V
s2
15
14
13
BOOST2
VBIAS
D6
0.1μF
16V
0.1μF
16V
SENSE+
D3, D4: DIODES INC. PDS560-13
D5: DIODES INC. MMBZ5230B-7-F
D6: DIODES INC. B1100-13-F
L1: SUMIDA CDEP147NP-100MC-125
R1, R2: VISHAY DALE WSL2512R0250FEA
SENSE–
10Ω
10Ω
R1
0.025Ω
1W
R2
0.025Ω
1W
44445 TA02a
Efficiency
98
VIN = 36V
VIN = 48V
EFFICIENCY (%)
2.2μF, 100V, TDK C4532X7R2A225MT
C1: SANYO 100ME100HC +T
C2, C3: SANYO 63ME220HC + T
D1: ON SEMI MMDL770T1G
D2: DIODES INC. 1N5819HW-7-F
6
TINP
BOOST
LTC4444-5
2
7
TG
BINP
22
BG1
VCC
1
23
LTC3780EG TG1
SENSE+
10
220k
SS
24
BOOST1
4
8
15k
PGOOD
3
5
VOS+ 487k
1%
D1
VBIAS
3
100Ω
220k
1μF
16V
D2
97
VIN = 72V
96
95
1
2
3
4
LOAD CURRENT (A)
5
6
44445 TA02b
44445fc
11
LTC4444-5
PACKAGE DESCRIPTION
MS8E Package
8-Lead Plastic MSOP, Exposed Die Pad
(Reference LTC DWG # 05-08-1662 Rev I)
BOTTOM VIEW OF
EXPOSED PAD OPTION
1.88
(.074)
1
1.88 t 0.102
(.074 t .004)
0.29
REF
1.68
(.066)
0.889 t 0.127
(.035 t .005)
0.05 REF
5.23
(.206)
MIN
DETAIL “B”
CORNER TAIL IS PART OF
DETAIL “B” THE LEADFRAME FEATURE.
FOR REFERENCE ONLY
NO MEASUREMENT PURPOSE
1.68 t 0.102 3.20 – 3.45
(.066 t .004) (.126 – .136)
8
3.00 t 0.102
(.118 t .004)
(NOTE 3)
0.65
(.0256)
BSC
0.42 t 0.038
(.0165 t .0015)
TYP
8
7 6 5
0.52
(.0205)
REF
RECOMMENDED SOLDER PAD LAYOUT
0.254
(.010)
3.00 t 0.102
(.118 t .004)
(NOTE 4)
4.90 t 0.152
(.193 t .006)
DETAIL “A”
0s – 6s TYP
GAUGE PLANE
1
0.53 t 0.152
(.021 t .006)
DETAIL “A”
2 3
4
1.10
(.043)
MAX
0.86
(.034)
REF
0.18
(.007)
SEATING
PLANE
0.22 – 0.38
(.009 – .015)
TYP
0.65
(.0256)
BSC
0.1016 t 0.0508
(.004 t .002)
MSOP (MS8E) 0910 REV I
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
6. EXPOSED PAD DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH ON E-PAD
SHALL NOT EXCEED 0.254mm (.010") PER SIDE.
44445fc
12
LTC4444-5
REVISION HISTORY
(Revision history begins at Rev B)
REV
DATE
DESCRIPTION
PAGE NUMBER
B
06/10
Updates to Description
1
Updates to temperature ranges in Order Information
2
Updates to Notes 2 and 3 in Electrical Characteristics
3
Updates to graphs G03, G04, G08, G10, G11, G14, G15, G17
C
01/11
4, 5, 6
Updates to Pin 9 text in Pin Functions
6
Updates to Block Diagram
7
Updates to Timing Diagram section
7
Updates to “Adaptive Shoot-Through Protection” paragraph
9
Updates to Related Parts
12
H-grade part added. Reflected throughout the data sheet.
1 to 14
44445fc
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
13
LTC4444-5
TYPICAL APPLICATION
LTC3780 High Efficiency 8V to 80V VIN to 12V/5A Buck-Boost DC/DC Converter
VBIAS
0.1μF
0.01μF
SENSE+
100pF
VOS+ 113k
1%
0.1μF
1
68pF
SENSE–
100Ω
2
8.06k
1%
SENSE–
6
7
220k
10
11
2.2μF, 100V, TDK C4532X7R2A225MT
100μF, 100V SANYO 100ME 100AX
C1: SANYO 16ME330WF
D1: DIODES INC. BAV19WS
D2: DIODES INC. 1N5819HW-7-F
D3: DIODES INC. B320A-13-F
D4: DIODES INC. MMBZ5230B-7-F
D5: DIODES INC. B1100-13-F
L1: SUMIDA CDEP147-8R0
12
BOOST1
LTC3780EG TG1
SENSE+
9
VIN
SS
4
8
D4
PGOOD
3
5
47pF
80.6k
VBIAS
3
100Ω
20k
0.22μF
16V
D2
10k
VBIAS
6V
1μF
16V
D1
SW1
VIN
ITH
EXTVCC
VOSENSE
INTVCC
SGND
BG1
RUN
PGND
FCB
BG2
PLLFLTR
SW2
PLLIN
TG2
STBYMD
BOOST2
24
23
VCC
6
TINP BOOST
LTC4444-5
2
7
BINP
TG
2.2μF
100V
s5
1
TG1
22
SW1
21
19
18
17
4
0.1μF
16V
20
10μF
10V
BG
TS
8
VOS+
0.22μF
16V
10Ω
GND
1μF
16V
9
TG1
L1 8μH
VIN
8V TO
100μF 80V
100V
s2
+
D3
22μF
16V
s3
+
C1
330μF
s2
VOUT
12V
5A
SW1
16
15
14
13
D5
VBIAS
0.1μF
16V
0.1μF
SENSE+
SENSE–
10Ω
10Ω
0.005Ω
1W
4444 TA03
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LTC4446
High Voltage Synchronous N-Channel MOSFET Driver
without Shoot-Through Protection
Up to 100V Supply Voltage, 7.2V ≤ VCC ≤ 13.5V, 3A Peak Pull-Up/
0.55Ω Peak Pull-Down
LTC4440/LTC4440-5
High Speed, High Voltage, High Side Gate Driver
Up to 80V Supply Voltage, 8V ≤ VCC ≤ 15V, 2.4A Peak Pull-Up/
1.5Ω Peak Pull-Down
LTC4442
High Speed Synchronous N-Channel MOSFET Driver
Up to 38V Supply Voltage, 6V ≤ VCC ≤ 9.5V, 3.2A Peak Pull-Up/
4.5A Peak Pull-Down
LTC4449
High Speed Synchronous N-Channel MOSFET Driver
Up to 38V Supply Voltage, 4.5V ≤ VCC ≤ 6.5V, 3.2A Peak Pull-Up/
4.5A Peak Pull-Down
LTC4441/LTC4441-1
N-Channel MOSFET Gate Driver
Up to 25V Supply Voltage, 5V ≤ VCC ≤ 25V, 6A Peak Output Current
LTC1154
High Side Micropower MOSFET Driver
Up to 18V Supply Voltage, 85μA Quiescent Current, H-Grade Available
44445fc
14 Linear Technology Corporation
LT 0111 REV C • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507
●
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