LTC5583
Matched Dual-Channel
6GHz RMS Power Detector
FEATURES
DESCRIPTION
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The LTC®5583 is a dual-channel RMS power detector,
capable of measuring two AC signals with wide dynamic
range, from –59dBm to 4dBm, depending on frequency.
Each AC signal’s power in decibel-scaled value is precisely
converted to a DC voltage on a linear scale, independent
of the crest factor of the input signal waveforms. The
LTC5583 is suitable for precision power measurement and
level control for a variety of RF standards, including LTE,
EDGE, W-CDMA, CDMA2000, TD-SCDMA, and WiMAX.
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Frequency Range: 40MHz to 6GHz
Linear Dynamic Range: Up to 60dB
±0.5dB (Typ) Accuracy Over Temperature
40dB Channel-to-Channel Isolation at 2GHz Even
with Single-Ended RF Inputs
Matched Dual-Channel Outputs: 55dB with differential inputs.
APPLICATIONS
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VSWR Monitor
MIMO Transmit Power Control
Basestation PA Control
Transmit and Receive Gain Control
RF Instrumentation
The power difference of the two input signals is provided
at a difference output pin. Each channel also has a fast
envelope detector, which tracks the RF input signal’s envelope and outputs a voltage directly proportional to the
signal’s instantaneous power. The envelope detectors can
be disabled to reduce power consumption.
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
Protected by U.S. Patents including 7262661, 7317357, 7622981.
TYPICAL APPLICATION
Output Voltage and Linearity Error
vs RF Input Power, 2140MHz CW
Inputs, Single-Ended Drive
Block Diagram
IN+A
2.5
IN–A
ENVA
2.0
2.0
1.5
RMS
DETECT
+
VODF
–
ENVB
ENVELOPE
DETECT
DIFFERENCE
AMPLIFIER
RMS
DETECT
IN+B
IN–B
INV
VOB
VOA, VOB (V)
1.0
1.5
0.5
1.0
–0.5
0
0.5
0
–65
VOS
5583 BD
85°C, CH A
85°C, CH B
25°C, CH A
25°C, CH B
–40°C, CH A
–40°C, CH B
–55
–45 –35 –25 –15
INPUT POWER (dBm)
–5
–1.0
LINEARITY ERROR (dB)
ENVELOPE
DETECT
LTC5583
2.5
VOA
–1.5
–2.0
–2.5
5
5583 TA01b
5583fa
1
LTC5583
ABSOLUTE MAXIMUM RATINGS
PIN CONFIGURATION
(Note 1)
VCCN
ENVA
FLTA
RP1
IN+A
IN–A
TOP VIEW
Supply Voltage .........................................................3.8V
Enable Voltage .................................–0.3V to VCC + 0.3V
VOS Voltage ......................................–0.3V to VCC + 0.3V
INV Voltage ............................................... –0.3V to 3.6V
Input Signal Power (Single-Ended, 50Ω) .............18dBm
Input Signal Power (Differential, 50Ω) .................24dBm
TJMAX .................................................................... 125°C
Operating Temperature Range .................–40°C to 85°C
Storage Temperature Range .................. –65°C to 125°C
24 23 22 21 20 19
DECA 1
18 VOA
VCCA 2
17 RT1
VCCR 3
16 VODF
25
GND
EN 4
15 VOS
13 VOB
INV
ENVB
RP2
9 10 11 12
FLTB
8
IN
7
–B
14 RT2
DECB 6
IN+B
VCCB 5
UF PACKAGE
24-LEAD (4mm s 4mm) PLASTIC QFN
TJMAX = 125°C, θJA = 37°C/W
EXPOSED PAD (PIN 25) IS GND, MUST BE SOLDERED TO PCB
ORDER INFORMATION
LEAD FREE FINISH
TAPE AND REEL
PART MARKING
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LTC5583IUF#PBF
LTC5583IUF#TRPBF
5583
24-Lead (4mm × 4mm) Plastic QFN
–40°C to 85°C
Consult LTC Marketing for parts specified with wider operating temperature ranges.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
5583fa
2
LTC5583
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, –40°C to 85°C, otherwise specifications are at TA = 25°C, VCC = 3.3V, EN = 3.3V. Test circuits are shown in
Figures 1 and 2 (Note 2).
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
AC Input
Input Frequency Range
(Note 4)
Input Impedance
Differential
40 to 6000
MHz
400//0.5
Ω//pF
fRF = 450MHz (Single-Ended Inputs)
Linear Dynamic Range
CW, 50Ω, ±1dB Linearity Error (Note 5)
l
RF Input Power Range
CW, 50Ω, ±1dB Linearity Error (Note 5)
(Note 3)
Deviation from CW Response
11dB Peak to Average Ratio (3-Carrier CDMA2K)
12dB Peak to Average Ratio (4-Carrier WCDMA)
Input A to Input B Isolation
Single-Ended Inputs
lnput A to Output B Isolation
Input B to Output A Isolation
Single-Ended Inputs
(Notes 6, 7)
dB
57
dB
–59 to 4
Output Slope
Logarithmic Intercept
63
dBm
29.6
mV/dB
–78.5
dBm
0.7
0.4
Frequency Separation = 0Hz
Frequency Separation = 1MHz
Frequency Separation = 10MHz
dB
dB
77
dB
50
>55
>55
dB
dB
dB
61
dB
56
dB
fRF = 880MHz (Single-Ended Inputs)
Linear Dynamic Range
CW, 50Ω, ±1dB Linearity Error (Note 5)
l
RF Input Power Range
CW, 50Ω, ±1dB Linearity Error (Note 5)
–58 to 3
Output Slope
Logarithmic Intercept
(Note 3)
Deviation from CW Response
11dB Peak to Average Ratio (3-Carrier CDMA2K)
12dB Peak to Average Ratio (4-Carrier WCDMA)
Input A to Input B Isolation
Single-Ended inputs
Input A to Output B Isolation
Input B to Output A Isolation
Single-Ended inputs
(Notes 6, 7)
dBm
29.7
mV/dB
–77.8
dBm
0.7
0.4
Frequency Separation = 0Hz
Frequency Separation = 1MHz
Frequency Separation = 10MHz
dB
dB
68
dB
41
52
51
dB
dB
dB
60
dB
55
dB
fRF = 2140MHz (Single-Ended Inputs)
Linear Dynamic Range
CW, 50Ω, ±1dB Linearity Error (Note 5)
50
l
RF Input Power Range
CW, 50Ω, ±1dB Linearity Error (Note 5)
Output Slope
–58 to 2
dBm
26
29.6
34
mV/dB
–90
–77.4
–64
dBm
Logarithmic Intercept
(Note 3)
Channel Mismatch
Input Power = 0dBm to Both Channels
55
>55
>55
dB
dB
dB
5583fa
3
LTC5583
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, –40°C to 85°C, otherwise specifications are at TA = 25°C, VCC = 3.3V, EN = 3.3V. Test circuits are shown in
Figures 1 and 2 (Note 2).
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
fRF = 2700MHz (Single-Ended Inputs)
Linear Dynamic Range
CW, 50Ω, ±1dB Linearity Error (Note 5)
l
RF Input Power Range
CW, 50Ω, ±1dB Linearity Error (Note 5)
dB
dB
–56 to 3
Output Slope
Logarithmic Intercept
59
52
(Note 3)
dBm
30.0
mV/dB
–74.9
dBm
Deviation from CW Response
12dB Peak to Average Ratio (WiMAX OFDM)
0.6
dB
Input A to Input B Isolation
Single-Ended Inputs
52
dB
lnput A to Output B Isolation
Input B to Output A Isolation
Singled-Ended Inputs
(Notes 6, 7)
Frequency Separation = 0Hz
Frequency separation = 1MHz
Frequency separation = 10MHz
33
45
44
dB
dB
dB
Differential Inputs
(Notes 6, 7)
Frequency Separation = 0Hz
Frequency separation = 1MHz
Frequency separation = 10MHz
50
>55
>55
dB
dB
dB
fRF = 3600MHz (Differential Inputs)
Linear Dynamic Range
CW, 50Ω, ±1dB Linearity Error (Note 5)
l
RF Input Power Range
CW, 50Ω, ±1dB Linearity Error (Note 5)
dB
dB
–53 to 3
Output Slope
Logarithmic Intercept
56
49
(Note 3)
dBm
30.2
mV/dB
–73.1
dBm
Deviation from CW Response
12dB Peak to Average Ratio (WiMAX OFDM)
0.4
dB
Input A to Input B Isolation
Differential Inputs
70
dB
lnput A to Output B Isolation
Input B to Output A Isolation
Differential Inputs
(Notes 6, 7)
47
>55
>55
dB
dB
dB
49
dB
Frequency Separation = 0Hz
Frequency Separation = 1MHz
Frequency Separation = 10MHz
fRF = 5800MHz (Differential Inputs)
Linear Dynamic Range
CW, 50Ω, ±1dB Linearity Error (Note 5)
RF Input Power Range
CW, 50Ω, ±1dB Linearity Error (Note 5)
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Output Slope
44
–44 to 5
dB
dBm
31.3
mV/dB
–63.2
dBm
Logarithmic Intercept
(Note 3)
Deviation from CW Response
12dB Peak to Average Ratio (WiMAX OFDM)
0.5
dB
Input A to Input B Isolation
Differential Inputs
50
dB
lnput A to Output B Isolation
Input B to Output A Isolation
Differential Inputs
(Notes 6, 7)
30
42
41
dB
dB
dB
Frequency Separation = 0Hz
Frequency Separation = 1MHz
Frequency Separation = 10MHz
Output Interface
VOA, VOB
Output DC Voltage
No RF Signal Present
0.45
V
50
Ω
Source/Sink
5/5
mA
Rise Time, 10% to 90%
0.5V to 2.2V, fRF = 100MHz, CFLTRA = CFLTRB = 8.2nF
140
ns
Fall Time, 90% to 10%
2.2V to 0.5V, fRF = 100MHz, CFLTRA = CFLTRB = 8.2nF
3.5
μs
Output Impedance
IOUT
5583fa
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LTC5583
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, –40°C to 85°C, otherwise specifications are at TA = 25°C, VCC = 3.3V, EN = 3.3V. Test circuits are shown in
Figures 1 and 2 (Note 2).
PARAMETER
VODF
CONDITIONS
Output DC Voltage
MIN
ENVA
ENVB
MAX
UNITS
No RF Signal Present, VOS = 0V
0.05
5
Ω
Source/Sink
5/5
mA
Output Impedance
IOUT
TYP
V
Rise Time, 10% to 90%
50mV to 1.8V, fRF = 100MHz, CFLTRA = CFLTRB = 8.2nF
170
ns
Fall Time, 90% to 10%
1.8V to 50mV, fRF = 100MHz, CFLTRA = CFLTRB = 8.2nF
3.5
μs
Output DC Voltage
No RF Signal Present
2.15
V
Output Impedance
140
Ω
IOUT
Source/Sink
4.0/1.8
mA
Rise Time, 10% to 90%
0.9V to 2.1V
11
ns
Fall Time, 90% to 10%
2.1V to 0.9V
–3dB Bandwidth
11
ns
50
MHz
Control Interface
EN
Input High Voltage
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Input Low Voltage
l
Input Current
INV
2
Applied Voltage = 3.3V
Input High Voltage
V
100
VOS
180
μA
V
1
Applied Voltage = 3.3V
Input Voltage Range
Input Current
V
2
Input Low Voltage
Input Current
0.3
0
0
Applied Voltage = 2.4V
V
μA
2.4
77
V
μA
Power Supply
Supply Voltage
3.1
3.3
3.5
100
Supply Current
Envelope Detectors Turned Off
80.5
Supply Current
Envelope Detectors Turned On
90.1
Shutdown Current
EN = 0V, VCC = 3.5V
0.1
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTC5583 is guaranteed functional over the temperature range
from –40°C to 85°C.
Note 3: Logarithmic Intercept is an extrapolated input power level from the
best-fit log-linear straight line, where the output voltage is 0V.
Note 4: Operation over a wider frequency range is possible with reduced
performance. Consult the factory for information and assistance.
Note 5: Linearity error is the difference in dB between the actual output
and the best-fit straight line at 25°C (using linear regression between
PIN = –50dBm and 0dBm for 450MHz, 880MHz, 2140MHz, 2700MHz;
V
mA
mA
20
μA
between PIN = –40dBm and 0dBm for 3600MHz, 5800MHz). The dynamic
range is defined as the range of input power over which the linearity error
is within ±1dB.
Note 6: Input A to Output B (Channel A to Channel B) isolation is defined
as the ratio of input power levels at the two channels when the interfering
channel (Channel A with higher power) results in a 1dB output deviation
in the interfered channel (Channel B with lower power) and vice versa.
Sweep one channel input power level while holding the other channel input
at –45dBm for 450MHz, 880MHz, 2140MHz, 2700MHz, 3600MHz, and at
–35dBm for 5800MHz.
Note 7: For frequency separation = 0Hz between the two input signals,
channel-to-channel isolation is a function of the phase difference between
these two signals. The worst-case isolation is assumed.
5583fa
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LTC5583
TYPICAL PERFORMANCE CHARACTERISTICS
VCC = 3.3V, EN = 3.3V, TA = 25°C, unless otherwise noted. Test circuits shown in Figures 1 and 2.
Output Voltage vs RF Input Power
CW Input at Various Frequencies
3
2.6
450MHz, CHA
880MHz, CHA
2140MHz, CHA
2700MHz, CHA
3600MHz, CHA
5800MHz, CHA
1.8
2
LINEARITY ERROR (dB)
2.2
VOA, VOB (V)
Linearity Error vs RF Input Power
CW Input at Various Frequencies
1.4
450MHz, CHB
880MHz, CHB
2140MHz, CHB
2700MHz, CHB
3600MHz, CHB
5800MHz, CHB
1.0
0.6
0.2
–70 –60 –50 –40 –30 –20 –10
INPUT POWER (dBm)
0
450MHz, CHA
880MHz, CHA
2140MHz, CHA
2700MHz, CHA
3600MHz, CHA
5800MHz, CHA
–1
–2
450MHz, CHB
880MHz, CHB
2140MHz, CHB
2700MHz, CHB
3600MHz, CHB
5800MHz, CHB
–3
–70 –60 –50 –40 –30 –20 –10
INPUT POWER (dBm)
10
0
1
0
5583 G02
5583 G01
Logarithmic Intercept
vs Frequency
Slope vs Frequency
–59
33
–40°C
–63
25°C
31
INTERCEPT (dBm)
SLOPE (mV/dB)
32
85°C
30
29
–67
–40°C
25°C
–71
85°C
–75
–79
28
–83
27
0
1
2
3
4
FREQUENCY (GHz)
5
0
6
1
2
3
4
FREQUENCY (GHz)
5
Intercept Distribution vs Temperature
2140MHz CW Input
Slope Distribution vs Temperature
2140MHz CW Input
35
85°C
25°C
–40°C
PERCENTAGE DISTRIBUTION (%)
PERCENTAGE DISTRIBUTION (%)
40
35
30
25
20
15
10
5
6
5583 G04
5583 G03
45
10
30
85°C
25°C
–40°C
25
20
15
10
5
0
0
28.5
30.3
29.1
29.7
SLOPE (mV/dB)
30.9
5583 G05
–83 –81 –79 –77 –75 –73
LOGARITHMIC INTERCEPT (dBm)
–71
5583 G06
5583fa
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LTC5583
TYPICAL PERFORMANCE CHARACTERISTICS
VCC = 3.3V, EN = 3.3V, TA = 25°C, unless otherwise noted. For temperature compensation of logarithmic intercept at 880MHz,
set RP1 = Open, RP2 = 0, RT1 = 11.5kΩ, RT2 = 1.13kΩ. See Figure 1.
Output Voltage and Linearity Error
Difference Output and Linearity
vs RF Input Power, 880MHz CW
Error vs RF Input Power, 880MHz
Inputs, Single-Ended Drive
CW Inputs, Single-Ended Drive
2.5
2.5
2.5
1.5
VOA, VOB (V)
0.5
0
–0.5
1.0
85°C, CH A
85°C, CH B
25°C, CH A
25°C, CH B
–40°C, CH A
–40°C, CH B
0.5
0
–65
–55
–45 –35 –25 –15
INPUT POWER (dBm)
–5
–1.0
1.0
1.5
0.5
1.0
–0.5
0
–1.0
–1.5
0.5
SWEEP CH A INPUT
HOLD CH B
INPUT = –26dBm
–2.0
–2.5
0
–65
5
–55
–1.5
85°C
25°C
–40°C
–45 –35 –25 –15
INPUT POWER (dBm)
–5
5583 G07
–2.0
–2.5
5
5583 G08
Modulation Deviation vs RF Input
Power, 880MHz Inputs,
Single-Ended Drive
Output Voltage and Linearity Error
vs RF Input Power, 880MHz CW Inputs,
Single-Ended Drive, 5 Devices
2.5
2.5
1.5
LINEARITY ERROR (dB)
1.5
LINEARITY ERROR (dB)
1.0
2.0
SWEEP CH B INPUT
HOLD CH A INPUT = –26dBm
2.0
VODF (V)
2.0
2.5
VOS = 1.2V, INV = 0V
2.0
3
2.0
0.5
1.5
0
–0.5
1.0
–1.0
0.5
0
–65
–1.5
85°C
25°C
–40°C
–55
–45 –35 –25 –15
INPUT POWER (dBm)
–5
LINEARITY ERROR (dB)
1.0
VOA, VOB (V)
2
1.5
LINEARITY ERROR (dB)
2.0
1
4-CARRIER WCDMA
–1
–2
–2.0
–2.5
CW
0
3-CARRIER CDMA2K
DEVIATION MEASURED
FROM LINEAR REFERENCE
GENERATED WITH CW INPUT.
–3
–65
5
–55
–45 –35 –25 –15
INPUT POWER (dBm)
–5
5583 G09
5583 G10
3
0.09
2
0.06
1
0.03
0
0
–0.03
–1
–3
–65
–0.06
85°C
25°C
–40°C
–55
–45 –35 –25 –15
INPUT POWER (dBm)
–5
–0.09
5
5583 G11
INTERFERED CHANNEL OUTPUT DEVIATION (dB)
Input A to Output B Isolation,
Input B to Output A Isolation,
880MHz CW Inputs, Single-Ended Drive
VOA – VOB (V)
VOA – VOB (dB)
Channel Matching vs RF Input
Power, 880MHz CW Inputs,
Single-Ended Drive, 5 Devices
–2
5
2.5
2.0
A m B, FREQ SEP = 0Hz
B m A, FREQ SEP = 0Hz
A m B, FREQ SEP = 1MHz
B m A, FREQ SEP = 1MHz
A m B, FREQ SEP = 10MHz
B m A, FREQ SEP = 10MHz
NOTE 7
A m B INDICATES:
CH A = INTERFERING CHANNEL
CH B = INTERFERED CHANNEL
B m A INDICATES:
CH B = INTERFERING CHANNEL
CH A = INTERFERED CHANNEL
1.5
INTERFERED CHANNEL
INPUT = –45dBm,
INTERFERING CHANNEL
INPUT SWEPT
1.0
0.5
0
–45
FREQ SEP = FREQUENCY
SEPARATION BETWEEN
CH A INPUT AND CH B INPUT
–35
–25
–15
–5
INTERFERING CHANNEL
INPUT POWER (dBm)
5
5583 G12
5583fa
7
LTC5583
TYPICAL PERFORMANCE CHARACTERISTICS
VCC = 3.3V, EN = 3.3V, TA = 25°C, unless otherwise noted. For temperature compensation of logarithmic intercept at 2140MHz,
set RP1 = Open, RP2 = 0, RT1 = 9.76kΩ, RT2 = 1.1kΩ. See Figure 1.
Difference Output and Linearity
Error vs RF Input Power, 2140MHz
CW Inputs, Single-Ended Drive
Output Voltage and Linearity Error
vs RF Input Power, 2140MHz CW
Inputs, Single-Ended Drive
2.5
2.5
2.5
1.5
VOA, VOB (V)
0
–0.5
1.0
85°C, CH A
85°C, CH B
25°C, CH A
25°C, CH B
–40°C, CH A
–40°C, CH B
0.5
0
–65
–55
–45 –35 –25 –15
INPUT POWER (dBm)
–5
–1.0
1.0
1.5
0.5
1.0
–0.5
0
–1.0
–1.5
0.5
SWEEP CH A INPUT
HOLD CH B
INPUT = –26dBm
–2.0
–2.5
0
–65
5
–55
–45 –35 –25 –15
INPUT POWER (dBm)
–1.5
85°C
25°C
–40°C
–5
5583 G13
–2.0
–2.5
5
5583 G14
Output Voltage and Linearity Error
vs RF Input Power, 2140MHz CW Inputs,
Single-Ended Drive, 5 Devices
Modulation Deviation
vs RF Input Power, 2140MHz
Inputs, Single-Ended Drive
2.5
2.5
1.5
LINEARITY ERROR (dB)
0.5
1.5
LINEARITY ERROR (dB)
1.0
2.0
SWEEP CH B INPUT
HOLD CH A INPUT = –26dBm
2.0
VODF (V)
2.0
2.5
VOS = 1.2V, INV = 0V
2.0
3
2.0
2.0
0.5
0
–0.5
1.0
–1.0
0.5
0
–65
–1.5
85°C
25°C
–40°C
–55
–45 –35 –25 –15
INPUT POWER (dBm)
–5
LINEARITY ERROR (dB)
1.5
LINEARITY ERROR (dB)
1.0
VOA, VOB (V)
2
1.5
1
4-CARRIER WCDMA
CW
0
3-CARRIER CDMA2K
–1
–2 DEVIATION MEASURED
FROM LINEAR REFERENCE
GENERATED WITH CW INPUT.
–3
–65 –55 –45 –35 –25 –15
INPUT POWER (dBm)
–2.0
–2.5
5
–5
5583 G15
5583 G16
3
0.09
2
0.06
1
0.03
0
0
–0.03
–1
–3
–65
–0.06
85°C
25°C
–40°C
–55
–45 –35 –25 –15
INPUT POWER (dBm)
–5
–0.09
5
5583 G17
INTERFERED CHANNEL OUTPUT DEVIATION (dB)
Input A to Output B Isolation,
Input B to Output A Isolation,
2140MHz CW Inputs, Single-Ended Drive
VOA – VOB (V)
VOA – VOB (dB)
Channel Matching vs RF Input
Power, 2140MHz CW Inputs,
Single-Ended Drive, 5 Devices
–2
5
2.5
2.0
A m B, FREQ SEP = 0Hz
B m A, FREQ SEP = 0Hz
A m B, FREQ SEP = 1MHz
B m A, FREQ SEP = 1MHz
A m B, FREQ SEP = 10MHz
B m A, FREQ SEP = 10MHz
NOTE 7
A m B INDICATES:
CH A = INTERFERING CHANNEL
CH B = INTERFERED CHANNEL
B m A INDICATES:
CH B = INTERFERING CHANNEL
CH A = INTERFERED CHANNEL
1.5
INTERFERED CHANNEL
INPUT = –45dBm,
INTERFERING CHANNEL
INPUT SWEPT
1.0
0.5
0
–45
FREQ SEP = FREQUENCY
SEPARATION BETWEEN
CH A INPUT AND CH B INPUT
–35
–25
–15
–5
INTERFERING CHANNEL
INPUT POWER (dBm)
5
5583 G18
5583fa
8
LTC5583
TYPICAL PERFORMANCE CHARACTERISTICS
VCC = 3.3V, EN = 3.3V, TA = 25°C, unless otherwise noted. For temperature compensation of logarithmic intercept at 2700MHz,
set RP1 = Open, RP2 = 0, RT1 = 8.87kΩ, RT2 = 1.21kΩ. See Figure 1.
Difference Output and Linearity
Error vs RF Input Power, 2700MHz
CW Inputs, Single-Ended Drive
Output Voltage and Linearity Error
vs RF Input Power, 2700MHz CW
Inputs, Single-Ended Drive
2.5
2.5
2.5
1.5
VOA, VOB (V)
0.5
0
–0.5
1.0
85°C, CH A
85°C, CH B
25°C, CH A
25°C, CH B
–40°C, CH A
–40°C, CH B
0.5
0
–65
–55
–45 –35 –25 –15
INPUT POWER (dBm)
–1.0
1.0
1.5
0.5
1.0
–0.5
0
–1.0
–1.5
0.5
SWEEP CH A INPUT
HOLD CH B
INPUT = –25dBm
–2.0
0
–65
–2.5
–5
5
–55
–1.5
85°C
25°C
–40°C
–45 –35 –25 –15
INPUT POWER (dBm)
–5
5583 G19
–2.0
–2.5
5
5583 G20
Output Voltage and Linearity Error
vs RF Input Power, 2700MHz CW Inputs,
Single-Ended Drive, 5 Devices
Modulation Deviation
vs RF Input Power, 2700MHz
Inputs, Single-Ended Drive
2.5
2.5
1.5
LINEARITY ERROR (dB)
1.5
LINEARITY ERROR (dB)
1.0
2.0
SWEEP CH B INPUT
HOLD CH A INPUT = –25dBm
2.0
VODF (V)
2.0
2.5
VOS = 1.2V, INV = 0V
2.0
3
2.0
0
–0.5
1.0
–1.0
0.5
0
–65
–1.5
85°C
25°C
–40°C
–55
–45 –35 –25 –15
INPUT POWER (dBm)
–5
LINEARITY ERROR (dB)
0.5
1.5
LINEARITY ERROR (dB)
1.0
VOA, VOB (V)
2
1.5
2.0
1
CW
0
WiMAX
–1
–2 DEVIATION MEASURED
FROM LINEAR REFERENCE
GENERATED WITH CW INPUT.
–3
–65 –55 –45 –35 –25 –15
INPUT POWER (dBm)
–2.0
–2.5
5
5583 G22
Input A to Output B Isolation,
Input B to Output A Isolation,
2700MHz CW Inputs, Single-Ended Drive
0.09
2
0.06
1
0.03
0
0
–0.03
–1
–3
–65
–0.06
85°C
25°C
–40°C
–55
–45 –35 –25 –15
INPUT POWER (dBm)
–5
–0.09
5
5583 G23
VOA – VOB (V)
VOA – VOB (dB)
3
INTERFERED CHANNEL OUTPUT DEVIATION (dB)
Channel Matching vs RF Input
Power, 2700MHz CW Inputs,
Single-Ended Drive, 5 Devices
–2
5
–5
5583 G21
5.0
4.5
4.0
3.5
A m B, FREQ SEP = 0Hz
NOTE 7
B m A, FREQ SEP = 0Hz
A m B, FREQ SEP = 1MHz
B m A, FREQ SEP = 1MHz
A m B, FREQ SEP = 10MHz
B m A, FREQ SEP = 10MHz
A m B INDICATES:
CH A = INTERFERING CHANNEL
CH B = INTERFERED CHANNEL
B m A INDICATES:
CH B = INTERFERING CHANNEL
CH A = INTERFERED CHANNEL
3.0
2.5
INTERFERED CHANNEL
INPUT = –45dBm,
INTERFERING CHANNEL
INPUT SWEPT
2.0
1.5
1.0
FREQ SEP = FREQUENCY
SEPARATION BETWEEN
CH A INPUT AND CH B INPUT
0.5
0
–45
–35
–25
–15
–5
INTERFERING CHANNEL
INPUT POWER (dBm)
5
5583 G24
5583fa
9
LTC5583
TYPICAL PERFORMANCE CHARACTERISTICS
VCC = 3.3V, EN = 3.3V, TA = 25°C, unless otherwise noted. For temperature compensation of logarithmic intercept at 3600MHz,
set RP1 = Open, RP2 = 0, RT1 = 10.2kΩ, RT2 = 1.65kΩ. See Figure 2.
Difference Output and Linearity
Error vs RF Input Power, 3600MHz
CW Inputs, Differential Drive
Output Voltage and Linearity Error
vs RF Input Power, 3600MHz CW
Inputs, Differential Drive
2.5
2.5
2.5
VOA, VOB (V)
0.5
0
–0.5
1.0
85°C, CH A
85°C, CH B
25°C, CH A
25°C, CH B
–40°C, CH A
–40°C, CH B
0.5
0
–65
–55
–45 –35 –25 –15
INPUT POWER (dBm)
–1.0
1.0
1.5
0.5
1.0
–0.5
0
–1.0
0.5
–1.5
SWEEP CH A INPUT
HOLD CH B
INPUT = –25dBm
–2.0
0
–65
–2.5
–5
5
–55
–1.5
85°C
25°C
–40°C
–45 –35 –25 –15
INPUT POWER (dBm)
–5
–2.0
–2.5
5
5583 G26
5583 G25
Modulation Deviation vs RF
Input Power, 3600MHz Inputs,
Differential Drive
Output Voltage and Linearity Error
vs RF Input Power, 3600MHz CW
Inputs, Differential Drive, 3 Devices
3
2.5
2.5
1.5
LINEARITY ERROR (dB)
1.5
LINEARITY ERROR (dB)
1.0
2.0
SWEEP CH B INPUT
HOLD CH A INPUT = –25dBm
2.0
1.5
VODF (V)
2.0
2.5
VOS = 1.2V, INV = 0V
2.0
2.0
0
–0.5
1.0
–1.0
0.5
0
–65
–1.5
85°C
25°C
–40°C
–55
–45 –35 –25 –15
INPUT POWER (dBm)
–5
LINEARITY ERROR (dB)
0.5
1.5
LINEARITY ERROR (dB)
1.0
VOA, VOB (V)
2
1.5
2.0
1
CW
0
WiMAX
–1
–2 DEVIATION MEASURED
FROM LINEAR REFERENCE
GENERATED WITH CW INPUT.
–3
–65 –55 –45 –35 –25 –15
INPUT POWER (dBm)
–2.0
–2.5
5
–5
5583 G28
5583 G27
3
0.09
2
0.06
1
0.03
0
0
–0.03
–1
–3
–65
–0.06
85°C
25°C
–40°C
–55
–45 –35 –25 –15
INPUT POWER (dBm)
–5
–0.09
5
5583 G29
INTERFERED CHANNEL OUTPUT DEVIATION (dB)
Input A to Output B Isolation,
Input B to Output A Isolation,
3600MHz CW Inputs, Differential Drive
VOA – VOB (V)
VOA – VOB (dB)
Channel Matching vs RF Input
Power, 3600MHz CW Inputs,
Differential Drive, 3 Devices
–2
5
2.5
2.0
A m B, FREQ SEP = 0Hz
B m A, FREQ SEP = 0Hz
A m B, FREQ SEP = 1MHz
B m A, FREQ SEP = 1MHz
A m B, FREQ SEP = 10MHz
B m A, FREQ SEP = 10MHz
A m B INDICATES:
CH A = INTERFERING CHANNEL
CH B = INTERFERED CHANNEL
B m A INDICATES:
CH B = INTERFERING CHANNEL
CH A = INTERFERED CHANNEL
1.5
1.0
INTERFERED CHANNEL
INPUT = –45dBm,
INTERFERING CHANNEL
INPUT SWEPT
NOTE 7
0.5
0
–45
FREQ SEP = FREQUENCY
SEPARATION BETWEEN
CH A INPUT AND CH B INPUT
–35
–25
–15
–5
INTERFERING CHANNEL
INPUT POWER (dBm)
5
5583 G30
5583fa
10
LTC5583
TYPICAL PERFORMANCE CHARACTERISTICS
VCC = 3.3V, EN = 3.3V, TA = 25°C, unless otherwise noted. For temperature compensation of logarithmic intercept at 5800MHz,
set RP1 = Open, RP2 = 0, RT1 = 10kΩ, RT2 = 1.47kΩ. See Figure 2.
Output Voltage and Linearity Error
vs RF Input Power, 5800MHz CW
Inputs, Differential Drive
Difference Output and Linearity
Error vs RF Input Power, 5800MHz
CW Inputs, Differential Drive
2.5
2.5
2.5
VOA, VOB (V)
0.5
0
–0.5
1.0
85°C, CH A
85°C, CH B
25°C, CH A
25°C, CH B
–40°C, CH A
–40°C, CH B
0.5
0
–55
–45
–1.0
1.0
1.5
0.5
1.0
–0.5
0
–1.0
0.5
–1.5
SWEEP CH A INPUT
HOLD CH B
INPUT = –20dBm
–2.0
0
–55
–2.5
5 10
–35 –25 –15
–5
INPUT POWER (dBm)
1.5
–45
LINEARITY ERROR (dB)
1.5
LINEARITY ERROR (dB)
1.0
2.0
SWEEP CH B INPUT
HOLD CH A INPUT = –20dBm
2.0
1.5
VODF (V)
2.0
2.5
VOS = 1.2V, INV = 0V
2.0
–1.5
85°C
25°C
–40°C
–2.0
–2.5
5 10
–35 –25 –15
–5
INPUT POWER (dBm)
5583 G32
5583 G31
Output Voltage and Linearity Error
vs RF Input Power, 5800MHz CW
Inputs, Differential Drive, 3 Devices
Modulation Deviation vs RF
Input Power, 5800MHz Inputs,
Differential Drive
2.5
2.5
3
2.0
2
LINEARITY ERROR (dB)
VOA, VOB (V)
1.0
0.5
1.5
0
–0.5
1.0
–1.0
0.5
0
–55
–1.5
85°C
25°C
–40°C
–45
–35 –25 –15
–5
INPUT POWER (dBm)
LINEARITY ERROR (dB)
1.5
2.0
1
CW
0
WiMAX
–1
–2 DEVIATION MEASURED
FROM LINEAR REFERENCE
GENERATED WITH CW INPUT.
–3
–55 –45 –35 –25 –15
–5
INPUT POWER (dBm)
–2.0
–2.5
5 10
5583 G33
5583 G34
3
0.09
2
0.06
1
0.03
0
0
–0.03
–1
–3
–55
85°C
25°C
–40°C
–45
–35 –25 –15
–5
INPUT POWER (dBm)
5 10
5583 G35
–0.06
–0.09
INTERFERED CHANNEL OUTPUT DEVIATION (dB)
Input A to Output B Isolation,
Input B to Output A Isolation,
5800MHz CW Inputs, Differential Drive
VOA – VOB (V)
VOA – VOB (dB)
Channel Matching vs RF Input
Power, 5800MHz CW Inputs,
Differential Drive, 3 Devices
–2
5 10
2.5
2.0
1.5
A m B, FREQ SEP = 0Hz
NOTE 7
B m A, FREQ SEP = 0Hz
A m B, FREQ SEP = 1MHz
B m A, FREQ SEP = 1MHz
A m B, FREQ SEP = 10MHz
B m A, FREQ SEP = 10MHz
A m B INDICATES:
CH A = INTERFERING CHANNEL
CH B = INTERFERED CHANNEL
B m A INDICATES:
CH B = INTERFERING CHANNEL
CH A = INTERFERED CHANNEL
INTERFERED CHANNEL
INPUT = –35dBm,
INTERFERING CHANNEL
INPUT SWEPT
1.0
0.5
0
–35 –30 –25 –20 –15 –10 –5 0
INTERFERING CHANNEL
INPUT POWER (dBm)
FREQ SEP = FREQUENCY
SEPARATION BETWEEN
CH A INPUT AND CH B INPUT
5
10
5583 G36
5583fa
11
LTC5583
TYPICAL PERFORMANCE CHARACTERISTICS
VCC = 3.3V, EN = 3.3V, TA = 25°C, unless otherwise noted. Test circuits shown in Figures 1 and 2.
Input A to Input B Isolation,
Differential Inputs
–40
–40
–50
–50
ISOLATION (dB)
ISOLATION (dB)
Input A to Input B Isolation,
Single-Ended Inputs
–60
–70
–60
–70
–80
–80
–90
–90
0
0.5
1
1.5
2
FREQUENCY (GHz)
2
3
2.5
2.5
3
3.5 4 4.5 5
FREQUENCY (GHz)
5583 G38
5583 G37
Output Response to RF Burst
Input, 100MHz CW Input,
CFLTRA = CFLTRB = 8.2nF
3.4
Output Response to RF Burst
Input, 100MHz CW Input,
CFLTRA = CFLTRB = 1μF
3.4
RF BURST ON
3.0
RF BURST ON
3.0
2.6
2.6
RF BURST OFF
INPUT = 0dBm
INPUT = –10dBm
INPUT = –20dBm
INPUT = –30dBm
INPUT = –40dBm
INPUT = –50dBm
1.8
1.4
1.4
1.0
0.6
0.6
0.2
1
2
3
4 5 6
TIME (μs)
7
8
0.2
10
9
INPUT = 0dBm
INPUT = –10dBm
INPUT = –20dBm
INPUT = –30dBm
INPUT = –40dBm
INPUT = –50dBm
1.8
1.0
0
RF BURST OFF
2.2
VOA (V)
2.2
VOA (V)
6
5.5
0
1
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9
TIME (ms)
5583 G39
5583 G40
Supply Current vs Supply Voltage
Envelope Detectors Disabled
Supply Current vs Supply Voltage
Envelope Detectors Enabled
110
100
85°C
105
85°C
100
90
ICC (mA)
ICC (mA)
95
25°C
80
70
–40°C
25°C
90
85
80
75
60
70
50
60
–40°C
65
3.1
3.2
3.3
VCC (V)
3.4
3.5
5583 G41
3.1
3.2
3.3
VCC (V)
3.4
3.5
5583 G42
5583fa
12
LTC5583
TYPICAL PERFORMANCE CHARACTERISTICS
VCC = 3.3V, EN = 3.3V, TA = 25°C, unless otherwise noted. Test circuits shown in Figures 1 and 2.
Envelope Detector Peak Output
Supply Current vs RF Input Power,
Voltage vs Crest Factor,
2140MHz CW Inputs to Both Channels
2140MHz Input
100
2.15
ENVELOPE DETECTORS ENABLED
2.05
ENVA PEAK VALUE (V)
ICC (mA)
90
AVERAGE INPUT POWER
–10dBm
–20dBm
–30dBm
–40dBm
2.10
80 ENVELOPE DETECTORS DISABLED
70
2.00
1.95
1.90
1.85
60
1.80
50
–70
–60
1.75
0 5
–50 –40 –30 –20 –10
INPUT POWER (dBm)
1
5583 G43
2.2
0.14
0.12
2.1
0.12
2.0
0.10
2.0
0.10
1.9
0.08
1.9
0.08
1.8
0.06
1.8
0.06
1.7
0.04
ENVA (V)
0.14
2.1
1.7
0.04
1.6
0.02
1.6
0.02
1.5
0
1.5
0
1.4
–0.02
1.4
–0.02
1.3
–0.04
1.3
–0.04
–0.06
1.2
–0.06
1
2
3
4
5
TIME (μs)
5583 G46
CREST FACTOR = 10,
OSCILLOSCOPE WAVEFORM ACQUIRED IN
AVERAGE MODE
2
3
4
5
TIME (μs)
5583 G45
CREST FACTOR = 6
OSCILLOSCOPE WAVEFORM ACQUIRED IN
AVERAGE MODE
0
Envelope Detector Output Over
Temperature, 2140MHz Input
Average Power = –30dBm
Envelope Detector Output Over
Temperature, 2140MHz Input
Average Power = –30dBm
0
1
2.25
2.20
2.20
2.15
2.15
2.10
2.10
ENVA (V)
2.25
2.05
2.00
INPUT SIGNAL (V)
2.2
1.2
ENVA (V)
3 4 5 6 7 8 9 10 11 12
PEAK TO AVERAGE POWER RATIO
5583 G44
(CREST FACTOR)
Envelope Detector Output and
Input Signal Envelope, 100MHz
Input Average Power = –30dBm
INPUT SIGNAL (V)
ENVA (V)
Envelope Detector Output and
Input Signal Envelope, 100MHz
Input Average Power = –30dBm
2
2.05
2.00
1.95
1.95
1.90
PEAK
85°C
25°C
–40°C
1.85
1.80
0
1
CREST FACTOR = 6
OSCILLOSCOPE
WAVEFORM
ACQUIRED IN
AVERAGE MODE
2
3
TIME (μs)
4
5
5583 G47
CREST FACTOR = 10
OSCILLOSCOPE
WAVEFORM
ACQUIRED IN
AVERAGE MODE
1.90
85°C
25°C
–40°C
1.85
PEAK
1.80
0
1
2
3
TIME (μs)
4
5
5583 G48
5583fa
13
LTC5583
PIN FUNCTIONS
DECA, DECB (Pins 1, 6): Input Common Mode Decoupling Pins for Channel A and Channel B. These pins are
internally biased to 1.6V. The input impedance is 1.75kΩ
in parallel with a 40pF internal shunt capacitor to ground.
The impedance between DECA and IN+A (or IN–A) is 200Ω.
The pin can be connected to the center tap of an external
balun or to a capacitor to ground.
VCCA, VCCB, VCCR (Pins 2, 5, 3): Power Supply Pins for
Channel A, Channel B, and Bias Circuits. Typical total current consumption of these pins is 81mA. Each of these
pins should be bypassed with 1nF and 1μF capacitors,
placed as close to the IC as possible.
EN (Pin 4): Enable Input Pin. An applied voltage above
2V will activate the bias for the IC. For an applied voltage
below 0.3V, the circuit will be shut down (disabled) with
a corresponding reduction in power supply current. If
the enable function is not required, then this pin can be
connected to VCC. The applied voltage to this pin should
not exceed VCC by more than 0.3V.
RP2 (Pin 9): Pin for Setting Polarity of Second Order Output
Temperature Compensation. Connect this pin to ground
to change the output voltage inversely proportional to
ambient temperature. Float this pin to change the output
voltage proportional to ambient temperature.
INV (Pin 12): Control Input Pin to Invert the Polarity of
the Difference Output VODF.
RT2 (Pin 14): Second Order Output Temperature Compensation Pin for Both Channels. Connect this pin to ground
to disable. The output voltage will increase or decrease
with the ambient temperature by connecting this pin to
ground via an off-chip resistor, depending on the polarity
set by RP2 pin.
VOS (Pin 15): Input Pin for Setting the DC Offset of the
Difference Output VODF. It is recommended to set this DC
offset such that VODF does not fall below 100mV.
VODF (Pin 16): DC Difference Output. This voltage is equal
to the difference of the two channels’ output voltages,
plus a DC offset:
RT1 (Pin 17): First Order Output Temperature Compensation Pin for Both Channels. Connect this pin to ground
to disable. The output voltage will increase or decrease
with the ambient temperature by connecting this pin to
ground via an off-chip resistor, depending on the polarity
set by RP1 pin.
VOA, VOB (Pins 18, 13): DC Output of Channel A and
Channel B, respectively.
VCCN (Pin 19): Power Supply Pin for the Envelope Detectors in Both Channels. Typical total current consumption
of this pin is 9.6mA. This pin should be bypassed with 1nF
and 1μF capacitors. Connect this pin to ground to disable
the envelope detectors.
ENVA, ENVB (Pins 20, 11): Envelope Detector Output Pins
for Channel A and Channel B, respectively. Each output
tracks the input signal’s RF envelope and outputs a DC
voltage directly proportional to the signal power, normalized to the average power.
FLTA, FLTB (Pins 21, 10): Connection for an External Filtering Capacitor for Channel A and Channel B, respectively. A
minimum 8nF capacitor is required for stable AC average
power measurement. Each capacitor should be connected
between FLTA and VCCA, and between FLTB and VCCB.
RP1 (Pin 22): Pin for Setting Polarity of First Order Output
Temperature Compensation. Connect this pin to ground
to change the output voltage proportional to ambient
temperature. Float this pin to change the output voltage
inversely proportional to ambient temperature.
IN+A, IN–A, IN+B, IN–B (Pins 24, 23, 7, 8): Differential
RF Input Signal Pins for Channel A and Channel B. Each
channel can be driven with a single-ended or differential
signal. These pins are internally biased to 1.6V and should
be DC-blocked externally. The differential impedance is
400Ω.
GND (Exposed Pad Pin 25): Circuit Ground Return for
the Entire IC. This must be soldered to the printed circuit
board ground plane.
VODF = (VOA – VOB) + VOS, if INV pin is held low, (2V)
5583fa
14
LTC5583
TEST CIRCUITS
R1
1Ω
VCC
3.3V
1μF
100pF
1nF
20pF
1nF
1nF
RF INPUT A
CFLTRA
100nF
VCC
1nF
75Ω
RP1
24
0.3pF
IN+A
20pF
1nF
1
2
3
VCC
1nF
4
5
VCC
1nF
6
22
21
RP1
FLTA
20
19
ENVA
VCCN
LTC5583
DECA
VOUTA
VCCA
RT1
VCCR
VODF
EXPOSED PAD
25
EN
VOS
VCCB
RT2
DECB
VOUTB
18
1nF
RT1
17
16
15
1nF
14
RT2
13
20pF
1nF
IN+B
7
1nF
RF INPUT B
23
IN–A
IN–B
8
75Ω
RP2
9
FLTB ENVB
10
11
INV
12
1nF
RP2
0.3pF
1nF
20pF
CFLTRB
100nF
100pF
5583 F01
COMP
VALUE
SIZE
PART NUMBER
C
20pF
0402
Murata GRM1555CIH200JB01
C
100pF
0402
Murata GRM1555CIH101JDO1B
C
1nF
0402
Murata GRM155R71H102KA01D
C
100nF
0402
Murata GRM155R61A104KA01
C
1μF
0402
Murata GRM155R60J105KE19
R
75Ω
0402
Vishay CRCW040275R0FKED
FREQUENCY
RP1
RP2
RT1
RT2
INPUT RETURN LOSS
450MHz
Open
0Ω
11.5kΩ
1.13kΩ
21dB
880MHz
Open
0Ω
11.5kΩ
1.13kΩ
14dB
2140MHz
Open
0Ω
9.76kΩ
1.10kΩ
14dB
2700MHz
Open
0Ω
8.87kΩ
1.21kΩ
14dB
Figure 1. Test Circuit Optimized for 40MHz to 3GHz Operation in Single-Ended Input Configuration
5583fa
15
LTC5583
TEST CIRCUITS
RF INPUT A
VCC
T1
1:1
L1
CFLTRA
100nF
1nF
1
3
C1
2
5
62Ω
24
TDK HHM17XX
1
20pF
1nF
2
3
VCC
1nF
20pF
1nF
1
2
5
6
23
IN–A
22
RP1
21
FLTA
20
ENVA
LTC5583
DECA
19
VCCN
VOUTA
VCCA
RT1
VCCR
VODF
EXPOSED PAD
25
EN
VOS
VCCB
RT2
DECB
VOUTB
IN+B
7
3
C2
4
5
VCC
T2
1:1
L2
3.3V
1μF
RP1
IN+A
RF INPUT B
VCC
1nF
4
1nF
R1
1Ω
100pF
IN–B
8
RP2
9
RP2
62Ω
4
FLTB ENVB
10
11
18
1nF
RT1
17
16
1nF
15
14
RT2
13
INV
12
1nF
CFLTRB
100nF
100pF
TDK HHM17XX
5583 F02
COMP
VALUE
SIZE
PART NUMBER
C
20pF
0402
Murata GRM1555CIH200JB01
C
100pF
0402
Murata GRM1555CIH101JD01B
C
1nF
0402
Murata GRM155R71H102KA01D
C
100nF
0402
Murata GRM155R61A104KA01
C
1μF
0402
Murata GRM155R60J105KE19
R
62Ω
0402
Vishay CRCW040262R0FKED
FREQUENCY
L1, L2
C1, C2
T1, T2
RP1
RP2
RT1
RT2
INPUT RETURN LOSS
2140MHz
2.7nH
1pF
Murata LDB212G1005C-001
Open
0
9.76kΩ
1.10kΩ
15dB
2700MHz
1.5nH
X
TDK_HHM1710J1
Open
0
8.87kΩ
1.21kΩ
15dB
3600MHz
1.2nH
0.3pF
TDK_HHM1727D1
Open
0
10.2kΩ
1.65kΩ
17dB
5800MHz
Short
0.3pF
TDK_HHM1733B1
Open
0
10.0kΩ
1.47kΩ
11dB
Figure 2. Test Circuit Optimized for 2GHz to 6GHz Operation in Differential Input Configuration
5583fa
16
LTC5583
TEST CIRCUITS
Figure 3. Top Side of Evaluation Board for Single-Ended Input Configuration
5583fa
17
LTC5583
APPLICATIONS INFORMATION
The LTC5583 is a dual-channel true RMS power detector,
capable of measuring two RF signals over the frequency
range from 40MHz to 6GHz, independent of input waveforms with different crest factors such as CW, CDMA2K,
WCDMA, LTE and WiMAX signals. Up to 60dB dynamic
range is achieved with very stable output over the full
temperature range from –40°C to 85°C. Input sensitivity
can be as low as –56dBm up to 2.7GHz even with singleended 50Ω input termination.
Table 1. Single-Ended Input Impedance
S11
FREQUENCY
(MHz)
INPUT
IMPEDANCE (Ω)
MAG
ANGLE (°)
40
207.4 – j15.5
0.613
–2.2
100
193.0 – j34.0
0.599
–5.4
200
188.9 – j56.8
0.611
–8.9
400
151.6 – j68.7
0.576
–15.2
600
127.8 – j62.8
0.530
–19.5
800
107.6 – j66.0
0.513
–26.2
1000
96.1 – j61.5
0.485
–30.3
1200
85.6 – j59.2
0.467
–35.4
The differential RF inputs are internally biased at 1.6V.
The differential impedance is about 400Ω. These pins
should be DC blocked when connected to ground or other
matching components.
1400
76.2 – j57.4
0.455
–41.0
1600
67.7 – j55.0
0.445
–47.1
1800
60.4 – j52.0
0.435
–53.5
2000
54.9 – j48.7
0.423
–59.4
The LTC5583 can be driven in a single-ended configuration.
The single-ended input impedance vs frequency is given
in Table 1. Figure 4 shows the simplified circuit of this
single-ended configuration for each channel. The DECA
pin can be either left floating or AC-coupled to ground
via an external capacitor. While the RF signal is applied
to the IN+A (or IN–A) pin, the other pin, IN–A (or IN+A),
should be AC-coupled to ground. By simply terminating
the signal side of the inputs with a 75Ω resistor in front
of the AC-blocking capacitor and coupling the other side
to ground using a 1nF capacitor, a broadband 50Ω input
match can be achieved with typical input return loss better
than 14dB from 40MHz to 2.7GHz. At higher RF frequencies, additional matching components may be needed.
Contact LTC Applications for more information.
2200
50.3 – j45.6
0.414
–65.2
2400
46.5 – j42.7
0.406
–70.8
2600
43.7 – j39.8
0.396
–76.0
2800
41.6 – j37.0
0.384
–80.8
3000
40.2 – j34.5
0.371
–84.9
3200
39.3 – j32.0
0.356
–88.8
3400
37.8 – j30.1
0.350
–93.1
3600
35.6 – j26.4
0.336
–101.5
3800
35.0 – j23.3
0.314
–107.4
4000
34.4 – j19.8
0.291
–115.0
4200
33.6 – j16.7
0.275
–123.2
4400
32.9 – j14.2
0.264
–130.6
4600
31.7 – j11.1
0.260
–141.0
4800
30.5 – j8.0
0.261
–152.0
5000
29.3 – j5.1
0.268
–162.5
5200
28.0 – j2.1
0.283
–173.0
5400
26.7 + j0.5
0.304
178.4
5600
25.4 + j2.7
0.328
171.7
5800
24.2 + j4.8
0.353
165.8
6000
23.1 + j6.6
0.377
161.1
RF Inputs
5583fa
18
LTC5583
APPLICATIONS INFORMATION
LTC5583
1nF
RF INPUT
IN+A
24
R1
75Ω
0.3pF
200Ω
1
1nF
DECA
40pF
20pF
200Ω
23
1nF
IN–A
20pF
5583 F04
Figure 4. Single-Ended Input Configuration
LTC5583
RF INPUT
J1
T1
1:1
TDK HHM17xx
L1
1
IN+A
24
3
200Ω
C5
2
5
1
R1
62Ω
DECA
40pF
200Ω
4
23
IN–A
C4
1nF
C6
20pF
5583 F05
Figure 5. Differential Input Configuration
MATCHING NETWORK
CS1
RF
INPUT
TO IN+
CS1
LM
TO IN–
5583 F06
Figure 6. Single-Ended to Differential Conversion
5583fa
19
LTC5583
APPLICATIONS INFORMATION
The LTC5583 differential inputs can also be driven from a
fully balanced source as shown in Figure 5. When the two
input sources are single-ended, conversion to differential
signals can improve channel-to-channel isolation to obtain
accurate outputs from the dual channels, particularly at
very high frequencies (i.e. 3.6GHz and above). This can
be achieved using a 1:1 balun to match the chip’s internal
400Ω input impedance to the 50Ω source by adding a
62Ω resistor (R1) at the differential inputs as shown in
Figure 5. Since there is no voltage conversion gain from
impedance transformation in this case, the sensitivity of
the detector is similar to the one using single-ended inputs
as shown in Figure 4.
dynamic range can also be shifted to tailor to a particular
application. By simply inserting an attenuator in front of
the RF input, the power range is shifted higher by the
amount of the attenuation.
If better sensitivity is needed, a 1:4 balun can be used
and R1 should be increased to 400Ω correspondingly to
match 200Ω input impedance to the 50Ω source. This
impedance transformation results in 6dB voltage gain,
thus 6dB improvement in sensitivity is obtained while
the overall dynamic range remains the same. At high
frequency, additional LC elements may be needed for
input impedance matching due to the parasitics of the
transformer and PCB traces.
These pins are internally biased at VCC – 0.43V via a 1.2k
resistor from the VCCA and VCCB voltage supply. To ensure
stable operation of the LTC5583, an external capacitor
with a value of 8nF or higher is required to connect the
FLTA pin to VCCA, and the FLTB pin to VCCB, respectively.
Do not connect these filter capacitors to ground or any
other low voltage reference to prevent an abnormal startup condition.
Alternatively, a narrowband LC matching network can
be used for the conversion of a single-ended signal to a
balanced signal. Such a matching network is shown in
Figure 6. By this means, the sensitivity and overall linear
dynamic range of the detector can be similar to the one
using a 1:4 RF input balun, as described above.
For a 50Ω input termination, the approximate RF input
power range of the LTC5583 is from –58dBm to 4dBm,
even with high crest factor signals such as a 4-carrier WCDMA waveform, but the minimum detectable RF power
level varies as the input RF frequency increases. The linear
The sensitivity of LTC5583 is dictated by the broadband
input noise power, which also determines the output DC
offset voltage. When the inputs are terminated differently,
the DC output voltage may vary slightly. When the input
noise power is minimized, the DC offset voltage is also
reduced to a minimum, and the sensitivity and dynamic
range are improved accordingly.
External Filtering Capacitors at FLTA and FLTB Pins
The value of these two filtering capacitors has a dominant
effect on the output transient response. The lower the
capacitance, the faster the output rise and fall times. For
signals with AM content such as W-CDMA, ripple can be
observed when the loop bandwidth set by the filtering
capacitors is close to the modulation bandwidth of the
signal.
In general, the LTC5583 output ripple remains relatively
constant regardless of the RF input power level for a fixed
filtering capacitor and modulation format of the RF signal.
Typically, this capacitor must be selected to average out
the ripple to achieve the desired accuracy of RF power
measurement.
5583fa
20
LTC5583
APPLICATIONS INFORMATION
RMS Power Detector Output: VOA, VOB
The output buffer amplifier of the LTC5583 is shown in
Figure 7. This Class-AB buffer amplifier can output ±5mA
current to the load. The output impedance is determined
primarily by the 50Ω series resistor connected to the buffer
amplifier inside the chip. This will prevent any overstress
on the internal devices in the event that the output is
shorted to ground.
The –3dB small-signal bandwidth of the buffer amplifier
is about 22.4MHz and the full-scale rise/fall time can be
as fast as 140ns, limited by the slew rate of the internal
circuit instead. When the output is resistively terminated
or open, the fastest output transient response is achieved
when a large signal is applied to the RF input. The rise time
of the LTC5583 is about 140ns and the fall time is 3.5μs,
respectively, for full-scale pulsed RF input power with
8.2nF filtering capacitors. The speed of the output transient
response is dictated mainly by the filtering capacitors (at
least 8nF) at the FLTA and FLTB pins. See the detailed output
transient response in the Typical Performance Characteristics section. When the RF input has AM content, residual
ripple may be present at the output depending upon the
low frequency content of the modulated RF signal. This
ripple can be reduced with a larger filtering capacitor at
the expense of a slower transient response.
Since the output buffer amplifier of the LTC5583 is capable
of driving an arbitrary capacitive load, the residual ripple
can be further filtered at the output with a series resistor
RSS and a large shunt capacitor CLOAD (see Figure 7). This
lowpass filter also reduces the output noise by limiting the
output noise bandwidth. When this RC network is designed
properly, a fast output transient response can be maintained
with reduced residual ripple. For example, we can estimate
CLOAD with an output voltage swing of 1.7V at 2140MHz.
In order to not allow the maximum 5mA sourcing current
to limit the fall time (about 5μs), the maximum value of
CLOAD can be chosen as follows:
CLOAD ≤ 5mA • Allowable Additional Time/1.7V
= 5mA • 0.25μs/1.7V = 735pF
Once CLOAD is determined, RSS can be chosen properly
to form an RC low-pass filter with a corner frequency of
1/[2π • (RSS + 50) • CLOAD].
In general, the rise time of the LTC5583 is much shorter
than the fall time. However, when the output RC filter is
used, the rise time may be dominated by the time constant
of this filter. Accordingly, the rise time becomes very similar
to the fall time. Although the maximum sinking capability
of the LTC5583 is 5mA, it is recommended that the output
load resistance should be greater than 1.2k in order to
achieve the full output voltage swing.
LTC5583
VCC
50Ω
INPUT
VOA
OR
VOB
RSS
VOUT
CLOAD
5583 F07
Figure 7. Simplified Circuit Schematic of the RMS
Power Detector Output Interface
5583fa
21
LTC5583
APPLICATIONS INFORMATION
Temperature Compensation of Logarithmic Intercept
The simplified interface schematics of the intercept temperature compensation are shown in Figure 8 and Figure 9.
The adjustment of the output voltage can be described
by the following equation with respect to the ambient
temperature:
where TC1 and TC2 are the first order and second order
temperature compensation coefficients, respectively; TA is
the actual ambient temperature; and tNOM is the reference
room temperature 25°C; detV1 and detV2 are the output
voltage variation when RT1 and RT2 are not set to zero.
ΔVOUT = TC1 • (TA – tNOM) + TC2 • (TA – tNOM)2
+ detV1 + detV2
LTC5583
VCC
RP1 OR RP2
OPEN OR
SHORT
22.2k
5583 F08
Figure 8. Simplified Interface Circuit Schematic
of the Polarity Pins RP1 and RP2
LTC5583
VCC
250k
RT1 OR
RT2
5583 F09
Figure 9. Simplified Interface Circuit Schematic of
the Control Pins RT1 and RT2
5583fa
22
LTC5583
APPLICATIONS INFORMATION
The temperature coefficients TC1 and TC2 are shown as
functions of the tuning resistors RT1 and RT2 in Figure 10
and Figure 11.
1.6
40
TC1
1.2
30
20
RP1 = 0
0.4
10
detV1
0
0
–0.4
detV1
RP1 = 0PEN
–10
–0.8
–20
–1.2
–1.6
detV1 (mV)
TC1 (mV/°C)
0.8
–30
TC1
5
10
15
20
25
RT1 (kΩ)
–40
35
30
5583 F10
Figure 10. First Order Temperature Compensation
Coefficient TC1 vs External RT1 Value
16
TC2
12
RP2 = OPEN
RP2
RT2 (kΩ)
450
Open
11.5
0
1.13
880
Open
11.5
0
1.13
2140
Open
9.76
0
1.10
Open
8.87
0
1.21
3600
Open
10.2
0
1.65
150
5800
Open
10.0
0
1.47
–50
–8
–100
–12
–16
RT1 (kΩ)
2700
0
detV2
RP2 = 0
RP1
200
50
0
–4
Frequency (MHz)
100
detV2
4
Table 2. Suggested RP and RT Values for Optimal Temperature
Performance vs RF Frequency
detV2 (mV)
TC2 (μV/°C2)
8
When pins RT1 and RT2 are shorted to ground, the temperature compensation circuit is disabled automatically.
Polarity of the temperature coefficient TC1 (or TC2), can
be selected by either shorting the RP1 pin (or RP2 pin)
to ground or leaving it open, while the coefficients’ values
can be controlled by external resistors RT1 and RT2 independently, according to Figures 10 and 11. At a given RF
frequency, the polarities and optimal values of TC1 and TC2
can be chosen to ensure a stable output over the operating
temperature range. Table 2 lists the suggested RP1, RP2,
RT1 and RT2 values at various RF frequencies for the best
output performance over temperature.
–150
TC2
0
1
2
3
4 5 6
RT2 (kΩ)
7
8
9
–200
10
5583 F11
Figure 11. Second Order Temperature Compensation
Coefficient TC2 vs External RT2 Value
5583fa
23
LTC5583
APPLICATIONS INFORMATION
Envelope Detector Output: ENVA, ENVB
Enable: EN
Each envelope detector output linearly follows the instantaneous input power level, tracking the input signal’s RF
envelope. ENVA and ENVB also indicate the peak-to-average power ratio (crest factor). Thus, reading both VOA
and ENVA provides the average power, peak-to-average
power ratio, peak power, and RF envelope of the input
signal to Channel A. Reading VOB and ENVB provides the
same information for Channel B.
A simplified schematic of the EN pin interface is shown
in Figure 13. The enable voltage necessary to turn on the
LTC5583 is 2V. To disable or turn off the chip, set this voltage below 0.3V. It is important that the voltage applied to
the EN pin should never exceed VCC by more than 0.3V.
Otherwise, the supply current may be sourced through
the upper ESD protection diode connected at the EN pin.
Under no circumstances should voltage be applied to the
EN pin before the supply pins (VCCA , VCCB, VCCR, VCCN).
If this occurs, damage to the IC may result.
LTC5583
VCC
ENVA OR
ENVB
5583 F12
Figure 12. Simplified Schematic of the ENVA and ENVB Pin
LTC5583
VCC
EN
49k
49k
5583 F13
Figure 13. Simplified Schematic of the Enable Pin
5583fa
24
LTC5583
APPLICATIONS INFORMATION
Difference Output: VODF
This voltage is equal to the difference of the two channels’
output voltages, plus a DC offset:
VODF = (VOA – VOB) + VOS
if INV voltage < 1V.
A simplified schematic of the VOS pin interface is shown
in Figure 16. The output range of VODF is from 50mV to
VCC – 50mV; it cannot go below 50mV. If VOA – VOB is
negative (for INV = low), a positive offset voltage VOS is
needed. Similarly, if VOB – VOA is negative (for INV = high),
a positive offset voltage VOS is needed.
VODF = (VOB – VOA) + VOS
if INV voltage > 2V.
LTC5583
VCC
A simplified schematic of the VODF interface is shown in
Figure 14. The low 5Ω output impedance at this pin is due
to internal feedback circuitry.
VOS
30k
*
LTC5583
* VOA IF INV = LOW
VOB IF INV = HIGH
15k
VCC
–
5583 F16
VODF
+
Figure 16. Simplified Schematic of the VOS Pin
Supply Voltage Ramping
5583 F14
Figure 14. Simplified Schematic of the VODF Pin
Figure 15 shows a simplified schematic of the INV pin
interface. INV determines the sign of the difference function at the VODF output.
LTC5583
VCC
INV
Fast ramping of the supply voltage can cause a current
glitch in the internal ESD protection circuits. Depending
on the supply inductance, this could result in a supply
voltage overshoot at initial turn-on that exceeds the maximum rating. A supply voltage ramp time of greater than
1ms is recommended. In case this voltage ramp time is
not controllable, a small (i.e. 1Ω) series resistor can be
inserted between VCC pin and the supply voltage source
to mitigate the problem and protect the IC. The R1 shown
in Figures 1 and 2 serves this purpose.
10k
5583 F15
Figure 15. Simplified Schematic of the INV Pin
5583fa
25
LTC5583
PACKAGE DESCRIPTION
UF Package
24-Lead Plastic QFN (4mm × 4mm)
(Reference LTC DWG # 05-08-1697)
0.70 ±0.05
4.50 ± 0.05
2.45 ± 0.05
3.10 ± 0.05 (4 SIDES)
PACKAGE OUTLINE
0.25 ±0.05
0.50 BSC
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
4.00 ± 0.10
(4 SIDES)
BOTTOM VIEW—EXPOSED PAD
R = 0.115
TYP
0.75 ± 0.05
PIN 1 NOTCH
R = 0.20 TYP OR
0.35 × 45° CHAMFER
23 24
PIN 1
TOP MARK
(NOTE 6)
0.40 ± 0.10
1
2
2.45 ± 0.10
(4-SIDES)
(UF24) QFN 0105
0.200 REF
0.00 – 0.05
0.25 ± 0.05
0.50 BSC
NOTE:
1. DRAWING PROPOSED TO BE MADE A JEDEC PACKAGE OUTLINE MO-220 VARIATION (WGGD-X)—TO BE APPROVED
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE, IF PRESENT
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON THE TOP AND BOTTOM OF PACKAGE
5583fa
26
LTC5583
REVISION HISTORY
REV
DATE
DESCRIPTION
PAGE NUMBER
A
12/10
Revised the maximum Shutdown Current value in the Electrical Characteristics section.
5
5583fa
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
27
LTC5583
TYPICAL APPLICATION
VSWR Monitor
Tx PA
DIRECTIONAL
COUPLER
ANTENNA
OUTA
LTC5583
INA
INB
RMS
DETECT
ENVELOPE
DETECT
RMS
DETECT
ENVELOPE
DETECT
VSWR
DIFFERENCE
AMPLIFIER
OUTB
5583 TA01
RELATED PARTS
PART NUMBER DESCRIPTION
COMMENTS
Infrastructure
LT5527
400MHz to 3.7GHz, 5V Downconverting Mixer
2.3dB Gain, 23.5dBm IIP3 and 12.5dB NF at 1900MHz, 5V/78mA Supply
LT5557
400MHz to 3.8GHz, 3.3V Downconverting Mixer
2.9dB Gain, 24.7dBm IIP3 and 11.7dB NF at 1950MHz, 3.3V/82mA Supply
LTC6400-X
300MHz Low Distortion IF Amp/ADC Driver
Fixed Gain of 8dB, 14dB, 20dB and 26dB; >36dBm OIP3 at 300MHz, Differential I/O
LTC6401-X
140MHz Low Distortion IF Amp/ADC Driver
Fixed Gain of 8dB, 14dB, 20dB and 26dB; >40dBm OIP3 at 140MHz, Differential I/O
LTC6416
2GHz 16-Bit ADC Buffer
40.25dBm OIP3 to 300MHz, Programmable Fast Recovery Output Clamping
LTC6412
31dB Linear Analog VGA
35dBm OIP3 at 240MHz, Continuous Gain Range –14dB to 17dB
LT5554
Ultralow Distort IF Digital VGA
48dBm OIP3 at 200MHz, 2dB to 18dB Gain Range, 0.125dB Gain Steps
LT5575
700MHz to 2.7GHz Direct Conversion I/Q
Demodulator
Integrated Baluns, 28dBm IIP3, 13dBm P1dB, 0.03dB I/Q Amplitude Match,
0.4° Phase Match
LT5578
400MHz to 2.7GHz Upconverting Mixer
27dBm OIP3 at 900MHz, 24.2dBm at 1.95GHz, Integrated RF Transformer
LT5579
1.5GHz to 3.8GHz Upconverting Mixer
27.3dBm OIP3 at 2.14GHz, NF = 9.9dB, 3.3V Supply, Single-Ended LO and RF Ports
LTC5598
5MHz to 1.6GHz I/Q Modulator
27.7dBm OIP3 at 140MHz, 22.9dBm at 900MHz, –161.2dBm/Hz Noise Floor
LTC5588-1
200MHz to 6GHz I/Q Modulator with
Ultra-High OIP3
31dBm Uncalibrated OIP3, Single-Pin Calibration to Optimize OIP3 to 35dBm,
–158dBm/Hz Noise Floor, 3.3V Supply
RF Power Detectors
LT5534
50MHz to 3GHz Log RF Power Detector with
60dB Dynamic Range
±1dB Output Variation over Temperature, 38ns Response Time, Log Linear
Response
LT5537
Wide Dynamic Range Log RF/IF Detector
Low Frequency to 1GHz, 83dB Log Linear Dynamic Range
LT5581
6GHz Low Power RMS Detector
40dB Dynamic Range, ±1dB Accuracy Over Temperature, 1.5mA Supply Current
LTC5582
10GHz RMS Power Detector
57dB Dynamic Range, ±1dB Accuracy Over Temperature
LTC2208
16-Bit, 130Msps ADC
78dBFS Noise Floor, >83dB SFDR at 250MHz
LTC2262-14
14-Bit, 150Msps ADC Ultralow Power
72.8dB SNR, 88dB SFDR, 149mW Power Consumption
LTC2242-12
12-Bit, 250Msps ADC
65.4dB SNR, 78dB SFDR, 740mW Power Consumption
ADCs
5583fa
28 Linear Technology Corporation
LT 1210 REV A • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507
●
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