LTC6246HS6#TRMPBF

LTC6246/LTC6247/LTC6248 180MHz, 1mA Power Efficient Rail-to-Rail I/O Op Amps DESCRIPTION FEATURES n n n n n n n n n n n n n n n n n n n Gain Bandwidth Product: 180MHz –3dB Frequency (AV = 1): 120MHz Low Quiescent Current: 1mA Max High Slew Rate: 90V/µs Input Common Mode Range Includes Both Rails Output Swings Rail-to-Rail Low Broadband Voltage Noise: 4.2nV/√Hz Power-Down Mode: 42μA Fast Output Recovery Supply Voltage Range: 2.5V to 5.25V Input Offset Voltage: 0.5mV Max Input Bias Current: 100nA Large Output Current: 50mA CMRR: 110dB Open Loop Gain: 45V/mV Operating Temperature Range: –40°C to 125°C Single in 6-Lead TSOT-23 Dual in MS8, 2mm × 2mm DFN,TS0T-23, MS10 Quad in MS16 APPLICATIONS n n n n n n n Low Voltage, High Frequency Signal Processing Driving A/D Converters Rail-to-Rail Buffer Amplifiers Active Filters Video Amplifiers Fast Current Sensing Amplifiers Battery Powered Equipment The LTC®6246/LTC6247/LTC6248 are single/dual/quad low power, high speed unity gain stable rail-to-rail input/output operational amplifiers. On only 1mA of supply current they feature an impressive 180MHz gain-bandwidth product, 90V/µs slew rate and a low 4.2nV/√Hz of input-referred noise. The combination of high bandwidth, high slew rate, low power consumption and low broadband noise makes these amplifiers unique among rail-to-rail input/output op amps with similar supply currents. They are ideal for lower supply voltage high speed signal conditioning systems. The LTC6246 family maintains high efficiency performance from supply voltage levels of 2.5V to 5.25V and is fully specified at supplies of 2.7V and 5.0V. For applications that require power-down, the LTC6246 and the LTC6247 in MS10 offer a shutdown pin which disables the amplifier and reduces current consumption to 42µA. The LTC6246 family can be used as a plug-in replacement for many commercially available op amps to reduce power or to improve input/output range and performance. All registered trademarks and trademarks are the property of their respective owners. TYPICAL APPLICATION 350kHz FFT Driving ADC 0 Low Noise Low Distortion Gain = 2 ADC Driver –20 3.3V 2.5V VIN VDD VREF + AIN LTC6246 – 499Ω 1% 499Ω 1% 10pF LTC2366 GND –30 MAGNITUDE (dB) 3.3V fIN = 350.195kHz fSAMP = 2.2Msps SFDR = 82dB SNR = 70dB 1024 POINT FFT –10 CS SDO SCK OVDD –40 –50 –60 –70 –80 624678 TA01a –90 –100 –110 0 200 400 600 800 FREQUENCY (kHz) 1000 624678 TA01b Rev C Document Feedback For more information www.analog.com 1 LTC6246/LTC6247/LTC6248 ABSOLUTE MAXIMUM RATINGS (Note 1) Total Supply Voltage (V+ to V –).................................5.5V Input Current (+IN, –IN, SHDN) (Note 2)............... ±10mA Output Current (Note 3)...................................... ±100mA Operating Temperature Range (Note 4).. –40°C to 125°C Specified Temperature Range (Note 5)... –40°C to 125°C Storage Temperature Range................... –65°C to 150°C Junction Temperature............................................ 150°C Lead Temperature (Soldering, 10 sec) (MSOP, TSOT Packages Only)................................ 300°C PIN CONFIGURATION TOP VIEW V– 4 + – +IN A 3 9 8 V+ 7 OUT B 6 –IN B 5 +IN B TOP VIEW TOP VIEW OUT A –IN A +IN A V– KC PACKAGE 8-LEAD PLASTIC UTDFN (2mm × 2mm × 0.6mm) TJMAX = 125°C, θJA = 102°C/W (NOTE 9) EXPOSED PAD (PIN 9) IS V–, MUST BE SOLDERED TO PCB 1 2 3 4 – + + – –IN A 2 – + OUT A –IN A +IN A V– SHDNA 8 V+ 7 OUT B 6 –IN B 5 +IN B 1 2 3 4 5 – + + – OUT A 1 10 9 8 7 6 V+ OUT B –IN B +IN B SHDNB MS8 PACKAGE 8-LEAD PLASTIC MSOP MS PACKAGE 10-LEAD PLASTIC MSOP TJMAX = 150°C, θJA = 163°C/W (NOTE 9) TJMAX = 150°C, θJA = 160°C/W (NOTE 9) OBSOLETE PACKAGE TOP VIEW 1 2 3 4 5 6 7 8 – + + – OUT A –IN A +IN A V+ +IN B –IN B OUT B + – + – 16 15 14 13 12 11 10 9 TOP VIEW OUT D –IN D +IN D V– +IN C –IN C OUT C 6 V+ OUT 1 V– 2 +IN 3 5 SHDN + – 4 –IN S6 PACKAGE 6-LEAD PLASTIC TSOT-23 MS PACKAGE 16-LEAD PLASTIC MSOP TJMAX = 150°C, θJA = 192°C/W (NOTE 9) TJMAX = 150°C, θJA = 125°C/W (NOTE 9) TOP VIEW 7 OUT B + 9 + – V– 4 OUT A 1 –IN A 2 +IN A 3 V– 4 6 –IN B 5 +IN B – + + – –IN A 2 – +IN A 3 TOP VIEW 8 V+ OUT A 1 8 V+ 7 OUT B 6 –IN B 5 +IN B TS8 PACKAGE 8-LEAD PLASTIC TSOT-23 DC PACKAGE 8-LEAD (2mm × 2mm × 0.8mm) PLASTIC DFN TJMAX = 125°C, θJA = 102°C/W (NOTE 9) EXPOSED PAD (PIN 9) IS V–, MUST BE SOLDERED TO PCB TJMAX = 150°C, θJA = 195°C/W (NOTE 9) Rev C 2 For more information www.analog.com LTC6246/LTC6247/LTC6248 ORDER INFORMATION http://www.linear.com/product/LTC6246#orderinfo LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION SPECIFIED TEMPERATURE RANGE LTC6246CS6#TRMPBF LTC6246CS6#TRPBF LTDWF 6-Lead Plastic TSOT-23 0°C to 70°C LTC6246IS6#TRMPBF LTC6246IS6#TRPBF LTDWF 6-Lead Plastic TSOT-23 –40°C to 85°C LTC6246HS6#TRMPBF LTC6246HS6#TRPBF LTDWF 6-Lead Plastic TSOT-23 –40°C to 125°C OBSOLETE LTC6247CKC#TRMPBF LTC6247CKC#TRPBF DWJT 8-Lead (2mm × 2mm × 0.6mm) UTDFN 0°C to 70°C LTC6247IKC#TRMPBF LTC6247IKC#TRPBF DWJT 8-Lead (2mm × 2mm × 0.6mm) UTDFN –40°C to 85°C LTC6247CMS8#PBF LTC6247CMS8#TRPBF LTDWH 8-Lead Plastic MSOP 0°C to 70°C LTC6247IMS8#PBF LTC6247IMS8#TRPBF LTDWH 8-Lead Plastic MSOP –40°C to 85°C LTC6247CTS8#TRMPBF LTC6247CTS8#TRPBF LTDWK 8-Lead Plastic TSOT-23 0°C to 70°C LTC6247ITS8#TRMPBF LTC6247ITS8#TRPBF LTDWK 8-Lead Plastic TSOT-23 –40°C to 85°C LTC6247HTS8#TRMPBF LTC6247HTS8#TRPBF LTDWK 8-Lead Plastic TSOT-23 –40°C to 125°C LTC6247CMS#PBF LTC6247CMS#TRPBF LTDWM 10-Lead Plastic MSOP 0°C to 70°C LTC6247IMS#PBF LTC6247IMS#TRPBF LTDWM 10-Lead Plastic MSOP –40°C to 85°C LTC6247CDC#TRMPBF LTC6247CDC#TRPBF LGVN 8-Lead (2mm × 2mm × 0.8mm) DFN 0°C to 70°C LTC6247IDC#TRMPBF LTC6247IDC#TRPBF LGVN 8-Lead (2mm × 2mm × 0.8mm) DFN –40°C to 85°C LTC6248CMS#PBF LTC6248CMS#TRPBF 6248 16-Lead Plastic MSOP 0°C to 70°C LTC6248IMS#PBF LTC6248IMS#TRPBF 6248 16-Lead Plastic MSOP –40°C to 85°C LTC6248HMS#PBF LTC6248HMS#TRPBF 6248 16-Lead Plastic MSOP –40°C to 125°C TRM = 500 pieces. *Temperature grades are identified by a label on the shipping container. Consult ADI Marketing for parts specified with wider operating temperature ranges. Consult ADI Marketing for information on lead based finish parts. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ ELECTRICAL CHARACTERISTICS (VS = 5V) The l denotes the specifications which apply across the specified temperature range, otherwise specifications are at TA = 25°C. For each amplifier VS = 5V, 0V; VSHDN = 2V; VCM = VOUT = 2.5V, unless otherwise noted. SYMBOL PARAMETER CONDITIONS VOS Input Offset Voltage VCM = Half Supply MIN TYP MAX UNITS –500 –1000 50 l 500 1000 µV µV –2.5 –3 0.1 l 2.5 3 mV mV –600 –1000 50 l 600 1000 µV µV –3.5 –4 0.1 l 3.5 4 mV mV VCM = V+ – 0.5V, NPN Mode ∆VOS Input Offset Voltage Match (Channel-to-Channel) (Note 8) VCM = Half Supply VCM = V+ – 0.5V, NPN Mode VOS TC Input Offset Voltage Drift IB Input Bias Current (Note 7) –2 l VCM = Half Supply µV/°C –350 –550 –30 l 350 550 nA nA 100 0 400 l 1000 1500 nA nA VCM = V+ – 0.5V, NPN Mode Rev C For more information www.analog.com 3 LTC6246/LTC6247/LTC6248 ELECTRICAL CHARACTERISTICS (VS = 5V) The l denotes the specifications which apply across the specified temperature range, otherwise specifications are at TA = 25°C. For each amplifier VS = 5V, 0V; VSHDN = 2V; VCM = VOUT = 2.5V, unless otherwise noted. SYMBOL PARAMETER CONDITIONS IOS Input Offset Current VCM = Half Supply MIN TYP MAX UNITS –250 –400 –10 l 250 400 nA nA –250 –400 –10 l 250 400 nA nA VCM = V+ – 0.5V, NPN Mode en Input Noise Voltage Density f = 100kHz 4.2 nV/√Hz Input 1/f Noise Voltage f = 0.1Hz to 10Hz 1.6 µVP-P in Input Noise Current Density f = 100kHz 2.0 pA/√Hz CIN Input Capacitance Differential Mode Common Mode 2 0.8 pF pF RIN Input Resistance Differential Mode Common Mode 32 14 kΩ MΩ AVOL Large Signal Voltage Gain RL = 1k to Half Supply (Note 10) 30 14 45 l V/mV V/mV 5 2.5 15 l V/mV V/mV 78 76 110 l dB dB l 0 l 69 65 l 2.5 RL = 100Ω to Half Supply (Note 10) CMRR Common Mode Rejection Ratio ICMR Input Common Mode Range PSRR Power Supply Rejection Ratio VCM = 0V to 3.5V VS = 2.5V to 5.25V VCM = 1V Supply Voltage Range (Note 6) VOL Output Swing Low (VOUT – V–) No Load VS 73 5.25 mV mV 70 110 160 mV mV 160 250 450 mV mV 70 100 150 mV mV 130 175 225 mV mV 300 500 750 mV mV –80 –35 –30 mA mA l VOH Output Swing High (V+ – VOUT) No Load l ISOURCE = 5mA l ISOURCE = 25mA l ISC Output Short-Circuit Current Sourcing l Sinking l IS Supply Current per Amplifier 60 40 VCM = Half Supply 100 1 1.4 mA mA 1.25 1.4 1.8 mA mA 42 75 200 µA µA –1.6 0 0 µA µA l ISD Disable Supply Current per Amplifier VSHDN = 0.8V l ISHDNL SHDN Pin Current Low VSHDN = 0.8V l –3 –4 mA mA 0.95 l VCM = V+ – 0.5V V 40 55 l ISINK = 25mA dB dB 25 l ISINK = 5mA V Rev C 4 For more information www.analog.com LTC6246/LTC6247/LTC6248 ELECTRICAL CHARACTERISTICS (VS = 5V) The l denotes the specifications which apply across the specified temperature range, otherwise specifications are at TA = 25°C. For each amplifier VS = 5V, 0V; VSHDN = 2V; VCM = VOUT = 2.5V, unless otherwise noted. SYMBOL PARAMETER CONDITIONS ISHDNH SHDN Pin Current High VSHDN = 2V l VL SHDN Pin Input Voltage Low l VH SHDN Pin Input Voltage High l IOSD Output Leakage Current Magnitude in Shutdown VSHDN = 0.8V, Output Shorted to Either Supply tON Turn-On Time tOFF Turn-Off Time MIN TYP MAX UNITS –300 –350 35 300 350 nA nA 0.8 V 2 V 100 nA VSHDN = 0.8V to 2V 5 µs VSHDN = 2V to 0.8V 2 µs BW –3dB Closed Loop Bandwidth AV = 1, RL = 1k to Half Supply GBW Gain-Bandwidth Product f = 2MHz, RL = 1k to Half Supply l tS , 0.1% Settling Time to 0.1% AV = –1, VO = 2V Step RL = 1k tS , 0.01% Settling Time to 0.01% AV = –1, VO = 2V Step RL = 1k SR Slew Rate AV = –3.33, 4.6V Step (Note 11) l 100 70 60 50 120 MHz 180 MHz MHz 74 ns 202 ns 90 V/µs V/µs FPBW Full Power Bandwidth VOUT = 4VP-P (Note 13) 4 MHz HD2/HD3 Harmonic Distortion RL = 1k to Half Supply fC = 100kHz, VO = 2VP-P fC = 1MHz, VO = 2VP-P fC = 2MHz, VO = 2VP-P 110/90 88/80 78/62 dBc dBc dBc RL = 100Ω to Half Supply fC = 100kHz, VO = 2VP-P fC = 1MHz, VO = 2VP-P fC = 2MHz, VO = 2VP-P 90/79 66/60 59/51 ΔG Differential Gain (Note 14) AV = 1, RL = 1k, VS = ±2.5V 0.2 % Δθ Differential Phase (Note 14) AV = 1, RL = 1k, VS = ±2.5V 0.08 Deg Crosstalk AV = –1, RL = 1k to Half Supply, VOUT = 2VP-P, f = 1MHz –90 dB ELECTRICAL CHARACTERISTICS (VS = 2.7V) The l denotes the specifications which apply across the specified temperature range, otherwise specifications are at TA = 25°C. For each amplifier VS = 2.7V, 0V; VSHDN = 2V; VCM = VOUT = 1.35V, unless otherwise noted. SYMBOL PARAMETER CONDITIONS VOS Input Offset Voltage VCM = Half Supply MIN TYP MAX UNITS –100 –300 500 l 1000 1400 µV µV –1.75 –2.25 0.75 l 3.25 3.75 mV mV –700 –1000 –20 l 700 1000 µV µV –3.5 –4 0.1 l 3.5 4 mV mV VCM = V+ – 0.5V, NPN Mode ∆VOS Input Offset Voltage Match (Channel-to-Channel) (Note 8) VCM = Half Supply VCM = V+ – 0.5V, NPN Mode VOS TC Input Offset Voltage Drift l 2 µV/°C Rev C For more information www.analog.com 5 LTC6246/LTC6247/LTC6248 ELECTRICAL CHARACTERISTICS (VS = 2.7V) The l denotes the specifications which apply across the specified temperature range, otherwise specifications are at TA = 25°C. For each amplifier VS = 2.7V, 0V; VSHDN = 2V; VCM = VOUT = 1.35V, unless otherwise noted. SYMBOL PARAMETER CONDITIONS IB Input Bias Current (Note 7) VCM = Half Supply MIN TYP MAX UNITS –450 –600 –100 l 450 600 nA nA 50 0 350 l 1000 1500 nA nA –250 –350 –10 l 250 350 nA nA –250 –350 –10 l 250 350 nA nA VCM = V+ – 0.5V, NPN Mode IOS Input Offset Current VCM = Half Supply VCM = V+ – 0.5V, NPN Mode en Input Noise Voltage Density f = 100kHz 4.6 nV/√Hz Input 1/f Noise Voltage f = 0.1Hz to 10Hz 1.7 µVP-P in Input Noise Current Density f = 100kHz 1.8 pA/√Hz CIN Input Capacitance Differential Mode Common Mode 2 0.8 pF pF RIN Input Resistance Differential Mode Common Mode 32 12 kΩ MΩ AVOL Large Signal Voltage Gain RL = 1k to Half Supply (Note 12) 15 7.5 25 l V/mV V/mV RL = 100Ω to Half Supply (Note 12) 2 1.3 7.5 l V/mV V/mV 80 78 100 l dB dB l 0 l 69 65 l 2.5 CMRR Common Mode Rejection Ratio ICMR Input Common Mode Range PSRR Power Supply Rejection Ratio VCM = 0V to 1.2V VS = 2.5V to 5.25V VCM = 1V Supply Voltage Range (Note 6) VOL Output Swing Low (VOUT – V–) No Load VS 73 40 55 mV mV 80 125 160 mV mV 110 175 225 mV mV 60 85 100 mV mV 135 190 225 mV mV 180 275 400 mV mV –35 –20 –15 mA mA l VOH Output Swing High (V+ – VOUT) No Load l ISOURCE = 5mA l ISOURCE = 10mA l ISC Short Circuit Current Sourcing l Sinking l IS Supply Current per Amplifier VCM = Half Supply 25 20 50 l mA mA 0.89 1 1.3 mA mA 1 1.3 1.7 mA mA l VCM = V+ – 0.5V V 20 l ISINK = 10mA dB dB 5.25 l ISINK = 5mA V Rev C 6 For more information www.analog.com LTC6246/LTC6247/LTC6248 ELECTRICAL CHARACTERISTICS (VS = 2.7V) The l denotes the specifications which apply across the specified temperature range, otherwise specifications are at TA = 25°C. For each amplifier VS = 2.7V, 0V; VSHDN = 2V; VCM = VOUT = 1.35V, unless otherwise noted. SYMBOL PARAMETER CONDITIONS ISD Disable Supply Current per Amplifier VSHDN = 0.8V MIN TYP MAX 22 50 90 µA µA l ISHDNL ISHDNH SHDN Pin Current Low SHDN Pin Current High VSHDN = 0.8V –1 –1.5 –0.5 l 0 0 µA µA –300 –350 45 l 300 350 nA nA 0.8 V VSHDN = 2V VL SHDN Pin Input Voltage l l VH SHDN Pin Input Voltage IOSD Output Leakage Current Magnitude in Shutdown VSHDN = 0.8V, Output Shorted to Either Supply tON Turn-On Time tOFF Turn-Off Time BW –3dB Closed Loop Bandwidth AV = 1, RL = 1k to Half Supply GBW Gain-Bandwidth Product f = 2MHz, RL = 1k to Half Supply UNITS 2.0 V 100 nA VSHDN = 0.8V to 2V 5 µs VSHDN = 2V to 0.8V 2 µs l 80 50 100 MHz 150 MHz tS , 0.1 Settling Time to 0.1% AV = –1, VO = 2V Step RL = 1k 119 ns tS , 0.01 Settling Time to 0.01% AV = –1, VO = 2V Step RL = 1k 170 ns SR Slew Rate AV = –1, 2V Step 55 V/µs FPBW Full Power Bandwidth VOUT = 2VP-P (Note 13) 3.3 MHz Crosstalk AV = –1, RL = 1k to Half Supply, VOUT = 2VP-P, f = 1MHz –90 dB Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The inputs are protected by back-to-back diodes. If any of the input or shutdown pins goes 300mV beyond either supply or the differential input voltage exceeds 1.4V the input current should be limited to less than 10mA. This parameter is guaranteed to meet specified performance through design and/or characterization. It is not production tested. Note 3: A heat sink may be required to keep the junction temperature below the absolute maximum rating when the output current is high. Note 4: The LTC6246C/LTC6247C/LTC6248C and LTC6246I/LTC6247I/ LTC6248I are guaranteed functional over the temperature range of –40°C to 85°C. The LTC6246H/LTC6247H/LTC6248H are guaranteed functional over the temperature range of –40°C to 125°C. Note 5: The LTC6246C/LTC6247C/LTC6248C are guaranteed to meet specified performance from 0°C to 70°C. The LTC6246C/LTC6247C/ LTC6248C are designed, characterized and expected to meet specified performance from –40°C to 85°C but are not tested or QA sampled at these temperatures. The LTC6246I/LTC6247I/LTC6248I are guaranteed to meet specified performance from –40°C to 85°C. The LTC6246H/ LTC6247H/LTC6248H are guaranteed to meet specified performance from –40°C to 125°C. Note 6: Minimum supply voltage is guaranteed by power supply rejection ratio test. Note 7: The input bias current is the average of the average of the currents through the positive and negative input pins. Note 8: Matching parameters are the difference between amplifiers A and D and between B and C on the LTC6248; between the two amplifiers on the LTC6247. Note 9: Thermal resistance varies with the amount of PC board metal connected to the package. The specified values are with short traces connected to the leads with minimal metal area. Note 10: The output voltage is varied from 0.5V to 4.5V during measurement. Note 11: Middle 80% of the output waveform is observed. RL = 1k at half supply. Note 12: The output voltage is varied from 0.5V to 2.2V during measurement. Note 13: FPBW is determined from distortion performance in a gain of +2 configuration with HD2, HD3 < –40dBc as the criteria for a valid output. Note 14: Differential gain and phase are measured using a Tektronix TSG120YC/NTSC signal generator and a Tektronix 1780R video measurement set. Rev C For more information www.analog.com 7 LTC6246/LTC6247/LTC6248 TYPICAL PERFORMANCE CHARACTERISTICS VOS Distribution, VCM = VS/2 (MS, PNP Stage) 22 25 VS = 5V, 0V 20 V = 2.5V CM 18 16 VS = 5V, 0V 14 VCM = 4.5V VS = 5V, 0V VCM = 2.5V PERCENT OF UNITS (%) 14 12 10 8 6 PERCENT OF UNITS (%) 20 16 PERCENT OF UNITS (%) VOS Distribution, VCM = V+ – 0.5V (MS, NPN Stage) VOS Distribution, VCM = VS/2 (TSOT-23, PNP Stage) 15 10 5 4 0 –375 –250 –150 –50 50 150 250 INPUT OFFSET VOLTAGE (µV) 0 –175 –125 –75 –25 25 75 125 INPUT OFFSET VOLTAGE (µV) 350 624678 G01 8 6 4 0 –2000 175 VOS vs Temperature (MS10, NPN Stage) 500 2500 VS = 5V, 0V 400 VCM = 2.5V 6 DEVICES 300 VOLTAGE OFFSET (µV) 14 10 8 6 VS = 5V, 0V 2000 VCM = 4.5V 6 DEVICES 1500 VOLTAGE OFFSET (µV) VS = 5V, 0V 16 VCM = 4.5V 200 100 0 –100 1000 500 0 –500 –1000 4 –200 –1500 2 –300 –2000 0 –2000 –400 –55 –35 –15 2000 5 25 45 65 85 105 125 TEMPERATURE (°C) 624678 G04 624678 G06 VOS vs Temperature (MS10, NPN Stage) 1200 VOLTAGE OFFSET (µV) VS = 2.7V, 0V VCM = 1.35V 1000 6 DEVICES 800 600 400 Offset Voltage vs Input Common Mode Voltage 2500 500 2000 400 1500 300 1000 500 0 –500 –1000 200 5 25 45 65 85 105 125 TEMPERATURE (°C) 624678 G07 5 25 45 65 85 105 125 TEMPERATURE (°C) 624678 G05 VOS vs Temperature (MS10, PNP Stage) 0 –55 –35 –15 –2500 –55 –35 –15 OFFSET VOLTAGE (µV) –1200 –400 400 1200 INPUT OFFSET VOLTAGE (µV) 2000 624678 G03 VOS vs Temperature (MS10, PNP Stage) 18 12 –1200 –400 400 1200 INPUT OFFSET VOLTAGE (µV) 624678 G02 VOS Distribution, VCM = V+ – 0.5V (TSOT-23, NPN Stage) PERCENT OF UNITS (%) 10 2 2 VOLTAGE OFFSET (µV) 12 VS = 2.7V, 0V –1500 VCM = 2.2V 6 DEVICES –2000 –55 –35 –15 5 25 45 65 85 105 125 TEMPERATURE (°C) 624678 G08 VS = 5V, 0V 200 100 –55°C 0 25°C –100 –200 125°C –300 –400 –500 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 INPUT COMMON MODE VOLTAGE (V) 5 624678 G09 Rev C 8 For more information www.analog.com LTC6246/LTC6247/LTC6248 TYPICAL PERFORMANCE CHARACTERISTICS Offset Voltage vs Output Current 5 125°C VOS (mV) 1.0 0.5 0 –55°C –0.5 25°C –1.0 –1.5 –2.0 –100 –75 –50 –25 0 25 50 OUTPUT CURRENT (mA) 75 –10 –15 –20 –25 200 100 VCM = 2.5V 0 –100 –200 –55 –25 65 5 35 TEMPERATURE (°C) 95 –1400 0 20 1000 0.5 1 3 2 4 5 6 7 TIME (1s/DIV) SUPPLY CURRENT (mA) SUPPLY CURRENT (mA) TA = 25°C 0.20 en, VCM = 2.5V 10 in, VCM = 2.5V 1.0 9 8 0.1 10 in, VCM = 4.5V 1 0 1 3 2 4 TOTAL SUPPLY VOLTAGE (V) VS = 5V, 0V 0.25 624678 G16 1k 10k 100k 1M FREQUENCY (Hz) 25°C SHUTDOWN CURRENT –0.25 –55°C 0.75 0.50 0 –0.50 –0.75 –1.00 –55°C –1.25 –1.50 –1.75 25°C –2.00 0 0.5 1 1.5 2 2.5 3 3.5 4 SHDN PIN VOLTAGE (V) 10M VS = 5V, 0V 0 125°C 0.25 5 100 SHDN Pin Current vs SHDN Pin Voltage 125°C –2.25 0 10 624678 G15 Supply Current Per Amplifier vs SHDN Pin Voltage 1.00 0.40 en, VCM = 4.5V 100 –1.0 0 5 624678 G12 VS = ±2.5V 0 1.25 TA = –55°C 1 1.5 2 2.5 3 3.5 4 4.5 COMMON MODE VOLTAGE (V) 624678 G14 1.20 0.60 0.5 Input Noise Voltage and Noise Current vs Frequency 0.5 Supply Current vs Supply Voltage (Per Amplifier) 0.80 0 1.0 –1.5 125 TA = 125°C –1600 40 60 80 100 120 140 160 TIME AFTER POWER-UP (s) 624678 G13 1.00 –800 VOLTAGE NOISE (nV/√Hz) CURRENT NOISE (pA/√Hz) 300 –600 0.1Hz to 10Hz Voltage Noise VOLTAGE NOISE (500nV/DIV) INPUT BIAS CURRENT (nA) 400 –55°C –400 –1200 1.5 VCM = 4.5V 0 –200 624678 G11 VS = 5V, 0V 500 200 –1000 –30 Input Bias Current vs Temperature 600 125°C 25°C 400 624678 G10 700 VS = 5V, 0V 600 –5 –35 100 800 VS = ±2.5V 0 TA = 25°C INPUT BIAS CURRENT (nA) 1.5 CHANGE IN OFFSET VOLTAGE (µV) VS = ±2.5V SHDN PIN CURRENT (µA) 2.0 Input Bias Current vs Common Mode Voltage Warm-Up Drift vs Time 4.5 5 624678 G17 –2.50 0 0.5 1 1.5 2 2.5 3 3.5 4 SHDN PIN VOLTAGE (V) 4.5 5 624678 G18 Rev C For more information www.analog.com 9 LTC6246/LTC6247/LTC6248 TYPICAL PERFORMANCE CHARACTERISTICS 4 8 OFFSET VOLTAGE (mV) OFFSET VOLTAGE (mV) 10 VCM = VCC – 0.5V –55°C 6 4 25°C 2 125°C 3 2 1 0 0 –2 –1 125°C 25°C 2.5 2 3.5 3 4 4.5 5 TOTAL SUPPLY VOLTAGE (V) 5.5 2.5 2 –55°C 3.5 3 4 4.5 5 TOTAL SUPPLY VOLTAGE (V) 624678 G19 OUTPUT SHORT-CIRCUIT CURRENT (mA) OUTPUT LOW SATURATION VOLTAGE (V) 120 1 TA = 125°C TA = 25°C 0.1 TA = –55°C 0.01 0.01 0.1 1 10 LOAD CURRENT (mA) 100 SINK 80 60 TA = 125°C –60 SOURCE TA = –55°C –80 TA = 25°C –100 1.25 1.45 1.65 1.85 2.05 2.25 2.45 2.65 POWER SUPPLY VOLTAGE (±V) 0.5 1 1.5 2 OUTPUT VOLTAGE (V) 624678 G25 RL = 1k TO MID SUPPLY 100 0 –100 –200 RL = 1k TO GROUND –300 RL = 100 TO GROUND –400 –500 0 0.5 1 1.5 2 2.5 3 3.5 OUTPUT VOLTAGE (V) Gain vs Frequency (AV = 1) 12 0 6 –6 0 –12 –24 0.01 0.1 1 10 FREQUENCY (MHz) 100 624678 G26 4.5 5 Gain vs Frequency (AV = 2) –6 –12 VS = ±2.5V TA = 25°C RL = 1k 4 624678 G24 GAIN (dB) INPUT VOLTAGE (µV) 6 –18 2.5 2.7 RL = 100 TO MID SUPPLY 200 624678 G23 GAIN (dB) RL = 100 TO GROUND 300 –20 –40 100 TA = 25°C VS = 5V, 0V 400 0 TA = 25°C VS = 2.7V, 0V RL = 1k TO GROUND 0.1 1 10 LOAD CURRENT (mA) 624678 G21 TA = 25°C 20 RL = 1k TO MID SUPPLY 0 TA = –55°C Open Loop Gain TA = 125°C 40 TA = 125°C 0.1 0.01 0.01 5.5 TA = –55°C 100 Open Loop Gain RL = 100 TO MID SUPPLY TA = 25°C 500 624678 G22 1000 900 800 700 600 500 400 300 200 100 0 –100 –200 –300 1 Output Short-Circuit Current vs Power Supply Voltage VS = ±2.5V VS = ±2.5V 624678 G20 Output Saturation Voltage vs Load Current (Output Low) 10 10 OUTPUT HIGH SATURATION VOLTAGE (V) 5 Output Saturation Voltage vs Load Current (Output High) Minimum Supply Voltage, VCM = V+ – 0.5V (NPN Operation) INPUT VOLTAGE (µV) 12 Minimum Supply Voltage, VCM = VS/2 (PNP Operation) VS = ±2.5V TA = 25°C RF = RG = 1k RL = 1k –18 0.01 0.1 1 10 FREQUENCY (MHz) 100 624678 G27 Rev C 10 For more information www.analog.com LTC6246/LTC6247/LTC6248 TYPICAL PERFORMANCE CHARACTERISTICS VS = ±2.5V 20 10 0 VS = ±1.35V –50 0 –10 –20 100k 1M 10M FREQUENCY (Hz) –100 100M 300M 200 GAIN BANDWIDTH PRODUCT 180 160 140 120 100 2.5 3 3.5 4.5 4 TOTAL SUPPLY VOLTAGE (V) COMMON MODE REJECTION RATIO (dB) OUTPUT IMPEDANCE (Ω) 110 AV = 10 10 1 AV = 2 AV = 1 0.1 0.01 0.001 100k 1M 10M 100M FREQUENCY (Hz) 90 80 70 60 50 40 30 20 10 0 –10 1G FALLING, VS = ±2.5V RISING, VS = ±2.5V 80 60 80 AV = –1, RL = 1k, VOUT = 4VP-P (±2.5V), 2VP-P (±1.35V) SLEW RATE MEASURED AT MIDDLE 2/3 OF OUTPUT FALLING, VS = ±1.35V OVERSHOOT (%) SLEW RATE (V/µs) 100 10 100 1k 5 25 45 65 85 105 125 TEMPERATURE (°C) 624678 G30 624678 G34 VS = ±2.5V TA = 25°C 70 60 NEGATIVE SUPPLY 50 POSITIVE SUPPLY 40 30 20 10 0 –10 10 100 1k 10k 100k 1M 10M 100M FREQUENCY (Hz) 624678 G33 Series Output Resistor vs Capacitive Load (AV = 1) VS = ±2.5V 70 VOUT = 100mVP-P AV = 1 VIN 60 RS = 10Ω –AV = 1 + Series Output Resistor vs Capacitive Load (AV = 2) 80 RS VOUT RS = 20Ω 40 30 0 500Ω 500Ω 70 60 CL 50 50 40 30 VIN RS = 10Ω – + RS AV = 2 VOUT CL RS = 20Ω RS = 49.9Ω 20 10 5 25 45 65 85 105 125 TEMPERATURE (°C) 80 10k 100k 1M 10M 100M 1G FREQUENCY (Hz) 20 RISING, VS = ±1.35V 40 –55 –35 –15 VS = ±1.35V 624678 G31 Slew Rate vs Temperature 120 VS = ±2.5V 150 Power Supply Rejection Ratio vs Frequency TA = 25°C VS = ±2.5V 100 624678 G31 140 GAIN BANDWIDTH PRODUCT 200 Common Mode Rejection Ratio vs Frequency VS = ±2.5V 100 40 250 624678 G29 Output Impedance vs Frequency 50 VS = ±1.35V 100 –55 –35 –15 5 624678 G28 1000 300 POWER SUPPLY REJECTION RATIO (dB) VS = ±1.35V 30 60 VS = ±2.5V PHASE MARGIN GAIN BANDWIDTH (MHz) 50 50 70 TA = 25°C RL = 1k OVERSHOOT (%) GAIN PHASE (DEG) 40 60 PHASE MARGIN 100 GAIN BANDWIDTH (MHz) 50 GAIN (dB) VS = ±2.5V PHASE 70 TA = 25°C RL = 1k PHASE MARGIN (DEG) 150 TA = 25°C 70 RL = 1k PHASE MARGIN (DEG) 80 60 Gain Bandwidth and Phase Margin vs Temperature Gain Bandwidth and Phase Margin vs Supply Voltage Open Loop Gain and Phase vs Frequency RS = 49.9Ω 10 100 1000 CAPACITIVE LOAD (pF) 10000 624678 G35 VS = ±2.5V VOUT = 200mVP-P 10 R = R = 500Ω, F G AV = 2 0 100 1000 10 CAPACITIVE LOAD (pF) 10000 624678 G36 Rev C For more information www.analog.com 11 LTC6246/LTC6247/LTC6248 TYPICAL PERFORMANCE CHARACTERISTICS –40 VS = ±2.5V –50 VOUT = 2VP-P AV = 1 VS = ±1.35V –50 VOUT = 1VP-P AV = 1 –80 –90 RL = 1kΩ, 3RD –100 RL = 1kΩ, 2ND –120 0.01 0.1 1 FREQUENCY (MHz) 10 –90 DISTORTION (dBc) –80 –90 RL = 1kΩ, 3RD –110 0.1 1 FREQUENCY (MHz) 10 RL = 1kΩ, 3RD –100 10 624678 G40 RL = 1kΩ, 2ND –120 0.01 0.1 1 FREQUENCY (MHz) 10 624678 G38 624678 G39 Settling Time vs Output Step (Noninverting) 200 5 RL = 1kΩ, 2ND RL = 1kΩ, 3RD –90 –110 VS = ±2.5V 180 AV = 1 T = 25°C 160 A RL = 100Ω, 3RD VS = ±1.35V –110 VOUT = 1VP-P AV = 2 –120 0.1 1 0.01 FREQUENCY (MHz) –80 –100 –120 0.01 RL = 100Ω, 2ND –70 Maximum Undistorted Output Signal vs Frequency –60 RL = 100Ω, 2ND –70 RL = 1kΩ, 2ND –100 Distortion vs Frequency AV = 2, 2.7V) –50 RL = 100Ω, 2ND –80 OUTPUT VOLTAGE SWING (VP-P) –40 RL = 100Ω, 3RD –60 –70 624678 G37 Distortion vs Frequency (AV = 2, 5V) VS = ±2.5V –50 VOUT = 2VP-P AV = 2 DISTORTION (dBc) –70 RL = 100Ω, 2ND –110 –40 RL = 100Ω, 3RD –60 RL = 100Ω, 3RD DISTORTION (dBc) DISTORTION (dBc) –60 Distortion vs Frequency (AV = 1, 2.7V) 4 SETTLING TIME (ns) –40 Distortion vs Frequency (AV = 1, 5V) 3 2 VS = ±2.5V TA = 25°C RL = 1kΩ 1 HD2, HD3 < –40dBc AV = 2 AV = –1 0 0.1 1 0.01 FREQUENCY (MHz) VIN – + VOUT 1k 140 120 100 1mV 80 1mV 60 40 10mV 10mV 20 10 624678 G41 0 –4 –3 –2 –1 0 1 2 OUTPUT STEP (V) 3 4 624678 G42 Rev C 12 For more information www.analog.com LTC6246/LTC6247/LTC6248 TYPICAL PERFORMANCE CHARACTERISTICS Settling Time vs Output Step (Inverting) 200 SETTLING TIME (ns) – + 1k 160 VIN 140 VOUT 0V 1k 120 100 VSHDN 2.5V/DIV 60 1V/DIV 0V 10mV 40 VOUT 1.6V/DIV 10mV 20 0 –4 –3 –2 0V 1mV 1mV 80 Large Signal Response VS = ±2.5V AV = –1 TA = 25°C 1k 180 SHDN Pin Response Time 0 1 2 –1 OUTPUT STEP (V) 3 4 AV = 1 VS = ±2.5V RL = 1k VIN = 1.6V 624678 G44 10µs/DIV 200ns/DIV AV = 1 VS = ±2.5V RL = 1k 624678 G45 624678 G43 Small Signal Response Output Overdriven Recovery 0V VIN 1V/DIV 0V 25mV/DIV 0V VOUT 2V/DIV AV = 1 VS = ±2.5V RL = 1k 50ns/DIV 624678 G46 AV = ±2 VS = ±2.5V RL = 1k VIN = 3VP-P 100ns/DIV 624678 G47 Rev C For more information www.analog.com 13 LTC6246/LTC6247/LTC6248 PIN FUNCTIONS –IN: Inverting Input of Amplifier. Valid input range from V– to V+. V– : Negative Supply Voltage. Typically 0V. This can be made a negative voltage as long as 2.5V ≤ (V+ – V–) ≤ 5.25V. +IN: Non-Inverting Input of Amplifier. Valid input range from V– to V+. SHDN: Active Low Shutdown. Threshold is typically 1.1V referenced to V–. Floating this pin will turn the part on. V+ : Positive Supply Voltage. Allowed applied voltage ranges from 2.5V to 5.25V when V– = 0V. OUT: Amplifier Output. Swings rail-to-rail and can typically source/sink over 50mA of current at a total supply of 5V. APPLICATIONS INFORMATION Circuit Description The LTC6246/LTC6247/LTC6248 have an input and output signal range that extends from the negative power supply to the positive power supply. Figure 1 depicts a simplified schematic of the amplifier. The input stage is comprised of two differential amplifiers, a PNP stage, Q1/Q2, and an NPN stage, Q3/Q4 that are active over different common mode input voltages. The PNP stage is active between the negative supply to nominally 1.2V below the positive supply. As the input voltage approaches the positive supply, the transistor Q5 will steer the tail current, I1, to the current mirror, Q6/Q7, activating the NPN differential pair and the PNP pair becomes inactive for the remaining input common mode range. Also, at the input stage, devices Q17 to Q19 act to cancel the bias current of the PNP input pair. When Q1/Q2 are active, the current in Q16 is controlled to be the same as the current in Q1 and Q2. Thus, the base current of Q16 is nominally equal to the base current of the input devices. The base current of Q16 is then mirrored by devices Q17 to Q19 to cancel the base current of the input devices Q1/Q2. A pair of complementary common emitter stages, Q14/Q15, enable the output to swing from rail-to-rail. V+ V+ + ESDD1 I2 R3 V– ESDD2 + I1 D6 D8 D5 D7 –IN R5 Q12 Q11 +IN R4 CC Q4 Q3 Q1 Q16 Q17 Q18 Q9 V+ Q19 Q7 ESDD5 V– OUT BUFFER AND OUTPUT BIAS Q10 V– I3 Q2 ESDD3 ESDD4 C2 + VBIAS Q5 Q15 Q13 ESDD6 Q8 C1 Q6 R1 R2 V– Q14 624678 F01 Figure 1. LTC6246/LTC6247/LTC6248 Simplified Schematic Diagram Rev C 14 For more information www.analog.com LTC6246/LTC6247/LTC6248 APPLICATIONS INFORMATION Input Offset Voltage Input Protection The offset voltage will change depending upon which input stage is active. The PNP input stage is active from the negative supply rail to approximately 1.2V below the positive supply rail, then the NPN input stage is activated for the remaining input range up to the positive supply rail with the PNP stage inactive. The offset voltage magnitude for the PNP input stage is trimmed to less than 500µV with 5V total supply at room temperature, and is typically less than 150μV. The offset voltage for the NPN input stage is typically less than 1.7mV with 5V total supply at room temperature. The input stages are protected against a large differential input voltage of 1.4V or higher by 2 pairs of back-to-back diodes to prevent the emitter-base breakdown of the input transistors. In addition, the input and shutdown pins have reverse biased diodes connected to the supplies. The current in these diodes must be limited to less than 10mA. The amplifiers should not be used as comparators or in other open loop applications. Input Bias Current The LTC6246 family uses a bias current cancellation circuit to compensate for the base current of the PNP input pair. When the input common mode voltage is less than 200mV, the bias cancellation circuit is no longer effective and the input bias current magnitude can reach a value above 1µA. For common mode voltages ranging from 0.2V above the negative supply to 1.2V below the positive supply, the low input bias current of the LTC6246 family allows the amplifiers to be used in applications with high source resistances where errors due to voltage drops must be minimized. Output The LTC6246 family has excellent output drive capability. The amplifiers can typically deliver over 50mA of output drive current at a total supply of 5V. The maximum output current is a function of the total supply voltage. As the supply voltage to the amplifier decreases, the output current capability also decreases. Attention must be paid to keep the junction temperature of the IC below 150°C (refer to the Power Dissipation section) when the output is in continuous short circuit. The output of the amplifier has reverse-biased diodes connected to each supply. If the output is forced beyond either supply, extremely high current will flow through these diodes which can result in damage to the device. Forcing the output to even 1V beyond either supply could result in several hundred milliamps of current through either diode. ESD The LTC6246 family has reverse-biased ESD protection diodes on all inputs and outputs as shown in Figure 1. There is an additional clamp between the positive and negative supplies that further protects the device during ESD strikes. Hot plugging of the device into a powered socket must be avoided since this can trigger the clamp resulting in larger currents flowing between the supply pins. Capacitive Loads The LTC6246/LTC6247/LTC6248 are optimized for high bandwidth and low power applications. Consequently they have not been designed to directly drive large capacitive loads. Increased capacitance at the output creates an additional pole in the open loop frequency response, worsening the phase margin. When driving capacitive loads, a resistor of 10Ω to 100Ω should be connected between the amplifier output and the capacitive load to avoid ringing or oscillation. The feedback should be taken directly from the amplifier output. Higher voltage gain configurations tend to have better capacitive drive capability than lower gain configurations due to lower closed loop bandwidth and hence higher phase margin. The graphs titled Series Output Resistor vs Capacitive Load demonstrate the transient response of the amplifier when driving capacitive loads with various series resistors. Rev C For more information www.analog.com 15 LTC6246/LTC6247/LTC6248 APPLICATIONS INFORMATION Feedback Components Power Dissipation When feedback resistors are used to set up gain, care must be taken to ensure that the pole formed by the feedback resistors and the parasitic capacitance at the inverting input does not degrade stability. For example if the amplifier is set up in a gain of +2 configuration with gain and feedback resistors of 5k, a parasitic capacitance of 5pF (device + PC board) at the amplifier’s inverting input will cause the part to oscillate, due to a pole formed at 12.7MHz. An additional capacitor of 5pF across the feedback resistor as shown in Figure 2 will eliminate any ringing or oscillation. In general, if the resistive feedback network results in a pole whose frequency lies within the closed loop bandwidth of the amplifier, a capacitor can be added in parallel with the feedback resistor to introduce a zero whose frequency is close to the frequency of the pole, improving stability. The LTC6246 and LTC6247 contain one and two amplifiers respectively. Hence the maximum on-chip power dissipation for them will be less than the maximum onchip power dissipation for the LTC6248, which contains four amplifiers. 5pF 5k – CPAR VOUT TJ = TA + (PD • θJA) The power dissipation in the IC is a function of the supply voltage, output voltage and load resistance. For a given supply voltage with output connected to ground or supply, the worst-case power dissipation PD(MAX) occurs when the supply current is maximum and the output voltage at half of either supply voltage for a given load resistance. PD(MAX) is approximately (since IS actually changes with output load current) given by: 2 ⎛V ⎞ PD(MAX) =(VS •IS(MAX) )+ ⎜ S ⎟ /RL ⎝ 2⎠ + 5k VIN The LTC6248 is housed in a small 16-lead MS package and typically has a thermal resistance (θJA) of 125°C/ W. It is necessary to ensure that the die’s junction temperature does not exceed 150°C. The junction temperature, TJ, is calculated from the ambient temperature, TA, power dissipation, PD, and thermal resistance, θJA: 624678 F02 Figure 2. 5pF Feedback Cancels Parasitic Pole Shutdown The LTC6246 and LTC6247MS have SHDN pins that can shut down the amplifier to 42µA typical supply current. The SHDN pin needs to be taken below 0.8V above the negative supply for the amplifier to shut down. When left floating, the SHDN pin is internally pulled up to the positive supply and the amplifier remains on. Example: For an LTC6248 in a 16-lead MS package operating on ±2.5V supplies and driving a 100Ω load to ground, the worst-case power dissipation is approximately given by PD(MAX)/Amp = (5 • 1.3mA) + (1.25)2/100 = 22mW If all four amplifiers are loaded simultaneously then the total power dissipation is 88mW. At the Absolute Maximum ambient operating temperature, the junction temperature under these conditions will be: TJ = TA + PD • 125°C/W = 125 + (0.088W • 125°C/W) = 136°C which is less than the absolute maximum junction temperature for the LTC6248 (150°C). Refer to the Pin Configuration section for thermal resistances of various packages. Rev C 16 For more information www.analog.com LTC6246/LTC6247/LTC6248 TYPICAL APPLICATIONS 12-Bit ADC Driver Figure 3 shows the LTC6246 driving an LTC2366 12-bit A/D converter. The low wideband noise of the LTC6246 maintains a 70dB SNR even without the use of an intermediate antialiasing RC filter. On a single 3.3V supply with a 2.5V reference, a full –1dBFS output can be obtained without the amplifier transitioning between input regions, thus minimizing crossover distortion. Figure 4 shows an FFT obtained with a sampling rate of 2.2Msps and a 350kHz input waveform. Spurious free dynamic range is a quite handsome 82dB. 3.3V 2.5V 3.3V VDD VREF + VIN AIN LTC6246 – 499Ω 1% 499Ω 1% CS SDO LTC2366 GND SCK OVDD 624678 F03 10pF Low Noise Low Power DC-Accurate Single Supply Photodiode Amplifier Figure 5 shows the LTC6246 applied as a low power high performance transimpedance amplifier for a photodiode. A low noise JFET Q1 acts as a current buffer, with R2 and R3 imposing a low frequency gain of approximately 1. Transimpedance gain is set by feedback resistor R1 to 1MΩ. R4 and R5 set the LTC6246 inputs at 1V below the 3V rail, with C3 reducing their noise contribution. By feedback this 1V also appears across R2, setting the JFET quiescent current at 1mA completely independent of its pinchoff voltage and IDSS characteristics. It does this by placing the JFETs 1mA VGS at the gate referenced to the source, which is sitting 1V above ground. For this JFET, that will typically be about 500mV, and this voltage is imposed as a reverse voltage on the photodiode PD1. At zero IPD photocurrent, the output sits at the same voltage and rises as photocurrent increases. As mentioned before, R2 and R3 set the JFET gain to 1 at low frequency. R1 1M, 1% Figure 3. Single Supply 12-Bit ADC Driver 0 –20 MAGNITUDE (dB) –30 3V Q1 NXP BF862 IPD fIN = 350.195kHz fSAMP = 2.2Msps SFDR = 82dB SNR = 70dB 1024 POINT FFT –10 C1 0.1pF PD1 OSRAM SFH213 C2 6.8nF FILM OR NPO –40 –50 R2 1k 3V + VOUT = VR + IPD • 1M LTC6246 – R3 1k C3 0.1µF –60 –70 –80 3V R6 10M –90 –100 –110 0 200 400 600 800 FREQUENCY (kHz) R4 10k + R5 20k 3V R7 1k LT6003 1000 – 624678 F04 Figure 4. 350kHz FFT Showing 82dB SFDR VR C4 1µF 624678 F05 –3dB BW = 700kHz ICC = 2.2mA OUTPUT NOISE = 160µVRMS MEASURED ON A 1MHz BW VOUT IS REFERRED TO VR AT ZERO PHOTOCURRENT, VOUT = VR Figure 5. Low Noise Low Power DC Accurate Single Supply Photodiode Amplifier Rev C For more information www.analog.com 17 LTC6246/LTC6247/LTC6248 TYPICAL APPLICATIONS 60dB 5.5MHz Gain Block This is not the lowest noise configuration for a transistor, as downstream noise sources appear at the input completely unattenuated. At low frequency, this is not a concern for a transimpedance amplifier because the noise gain is 1 and the output noise is dominated by the 130nV/√Hz of the 1MΩ R1. However, at increasing frequencies the capacitance of the photodiode comes into play and the circuit noise gain rises as the 1MΩ feedback looks back into lower and lower impedance. But capacitor C2 comes to the rescue. In addition to the obvious quenching of noise source R3, capacitor C2 increases the JFET gain to about 30 at high frequency effectively attenuating the downstream noise contributions of R2 and the op amp input noise. Thus the circuit achieves low input voltage noise at high frequency where it is most needed. Amplifier LT6003 is used to buffer the output voltage of the photodiode and R7 and C4 are used to filter out the voltage noise of the LT6003. Bandwidth to 700kHz was achieved with this circuit, with integrated output noise being 160µVRMS up to 1MHz. Total supply current was a very low 2.2mA. Figure 6 shows the LTC6247 configured as a low power high gain high bandwidth block. Two amplifiers each configured with a gain of 31V/V, are cascaded in series. A 660nF capacitor is used to limit the DC gain of the block to around 30dB to minimize output offset voltage. Figure 7 shows the frequency response of the block. Mid-band voltage gain is approximately 60dB with a –3dB frequency of 5.5MHz, thus resulting in a gain-bandwidth product of 5.5GHz with only 1.9mA of quiescent supply current. Single 2.7V Supply 4MHz 4th Order Butterworth Filter Benefitting from low voltage operation and rail-to-rail output, a low power filter that is suitable for antialiasing can be built as shown in Figure 8. On a 2.7V supply the filter has a passband of approximately 4MHz with 2VP-P input signal and a stopband attenuation that is greater than –75dB at 43MHz as shown in Figure 9. The resistor and capacitor values can be scaled to reduce noise at the cost of large signal power consumption and distortion. 65 60 1.5k – 2.5V 1/2LTC6247 VIN + 55 50 2.5V 1k – 660nF 1/2LTC6247 + –2.5V –2.5V GAIN (dB) 50Ω 30k VOUT 45 40 35 VS = ±2.5V VIN = 4.5mVP-P 30 RL = 1kΩ DC GAIN = 30dB 25 (DUE TO 660nF DC BLOCKING CAP) OUTPUT OFFSET = 4mV 20 10k 100k 1M FREQUENCY (kHz) 624678 F06 Figure 6. 60dB 5.5MHz Gain Block 10M 624678 F07 Figure 7 10 910Ω 1.1k 0 –10 12pF 5.6pF 2.7k 56pF – 1/2LTC6247 + –20 2.7V 1.1k 2.3k 120pF 1.2V – 2.7V 1/2LTC6247 VOUT + –40 –50 –60 –70 624678 F08 Figure 8. Single 2.7V Supply 4MHz 4th Order Butterworth Filter –30 GAIN (dB) VIN 910Ω –80 VS = 2.7V, 0V –90 VIN = 2VP-P RL = 1kΩ to 0V –100 10k 100k 1M 10M FREQUENCY (kHz) 100M 624678 F09 Figure 9 Rev C 18 For more information www.analog.com LTC6246/LTC6247/LTC6248 PACKAGE DESCRIPTION Please refer to http://www.linear.com/product/LTC6246#packaging for the most recent package drawings. KC Package 8-Lead Plastic UTDFN (2mm × 2mm) (Reference LTC DWG # 05-08-1749 Rev Ø) 1.37 ±0.05 R = 0.115 TYP 5 R = 0.05 TYP 2.00 ±0.10 0.70 ±0.05 2.55 ±0.05 0.64 ±0.05 1.15 ±0.05 2.00 ±0.10 PACKAGE OUTLINE 1.37 ±0.10 8 0.40 ±0.10 PIN 1 NOTCH R = 0.20 OR 0.25 × 45° CHAMFER 0.64 ±0.10 PIN 1 BAR TOP MARK (SEE NOTE 6) (KC8) UTDFN 0107 REVØ 4 0.25 ±0.05 0.45 BSC 1.35 REF 0.55 ±0.05 0.125 REF RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED 1 0.23 ±0.05 0.45 BSC 1.35 REF BOTTOM VIEW—EXPOSED PAD 0.00 – 0.05 NOTE: 1. DRAWING IS NOT A JEDEC PACKAGE OUTLINE 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE OBSOLETE PACKAGE MS8 Package 8-Lead Plastic MSOP (Reference LTC DWG # 05-08-1660 Rev G) 0.889 ±0.127 (.035 ±.005) 5.10 (.201) MIN 0.42 ± 0.038 (.0165 ±.0015) TYP 3.20 – 3.45 (.126 – .136) 0.65 (.0256) BSC 0.254 (.010) 3.00 ±0.102 (.118 ±.004) (NOTE 3) 8 7 6 5 3.00 ±0.102 (.118 ±.004) (NOTE 4) 4.90 ±0.152 (.193 ±.006) DETAIL “A” 0.52 (.0205) REF 0° – 6° TYP GAUGE PLANE 0.53 ±0.152 (.021 ±.006) RECOMMENDED SOLDER PAD LAYOUT DETAIL “A” 1 1.10 (.043) MAX 2 3 4 0.86 (.034) REF 0.18 (.007) SEATING PLANE 0.22 – 0.38 (.009 – .015) TYP 0.65 (.0256) BSC NOTE: 1. DIMENSIONS IN MILLIMETER/(INCH) 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX 0.1016 ±0.0508 (.004 ±.002) MSOP (MS8) 0213 REV G Rev C For more information www.analog.com 19 LTC6246/LTC6247/LTC6248 PACKAGE DESCRIPTION Please refer to http://www.linear.com/product/LTC6246#packaging for the most recent package drawings. MS Package 10-Lead Plastic MSOP (Reference LTC DWG # 05-08-1661 Rev F) 0.889 ±0.127 (.035 ±.005) 5.10 (.201) MIN 3.20 – 3.45 (.126 – .136) 3.00 ±0.102 (.118 ±.004) (NOTE 3) 0.50 0.305 ±0.038 (.0197) (.0120 ±.0015) BSC TYP RECOMMENDED SOLDER PAD LAYOUT 0.254 (.010) 10 9 8 7 6 3.00 ±0.102 (.118 ±.004) (NOTE 4) 4.90 ±0.152 (.193 ±.006) DETAIL “A” 0.497 ±0.076 (.0196 ±.003) REF 0° – 6° TYP GAUGE PLANE 1 2 3 4 5 0.53 ±0.152 (.021 ±.006) DETAIL “A” 0.18 (.007) SEATING PLANE 0.86 (.034) REF 1.10 (.043) MAX 0.17 – 0.27 (.007 – .011) TYP 0.50 (.0197) BSC NOTE: 1. DIMENSIONS IN MILLIMETER/(INCH) 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX 0.1016 ±0.0508 (.004 ±.002) MSOP (MS) 0213 REV F Rev C 20 For more information www.analog.com LTC6246/LTC6247/LTC6248 PACKAGE DESCRIPTION Please refer to http://www.linear.com/product/LTC6246#packaging for the most recent package drawings. MS Package 16-Lead Plastic MSOP (Reference LTC DWG # 05-08-1669 Rev A) 0.889 ±0.127 (.035 ±.005) 5.10 (.201) MIN 3.20 – 3.45 (.126 – .136) 4.039 ±0.102 (.159 ±.004) (NOTE 3) 0.50 (.0197) BSC 0.305 ±0.038 (.0120 ±.0015) TYP RECOMMENDED SOLDER PAD LAYOUT 0.254 (.010) DETAIL “A” 3.00 ±0.102 (.118 ±.004) (NOTE 4) 4.90 ±0.152 (.193 ±.006) 0° – 6° TYP 0.280 ±0.076 (.011 ±.003) REF 16151413121110 9 GAUGE PLANE 0.53 ±0.152 (.021 ±.006) DETAIL “A” 0.18 (.007) SEATING PLANE 1.10 (.043) MAX 0.17 – 0.27 (.007 – .011) TYP 1234567 8 0.50 (.0197) BSC NOTE: 1. DIMENSIONS IN MILLIMETER/(INCH) 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX 0.86 (.034) REF 0.1016 ±0.0508 (.004 ±.002) MSOP (MS16) 0213 REV A Rev C For more information www.analog.com 21 LTC6246/LTC6247/LTC6248 PACKAGE DESCRIPTION Please refer to http://www.linear.com/product/LTC6246#packaging for the most recent package drawings. S6 Package 6-Lead Plastic TSOT-23 (Reference LTC DWG # 05-08-1636) 0.62 MAX 2.90 BSC (NOTE 4) 0.95 REF 1.22 REF 3.85 MAX 2.62 REF 1.4 MIN 2.80 BSC 1.50 – 1.75 (NOTE 4) PIN ONE ID RECOMMENDED SOLDER PAD LAYOUT PER IPC CALCULATOR 0.30 – 0.45 6 PLCS (NOTE 3) 0.95 BSC 0.80 – 0.90 0.20 BSC 0.01 – 0.10 1.00 MAX DATUM ‘A’ 0.30 – 0.50 REF 0.09 – 0.20 (NOTE 3) NOTE: 1. DIMENSIONS ARE IN MILLIMETERS 2. DRAWING NOT TO SCALE 3. DIMENSIONS ARE INCLUSIVE OF PLATING 4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR 5. MOLD FLASH SHALL NOT EXCEED 0.254mm 6. JEDEC PACKAGE REFERENCE IS MO-193 1.90 BSC S6 TSOT-23 0302 Rev C 22 For more information www.analog.com LTC6246/LTC6247/LTC6248 PACKAGE DESCRIPTION Please refer to http://www.linear.com/product/LTC6246#packaging for the most recent package drawings. DC8 Package 8-Lead Plastic DFN (2mm × 2mm) (Reference LTC DWG # 05-08-1719 Rev A) 0.70 ±0.05 2.55 ±0.05 1.15 ±0.05 0.64 ±0.05 (2 SIDES) PACKAGE OUTLINE 0.25 ±0.05 0.45 BSC 1.37 ±0.05 (2 SIDES) RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED R = 0.05 TYP 2.00 ±0.10 (4 SIDES) PIN 1 BAR TOP MARK (SEE NOTE 6) R = 0.115 TYP 5 8 0.40 ±0.10 0.64 ±0.10 (2 SIDES) PIN 1 NOTCH R = 0.20 OR 0.25 × 45° CHAMFER (DC8) DFN 0409 REVA 4 0.200 REF 1 0.23 ±0.05 0.45 BSC 0.75 ±0.05 1.37 ±0.10 (2 SIDES) 0.00 – 0.05 BOTTOM VIEW—EXPOSED PAD NOTE: 1. DRAWING IS NOT A JEDEC PACKAGE OUTLINE 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE Rev C For more information www.analog.com 23 LTC6246/LTC6247/LTC6248 PACKAGE DESCRIPTION Please refer to http://www.linear.com/product/LTC6246#packaging for the most recent package drawings. TS8 Package 8-Lead Plastic TSOT-23 (Reference LTC DWG # 05-08-1637 Rev A) 0.40 MAX 2.90 BSC (NOTE 4) 0.65 REF 1.22 REF 1.4 MIN 3.85 MAX 2.62 REF 2.80 BSC 1.50 – 1.75 (NOTE 4) PIN ONE ID RECOMMENDED SOLDER PAD LAYOUT PER IPC CALCULATOR 0.22 – 0.36 8 PLCS (NOTE 3) 0.65 BSC 0.80 – 0.90 0.20 BSC 0.01 – 0.10 1.00 MAX DATUM ‘A’ 0.30 – 0.50 REF 0.09 – 0.20 (NOTE 3) 1.95 BSC TS8 TSOT-23 0710 REV A NOTE: 1. DIMENSIONS ARE IN MILLIMETERS 2. DRAWING NOT TO SCALE 3. DIMENSIONS ARE INCLUSIVE OF PLATING 4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR 5. MOLD FLASH SHALL NOT EXCEED 0.254mm 6. JEDEC PACKAGE REFERENCE IS MO-193 Rev C 24 For more information www.analog.com LTC6246/LTC6247/LTC6248 REVISION HISTORY REV DATE DESCRIPTION A 2/10 Changes to Graph G15. B 7/15 Added 2mm × 2mm × 0.8mm DFN package. C 5/18 Obsoleted KC package option PAGE NUMBER 9 2, 3, 23 2, 3, 19 to 24 Rev C Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications morebyinformation www.analog.com subject to change without notice. No license For is granted implication or otherwise under any patent or patent rights of Analog Devices. 25 LTC6246/LTC6247/LTC6248 TYPICAL APPLICATION 700kHz, 1MΩ Single Supply Photodiode Amplifier Output Noise Spectrum R1 1M, 1% R2 1k PD1 OSRAM SFH213 Q1 NXP BF862 C2 6.8nF FILM OR NPO 3V 200 5V/DIV LED DRIVER VOLTAGE C1 0.1pF 3V IPD Transient Response R3 1k R4 10k 20nV/√Hz/DIV 3V + – C3 0.1µF 500mV/DIV OUTPUT WAVEFORM 0V VOUT ≈ 0.5V + IPD • 1M LTC6246 –3dB BW = 700kHz ICC = 2.2mA OUTPUT NOISE = 153µVRMS MEASURED ON A 1MHz BW 0 10kHz 100kHz 624678 TA02c 500ns/DIV 1MHz 624678 TA02b R5 20k 624678 TA02a RELATED PARTS PART NUMBER DESCRIPTION COMMENTS Operational Amplifiers LT1818/LT1819 Single/Dual Wide Bandwidth, High Slew Rate Low Noise and Distortion Op Amps 400MHz, 9mA, 6nV/√Hz, 2500V/µs, 1.5mV –85dBc at 5MHz LT1806/LT1807 Single/Dual Low Noise Rail-to-Rail Input and Output Op Amps 325MHz, 13mA, 3.5nV/√Hz, 140V/µs, 550µV, 85mA Output Drive LT6230/LT6231/ Single/Dual/Quad Low Noise Rail-to-Rail Output Op Amps LT6232 215MHz, 3.5mA, 1.1nV/√Hz, 70V/µs, 350µV LT6200/LT6201 Single/Dual Ultralow Noise Rail-to-Rail Input/Output Op Amps 165MHz, 20mA, 0.95nV/√Hz, 44V/µs, 1mV LT6202/LT6203/ Single/Dual/Quad Ultralow Noise Rail-to-Rail Op Amp LT6204 100MHz, 3mA, 1.9nV/√Hz, 25V/µs, 0.5mV LT1468 90MHz, 3.9mA, 5nV/√Hz, 22V/µs, 175µV, –96.5dB THD at 10VP-P, 100kHz 16-Bit Accurate Precision High Speed Op Amp LT1803/LT1804/ Single/Dual/Quad Low Power High Speed Rail-to-Rail Input LT1805 and Output Op Amps 85MHz, 3mA, 21nV√Hz, 100V/µs, 2mV LT1801/LT1802 Dual/Quad Low Power High Speed Rail-to-Rail Input and Output Op Amps 80MHz, 2mA, 8.5nV√Hz, 25V/µs, 350µV LT6552 Single Supply Rail-to-Rail Output Video Difference Amplifier 75MHz (–3dB), 13.5mA, 55.5nV/√Hz, 350V/µs, 20mV LT1028 Ultralow Noise, Precision High Speed Op Amps 75MHz, 9.5mA, 0.85nV/√Hz, 11V/µs, 40µV LT6233/LT6234/ Single/Dual/Quad Low Noise Rail-to-Rail Output Op Amps LT6235 60MHz, 1.2mA, 1.2nV/√Hz, 15V/µs, 0.5mV LT6220/LT6221/ Single/Dual/Quad Low Power High Speed Rail-to-Rail Input LT6222 and Output Op Amps 60MHz, 1mA, 10nV/√Hz, 20V/µs, 350µV LTC6244 50MHz, 7.4mA, 8nV/√Hz, 35V/µs, 100µV, Input Bias Current = 1pA Dual High Speed CMOS Op Amp LT1632/LT1633 Dual/Quad Rail-to-Rail Input and Output Precision Op Amps 45MHz, 4.3mA, 12nV/√Hz, 45V/µs, 1.35mV LT1630/LT1631 Dual/Quad Rail-to-Rail Input and Output Op Amps 30MHz, 3.5mA, 6nV/√Hz, 10V/µs, 525µV LT1358/LT1359 Dual/Quad Low Power High Speed Op Amps 25MHz, 2.5mA, 8nV/√Hz, 600V/µs, 800µV, Drives All Capacitive Loads ADC’s LTC2366 3Msps, 12-Bit ADC Serial I/O 72dB SNR, 7.8mW No Data Latency TSOT-23 Package LTC2365 1Msps, 12-Bit ADC Serial I/O 73dB SNR, 7.8mW No Data Latency TSOT-23 Package LTC1417 Low Power 14-Bit 400ksps ADC Parallel I/O Single 5V or ±5V Supplies, 0V to 4.096V or ±2.048V Input Range LTC1274 Low Power 12-Bit 400ksps ADC Parallel I/O 10mW Single 5V or ±5V Supplies, 0V to 4.096V or ±2.048V Input Range Rev C 26 D16949-0-5/18(C) For more information www.analog.com www.analog.com  ANALOG DEVICES, INC. 2009-2018