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LTC6907HS6#TRMPBF

LTC6907HS6#TRMPBF

  • 厂商:

    AD(亚德诺)

  • 封装:

    SOT-23-6

  • 描述:

    IC OSC SILICON PROG TSOT23-6

  • 数据手册
  • 价格&库存
LTC6907HS6#TRMPBF 数据手册
LTC6907 Micropower, 40kHz to 4MHz Resistor Set Oscillator in SOT-23 U FEATURES DESCRIPTIO ■ The LTC®6907 is a precision programmable oscillator that is versatile, compact and easy to use. Micropower operation benefits portable and battery-powered equipment. At 400kHz, the LTC6907 consumes 36µA on a 3V supply. ■ ■ ■ ■ ■ ■ ■ ■ Supply Current: 36µA at 400kHz 1% Frequency Accuracy (from 0°C to 70°C) Frequency Range: 40kHz to 4MHz One Resistor Sets the Oscillator Frequency –40°C to 125°C Operating Temperature Range Start-Up Time Under 200µs at 4MHz First Cycle After Power-Up is Accurate 150Ω CMOS Output Driver Low Profile (1mm) SOT-23 (ThinSOTTM) Package The LTC6907 is easily programmed according to this simple formula: U APPLICATIO S ■ ■ ■ ■ ■ A single resistor programs the oscillator frequency over a 10:1 range with better than 0.65% initial accuracy. The output frequency can be divided by 1, 3 or 10 to span a 100:1 total frequency range, 40kHz to 4MHz. Low Cost Precision Programmable Oscillator Rugged, Compact Micropower Replacement for Crystal and Ceramic Oscillators High Shock and Vibration Environments Portable and Battery-Powered Equipment PDAs and Cellular Phones , LT, LTC and LTM are registered trademarks of Linear Technology Corporation. ThinSOT is a trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners. ƒOUT ⎧10, DIV Pii n = V + 4MHz ⎛ 50k ⎞ ⎪ , N = ⎨3, DIV Pin = Open = •⎜ ⎟ N ⎝ R SET ⎠ ⎪1, DIV Pin = GND ⎩ The LTC6907 is available in the 6-lead SOT-23 (ThinSOT) package. Contact LTC Marketing for a version of the part with a shutdown feature or lower frequency operation. U TYPICAL APPLICATIO Typical Supply Current vs Frequency Micropower Clock Generator LTC6907 3V TO 3.6V V+ OUT GND GRD DIV SET 1000 40kHz TO 4MHz ÷10 ÷3 ÷1 RSET 50k TO 500k 6907 TA01 SUPPLY CURRENT (µA) 0.1µF CLOAD = 5pF T = 25°C : 3.3V, –1 : 3.3V, –3 : 3.3V, –10 100 10 10 100 1000 OUTPUT FREQUENCY (kHz) 10000 6907 TA02 6907fa 1 LTC6907 W W W AXI U U U W PACKAGE/ORDER I FOR ATIO U ABSOLUTE RATI GS (Note 1) V + ................................................................– 0.3V to 6V DIV to GND .................................... – 0.3V to (V + + 0.3V) SET to GND ................................... – 0.3V to (V + + 0.3V) GRD to GND .................................. – 0.3V to (V + + 0.3V) Operating Temperature Range (Note 7) LTC6907C .......................................... – 40°C to 85°C LTC6907I ............................................ – 40°C to 85°C LTC6907H ........................................ – 40°C to 125°C Specified Temperature Range (Note 7) LTC6907C ............................................... 0°C to 70°C LTC6907I ............................................ – 40°C to 85°C LTC6907H ........................................ – 40°C to 125°C Storage Temperature Range ................. – 65°C to 150°C Lead Temperature (Soldering, 10 sec).................. 300°C ORDER PART NUMBER TOP VIEW OUT 1 6 V+ GND 2 5 GRD DIV 3 4 SET LTC6907CS6 LTC6907IS6 LTC6907HS6 S6 PACKAGE 6-LEAD PLASTIC TSOT-23 S6 PART MARKING* TJMAX = 150°C, θJA = 200°C/W LTBTX Order Options Tape and Reel: Add #TR Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF Lead Free Part Marking: http://www.linear.com/leadfree/ Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is indicated by a label on the shipping container. ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full specified temperature range, otherwise specifications are at TA = 25°C. V+ = 3V to 3.6V, CL = 5pF, Pin 3 = V + unless otherwise noted. All voltages are with respect to GND. SYMBOL ∆f PARAMETER CONDITIONS Frequency Accuracy (Notes 2, 3) V+ = 3V to 3.6V MIN 400kHz ≤ f ≤ 4MHz 400kHz ≤ f ≤ 4MHz, LTC6907C 400kHz ≤ f ≤ 4MHz, LTC6907I, H TYP MAX UNITS ±0.25 ±0.65 ±1 ±1.3 % % % 500 kΩ ● ● ● RSET Frequency-Setting Resistor Range ∆f/∆T Frequency Drift Over Temp (Note 3) RSET = 158k ±0.005 %/°C ∆f/∆V Frequency Drift Over Supply (Note 3) V+ = 3V to 3.6V, 50k ≤ RSET ≤ 500k 0.06 %/V Timing Jitter (Peak-to-Peak) (Note 4) Pin 3 = V +, 50k ≤ R SET ≤ 500k Pin 3 = Open, 50k ≤ RSET ≤ 500k Pin 3 = 0V, 50k ≤ RSET ≤ 500k 0.12 0.28 0.60 % % % Sf Long-Term Stability of Output Frequency (Note 9) Pin 3 = V + Stability Over 1 Year Stability Over 10 Years 300 888 2809 ppm/√kHr ppm ppm DC Duty Cycle V+ Operating Supply Range (Note 8) IS Power Supply Current 50 ● ● 43 ● 3 50 57 % 3.6 V RSET = 500k, Pin 3 = 0V, RL = 10M (DIV = 1, fOUT = 400kHz) V + = 3.6V V + = 3V ● ● 40 36 55 48 µA µA RSET = 50k, Pin 3 = 0V, RL = 10M (DIV = 1, fOUT = 4MHz) V + = 3.6V V + = 3V ● ● 305 275 406 366 µA µA VIH High Level DIV Input Voltage V+ = 3.6V V+ = 3V ● ● VIL Low Level DIV Input Voltage V+ = 3.6V V+ = 3V ● ● IDIV DIV Input Current (Note 5) V + = 3.6V ● ● Pin 3 = V + Pin 3 = 0V 3.1 2.6 –2 V V 1 –1 0.5 0.2 V V 2 µA µA 6907fa 2 LTC6907 ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full specified temperature range, otherwise specifications are at TA = 25°C. V+ = 3V to 3.6V, CL = 5pF, Pin 3 = V + unless otherwise noted. All voltages are with respect to GND. SYMBOL VOH VOL PARAMETER CONDITIONS High Level Output Voltage (Note 5) V + = 3.6V IOH = – 100µA IOH = – 1mA ● ● 3.40 3.10 3.57 3.45 V V V + = 3V IOH = – 100µA IOH = – 1mA ● ● 2.8 2.5 2.97 2.80 V V V + = 3.6V IOL = 100µA IOL = 1mA ● ● 0.08 0.25 0.2 0.8 V V V + = 3V IOL = 100µA IOL = 1mA ● ● 0.07 0.25 0.2 0.8 V V Low Level Output Voltage (Note 5) MIN TYP MAX UNITS tr OUT Rise Time (Note 6) V + = 3.6V V+ = 3V 10 25 ns ns tf OUT Fall Time (Note 6) V + = 3.6V V+ = 3V 10 25 ns ns VGS GRD Pin Voltage Relative to SET Pin Voltage –10µA ≤ IGRD ≤ 0.3µA Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: Some frequencies may be generated using two different values of RSET. For these frequencies, the error is specified assuming that the larger value of RSET is used. Note 3: Frequency accuracy is defined as the deviation from the fOUT equation. Note 4: Jitter is the ratio of the peak-to-peak deviation of the period to the mean of the period. This specification is based on characterization and is not 100% tested. Note 5: Current into a pin is given as a positive value. Current out of a pin is given as a negative value. Note 6: Output rise and fall times are measured between the 10% and 90% power supply levels. ● –10 10 mV Note 7: The LTC6907C is guaranteed to meet specified performance from 0°C to 70°C. The LTC6907C is designed, characterized and expected to meet specified performance from –40°C to 85°C but is not tested or QA sampled at these temperatures. The LTC6907I is guaranteed to meet specified performance from –40°C to 85°C. Note 8: Consult the Applications Information section for operation with supplies higher than 3.6V. Note 9: Long term drift on silicon oscillators is primarily due to the movement of ions and impurities within the silicon and is tested at 30°C under otherwise nominal operating conditions. Long term drift is specified as ppm/√kHr due to the typically non-linear nature of the drift. To calculate drift for a set time period, translate that time into thousands of hours, take the square root and multiply by the typical drift number. For instance, a year is 8.77kHr and would yield a drift of 888ppm at 300ppm/√kHr. Ten years is 87.7kHr and would yield a drift of 2,809 ppm at 300 ppm/√kHr. Drift without power applied to the device may be approximated as 1/10th of the drift with power, or 30ppm/√kHr for a 300ppm/√kHr device. 6907fa 3 LTC6907 U W TYPICAL PERFOR A CE CHARACTERISTICS Typical Frequency Error vs Temperature Typical Frequency Error vs Power Supply Voltage 0.060% –0.020% FREQUENCY ERRROR (%) FREQUENCY ERROR (%) FREQUENCY ERROR (%) 0.000% 0.4% 0.2% RSET = 50k 0% –0.2% RSET = 500k –0.4% –0.6% –0.040% RSET = 50k RSET = 500k 3 3.1 3.2 3.3 3.4 SUPPLY VOLTAGE (V) 3.5 3.6 0.050% 0.000% –0.050% –0.100% –0.8% –1.0% –45 –25 –5 15 35 55 75 95 115 135 TEMPERATURE (°C) 6907 G01 –0.150% 0.75 RSET VOLTAGE (V) SUPPLY CURRENT (µA) SUPPLY CURRENT (µA) 0.7 700 600 500 400 RSET = 50k, 3.0V RSET = 50k, 3.6V RSET = 500k, 3.0V RSET = 500k, 3.6V 300 200 100 1000 OUTPUT FREQUENCY (kHz) 0 10000 10 30 40 50 20 LOAD CAPACITANCE (pF) 0.6 0.55 0.45 0 10 0.65 0.5 100 10 V+ = 3V T = 25°C 800 100 600 VSET vs Temperature (VSET is the Voltage Measured at the SET Pin) 900 : 3.3V, –3 500 200 300 400 SET RESISTOR (k OHMS) 0.8 1000 CLOAD = 5pF T = 25°C : 3.3V, –10 100 6907 G03 Typical Supply Current vs Load Capacitance : 3.3V, –1 0 6907 G02 Typical Supply Current vs Frequency 1000 T = 25°C V+ = 3V CLOAD = 5pF 0.100% 0.6% 0.020% –0.060% 0.150% + = 3V V+ V 0.8% CLOAD = 5pF T = 25°C CLOAD = 5pF 0.040% Typical Frequency Error vs RSET 1.0% 60 0.4 –45 –25 –5 15 35 55 75 95 115 135 TEMPERATURE (°C) 6907 G06 6907 G05 6907 G04 Output Waveform, 400kHz Output Waveform, 4MHz V+ = 3.3V 0.5V/DIV 0.5V/DIV V+ = 3.3V 6907 G08 6907 G07 500ns/DIV 50ns/DIV 6907fa 4 LTC6907 U U U PI FU CTIO S OUT (Pin 1): Oscillator Output. The OUT pin swings from GND to V+ with an output resistance of approximately 150Ω. For micropower operation, the load resistance must be kept as high as possible and the load capacitance as low as possible. GND (Pin 2): Ground. or better temperature coefficient. For lower accuracy applications, an inexpensive 1% thick-film resistor may be used. Limit the capacitance in parallel with RSET to less than 10pF to reduce jitter and to ensure stability. The voltage on the SET pin is approximately 650mV at 25°C and decreases with temperature by about –2.3mV/°C. DIV (Pin 3): Divider Setting Input. This three-level input selects one of three internal digital divider settings, determining the value of N in the frequency equation. Tie to GND for ÷1, leave floating for ÷3 and tie to V+ for ÷10. When left floating, the LTC6907 pulls Pin 3 to mid-supply with a 2.5M resistor. When Pin 3 is floating, care should be taken to reduce coupling from the OUT pin and its trace to Pin 3. Coupling can be reduced by increasing the physical space between traces or by shielding the DIV pin with grounded metal. GRD (Pin 5): Guard Signal. This pin can be used to reduce PC board leakage across the frequency setting resistor, RSET. The GRD pin is held within a few millivolts of the SET pin and shunts leakage current away from the SET pin. To control leakage, connect a bare copper trace (a trace with no solder mask) to GRD and loop it around the SET pin and all PC board metal connected to SET. Careful attention to board layout and assembly can prevent leakage currents. The use of a guard ring provides additional shielding of leakage currents from the SET pin and is optional. If unused, the GRD pin should be left unconnected. SET (Pin 4): Frequency Setting Resistor Input. Connect a resistor, RSET, from this pin to GND to set the oscillator frequency. For best performance use a precision metal or thin-film resistor of 0.1% or better tolerance and 50ppm/°C V+ (Pin 6): Voltage Supply (3V to 3.6V). A 0.1µF decoupling capacitor should be placed as close as possible to this pin for best performance. W BLOCK DIAGRA 6 2 V+ FREQUENCY-TO-CURRENT CONVERTERS V+ 5M fOSC GND IFB THREE-LEVEL INPUT DETECTOR IFB DIV 3 5M VSET ≅ VGRD ≅ 650mV VSET 4 SET RSET ISET = IFB DIVIDER SELECT VSET BUFFER 5 GRD VSET – + OP AMP VOLTAGE CONTROLLED OSCILLATOR (MASTER OSCILLATOR) fOSC = 4MHz • 150Ω DRIVER fOSC PROGRAMMABLE DIVIDER (n) (÷1, ÷3, ÷10) OUT 1 50kΩ RSET 6907 BD 6907fa 5 LTC6907 TEST CIRCUIT CTEST LTC6907 SUPPLY VOLTAGE + OUT GND GRD DIV SET V EQUIVALENT CIRCUIT OF OSCILLOSCOPE OR FREQUENCY COUNTER PROBE 0.1µF RPROBE 10M CPROBE RSET 0.01% 10ppm/°C 6907 F01 CTEST = 1/(1/5pF – 1/CPROBE) = 7.5pF FOR A 15pF SCOPE PROBE Figure 1. Test Circuit with 5pF Effective Load U U U EQUIVALE T I PUT A D OUTPUT CIRCUITS 6 V+ 6 V+ 20Ω 4 SET 6 1k 5 V+ GRD 200Ω TOTAL OUTPUT RESISTANCE 800pF 2 GND 2 6907 F02 Figure 2. V + Pin 6 GND 2 6907 F03 Figure 3. SET Pin V+ 6 DIV 6907 F04 Figure 4. GRD Pin V+ fOUT 5M 3 GND 1 OUT 150Ω 5M 2 GND 6907 F05 Figure 5. DIV Pin 2 GND 6907 F06 Figure 6. OUT Pin 6907fa 6 LTC6907 U THEORY OF OPERATIO The LTC6907 is a precision, resistor programmable oscillator (see Block Diagram). It generates a square wave at the OUT pin with a period directly proportional to the value of an external resistor, RSET. A feedback circuit measures and controls the oscillator frequency to achieve the highest possible accuracy. In equilibrum, this circuit ensures that the current in the SET pin, ISET, is balanced by IFB. IFB is proportional to the master oscillator frequency, so we have the relationship: ISET = IFB = VSET • ƒOSC • COSC (1) Where COSC is a precision internal capacitor: COSC = 5pF for the LTC6907 Solving for the oscillator period: tOSC = 1 ƒOSC = so tOSC = (2) This is the fundamental equation for the LTC6907. It holds regardless of how the SET pin is driven. When a resistor, RSET, is connected from the SET pin to ground, we have the relationship: VSET = RSET ISET ƒOSC = RSET • COSC (4) The period and frequency are determined exclusively by RSET and the precision internal capacitor. Importantly, the value of VSET is immaterial, and the LTC6907 maintains its accuracy even though VSET is not a precision reference voltage. The digital dividers shown in the Block Diagram further divide the master oscillator frequency by 1, 3 or 10 producing: ƒOUT = VSET • COSC ISET 1 ƒOSC N (5) and tOUT = N • tOSC (6) Table 1 gives specific frequency and period equations for the LTC6907. The Applications Information section gives further detail and discusses alternative ways of setting the LTC6907 output frequency. (3) Table 1. Output Frequency Equations PART NUMBER FREQUENCY LTC6907 ƒOUT 4MHz ⎛ 50k ⎞ •⎜ = N ⎝ RSET ⎟⎠ PERIOD ⎛R ⎞ tOUT = N • 250 ns • ⎜ SET ⎟ ⎝ 50k ⎠ DIVIDER RATIOS ⎧10, DIV Pin = V + ⎪ N = ⎨3, DIV Pin = Open ⎪1, DIV Pin = GND ⎩ 6907fa 7 LTC6907 U W U U APPLICATIO S I FOR ATIO 10000 The LTC6907 contains a master oscillator followed by a digital divider (see Block Diagram). RSET determines the master oscillator frequency and the three level DIV pin sets the divider ratio, N. The range of frequencies accessible in each divider ratio overlap, as shown in Figure 7. This figure is derived from the equations in Table 1. For any given frequency, power can be minimized by minimizing the master oscillator frequency. This implies maximizing RSET and using the lowest possible divider ratio, N. The relationship between RSET, N and the unloaded power consumption is shown in Figure 8. The supply current decreases for large values of RSET. Refer to the section titled “Jitter and Divide Ratio.” OUTPUT FREQUENCY (kHz) Selecting RSET and the Divider Ratio ÷1 ÷3 ÷10 1000 100 10 10 100 RSET (kΩ) 1000 6907 F07 Figure 7. RSET vs Desired Output Frequency 160 140 The supply current of the LTC6907 has four current components: 120 • Constant (Independent V+, ƒOUT and CLOAD) • Proportional to ISET (which is the current in RSET) • Proportional to V+, ƒOUT and CLOAD • Proportional to V+ and R SUPPLY CURRENT (µA) Minimizing Power Consumption ISUPPLY CLOAD = 0 V+ = 3V : DIV = –1 TA = 25°C 100 80 60 40 20 0 LOAD 10 An approximate expression for the total supply current is: 100 RSET (kΩ) 1000 6907 F08 I+ ≅ 7µA + 6 • ISET + V + • ƒOUT • (CLOAD + 5pF ) + V+ 2 • RLOAD or, in terms of VSET , V V+ I ≅ 7µA + 6 • SET + V + • ƒOUT • (CLOAD + 5pF ) + RSET 2 • RLOAD + VSET is approximately 650mV at 25°C, but varies with temperature. This behavior is shown in the Typical Performance Characteristics. Power can be minimized by maximizing RSET, minimizing the load on the OUT pin and operating at lower frequencies. Figure 9 shows total supply current vs frequency under typical conditions. Below 100kHz the load current is negligible for the 5pF load shown. Figure 8. Unloaded Supply Current vs RSET Guarding Against PC Board Leakage The LTC6907 uses relatively large resistance values for RSET to minimize power consumption. For RSET = 500k, the SET pin current is typically only 13µA. Thus, only 13nA leaking into the SET pin causes a 0.1% frequency error. Similarly, 500M of leakage resistance across RSET (1000 • RSET) causes the same 0.1% error. Achieving the highest accuracy requires controlling potential leakage paths. PC board leakage is aggravated by both dirt and moisture. Effective cleaning is a good first step to minimizing leakage. Another effective method for controlling leakage is to shunt the leakage current away from the sensitive node through a low impedance path. The LTC6907 provides a signal on the GRD pin for this purpose. Figure 10 shows a PC board 6907fa 8 LTC6907 U W U U APPLICATIO S I FOR ATIO SUPPLY CURRENT (µA) 1000 Power Supply Rejection CLOAD = 5pF T = 25°C The LTC6907 has a very low supply voltage coefficient, meaning that the output frequency is nearly insensitive to the DC power supply voltage. In most cases, this error term can be neglected. : 3.3V, –1 : 3.3V, –3 : 3.3V, –10 100 10 10 100 1000 OUTPUT FREQUENCY (kHz) 10000 6907 F09 Figure 9. Supply Current vs Frequency over DIV Settings layout that uses the GRD pin and a “guard ring” to absorb leakage currents. The guard ring surrounds the SET pin and the end of RSET to which it is connected. The guard ring must have no solder mask covering it to be effective. The GRD pin voltage is held within a few millivolts of the SET pin voltage, so any leakage path between the SET pin and the guard ring generates no leakage current. Start-Up Time When the LTC6907 is powered up, it holds the OUT pin low. After the master oscillator has settled, the OUT pin is enabled and the first output cycle is accurate. The time from power-up to the first output transition is given approximately by: tSTART ≅ 64 • tOSC + 100µs The digital divider ratio, N, does not affect the startup time. OUT V+ Operating the LTC6907 with Supplies Higher Than 3.6V The LTC6907 may also be used with supply voltages between 3.6V and 5.5V under very specific conditions. To ensure proper functioning above 3.6V, a filter circuit must be attached to the power supply and located within 1cm of the device. A simple RC filter consisting of a 100Ω resistor and 1µF capacitor (Figure 11) will ensure that supply resonance at higher supply voltages does not induce unpredictable oscillator behavior. Accuracy under higher supplies may be estimated from the typical Frequency vs Supply Voltage curves in the Typical Performance Characteristics section of this data sheet. V+ 3.6V TO 5.5V DC LTC6907 1 High frequency noise on the power supply (V+) pin has the potential to interfere with the LTC6907’s master oscillator. Periodic noise, such as that generated by a switching power supply, can shift the output frequency or increase jitter. The risk increases when the fundamental frequency or harmonics of the noise fall near the master oscillator frequency. It is relatively easy to filter the LTC6907 power supply because of the very low supply current. For example, an RC filter with R = 160Ω and C = 10µF provides a 100Hz lowpass filter while dropping the supply voltage only about 10mV. NO SOLDER MASK OVER THE GUARD RING 6 100Ω GRD 2 3 5 GND DIV SET 1µF GUARD RING 4 LTC6907 V+ OUT GND GRD DIV SET RSET RSET NO LEAKAGE CURRENT 6907 F11 Figure 11. Using the LTC6907 at Higher Supply Voltages LEAKAGE CURRENT 6907 F10 Figure 10. PC Board Layout with Guard Ring 6907fa 9 LTC6907 U W U U APPLICATIO S I FOR ATIO Alternative Methods for Setting the Output Frequency Any means of sinking current from the SET pin will control the output frequency of the LTC6907. Equation 2 (repeated below) gives the fundamental relationship between frequency and the SET pin voltage and current: tOSC = 1 ƒOSC = VSET • 5pF ISET Figure 12 and Figure 13 show a current controlled oscillator and a voltage controlled oscillator. These circuits are not highly accurate if used alone, but can be very useful if they are enclosed in an overall feedback circuit such as a phase-locked loop. (2) LTC6907 V+ This equation shows that the LTC6907 converts conductance (ISET/VSET) to frequency or, equivalently, converts resistance (RSET = VSET/ISET) to period. VSET is the voltage across an internal diode, and as such it is given approximately by: VSET ≅ VT • Loge ISET IS 4MHz TO 400kHz V+ OUT GND GRD DIV SET 10k 49.9k 6907 F12 Figure 12. Current Controlled Oscillator LTC6907 ⎛ ⎞ ISET ≅ 25.9mV • Loge ⎜ ⎟ – 2.3mV/ °C ⎝ 82 • 10 –18 A ⎠ V+ V+ OUT GND GRD DIV SET 499k where 0µA TO 11.25µA 4MHz TO 400kHz RSET 56.2k VCTRL 0V TO 0.675V (VSET) 6907 F13 VT = kT/q = 25.9mV at T = 300°K (27°C) IS ≅ 82 • 10–18 Amps (IS is also temperature dependent) VSET varies with temperature and the SET pin current. The response of VSET to temperature is shown in the Typical Performance graphs. VSET changes approximately –2.3mV/ °C. At room temperature VSET increases 18mV/octave or 60mV/decade of increase in ISET. If the SET pin is driven with a current source generating ISET, the oscillator output frequency will be: ƒOSC ≅ Figure 13. Voltage Controlled Oscillator Jitter and Divide Ratio At a given output frequency, a higher master oscillator frequency and a higher divide ratio will result in lower jitter and higher power supply dissipation. Indeterminate jitter percentage will decrease by a factor of slightly less than the square root of the divider ratio, while determinate jitter will not be similarly attenuated. Please consult the specification tables for typical jitter at various divider ratios. ISET 5pF ISET ⎛ ⎞ 25.9mV • Loge ⎜ – 2.3mV / °C ⎝ 82 • 10 –18 A ⎟⎠ 6907fa 10 LTC6907 U PACKAGE DESCRIPTIO S6 Package 6-Lead Plastic TSOT-23 (Reference LTC DWG # 05-08-1636) 0.62 MAX 2.90 BSC (NOTE 4) 0.95 REF 1.22 REF 3.85 MAX 2.62 REF 1.4 MIN 2.80 BSC 1.50 – 1.75 (NOTE 4) PIN ONE ID RECOMMENDED SOLDER PAD LAYOUT PER IPC CALCULATOR 0.30 – 0.45 6 PLCS (NOTE 3) 0.95 BSC 0.80 – 0.90 0.20 BSC 0.01 – 0.10 1.00 MAX DATUM ‘A’ 0.30 – 0.50 REF NOTE: 1. DIMENSIONS ARE IN MILLIMETERS 2. DRAWING NOT TO SCALE 3. DIMENSIONS ARE INCLUSIVE OF PLATING 0.09 – 0.20 (NOTE 3) 1.90 BSC S6 TSOT-23 0302 4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR 5. MOLD FLASH SHALL NOT EXCEED 0.254mm 6. JEDEC PACKAGE REFERENCE IS MO-193 6907fa Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 11 LTC6907 U TYPICAL APPLICATIO S Sine Wave Oscillator Trimming the Frequency Setting Frequency to 0.1% Resolution with Standard Resistors LTC6907 1MHz 0.1µF LTC6907 3V TO 3.6V 0.1µF OUT GND GRD DIV SET 3V TO 3.6V 3V TO 3.6V 0.1µF 40kHz TO 4MHz LTC6907 1k V+ V+ OUT GND GRD DIV SET 0.1µF L1 100µH ÷10 ÷3 ÷1 C1 220pF RSET 200k V+ OUT GND GRD DIV SET RA 97.6k RA RA < RB/10 1% THIN FILM RB 50k TO 500k 0.1% THIN FILM 6907 TA05 2MHz WITH ±2.5% RANGE RB 5k 6907 TA03 6907 TA04 Low Power 62.5Hz to 6.25kHz Sine Wave Generator (IQ < 1.5mA) fOSC = 400kHz TO 40kHz 3V 1 1µF 2 3 5 V+ OUT LTC6907 GND GRD DIV 56.2k 4 SET VCTRL 0V–0.6V 499k fOSC C4 1µF 74HC4520 1 3V 2 16 C2 0.1µF 10 7 8 9 15 Q1A CLOCK A Q2A ENABLE A Q3A VDD ENABLE B Q4A RESET A Q1B VSS Q2B CLOCK B Q3B RESET B Q4B 3 ÷2 4 ÷4 5 ÷8 6 ÷16 11 ÷32 12 ÷64 LTC1067-50 3V C3 0.1µF 1 2 3 R61 10k 4 R51 5.11k R31 51.1k R11 100k 6 7 R21 20k 13 ÷128 14 ÷256 5 8 V+ CLK NC AGND + – V V SA SB LPA LPB BPA BPB HPA/NA HPB/NB INV A INV B 16 15 14 R62 14k 13 R52 5.11k 12 11 R32 51.1k SINEWAVE OUT 10 9 R22 20k fSINE = fOSC 64 RH1 249k fOSC 64 RL1 51.1k 6907 TA06 CLOCK-TUNABLE LOWPASS FILTER WITH A STOPBAND NOTCH AT THE 3rd HARMONIC fOSC •3 64 ( ) RELATED PARTS PART NUMBER LTC1799 LTC6900 LTC6902 LTC6903/LTC6904 LTC6905 LTC6905-XXX LTC6906 DESCRIPTION 1kHz to 33MHz ThinSOT Oscillator, Resistor Set 1kHz to 20MHz ThinSOT Oscillator, Resistor Set Multiphase Oscillator with Spread Spectrum Modulation 1kHz to 68MHz Serial Port Programmable Oscillator 17MHz to 170MHz ThinSOT Oscillator, Resistor Set Fixed Frequency ThinSOT Oscillator Family, up to 133MHz Micropower 10kHz to 1MHz ThinSOT Oscillator, Resistor Set COMMENTS Wide Frequency Range Low Power, Wide Frequency Range 2-, 3- or 4-Phase Outputs 0.1% Frequency Resolution, I2C or SPI Interface High Frequency, 100µsec Startup, 7ps RMS Jitter No Trim Components Required 12µA Supply Current of 100kHz, 0.65% Frequency Accuracy 6907fa 12 Linear Technology Corporation LT 0506 REV A • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com © LINEAR TECHNOLOGY CORPORATION 2005
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