LTC7001
Fast 150V High Side
NMOS Static Switch Driver
FEATURES
DESCRIPTION
Wide Operating VIN: Up to 135V (150V Abs Max)
n 1Ω Pull-Down, 2.2Ω Pull-Up for Fast Turn-On and
Turn-Off Times with 35ns Propagation Delays
n Internal Charge Pump for 100% Duty Cycle
n Adjustable Turn-On Slew Rate
n Gate Driver Supply from 3.5V to 15V
n Adjustable V Overvoltage Lockout
IN
n Adjustable Driver Supply V
CC Undervoltage Lockout
n CMOS Compatible Input
n Thermally Enhanced, High Voltage Capable 10-Lead
MSOP Package
n AEC-Q100 Qualified for Automotive Applications
The LTC®7001 is a fast high side N-channel MOSFET gate
driver that operates from input voltages up to 135V. It
contains an internal charge pump that fully enhances an
external N-channel MOSFET switch, allowing it to remain
on indefinitely.
n
Its powerful driver can easily drive large gate capacitances
with very short transition times, making it well suited for
both high frequency switching applications or static switch
applications that require a fast turn-on and/or turn-off time.
The LTC7001 is available in the thermally enhanced 10-lead
MSOP package.
All registered trademarks and trademarks are the property of their respective owners.
APPLICATIONS
Static Switch Driver
Load and Supply Switch Driver
n Electronic Valve Driver
n High Frequency High Side Gate Driver
n
n
TYPICAL APPLICATION
High Voltage, High Side Switch with 100% Duty Cycle
VIN
0V TO 135V
VCC
3.5V TO 15V
VCC
LTC7001 Driving a 1nF Capacitive Load
VINP
2V/DIV
TGUP
LTC7001
TGDN
OFF ON
INP
BST
0.1µF
VCCUV
OVLO
GND
TS
LOAD
0V TO 135V
VTG-TS
5V/DIV
7001 TA01a
10ns/DIV
7001 TA01b
Rev. G
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1
LTC7001
ABSOLUTE MAXIMUM RATINGS
PIN CONFIGURATION
(Note 1)
Supply Voltages
BST-TS.................................................... –0.3V to 15V
VCC......................................................... –0.3V to 15V
TS Voltage................................................... –6V to 150V
BST Voltage ............................................. –0.3V to 150V
INP Voltage.................................................... –6V to 15V
Driver Outputs TGUP, TGDN................................ (Note 6)
VCCUV Voltage................................................. –0.3 to 6V
OVLO Voltage ............................................... –0.3V to 6V
Operating Junction Temperature Range (Notes 2, 3, 4)
LTC7001E, LTC7001I, ......................... –40°C to 125°C
LTC7001J, LTC7001H,......................... –40°C to 150°C
LTC7001MP........................................ –55°C to 150°C
Storage Temperature Range................... –65°C to 150°C
Lead Temperature (Soldering, 10 sec)
MSOP Package.................................................. 300°C
TOP VIEW
VCC 1
VCCUV 2
GND 3
INP 4
OVLO 5
11
GND
10
9
8
7
6
NC
BST
TS
TGUP
TGDN
MSE PACKAGE
10-LEAD PLASTIC MSOP
TJMAX = 150°C, θJA = 45°C/W, θJC = 10°C/W
EXPOSED PAD (PIN 11) IS GND, MUST BE SOLDERED TO PCB
ORDER INFORMATION
LEAD FREE FINISH
TAPE AND REEL
PART MARKING*
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LTC7001EMSE#PBF
LTC7001EMSE#TRPBF
LTGXD
10-Lead Plastic MSOP
–40°C to 125°C
LTC7001IMSE#PBF
LTC7001IMSE#TRPBF
LTGXD
10-Lead Plastic MSOP
–40°C to 125°C
LTC7001JMSE#PBF
LTC7001JMSE#TRPBF
LTGXD
10-Lead Plastic MSOP
–40°C to 150°C
LTC7001HMSE#PBF
LTC7001HMSE#TRPBF
LTGXD
10-Lead Plastic MSOP
–40°C to 150°C
LTC7001MPMSE#PBF
LTC7001MPMSE#TRPBF
LTGXD
10-Lead Plastic MSOP
–55°C to 150°C
LTC7001EMSE#WPBF
LTC7001EMSE#WTRPBF
LTGXD
10-Lead Plastic MSOP
–40°C to 125°C
LTC7001IMSE#WPBF
LTC7001IMSE#WTRPBF
LTGXD
10-Lead Plastic MSOP
–40°C to 125°C
LTC7001JMSE#WPBF
LTC7001JMSE#WTRPBF
LTGXD
10-Lead Plastic MSOP
–40°C to 150°C
LTC7001HMSE#WPBF
LTC7001HMSE#WTRPBF
LTGXD
10-Lead Plastic MSOP
–40°C to 150°C
AUTOMOTIVE PRODUCTS**
Contact the factory for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Tape and reel specifications. Some packages are available in 500 unit reels through designated sales channels with #TRMPBF suffix.
**Versions of this part are available with controlled manufacturing to support the quality and reliability requirements of automotive applications. These
models are designated with a #W suffix. Only the automotive grade products shown are available for use in automotive applications. Contact your
local Analog Devices account representative for specific product ordering information and to obtain the specific Automotive Reliability reports for
these models.
2
Rev. G
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LTC7001
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the specified operating
junction temperature range, otherwise specifications are at TA = 25°C (Note 2). VCC = VBST = 10V, VTS = GND = 0V, unless otherwise
noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
135
V
Input Supplies
TS Operating Voltage Range
0
Total Supply Current (Note 7)
ON or Sleep, Charge Pump Regulating
VBST=OPEN, VTS=12V
225
VCC Supply Current (Note 5)
ON Mode
Sleep Mode
VBST-TS = 13V
VINP = 4V
VINP = 0.4V
27
27
50
50
µA
μA
VCC UVLO VCC Undervoltage Lockout
VCCUV = OPEN
VCC Rising
VCC Falling
Hysteresis
VCCUV = 0V
VCC Rising
VCC Falling
Hysteresis
VCCUV = 1.5V
VCC Rising
VCC Falling
Hysteresis
µA
l
l
6.5
5.8
7.0
6.4
600
7.5
6.9
V
V
mV
l
l
3.1
2.8
3.5
3.2
300
3.7
3.4
V
V
mV
9.7
9.1
10.5
9.9
600
10.9
10.3
V
V
mV
14
14
14
Bootstrapped Supply (BST-TS)
VBST-TS
VTG Above VTS with INP = 3V (DC)
VCC = VTS = 7V, IBST = 0µA
VCC = VTS = 10V, IBST = 0µA
VTS = 135V, IBST = 0µA
l
l
9
10
10
11
12
12
V
V
V
Charge Pump Output Current
VTS = 20V, VBST-TS = 10V
l
–15
–30
µA
BST-TS Floating UVLO
VBST-TS Rising
VBST-TS Falling
3.1
2.8
V
V
Output Gate Driver (TG)
TG Pull-Up Resistance
VCC = VBST = 12V
l
2.2
7
Ω
TG Pull-Down Resistance
VCC = VBST = 12V
l
1
4
Ω
tr
Output Rise Time
10% to 90%, CL = 1nF
10% to 90%, CL = 10nF
13
90
ns
ns
tf
Output Fall Time
10% to 90%, CL = 1nF
10% to 90%, CL = 10nF
13
40
ns
ns
tPLH
tPHL
Input to Output Propagation Delay
VINP Rising, CL = 1nF
VINP Falling, CL = 1nF
l
l
Input Threshold Voltages
VINP Rising
VINP Falling
Hysteresis
l
l
Input Pull-Down Resistance
VINP = 1V
OVLO Pin Threshold Voltage
Rising
Falling
Hysteresis
35
35
70
70
ns
ns
2
1.6
400
2.2
1.8
V
V
mV
Operation
VIH
VIL
1.7
1.3
1
1.16
1.05
MΩ
1.21
1.10
110
1.26
1.15
V
V
mV
OVLO Pin Leakage Current
VOVLO = 1.3V
–100
0
100
nA
VVCCUV Pull-Up Current
VVCCUV = 1V
–11.3
–10
8.7
µA
Rev. G
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3
LTC7001
ELECTRICAL CHARACTERISTICS
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTC7001 is tested under pulsed load conditions such that
TJ ≈ TA. The LTC7001E is guaranteed to meet performance specifications
from 0°C to 85°C. Specifications over the –40°C to 125°C operating
junction temperature range are assured by design, characterization and
correlation with statistical process controls. The LTC7001I is guaranteed
over the –40°C to 125°C operating junction temperature range, the
LTC7001J is guaranteed over the –40°C to 150°C operating junction
temperature range, the LTC7001H is guaranteed over the –40°C to
150°C operating junction temperature range and is tested at 150°C, the
LTC7001MP is tested and guaranteed over the –55°C to 150°C operating
junction temperature range.
High junction temperatures degrade operating lifetimes; operating lifetime
is derated for junction temperatures greater than 125°C. Note that the
maximum ambient temperature consistent with these specifications is
determined by specific operating conditions in conjunction with board
layout, the rated package thermal impedance and other environmental
factors.
4
Note 3: The junction temperature (TJ, in °C) is calculated from the ambient
temperature (TA, in °C) and power dissipation (PD, in Watts) according to
the formula:
TJ = TA + (PD • θJA), where θJA is 45°C/W.
Note 4: This IC includes over temperature protection that is intended to
protect the device during momentary overload conditions. The maximum
rated junction temperature will be exceeded when this protection is active.
Operation above the specified absolute maximum operating junction
temperature may impair device reliability or permanently damage the
device.
Note 5: Dynamic supply current is higher due to the gate charge being
delivered at the switching frequency. See Applications Information.
Note 6: Do not apply a voltage or current source to these pins. They must
be connected to capacitive loads only; otherwise permanent damage may
occur.
Note 7: Total supply current is the sum of the current into the VCC and TS
pins.
Rev. G
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LTC7001
TYPICAL PERFORMANCE CHARACTERISTICS
Total Supply Current with External
FET ON vs TS Voltage
6
VCC = 5V
VCC = 12V
2.5
1.5
2
0.5
1
0
4
8
12
VTS (V)
16
0
20
15
6
9
VCC = 4V
11
VCC = 4V
VCC = 5V
VCC = 6V
VCC = 7V
VCC ≥ 8V
2
IBST = 0µA
0
5
10
VTS (V)
15
9
1.0
0
5
3
6
5
–1
20
15
7001 G03
VCC = 7V
VBST-TS = 10V
–5
–15
–25
–35
0
–20
7001 G04
–40
IBST (µA)
–60
–80
–45
25°C
150°C
VCCUV = OPEN
7.5
0
28
56
7001 G05
84
VTS (V)
112
140
7001 G6
Driver On Resistance vs
Temperature
VCCUV Lockout vs Temperature
8.0
9
12
VCC VOLTAGE (V)
Charge Pump Output Current vs
VTS
1
1.25
4
RISING
FALLING
VBST–TS = 12V
TGUP
TGDN
3
1.15
1.10
RISING
FALLING
0
50
100
TEMPERATURE (°C)
150
7001 G07
7.0
RESISTANCE (Ω)
VCCUV LOCKOUT (V)
1.20
1.05
–50
3
7001 G02
7
OVLO Threshold Voltage vs
Temperature
THRESHOLD VOLTAGE (V)
1.5
15
IBST (µA)
VBST-VTS (V)
6
4
12
VTS = 4V
VTS = 6V
VTS = 8V
VTS = 10V
VTS = 12V
13
8
RISING
FALLING
2.0
Charge Pump Load Regulation
10
VBST - V TS (V)
3
7001 G01
Charge Pump No-Load Output
Voltage vs VTS
VIN = VCC
2.5
0.5
VBST-TS (V)
12
0
3.0
TGUP
TGDN
3
1.0
14
Input Threshold Voltage vs VCC
Supply Voltage
4
2.0
0
VCCUV = 0V
5
RDSON (Ω)
CURRENT (mA)
Driver On Resistance vs VBST-TS
Voltage
THRESHOLD VOLTAGE (V)
3.0
TA = 25°C, unless otherwise noted.
6.5
6.0
2
1
5.5
5.0
–50
0
50
100
TEMPERATURE (°C)
150
7001 G08
0
–50
0
50
100
TEMPERATURE (°C)
150
7001 G09
Rev. G
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5
LTC7001
TYPICAL PERFORMANCE CHARACTERISTICS
VCC Supply Current vs
Temperature
Input Threshold Voltage vs
Temperature
3.0
VIN = 10V
THRESHOLD VOLTAGE (V)
CURRENT (µA)
30
25
20
2.0
1.5
1.0
RISING
FALLING
3.5
3.0
2.5
0.5
0
50
100
TEMPERATURE (°C)
150
7001 G10
6
4.0
RISING
FALLING
2.5
35
15
–50
VIN = 10V
VBST-TS Floating UVLO Voltage vs
Temperature
THRESHOLD VOLTAGE (V)
40
TA = 25°C, unless otherwise noted.
0
–50
0
50
100
TEMPERATURE (°C)
150
7001 G11
2.0
–50
0
50
100
TEMPERATURE (°C)
150
7001 G12
Rev. G
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LTC7001
PIN FUNCTIONS
VCC (Pin 1): Main Supply Pin. A bypass capacitor with a
minimum value of 0.1µF should be tied between this pin
and GND.
TGDN (Pin 6): High Current Gate Driver Pull-Down. This
pin pulls down to TS. For the fastest turn-off, tie this pin
directly to the gate of the external high side MOSFET.
VCCUV (Pin 2): VCC Supply Undervoltage Lockout. A
resistor on this pin sets the reference for the Gate Drive
undervoltage lockout. The voltage on this pin in the range
of 0.5V to 1.5V is multiplied by seven to be the undervoltage lockout for the Gate Drive (VCC pin). Short to ground
to set the minimum gate drive UVLO of 3.5V. Leave open
to set gate drive UVLO to 7.0V
TGUP (Pin 7): High Current Gate Driver Pull-Up. This
pin pulls up to BST. Tie this pin to TGDN for maximum
gate drive transition speed. A resistor can be connected
between this pin and the gate of the external MOSFET to
control the inrush current during turn-on. See Applications
Information.
GND (Pin 3, Exposed Pad Pin 11): Ground. The exposed
pad must be soldered to the PCB for rated electrical and
thermal performance.
INP (Pin 4): Input Signal. CMOS compatible input reference to GND that sets the state of TGDN and TGUP pins
(see Applications Information). INP has an internal 1MΩ
pull-down to GND to keep TGDN pulled to TS during
startup transients.
TS (Pin 8): Top (High Side) source connection or GND if
used in ground referenced applications.
BST (Pin 9): High Side Bootstrapped Supply. An external
capacitor with a minimum value of 0.1µF should be tied
between this pin and TS. Voltage swing on this pin is 12V
to (VTS + 12V).
NC (Pin 10): No Connect. This pin should be floated.
OVLO (Pin 5): Overvoltage Lockout Input. Connect to the
input supply through a resistor divider to set the lockout
level. A voltage on this pin above 1.21V causes TGDN
to be pulled to TS. Normal operation resumes when the
voltage on this pin decreases below 1.11V. OVLO should
be tied to GND when not used.
Rev. G
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7
LTC7001
BLOCK DIAGRAM
VIN
135V ABS MAX
D1*
BST
9
CB
0.1µ
PCH
TGUP
CHARGE
PUMP
VCC
3.5V TO 15V
1
LEVEL
SHIFT
UP
VCC
TGDN
7
6
M1
NCH
TS
8
LOAD
2.3V
+
10µA
2
5
VCCUV
OVLO
–
LOGIC
+
1.21V
4
NC 10
–
INP
3 GND
1M
7001 BD
*OPTIONAL
8
Rev. G
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LTC7001
TIMING DIAGRAM
INPUT RISE/FALL TIME < 10ns
INPUT (INP)
VIH
VIL
90%
10%
OUTPUT (TG-TS)
tPLH
tr
tPHL
tf
7001 TD
OPERATION
(Refer to Block Diagram)
The LTC7001 is designed to receive a ground-referenced,
low voltage digital input signal, INP and quickly drive a
high side N-channel power MOSFET whose drain can be
up to 150V above ground. The LTC7001 is capable of driving a 1nF load using a 12V bootstrapped supply voltage
(VBST –V TS) with 35ns of propagation delay and fast rise/fall
times. The high gate drive voltage reduces external power
losses associated with external MOSFET on-resistance.
The strong drivers not only provide fast turn on and off
times but hold the TGUP and TGDN to TS voltages in the
desired state in the presence of high slew rate transients
which can occur driving inductive loads at high voltages.
Internal Charge Pump
The LTC7001 contains an internal charge pump that
enables the MOSFET gate drive to have 100% duty cycle.
The charge pump regulates the BST-TS voltage to 12V
reducing external power losses associated with external
MOSFET on-resistance. The charge pump uses the higher
voltage of TS or VCC as the source for the charge.
incorporates an overtemperature shutdown feature. If the
junction temperature reaches approximately 180°C, the
LTC7001 will enter thermal shutdown mode and TGDN will
be pulled to TS. After the part has cooled below 160°C,
TGDN will be allowed to go back high. The overtemperature
level is not production tested. The LTC7001 is guaranteed
to start at temperatures below 150°C.
The LTC7001 additionally implements protection features which prohibit TGDN from going high when VCC or
(VBST –V TS) are not within proper operating ranges. By
using a resistive divider from VIN to ground the OVLO pin
can serve as a precise input supply voltage overvoltage
lockout. TGDN is pulled to TS when OVLO rises above
1.21V, so OVLO can be configured to limit switching to a
specific range on input supply voltages.
Protection Circuitry
VCC contains an undervoltage lockout feature that will
pull TGDN to TS and is configured by the VCCUV pin. If
VCCUV is open, TGDN is pulled to TS until VCC is greater
than 7.0V. By using a resistor from VCCUV to ground, the
rising undervoltage lockout on VCC can be adjusted from
3.5V to 10.5V.
When using the LTC7001, care must be taken not to exceed
any of the ratings specified in the Absolute Maximum
Ratings section. As an added safeguard, the LTC7001
An additional internal undervoltage lockout is included
that will pull TGDN to TS when the floating voltage from
BST to TS is less than 3.1V (typical).
Rev. G
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9
LTC7001
APPLICATIONS INFORMATION
Input Stage
LTC7001
The LTC7001 employs CMOS compatible input thresholds
that allow a low voltage digital signal connected to INP to
drive standard power MOSFETs. The LTC7001 contains
an internal voltage regulator which biases the input buffer
connected to INP allowing the input thresholds (VIH = 2.0V,
VIL = 1.6V) to be independent of variations in VCC. The
400mV hysteresis between VIH and VIL eliminates false
triggering due to noise events. However, care should be
taken to keep INP from any noise pickup, especially in
high frequency, high voltage applications.
BST
12V
+
AV = 1
–
Output Stage
VCC
The large gate drive voltage on TGUP and TGDN reduces
conduction losses in the external MOSFET because RDS(ON)
is inversely proportional to its gate overdrive (VGS – VTH).
10
TGUP
TGDN
30µA
1Ω
INP
HIGH
SPEED
150V
LEVEL
SHIFTER
TS
7001 F01
Figure 1. Simplified Output Stage
External Overvoltage Lockout
The OVLO pin can be configured as a precise overvoltage
(OVLO) lockout on the VIN supply with a resistive divider
from VIN to ground. A simple resistive divider can be used
as shown in Figure 2 to meet specific VIN voltage requirements. When OVLO is greater than 1.21V, TGDN will be
pulled to TS and the external MOSFET will be turned off.
A simplified version of the LTC7001 output stage is
shown in Figure 1. The pull-down device is an N-channel
MOSFET with a typical 1Ω RDS(ON) and the pull-up device
is a P-channel MOSFET with a typical 2.2Ω RDS(ON). The
pull-up and pull-down pins have been separated to allow
the turn-on transient to be controlled while maintaining
a fast turn-off.
The LTC7001 powerful output stage (1Ω pull-down and
2.2Ω pull-up) minimizes transition losses when driving
external MOSFETs and keeps the MOSFET in the state commanded by INP even if high voltage and high frequency
transients couple from the power MOSFET back to the
driving circuitry.
2.2Ω
CHARGE
PUMP
INP also contains an internal 1MΩ pull-down resistor to
ground, keeping TGDN pulled to TS during startup and
other unknown transient events.
INP has an Absolute Maximum of –6V to +15V which
allows the signal driving INP to have voltage excursions
outside the normal power supply and ground range. It is
not uncommon for signals routed with long PCB traces
and driven with fast rise/fall times to inductively ring to
voltages higher than power supply or lower than ground.
+
–
VIN
R4
LTC7001
OVLO
D5
R5
7001 F02
Figure 2. Adjustable OV Lockout
The current that flows through the R4 – R5 divider will
directly add to the current drawn from VIN and care should
be taken to minimize the impact of this current on the overall
current used by the application circuit. Resistor values in
the megaohm range may be required to keep the impact
of the quiescent shutdown and sleep currents low. To pick
resistor values, the sum total of R4 + R5 (RTOTAL) should
Rev. G
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LTC7001
APPLICATIONS INFORMATION
be chosen first based on the allowable DC current that
can be drawn from VIN. The individual values of R4 and
R5 can then be calculated from the following equations:
R5 = R TOTAL •
1.21V
Rising VIN OVLO Threshold
R4 = R TOTAL – R5
For applications that do not need a precise external OVLO
the OVLO pin is required to be tied directly to ground.
Be aware that the OVLO pin cannot be allowed to exceed
its absolute maximum rating of 6V. To keep the voltage on
the OVLO pin from exceeding 6V, the following relationship
should be satisfied:
⎛ R5 ⎞
VIN(MAX) • ⎜
< 6V
⎝ R4+R5 ⎟⎠
If the VIN(MAX) relationship for the OVLO pin cannot be
satisfied, an external 5V Zener diode should also be placed
from OVLO to ground in addition to any lockout setting
resistors.
drive level and the type of external MOSFET used. For
most applications, a capacitor value of 0.1µF for CB will
be sufficient. However, the following relationship for CB
should be maintained:
CB >
External MOSFET Q G
1V
The internal charge pump that charges the BST-TS supply
outputs approximately 30µA to the BST pin. If the time to
charge the external bootstrapped capacitor, CB from initial
power-up with the internal charge pump is not sufficient
for the application, a low reverse leakage external silicon
diode, D1 with a reverse voltage rating greater than VIN
connected between VCC and BST should be used as shown
in Figure 3. An external silicon diode between VCC and BST
should be used if the following relationship cannot be met:
C • 12V
BST Diode Required if
< B
≅ 40ms
Power-Up to INP Going High
30µA
Bootstrapped Supply (BST-TS)
LTC7001
An external bootstrapped capacitor, CB, connected between
BST and TS supplies the gate drive voltage for the MOSFET
driver. The LTC7001 keeps the BST-TS supply charged
with an internal charge pump, allowing for duty cycles
up to 100 %. When the high side external MOSFET is to
be turned on, the driver places the CB voltage across the
gate-source of the MOSFET. This enhances the high side
MOSFET and turns it on. The source of the MOSFET, TS,
rises to VIN and the BST pin follows. With the high side
MOSFET on, the BST voltage is above the input supply;
VBST = VTS + 12V. The boost capacitor, CB, supplies the
charge to turn on the external MOSFET and needs to
have at least 10 times the charge to turn on the external
MOSFET fully. The charge to turn on the external MOSFET
is referred to gate charge, QG, and is typically specified in
the external MOSFET data sheet. Gate charge can range
from 5nC to hundreds nCs and is influenced by the gate
VCC
D1
BST
CB
TS
7001 F03
Figure 3. External BST Diode
Another reason to use an external silicon diode between
VCC and BST is if the external MOSFET is switched at
frequency so high that the BST-TS supply collapses. An
external silicon diode between VCC and BST should be
used if the following relationship cannot be met:
30µA
BST Diode Required if >
≅ 500Hz
Switching Frequency
2 •MOSFET QG
Rev. G
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11
LTC7001
APPLICATIONS INFORMATION
A Schottky diode should not be used between VCC and BST,
because the reverse leakage of the Schottky diode at hot
will be more current than the charge pump can overcome.
Some example silicon diodes with low leakage include:
• MMBD1501A, Fairchild Semiconductor
VCC Undervoltage Comparator
The LTC7001 contains an adjustable undervoltage lockout
(UVLO) on the VCC voltage that pulls TGDN to TS and can
be easily programmed using a resistor (RVCCUV) between
the VCCUV pin and ground. The voltage generated on VCCUV
by RVCCUV and the internal 10µA current source set the
VCC UVLO. The rising VCC UVLO is internally limited within
the range of 3.5V and 10.5V. If VCCUV is open the rising
VCC UVLO is set internally to 7.0V. The typical value of
resistor for a particular rising VCC UVLO can be selected
using Figure 4 or the following equation:
Rising VCC UVLO
70µA
Where 3.5V < Rising VCC UVLO < 10.5V.
11
10
9
VCC UVLO (V)
8
7
6
5
4
3
2
RISING VCC UVLO
FALLING VCC UVLO
1
0
0
30 60 90 120 150 180 210 240
VCCUV RESISTOR TO GROUND (kΩ)
7000 F04
Figure 4. VCCUV Resistor Selection
12
The most important parameters in high voltage applications
for MOSFET selection are the breakdown voltage BVDSS,
on-resistance RDS(ON) and the safe operating area, SOA.
The MOSFET, when off, will see the full input range of the
input power supply plus any additional ringing than can
occur when driving an inductive load.
• CMPD3003, Central Semiconductor
R VCCUV =
MOSFET Selection
External conduction losses are minimized when using low
RDS(ON) MOSFETs. Since many high voltage MOSFETs have
higher threshold voltages (typical VTH ≥ 5V) and RDS(ON)
is directly related to the (VGS–VTH) of the MOSFET, the
LTC7001 maximum gate drive of greater than 10V makes
it an ideal solution to minimize external conduction losses
associated with external high voltage MOSFETs.
SOA is specified in Typical Characteristic curves in power
N-channel MOSFET data sheets. The SOA curves show
the relationship between the voltages and current allowed
in a timed operation of a power MOSFET without causing
damage to the MOSFET.
Limiting Inrush Current During Turn-On
Large capacitive loads such as complex electrical systems
with large bypass capacitors should be driven using the
circuit shown in Figure 5. The pull-up gate drive to the
power MOSFET from TGUP is passed through an RC delay
network, RG and CG, which greatly reduces the turn-on
ramp rate of the MOSFET. Since the MOSFET source voltage follows the gate voltage, the load is powered smoothly
from ground. This dramatically reduces the inrush current
from the source supply and reduces the transient ramp
rate of the load, allowing for slower activation of sensitive
electrical loads. The turn-off of the MOSFET is not affected
by the RC delay network as the pull-down for the MOSFET
gate is directly from the TGDN pin. Note that the voltage
rating on capacitor CG needs to be the same or higher
than the external MOSFET and CLOAD.
Rev. G
For more information www.analog.com
LTC7001
APPLICATIONS INFORMATION
Adding CG to the gate of the external MOSFET can cause
high frequency oscillation. A low power, low ohmic value
resistor (10Ω) should be placed in series with CG to
dampen the oscillations as shown in Figure 5 whenever
CG is used in an application. Alternatively, the low ohmic
value resistor can be placed in series with the gate of the
external MOSFET.
TGUP
TGDN
RG
100k
10Ω
BST
TS
CB
1µF
CB >
MOSFET Q G
+ 10 • CG
1V
Optional Schottky Diode Usage on TS
VIN
LTC7001
When CG is added to the circuit in Figure 5, the value of
the bootstrap capacitor, CB, must be increased to be able
to supply the charge to both to MOSFET gate and capacitor
CG. The relationship for CB that needs to be maintained
when CG is used is given by:
CG
47nF
LOAD
CLOAD
100µF
7001 F05
Figure 5. Powering Large Capacitive Loads
When turning off a power MOSFET that is connected to an
inductive component (inductor, long wire or complex load),
the TS pin can be pulled below ground until the current in
the inductive component has completely discharged. The
TS pin is tolerant of voltages down to –6V, however, an
optional Schottky diode with a voltage rating at least as
high as the load voltage should be connected between TS
and ground to prevent discharging the inductive through
the TS pin of the LTC7001. See Figure 6.
The values for RG and CG to limit the inrush current can
be calculated from the below equation:
IIN_RUSH ≅
VIN
LTC7001
0.7 •12V •CLOAD
RG •CG
M1A
TGUP
TGDN
L1
TS
For the values shown in Figure 5 the inrush current will be:
LOAD
D2
7001 F06
0.7 •12V •100µF
IIN_RUSH ≅
≅ 180mA
100kΩ
•
0.047µF
Figure 6. Optional Schottky Diode Usage
Correspondingly, the ramp rate at the load for the circuit
in Figure 5 is approximately:
∆VLOAD 0.7 •12V
≅
≅ 2V/ms
∆T
R
•C
G
G
Rev. G
For more information www.analog.com
13
LTC7001
APPLICATIONS INFORMATION
Reverse Current Protection
PC Board Layout Considerations
To protect the load from discharging back into VIN when
the external MOSFET is off and the VIN voltage drops below
the load voltage, two external N-channel MOSFETs should
be used and must be in a back-to-back arrangement as
shown in Figure 7. Dual N-channel packages such as the
Vishay/Siliconix Si7956DP are a good choice for space
saving designs.
1. Solder the exposed pad on the backside of the LTC7001
package directly to the ground plane of the board.
2. Limit the resistance of the TS trace, by making it short
and wide.
3. CB needs to be close to chip.
4. Always include an option in the PC board layout to place
a resistor in series with the gate of any external MOSFET.
High frequency oscillations are design dependent, and
having the option to add a series dampening resistor
can save a design iteration of the PC board.
VIN
LTC7001
TGUP
M1A
TGDN
INP
TS
M1B
LOAD
7001 F07
Figure 7. Protecting Load from Voltage Drops on VIN
14
Rev. G
For more information www.analog.com
LTC7001
TYPICAL APPLICATIONS
High Side Switch with Inrush Control and OVLO
VIN
0V TO 60V
(150V TOLERANT)
47µF
+1µF
590k
OVLO
TGUP
TGDN
12.1k
220k
IRFS4115PBF
0.47µF
LTC7001
10Ω
VCC
7V TO 15V
VCC
BST
4.7µF
INP
OFF ON
VCCUV
TS
DFLS1150
GND
LOAD
15mF
0V TO 60V
7001 TA02
High Side Switch with VCCUV and OVLO
VIN
0V TO 100V
(150V TOLERANT)
12.1k
71.5k
976k
OVLO
BSC12DN20NS3G
TGUP
TGDN
VCCUV
LTC7001
BST
VCC
5V TO 15V
VCC
OFF ON
INP
0.1µF
TS
LOAD
0V TO 100V
GND
7001 TA03
Rev. G
For more information www.analog.com
15
LTC7001
PACKAGE DESCRIPTION
MSE Package
10-Lead Plastic MSOP, Exposed Die Pad
(Reference LTC DWG # 05-08-1664 Rev I)
BOTTOM VIEW OF
EXPOSED PAD OPTION
1.88 ±0.102
(.074 ±.004)
5.10
(.201)
MIN
1
0.889 ±0.127
(.035 ±.005)
1.68 ±0.102
(.066 ±.004)
0.05 REF
10
0.305 ± 0.038
(.0120 ±.0015)
TYP
RECOMMENDED SOLDER PAD LAYOUT
3.00 ±0.102
(.118 ±.004)
(NOTE 3)
DETAIL “B”
CORNER TAIL IS PART OF
DETAIL “B” THE LEADFRAME FEATURE.
FOR REFERENCE ONLY
NO MEASUREMENT PURPOSE
10 9 8 7 6
DETAIL “A”
0° – 6° TYP
1 2 3 4 5
GAUGE PLANE
0.53 ±0.152
(.021 ±.006)
DETAIL “A”
0.18
(.007)
SEATING
PLANE
1.10
(.043)
MAX
0.17 – 0.27
(.007 – .011)
TYP
0.50
(.0197)
NOTE:
BSC
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
6. EXPOSED PAD DIMENSION DOES INCLUDE MOLD FLASH. MOLD FLASH ON E-PAD
SHALL NOT EXCEED 0.254mm (.010") PER SIDE.
16
0.497 ±0.076
(.0196 ±.003)
REF
3.00 ±0.102
(.118 ±.004)
(NOTE 4)
4.90 ±0.152
(.193 ±.006)
0.254
(.010)
0.29
REF
1.68
(.066)
3.20 – 3.45
(.126 – .136)
0.50
(.0197)
BSC
1.88
(.074)
0.86
(.034)
REF
0.1016 ±0.0508
(.004 ±.002)
MSOP (MSE) 0213 REV I
Rev. G
For more information www.analog.com
LTC7001
REVISION HISTORY
REV
DATE
DESCRIPTION
A
07/17
Clarified second paragraph in the Output Surge section.
Changed to Zener from Schottky diode (text and symbol).
PAGE NUMBER
9
9, 10
Modified equation, updated Figure 4.
11
INP = 0 in Figure 7, and wording update.
13
Schematic clarification.
14
B
10/17
Top mark corrected.
2
C
8/18
Added Note 7.
4
Removed "10" from CB Equation.
9,11
D
10/19
Added AEC-Q100 Qualification and W Flow Orderable Part Numbers.
1, 2
E
01/20
Added J-Grade.
2, 4
F
10/20
Changed AEC-Q100 Qualification to In Progress.
1
G
11/21
Changed to AEC Qualified for Automotive Applications.
1
Rev. G
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog
Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications
subject to change without notice. No license isFor
granted
implication orwww.analog.com
otherwise under any patent or patent rights of Analog Devices.
morebyinformation
17
LTC7001
TYPICAL APPLICATION
Motor Driver
VCC
6V TO 15V
0.1µF
CMPD3003
48V
BST
VCC
LTC7001
PWM - 20kHz
BSC252N10NS
TGUP
TGDN
TS
VCCUV
INP
86.6k
GND
OVLO
VS-12CWQ10FN
M
48V, 500W MOTOR
7001 TA04
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PART NUMBER
DESCRIPTION
COMMENTS
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LTC7103
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Reverse Protection to –40V, MSOP-8, 3mm × 3mm DFN-8
LTC4364
Surge Stopper with Ideal Diode
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(CL = 1nF) = 500µs, Internal Charge Pump
LTC7860
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Micropower Hot Swap Controller
2.7V to 36V Operation, ΔVSNS = 50mV, IQ = 4µA, Turn-On
(CL = 1nF) = 1ms, Internal Charge Pump
LTC3895
150V Low IQ, Synchronous Step-Down DC/DC Controller PLL Fixed Frequency 50kHz to 900kHz, 4V ≤ VIN ≤ 140V,
0.8V ≤ VOUT ≤ 60V, IQ = 40µA
LTC4380
Low Quiescent Current Surge Stopper
4V to 80V Operation, ΔVSNS = 50mV, IQ = 8µA, Turn-On = 5ms,
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High Efficiency, 150V 100mA Synchronous
Step-Down Regulator
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IQ = 12µA, MSOP-16(12)
18
Rev. G
11/21
For more information www.analog.com
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