LTC7802
40V Low IQ, 3MHz Dual, 2-Phase Synchronous
Step-Down Controller with Spread Spectrum
FEATURES
DESCRIPTION
Wide Input Voltage Range: 4.5V to 40V
n Wide Output Voltage Range: 0.8V to 99% • V
IN
n Low Operating I : 14μA (14V to 3.3V, Channel 1 On)
Q
n Spread Spectrum Operation
n R
SENSE or DCR Current Sensing
n Out-of-Phase Controllers Reduce Required Input
Capacitance and Power Supply Induced Noise
n Programmable Fixed Frequency (100kHz to 3MHz)
n Phase-Lockable Frequency (100kHz to 3MHz)
n Selectable Continuous, Pulse-Skipping, or Low
Ripple, Burst Mode® Operation at Light Loads
n Very Low Dropout Operation: 99% Duty Cycle
n Power Good Output Voltage Monitors
n Output Overvoltage Protection
n Internal LDO Powers Gate Drive from V or EXTV
IN
CC
n Low Shutdown I : 1.5μA
Q
n Small 28-Lead 4mm × 5mm QFN Package
The LTC®7802 is a high performance dual step-down
synchronous DC/DC switching regulator controller that
drives all N-channel power MOSFET stages. Constant frequency current mode architecture allows a phase-lockable
switching frequency of up to 3MHz. The LTC7802 operates from a wide 4.5V to 40V input supply range. Power
loss and supply noise are minimized by operating the two
controller output stages out-of-phase.
n
The very low no-load quiescent current extends operating runtime in battery powered systems. OPTI-LOOP
compensation allows the transient response to be optimized over a wide range of output capacitance and ESR
values. The LTC7802 features a precision 0.8V reference
and power good output indicators. The MODE pin selects
among Burst Mode operation, pulse-skipping mode, or
continuous inductor current mode at light loads.
The LTC7802 additionally features spread spectrum operation which significantly reduces the peak radiated and
conducted noise on both the input and output supplies,
making it easier to comply with electromagnetic interference (EMI) standards.
APPLICATIONS
Automotive and Transportation
Industrial
n Military/Avionics
n
n
All registered trademarks and trademarks are the property of their respective owners.
TYPICAL APPLICATION
INTV CC
VIN
4.5V TO 40V
4.7µF
RUN1 VIN RUN2 INTVCC
BOOST1
TG1
BOOST2
TG2
0.1µF
0.9µH
0.1µF
SW1
BG1
1.8µH
SW2
LTC7802
BG2
SENSE1+
SENSE2+
SENSE1–
SENSE2–
EXTVCC
3mΩ
2mΩ
VOUT1
3.3V/12A
330µF
210k
VOUT2
5V/10A
357k
68.1k
0.1µF
VFB1
ITH1
TRACK/SS1
MODE
FREQ
VFB2
ITH2
TRACK/SS2
PLLIN/SPREAD
220µF
68.1k
0.1µF
GND
7802 TA01a
Rev. 0
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1
LTC7802
ABSOLUTE MAXIMUM RATINGS
PIN CONFIGURATION
(Note 1)
TG1
PGOOD1
PLLIN/SPREAD
TRACK/SS1
ITH1
VFB1
TOP VIEW
28 27 26 25 24 23
SENSE1+ 1
22 SW1
SENSE1– 2
21 BOOST1
FREQ 3
20 BG1
GND
29
MODE 4
RUN1 5
19 VIN
18 EXTVCC
17 INTVCC
RUN2 6
SENSE2– 7
16 BG2
SENSE2+ 8
15 BOOST2
SW2
TG2
PGOOD2
TRACK/SS2
ITH2
9 10 11 12 13 14
VFB2
Input Supply Voltage (VIN).......................... –0.3V to 40V
BOOST1, BOOST2....................................... –0.3V to 46V
Switch Voltage (SW1, SW2)........................... –5V to 40V
RUN1, RUN2 Voltages................................. –0.3V to 40V
EXTVCC Voltage.......................................... –0.3V to 30V
INTVCC Voltage............................................. –0.3V to 6V
(BOOST1–SW1), (BOOST2–SW2)................. –0.3V to 6V
SENSE1+, SENSE1– Voltages....................... –0.3V to 40V
SENSE2+, SENSE2– Voltages...................... –0.3V to 40V
TRACK/SS1, VFB1 Voltages........................... –0.3V to 6V
TRACK/SS2, VFB2 Voltages........................... –0.3V to 6V
MODE, PGOOD1, PGOOD2 Voltages............. –0.3V to 6V
PLLIN/SPREAD, FREQ Voltages.................... –0.3V to 6V
ITH1, ITH2 Voltages...................................... –0.3V to 2V
BG1, BG2, TG1, TG2............................................ (Note 9)
Operating Junction Temperature Range (Notes 2, 8)
LTC7802E, LTC7802I.......................... –40°C to 125°C
LTC7802J, LTC7802H......................... –40°C to 150°C
Storage Temperature Range................... –65°C to 150°C
UFDM PACKAGE
28-LEAD (4mm × 5mm) PLASTIC QFN
TJMAX = 150°C, θJA = 43°C/W
EXPOSED PAD (PIN 29) IS GND, MUST BE SOLDERED TO PCB
ORDER INFORMATION
LEAD FREE FINISH
TAPE AND REEL
PART MARKING*
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LTC7802EUFDM#PBF
LTC7802EUFDM#TRPBF
7802
28-Lead (4mm × 5mm) Plastic QFN
−40°C to 125°C
LTC7802IUFDM#WPBF
LTC7802IUFDM#WTRPBF
7802
28-Lead (4mm × 5mm) Plastic QFN
−40°C to 125°C
LTC7802JUFDM#WPBF
LTC7802JUFDM#WTRPBF
7802
28-Lead (4mm × 5mm) Plastic QFN
−40°C to 150°C
LTC7802HUFDM#WPBF
LTC7802HUFDM#WTRPBF
7802
28-Lead (4mm × 5mm) Plastic QFN
−40°C to 150°C
AUTOMOTIVE PRODUCTS**
Contact the factory for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Tape and reel specifications. Some packages are available in 500 unit reels through designated sales channels with #TRMPBF suffix.
**Versions of this part are available with controlled manufacturing to support the quality and reliability requirements of automotive applications. These
models are designated with a #W suffix. Only the automotive grade products shown are available for use in automotive applications. Contact your
local Analog Devices account representative for specific product ordering information and to obtain the specific Automotive Reliability reports for
these models.
2
Rev. 0
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LTC7802
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C, VIN = 12V, RUN1,2 > 1.25V, EXTVCC = 0V, unless otherwise noted. (Note 2)
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Input Supply (VIN)
VIN
Input Supply Operating Range
IVIN
VIN Current in Regulation
4.5
Front Page Circuit, 14V to 3.3V,
No Load, RUN2 = 0V
40
14
V
µA
Controller Operation
VOUT1,2
Output Voltage Operating Range
VFB1,2
Regulated Feedback Voltage
0.8
(Note 4) VIN = 4.5V to 40V,
ITH1,2 Voltage = 0.6V to 1.2V
0°C to 85°C, All Grades
l
Measured at VFB1,2 Relative to
Regulated VFB1,2
gm1,2
Transconductance Amplifier gm
(Note 4) ITH1,2 = 1.2V, Sink/Source = 5μA
VSENSE(MAX)
Maximum Current Sense Threshold
VFB1,2 = 0.7V, VSENSE1,2– = 3.3V
0.800
0.800
0.812
0.808
V
V
±5
±50
nA
7
10
13
%
1.8
l
50
55
mV
–3.5
0
3.5
mV
±1
µA
Matching Between Channels
VSENSE1,2– = 3.3V
SENSE1, 2+ Pin Current
VSENSE1,2+ = 3.3V
ISENSE1–
SENSE1– Pin Current
VSENSE1– ≤ 2.8V
3.2V ≤ VSENSE1– < INTVCC – 0.5V
VSENSE1– > INTVCC + 0.5V
1
50
700
ISENSE2–
SENSE2– Pin Current
VSENSE2– = 3.3V
VSENSE2– > INTVCC + 0.5V
650
Soft-Start Charge Current
VTRACK/SS1,2 = 0V
RUN Pin ON Threshold
VRUN1,2 Rising
l
mmho
45
ISENSE1,2+
RUN Pin Hysteresis
V
0.788
0.792
Feedback Current
Feedback Overvoltage Protection Threshold
40
µA
µA
µA
±2
µA
µA
10
12.5
15
µA
1.15
1.20
1.25
V
100
mV
µA
DC Supply Current (Note 5)
VIN Shutdown Current
RUN1,2 = 0V
1.5
VIN Sleep Mode Current
VSENSE1– < 3.2V, EXTVCC = 0V
One Channel On
Both Channels On
15
18
24
30
µA
µA
Sleep Mode Current (Note 3)
Only Channel 1 On
VSENSE1– ≥ 3.2V
VIN Current, EXTVCC = 0V
VIN Current, EXTVCC ≥ 4.8V
EXTVCC Current, EXTVCC ≥ 4.8V
SENSE1– Current
5
1
5
10
9
4
10
18
µA
µA
µA
µA
Sleep Mode Current (Note 3)
Both Channels On
VSENSE1– ≥ 3.2V, EXTVCC ≥ 4.8V
VIN Current
EXTVCC Current
SENSE1– Current
1
7
12
4
14
22
µA
µA
µA
Pulse-Skipping or Forced Continuous Mode
VIN or EXTVCC Current (Note 3)
One Channel On
Both Channels On
2
3
mA
mA
Rev. 0
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3
LTC7802
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C, VIN = 12V, RUN1,2 > 1.25V, EXTVCC = 0V, unless otherwise noted. (Note 2)
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
TG or BG On-Resistance
Pull-Up
Pull-Down
2.0
1.0
Ω
Ω
TG or BG Transition Time
Rise Time
Fall Time
(Note 6)
CLOAD = 3300pF
CLOAD = 3300pF
25
15
ns
ns
TG Off to BG On Delay
Synchronous Switch-On Delay Time
CLOAD = 3300pF Each Driver
15
ns
BG Off to TG On Delay
Top Switch-On Delay Time
CLOAD = 3300pF Each Driver
15
ns
TG Minimum On-Time
(Note 7)
Maximum Duty Factor for TG
fOSC = 350kHz
Gate Drivers
tON(MIN)1,2
40
ns
98
99
%
4.9
5.1
5.3
V
1.2
1.2
2
2
%
%
4.7
4.8
V
INTVCC Low Dropout (LDO) Linear Regulator
INTVCC Regulation Point
INTVCC Load Regulation
ICC = 0mA to 100mA, VIN ≥ 6V
ICC = 0mA to 100mA, VEXTVCC ≥ 6V
EXTVCC LDO Switchover Voltage
EXTVCC Rising
4.5
EXTVCC Switchover Hysteresis
UVLO
Undervoltage Lockout
250
INTVCC Rising
INTVCC Falling
l
l
mV
4.10
3.75
4.20
3.85
4.35
4.00
V
V
320
350
380
kHz
2.0
2.25
2.5
MHz
450
100
500
3
550
kHz
kHz
MHz
3
MHz
Spread Spectrum Oscillator and Phase-Locked Loop
fOSC
Low Fixed Frequency
VFREQ = 0V, PLLIN/SPREAD = 0V
High Fixed Frequency
VFREQ = INTVCC, PLLIN/SPREAD = 0V
Programmable Frequency
RFREQ = 374kΩ, PLLIN/SPREAD = 0V
RFREQ = 75kΩ, PLLIN/SPREAD = 0V
RFREQ = 12.1kΩ, PLLIN/SPREAD = 0V
Synchronizable Frequency Range
PLLIN/SPREAD = External Clock
PLLIN Input High Level
PLLIN Input Low Level
Spread Spectrum Frequency Range
(Relative to fOSC)
l
l
0.1
l
l
2.2
0.5
PLLIN/SPREAD = INTVCC
Minimum Frequency
Maximum Frequency
–12
15
PGOOD Voltage Low
IPGOOD1,2 = 2mA
0.2
PGOOD Leakage Current
VPGOOD1,2 = 5V
PGOOD Trip Level
VFB Relative to Set Regulation Point
VFB Rising
Hysteresis
7
10
2.5
VFB Falling
Hysteresis
–13
–10
2.5
V
V
%
%
PGOOD1 and PGOOD2 Outputs
PGOOD Delay for Reporting a Fault
4
25
0.4
V
±1
µA
13
%
%
–7
%
%
µs
Rev. 0
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LTC7802
ELECTRICAL CHARACTERISTICS
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTC7802 is tested under pulsed load conditions such that TJ ≈
TA. The LTC7802E is guaranteed to meet specifications from 0°C to 85°C
junction temperature. Specifications over the –40°C to 125°C operating
junction temperature range are assured by design, characterization and
correlation with statistical process controls. The LTC7802I is guaranteed
over the –40°C to 125°C operating junction temperature range, and the
LTC7802J/LTC7802H are guaranteed over the –40°C to 150°C operating
junction temperature range. High junction temperatures degrade operating
lifetimes; operating lifetime is derated for junction temperatures greater
than 125°C. Note that the maximum ambient temperature consistent
with these specifications is determined by specific operating conditions
in conjunction with board layout, the rated package thermal impedance
and other environmental factors. The junction temperature (TJ, in °C) is
calculated from the ambient temperature (TA, in °C) and power dissipation
(PD, in Watts) according to the formula: TJ = TA + (PD • θJA), where θJA (in
°C/W) is the package thermal impedance.
Note 3: When SENSE1– ≥ 3.2V or EXTVCC ≥ 4.8V, VIN supply current
is transferred to these pins to reduce the total input supply quiescent
current. SENSE1– bias current is reflected to the channel 1 input supply by
the formula IVIN1 = ISENSE1– • VOUT1/(VIN1 • η), where η is the efficiency.
EXTVCC bias current is similarly reflected to the input supply when biased
by an output. To minimize input supply current, select channel 1 to be the
lowest output voltage greater than 3.2V and connect EXTVCC to the lowest
output voltage greater than 4.8V
Note 4: The LTC7802 is tested in a feedback loop that servos VITH1,2 to a
specified voltage and measures the resultant VFB1,2. The specification at
85°C is not tested in production and is assured by design, characterization
and correlation to production testing at other temperatures (125°C for the
LTC7802E/LTC7802I, 150°C for the LTC7802J/LTC7802H).
Note 5: Dynamic supply current is higher due to the gate charge being
delivered at the switching frequency. See Applications Information.
Note 6: Rise and fall times are measured using 10% and 90% levels. Delay
times are measured using 50% levels.
Note 7: The minimum on-time condition is specified for an inductor
peak-to-peak ripple current >40% of IL(MAX) (See Minimum On-Time
Considerations in the Applications Information section).
Note 8: This IC includes overtemperature protection that is intended to
protect the device during momentary overload conditions. The maximum
rated junction temperature will be exceeded when this protection is active.
Continuous operation above the specified absolute maximum operating
junction temperature may impair device reliability or permanently damage
the device.
Note 9: Do not apply a voltage or current source to these pins. They must
be connected to capacitive loads only, otherwise permanent damage
may occur.
Rev. 0
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5
LTC7802
TYPICAL PERFORMANCE CHARACTERISTICS
Efficiency and Power Loss
OutputCurrent
Current
vs Load
95
PULSE–SKIPPING
EFFICIENCY
80
70
10
POWER LOSS (W)
1
FCM LOSS
40
0.1
BURST
LOSS
PULSE–SKIPPING
30 LOSS
VIN = 12V 0.01
VOUT = 5V
20
10
0
0.0001
FIGURE 9 CIRCUIT
0.001
0.01
0.1
1
OUTPUT CURRENT (A)
10
Efficiency vs Input Voltage
100
VOUT = 5V
96
85
80
75
70
VIN = 8V
VIN = 16V
VIN = 24V
65
60
50
0.0001
7802 G01
0.001
0.01
0.1
1
OUTPUT CURRENT (A)
VOUT2 = 5V
94
VOUT1 = 3.3V
92
90
88
FIGURE 9 CIRCUIT
Burst Mode OPERATION
55
0.001
FIGURE 9 CIRCUIT
ILOAD1,2 = 8A
98
90
FCM EFFICIENCY
60
50
100
EFFICIENCY (%)
BURST EFFICIENCY
90
EFFICIENCY (%)
Efficiency
vs Load Current
vs
Output Current
100
EFFICIENCY (%)
100
86
10
0
10
15 20 25 30
INPUT VOLTAGE (V)
35
Load Step Forced
Continuous Mode
Load Step Pulse-Skipping Mode
VOUT
200mV/DIV
VOUT
200mV/DIV
VOUT
200mV/DIV
INDUCTOR
CURRENT
5A/DIV
INDUCTOR
CURRENT
5A/DIV
INDUCTOR
CURRENT
5A/DIV
LOAD
CURRENT
5A/DIV
LOAD
CURRENT
5A/DIV
LOAD
CURRENT
5A/DIV
7802 G04
7802 G05
50µs/DIV
VIN = 12V
VOUT = 5V
300mA TO 6A LOAD STEP
FIGURE 9 CIRCUIT
Inductor Current at Light Load
40
7802 G03
7802 G02
Load Step Burst Mode Operation
50µs/DIV
VIN = 12V
VOUT = 5V
300mA TO 6A LOAD STEP
FIGURE 9 CIRCUIT
5
7802 G06
50µs/DIV
VIN = 12V
VOUT = 5V
300mA TO 6A LOAD STEP
FIGURE 9 CIRCUIT
Regulated Feedback Voltage
vs Temperature
Soft Start-Up
FORCED
CONTINUOUS
MODE
RUN1,2
5V/DIV
VOLTAGE
VOUT2
1V/DIV
Burst Mode
OPERATION
2A/DIV
VOUT1
1V/DIV
PULSE
SKIPPING
MODE
VIN = 10V
VOUT = 5V
NO LOAD
FIGURE 9 CIRCUIT
4µs/DIV
7802 G07
1ms/DIV
7802 G08
VIN = 10V
FIGURE 9 CIRCUIT
REGULATED FEEDBACK VOLTAGE (mV)
808
806
804
802
800
798
796
794
792
–55
–25
5
35
65
95
TEMPERATURE (° C)
125
155
7802 G09
6
Rev. 0
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LTC7802
TYPICAL PERFORMANCE CHARACTERISTICS
900
40
20
10
0
–10
–20
700
500
400
300
200
0
0.2
0.4
0.6 0.8 1.0
ITH VOLTAGE (V)
1.2
0
1.4
800
60
0
5
10
15
20
25
30
35
50
40
30
20
10
100 200 300 400 500 600 700 800
FEEDBACK VOLTAGE (mV)
1.0
0.8
300
200
SENSE1– = INTVCC–0.5V
125
50
40
30
20
10
6
20
25
30
SENSE– VOLTAGE (V)
35
40
7802 G16
7802 G12
SENSE+ = 1V
–0.2
–0.4
SENSE+ = 0V
–25
5
35
65
95
TEMPERATURE (° C)
125
155
7802 G15
1.26
RFREQ = 374k (100kHz)
RFREQ = 75k (500kHz)
RFREQ = 12.5k (3MHz)
FREQ = GND (350kHz)
FREQ =INTV CC (2.25MHz)
1.24
4
2
0
–2
–6
–55
40
RUN Pin Thresholds vs
Temperature
vs Temperature
–4
15
35
SENSE+ = 3.3V
0.0
–1.0
–55
155
RUN PIN THRESHOLD (V)
CHANGE IN FREQUENCY (%)
MAXIMUM CURRENT SENSE THRESHOLD (mV)
8
60
10
0.2
Oscillator Frequency
vs Temperature
10
30
SENSE+ = 12V
0.4
7802 G14
70
25
–0.8
7802 G13
Maximum Current Sense
Threshold vs SENSE– Voltage
20
MODE = INTVCC
–0.6
SENSE2– = INTVCC–0.5V
5
35
65
95
TEMPERATURE (° C)
15
0.6
400
–25
10
SENSE1,2+ Input Current
vs
Temperature
SENSE
Current vs Temperature
500
0
5
7802 G11
600
–100
–55
0
SENSE+ VOLTAGE (V)
SENSE1,2– = INTVCC+0.5V
100
5
–0.4
–1.0
40
MODE = INTVCC
700
SENSE– CURRENT (µA)
MAXIMUM CURRENT SENSE THRESHOLD (mV)
900
0
0.0
–0.2
SENSE1,2– Input Current
vs
Temperature
SENSE
Current vs Temperature
Foldback
Foldback Current
Current Limit
Limit
0
0.2
–0.8
SENSE– VOLTAGE (V)
70
0
0.4
–0.6
100
7802 G10
0
0.6
SENSE2– CURRENT
600
MODE = INTVCC
0.8
SENSE1– CURRENT
SENSE+ CURRENT (µA)
–30
1.0
MODE = INTVCC
800
30
SENSE1,2+ Input Current
vs VSENSE Voltage
SENSE+ CURRENT (μA)
PULSE–SKIPPING
Burst Mode OPERATION
FORCED CONTINUOUS
SENSE– CURRENT (μA)
CURRENT SENSE THRESHOLD (mV)
50
SENSE1,2– Input Current
vs
VSENSECurrent
Voltagevs Voltage
SENSE
Current Sense Threshold
vs ITH Voltage
1.22
RISING
1.20
1.18
1.16
1.14
1.12
FALLING
1.10
1.08
–25
5
35
65
95
TEMPERATURE (° C)
125
155
7802 G17
1.06
–55
–25
5
35
65
95
TEMPERATURE (° C)
125
155
7802 G18
Rev. 0
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7
LTC7802
TYPICAL PERFORMANCE CHARACTERISTICS
5.0
EXTVCC = 0V
4.8
EXTVCC = 5V
4.6
4.4
4.2
4.0
0
50
100
150
200
250
INTVCC LOAD CURRENT (mA)
5.2
4.8
EXTVCC RISING
4.6
8.0
VIN CURRENT (µA)
VIN CURRENT (μA)
EXTVCC = 0V
SENSE1– = 3.3V
0
–55
–25
5
35
65
95
TEMPERATURE (° C)
125
5
35
65
95
TEMPERATURE (° C)
125
7802 G22
FALLING
3.9
–25
5
35
65
95
TEMPERATURE (° C)
155
7802 G21
TRACK/SS Pull-Up Current
vs Temperature
15
5.0
155° C
4.0
3.0
0
125
14
125° C
13
12
11
10
1.0
155
4.0
3.7
–55
155
Shutdown
Current vs VIN Voltage
IN
2.0
EXTVCC = 5V
SENSE1– = 3.3V
5
–25
6.0
EXTVCC = 0V
SENSE1– = 0V
4.1
3.8
7.0
25
RISING
4.2
7802 G20
ONLY CHANNEL 1 ON
35 SLEEP MODE
VIN = 12V
30
10
EXTVCC FALLING
4.4
7802 G19
40
15
4.3
INTVCC VOLTAGE
5.0
Quiescent Current
vs Temperature
20
4.4
VIN = 12V
4.2
–55
300
INTVCC Undervoltage Lockout
Thresholds vs Temperature
UVLO THRESHOLD (V)
EXTVCC = 6V
EXTVCC Switchover and INTVCC
Voltage
CC vs Temperature
TRACK/SS CURRENT (μA)
5.2
INTVCC VOLTAGE (V)
5.4
VIN = 12V
INTVCC OR EXTVCC VOLTAGE (V)
5.4
INTVCC Load Regulation
–55° C
0
5
10
25° C
15 20 25 30
VIN VOLTAGE (V)
35
40
7802 G23
9
–55
–25
5
35
65
95
TEMPERATURE (° C)
125
155
7802 G24
PIN FUNCTIONS
SENSE1+, SENSE2+ (Pins 1,8): The Positive (+) Input
to the Differential Current Comparators. The ITH pin
voltage and controlled offsets between the SENSE– and
SENSE+ pins in conjunction with RSENSE set the current
trip threshold.
SENSE1–, SENSE2– (Pins 2,7): The Negative (–) Input to
the Differential Current Comparators. The SENSE– pins
supply current to the current comparators when they are
greater than INTVCC. When SENSE1– is 3.2V or greater,
it also supplies the majority of the sleep mode quiescent
current instead of VIN, further reducing the input-referred
quiescent current.
8
FREQ (Pin 3): Frequency Control Pin for the Internal
Oscillator. Connect to ground to set the switching frequency to 350kHz. Connect to INTVCC to set the switching
frequency to 2.25MHz. Frequencies between 100kHz and
3MHz can be programmed using a resistor between the
FREQ pin and ground. Minimize the capacitance on this pin.
MODE (Pin 4): Mode Select Input. This input, which acts
on both channels, determines how the LTC7802 operates
at light loads. Pulling this pin to ground selects Burst
Mode operation. An internal 100k resistor to ground also
invokes Burst Mode operation when the pin is floating.
Rev. 0
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LTC7802
PIN FUNCTIONS
Tying this pin to INTVCC forces continuous inductor current operation. Tying this pin to INTVCC through a 100k
resistor selects pulse-skipping operation.
RUN1, RUN2 (Pins 5,6): Run Control Inputs for Each
Controller. Forcing either of these pins below 1.1V disables
switching of the corresponding controller. Forcing both of
these pins below 0.7V shuts down the entire LTC7802,
reducing quiescent current to approximately 1.5µA. These
pins can be tied to VIN for always-on operation. Do not
float the RUN pins.
INTVCC (Pin 17): Output of the Internal 5.1V Low Dropout
Regulator. The driver and control circuits are powered by
this supply. Must be decoupled to ground with a minimum
of 4.7μF ceramic or tantalum capacitor.
EXTVCC (Pin 18): External Power Input to an Internal LDO
Connected to INTVCC. This LDO supplies INTVCC power,
bypassing the internal LDO powered from VIN whenever
EXTVCC is higher than 4.7V. See INTVCC Regulators in the
Applications Information section. Do not exceed 30V on
this pin. Connect this pin to ground if the EXTVCC LDO
is not used.
VIN (Pin 19): Main Bias Input Supply Pin. A bypass capacitor should be tied between this pin and GND.
PLLIN/SPREAD (Pin 25): External Synchronization Input
and Spread Spectrum Selection. When an external clock
is applied to this pin, the phase-locked loop will force the
rising TG1 signal to be synchronized with the rising edge
of the external clock. When an external clock is present, the
regulators operate in pulse-skipping mode if it is selected
by the MODE pin, or in forced continuous mode otherwise.
When not synchronizing to an external clock, tie this input
to INTVCC to enable spread spectrum dithering of the oscillator or to ground to disable spread spectrum.
BG1, BG2 (Pins 20,16): High Current Gate Drives for
Bottom (Synchronous) N-Channel MOSFETs. Voltage
swing at these pins is from ground to INTVCC.
BOOST1, BOOST2 (Pins 21,15): Bootstrapped Supplies to
the Top Side Floating Drivers. Connect capacitors between
the corresponding BOOST and SW pins for each channel.
Also connect Schottky diodes between the BOOST1 and
INTVCC pins and the BOOST2 and INTVCC pins. Voltage
swing at the BOOST pins is from INTVCC to (VIN + INTVCC).
SW1, SW2 (Pins 22,14): Switch Node Connections to
Inductors.
TG1, TG2 (Pins 23,13): High Current Gate Drives for Top
N Channel MOSFETs. These are the outputs of floating
drivers with a voltage swing of INTVCC superimposed on
the switch node voltage SW.
PGOOD1, PGOOD2 (Pins 24,12): Open-Drain Power
Good Outputs. The VFB1,2 pins are monitored to ensure
that VOUT1,2 are in regulation. When VOUT is not within
±10% of its regulation point, the corresponding PGOOD
pin is pulled low.
TRACK/SS1, TRACK/SS2 (Pins 26,11): External Tracking
and Soft-Start Input. The LTC7802 regulates the VFB1,2
voltage to the lesser of 0.8V or the voltage on the TRACK/
SS1,2 pin. Internal 12.5µA pull-up current sources are
connected to these pins. A capacitor to ground sets the
start-up ramp time to the final regulated output voltage.
The ramp time is equal to 0.65ms for every 10nF of capacitance. Alternatively, a resistor divider on another voltage
supply connected to the TRACK/SS pins allows the
LTC7802 output to track the other supply during start-up.
ITH1, ITH2 (Pins 27,10): Error Amplifier Outputs and
Switching Regulator Compensation Points. Each associated channel’s current comparator trip point increases
with this control voltage. Place compensation components between the ITH pins and ground.
VFB1, VFB2 (Pins 28,9): Controller Feedback Inputs.
Connect an external resistor divider between the output
voltage and the VFB pin to set the regulated output voltage.
Tie VFB2 to INTVCC to configure the channels for a 2-phase
single output application, in which both channels share
VFB1, ITH1, and TRACK/SS1.
GND (Exposed Pad Pin 29): Ground. Connects to the
sources of the bottom N-Channel MOSFETs and the (–)
terminal(s) of decoupling capacitors. The exposed pad
must be soldered to PCB ground for rated electrical and
thermal performance.
Rev. 0
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9
LTC7802
FUNCTIONAL DIAGRAM
DUPLICATE FOR SECOND CONTROLLER CHANNEL
INTVCC
RUN
DB
–
+
1.2V
FREQ
SPREAD
SPECTRUM
OSCILLATOR
AND PLL
PLLIN/SPREAD
TOP
CLK2
DROPOUT
DETECT
CLK1
S
CIN
SW
INTVCC
R
BOT
+
0.425V
BG
SLEEP
GND
–
MODE
ICMP
100k
CB
TG
SWITCH
LOGIC
TOP ON
Q
VIN
BOOST
ALLOFF
–+
+
+– –
IR
L
2mV
RSENSE
SENSE+
VOUT1,2
COUT
+
–
SENSE–
SLOPE COMP
EA
VIN
1.4V
+
0V
5.1V
EN
+
INTVCC
–
EXTVCC LDO
5.1V
–
RC
CC2
CC1
TRACK/SS
0.88V
CSS
ALLOFF
+
–
RF2
ITH
12.5µA
–
RF1
VFB
0.8V
ITH
CLAMP
EXTVCC
4.7V
–
+
+
EN
+
VBIAS LDO
–
+
PGOOD
0.72V
7802 BD
10
Rev. 0
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LTC7802
OPERATION
(Refer to Functional Diagram)
Main Control Loop
The LTC7802 is a dual synchronous step-down (buck)
controller utilizing a constant frequency, peak current
mode architecture. The two controller channels operate 180° out of phase which reduces the required input
capacitance and power supply induced noise. During normal operation, the external top MOSFET is turned on when
the clock for that channel sets the SR latch, causing the
inductor current to increase. The main switch is turned off
when the main current comparator, ICMP, resets the SR
latch. After the top MOSFET is turned off each cycle, the
bottom MOSFET is turned on which causes the inductor
current to decrease until either the inductor current starts
to reverse, as indicated by the current comparator IR, or
the beginning of the next clock cycle.
The peak inductor current at which ICMP trips and resets
the latch is controlled by the voltage on the ITH pin, which
is the output of the error amplifier EA. The error amplifier
compares the output voltage feedback signal at the VFB
pin, (which is generated with an external resistor divider
connected across the output voltage, VOUT, to ground) to
the internal 0.8V reference voltage. When the load current
increases, it causes a slight decrease in VFB relative to the
reference,which causes the EA to increase the ITH voltage
until the average inductor current matches the new load
current.
Power and Bias Supplies (VIN, EXTVCC, and INTVCC)
The INTVCC pin supplies power for the top and bottom
MOSFET drivers and most of the internal circuitry. LDOs
(low dropout linear regulators) are available from both the
VIN and EXTVCC pins to provide power to INTVCC, which
has a regulation point of 5.1V. When the EXTVCC pin is
left open or tied to a voltage less than 4.7V, the VIN LDO
supplies power to INTVCC. If EXTVCC is taken above 4.7V,
the VIN LDO is turned off and the EXTVCC LDO is turned
on. Once enabled, the EXTVCC LDO supplies power to
INTVCC. Using the EXTVCC pin allows the INTVCC power
to be derived from a high efficiency external source such
as one of the LTC7802 switching regulator outputs.
Each top MOSFET driver is biased from the floating bootstrap capacitor CB, which normally recharges during each
cycle through an external diode when the switch voltage
goes low.
If the input voltage decreases to a voltage close to its
output, the loop may enter dropout and attempt to turn
on the top MOSFET continuously. The dropout detector
detects this and forces the top MOSFET off for a short
time every tenth cycle to allow CB to recharge, resulting in
a 99% duty cycle at 350kHz operation and approximately
98% duty cycle at 2MHz operation.
Start-Up and Shutdown (RUN and TRACK/SS Pins)
The two channels of the LTC7802 can be independently
shut down using the RUN1 and RUN2 pins. Pulling a RUN
pin below 1.1V shuts down the main control loop for that
channel. Pulling both RUN pins below 0.7V disables
both controllers and most internal circuits, including the
INTVCC LDOs. In this shutdown state, the LTC7802 draws
only 1.5μA of quiescent current.
The RUN pins may be externally pulled up or driven
directly by logic. Each pin can tolerate up to 40V (absolute maximum), so it can be conveniently tied to VIN in
always-on applications where one or both controllers are
enabled continuously and never shut down. Additionally,
a resistive divider from VIN to a RUN pin can be used to
set a precise input undervoltage lockout so that the power
supply does not operate below a user adjustable level.
The start-up of each channel’s output voltage VOUT is controlled by the voltage on the corresponding TRACK/SS
pin. When the voltage on the TRACK/SS pin is less than
the 0.8V internal reference voltage, the LTC7802 regulates
the VFB voltage to the TRACK/SS pin voltage instead of
the 0.8V reference voltage. This allows the TRACK/SS pin
to be used as a soft-start which smoothly ramps the output voltage on start-up, thereby limiting the input supply
inrush current. An external capacitor from the TRACK/
SS pin to GND is charged by an internal 12.5μA pull-up
current, creating a voltage ramp on the TRACK/SS pin. As
Rev. 0
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11
LTC7802
OPERATION
the TRACK/SS voltage rises linearly from 0V to 0.8V (and
beyond), the output voltage VOUT rises smoothly from
zero to its final value.
supplied by the SENSE1– pin, which further reduces the
input-referred quiescent current by the ratio of VIN/VOUT
multiplied by the efficiency.
Alternatively, the TRACK/SS pins can be used to make the
start-up of VOUT track that of another supply. Typically
this requires connecting to the TRACK/SS pin through an
external resistor divider from the other supply to ground
(see the Applications Information section).
In sleep mode, the load current is supplied by the output
capacitor. As the output voltage decreases, the EA’s output begins to rise. When the output voltage drops enough,
the ITH pin is reconnected to the output of the EA, the
sleep signal goes low, and the controller resumes normal
operation by turning on the top MOSFET on the next cycle
of the internal oscillator.
Light Load Operation: Burst Mode Operation, PulseSkipping, or Forced Continuous Mode (MODE Pin)
The LTC7802 can be set to enter high efficiency Burst
Mode operation, constant frequency pulse-skipping
mode or forced continuous conduction mode at low load
currents.
To select Burst Mode operation, tie the MODE pin to
ground. To select forced continuous operation, tie the
MODE pin to INTVCC. To select pulse-skipping mode, tie
the MODE pin to a DC voltage greater than 1.2V and less
than INTVCC – 1.3V. An internal 100k resistor to ground
invokes Burst Mode operation when the MODE pin is
floating and pulse-skipping mode when the MODE pin is
tied to INTVCC through an external 100k resistor.
When the controllers are enabled for Burst Mode operation, the minimum peak current in the inductor is set to
approximately 25% of its maximum value even though
the voltage on the ITH pin might indicate a lower value.
If the average inductor current is higher than the load
current, the error amplifier EA will decrease the voltage
on the ITH pin. When the ITH voltage drops below 0.425V,
the internal sleep signal goes high (enabling sleep mode)
and both external MOSFETs are turned off. The ITH pin is
then disconnected from the output of the EA and parked
at 0.45V.
In sleep mode, much of the internal circuitry is turned off,
reducing the quiescent current that the LTC7802 draws. If
one channel is in sleep mode and the other channel is shut
down, the LTC7802 draws only 15μA of quiescent current.
If both channels are in sleep mode, the LTC7802 draws
only 18μA of quiescent current. When VOUT on channel 1
is 3.2V or higher, the majority of this quiescent current is
12
When a controller is enabled for Burst Mode operation,
the inductor current is not allowed to reverse. The reverse
current comparator (IR) turns off the bottom MOSFET
just before the inductor current reaches zero, preventing
it from reversing and going negative. Thus, the controller
operates in discontinuous operation.
In forced continuous operation the inductor current is
allowed to reverse at light loads or under large transient
conditions. The peak inductor current is determined by
the voltage on the ITH pin, just as in normal operation.
In this mode, the efficiency at light loads is lower than
in Burst Mode operation. However, continuous operation
has the advantage of lower output voltage ripple and less
interference to audio circuitry. In forced continuous mode,
the output ripple is independent of load current.
When the MODE pin is connected for pulse-skipping
mode, the LTC7802 operates in PWM pulse-skipping
mode at light loads. In this mode, constant frequency
operation is maintained down to approximately 1% of
designed maximum output current. At very light loads, the
current comparator ICMP may remain tripped for several
cycles and force the top MOSFET to stay off for the same
number of cycles (i.e., skipping pulses). The inductor current is not allowed to reverse (discontinuous operation).
This mode, like forced continuous operation, exhibits low
output ripple as well as low audio noise and reduced RF
interference as compared to Burst Mode operation. It provides higher low current efficiency than forced continuous
mode, but not nearly as high as Burst Mode operation.
Unlike forced continuous mode and pulse-skipping mode,
Burst Mode cannot be synchronized to an external clock.
Rev. 0
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LTC7802
OPERATION
Therefore, if Burst Mode is selected and the switching
frequency is synchronized to an external clock applied to
the PLLIN/SPREAD pin, the LTC7802 switches from Burst
Mode to forced continuous mode.
Frequency Selection, Spread Spectrum, and PhaseLocked Loop (FREQ and PLLIN/SPREAD Pins)
The free running switching frequency of the LTC7802
controllers is selected using the FREQ pin. Tying FREQ to
GND selects 350kHz while tying FREQ to INTVCC selects
2.25MHz. Placing a resistor between FREQ and GND
allows the frequency to be programmed between 100kHz
and 3MHz.
Switching regulators can be particularly troublesome for
applications where electromagnetic interference (EMI)
is a concern. To improve EMI, the LTC7802 can operate in spread spectrum mode, which is enabled by tying
the PLLIN/SPREAD pin to INTVCC. This feature varies
the switching frequency within typical boundaries of
–12% to +15% of the frequency set by the FREQ pin.
A phase-locked loop (PLL) is available on the LTC7802
to synchronize the internal oscillator to an external
clock source connected to the PLLIN/SPREAD pin. The
LTC7802’s PLL aligns the turn-on of controller 1’s external top MOSFET to the rising edge of the synchronizing
signal. Thus, the turn-on of controller 2’s external top
MOSFET is 180° out-of-phase to the rising edge of the
external clock source.
The PLL frequency is prebiased to the free running frequency set by the FREQ pin before the external clock is
applied. If prebiased near the external clock frequency,
the PLL only needs to make slight changes in order to
synchronize the rising edge of the external clock to the
rising edge of TG1. For more rapid lock-in to the external
clock, use the FREQ pin to set the internal oscillator to
approximately the frequency of the external clock. The
LTC7802’s PLL is guaranteed to lock to an external clock
source whose frequency is between 100kHz and 3MHz.
The PLLIN/SPREAD pin is TTL compatible with thresholds
of 1.6V (rising) and 1.1V (falling) and is guaranteed to
operate with a clock signal swing of 0.5V to 2.2V.
Output Overvoltage Protection
Each channel has an overvoltage comparator that guards
against transient overshoots as well as other more serious
conditions that may overvoltage the output. When the
VFB1,2 pin rises more than 10% above its regulation point
of 0.8V, the top MOSFET is turned off and the bottom
MOSFET is turned on until the overvoltage condition is
cleared.
Foldback Current
When the output voltage falls to less than 50% of its
nominal level, foldback current limiting is activated, progressively lowering the peak current limit in proportion to
the severity of the overcurrent or short-circuit condition.
Foldback current limiting is disabled during the soft-start
interval (as long as the VFB voltage is keeping up with the
TRACK/SS1,2 voltage).
Power Good
Each channel has a PGOOD pin that is connected to an
open drain of an internal N-channel MOSFET. The MOSFET
turns on and pulls the PGOOD pin low when the VFB voltage
is not within ±10% of the 0.8V reference. The PGOOD pin
is also pulled low when the RUN pin is low (shut down).
When the VFB voltage is within the ±10% requirement, the
MOSFET is turned off and the pin is allowed to be pulled
up by an external resistor to a source no greater than 6V,
such as INTVCC.
Rev. 0
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13
LTC7802
APPLICATIONS INFORMATION
The Typical Application on the first page is a basic
LTC7802 application circuit. External component selection
is largely driven by the load requirement and begins with
the selection of the inductor, current sense components,
operating frequency, and light load operating mode. The
remaining power stage components, consisting of the
input and output capacitors, and power MOSFETs can
then be chosen. Next, feedback resistors are selected
to set the desired output voltage. Then, the remaining
external components are selected, such as for soft-start,
biasing, and loop compensation.
Inductor Value Calculation
The operating frequency and inductor selection are interrelated in that higher operating frequencies allow the use
of smaller inductor and capacitor values. So why would
anyone ever choose to operate at lower frequencies with
larger components? The answer is efficiency. A higher
frequency generally results in lower efficiency because
of MOSFET switching and gate charge losses. In addition to this basic trade-off, the effect of inductor value
on ripple current and low current operation must also
be considered. The inductor value has a direct effect on
ripple current.
The maximum average inductor current IL(MAX) is equal
to the maximum output current. The peak current is equal
to the average inductor current plus half of the inductor
ripple current, ΔIL, which decreases with higher inductance or higher frequency and increases with higher VIN:
ΔIL =
⎛ V ⎞
1
VOUT ⎜ 1− OUT ⎟
(f)(L)
VIN ⎠
⎝
Accepting larger values of ΔIL allows the use of low inductances, but results in higher output voltage ripple and
greater core losses. A reasonable starting point for setting
ripple current is ΔIL = 0.3 • IL(MAX). The maximum ΔIL
occurs at the maximum input voltage.
The inductor value also has secondary effects. The transition to Burst Mode operation begins when the average
inductor current required results in a peak current below
25% of the current limit determined by RSENSE. Lower
inductor values (higher ΔIL) will cause this to occur at
14
lower load currents, which can cause a dip in efficiency
in the upper range of low current operation.
Inductor Core Selection
Once the value for L is known, the type of inductor must
be selected. High efficiency regulators generally cannot afford the core loss found in low cost powdered
iron cores, forcing the use of more expensive ferrite or
molypermalloy cores. Actual core loss is very dependent
on inductance value selected. As inductance increases,
core losses go down. Unfortunately, increased inductance
requires more turns of wire and therefore copper losses
will increase.
Ferrite designs have very low core loss and are preferred
for high switching frequencies, so design goals can concentrate on copper loss and preventing saturation. Ferrite
core material saturates hard, which means that inductance collapses abruptly when the peak design current is
exceeded. This results in an abrupt increase in inductor
ripple current and consequent output voltage ripple. Do
not allow the core to saturate!
Current Sense Selection
The LTC7802 can be configured to use either DCR (inductor resistance) sensing or low value resistor sensing.
The choice between the two current sensing schemes
is largely a design trade-off between cost, power consumption and accuracy. DCR sensing has become popular
because it saves expensive current sensing resistors and
is more power efficient, particularly in higher current and
lower frequency applications. However, current sensing
resistors provide the most accurate current limits for the
controller. Other external component selection is driven
by the load requirement and begins with the selection of
RSENSE (if RSENSE is used) and inductor value.
The SENSE+ and SENSE– pins are the inputs to the current
comparators. The common mode voltage range on these
pins is 0V to 40V (absolute maximum), enabling the
LTC7802 to regulate output voltages up to a maximum
of 40V. The SENSE+ pin is high impedance, drawing
less than ≈1μA. This high impedance allows the current
comparators to be used in inductor DCR sensing. The
impedance of the SENSE– pin changes depending on the
Rev. 0
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LTC7802
APPLICATIONS INFORMATION
common mode voltage. When less than INTVCC – 0.5V,
these pins are relatively high impedance, drawing ≈ 1μA.
When above INTVCC + 0.5V, a higher current (≈ 650μA)
flows into each pin. Between INTVCC – 0.5V and INTVCC
+ 0.5V, the current transitions from the smaller current to
the higher current. Channel 1’s SENSE1– pin has an additional ≈ 50μA current when its voltage is above 3.2V to
bias internal circuitry from VOUT1 instead of VIN, thereby
reducing the input-referred supply current.
Filter components mutual to the sense lines should be
placed close to the LTC7802, and the sense lines should
run close together to a Kelvin connection underneath the
current sense element (shown in Figure 1). Sensing current elsewhere can effectively add parasitic inductance
and capacitance to the current sense element, degrading
the information at the sense terminals and making the
programmed current limit unpredictable. If DCR sensing
is used (Figure 2b), resistor R1 should be placed close to
the switching node, to prevent noise from coupling into
sensitive small signal nodes.
TO SENSE FILTER
NEXT TO THE CONTROLLER
CURRENT FLOW
INDUCTOR OR RSENSE
7802 F01
Figure 1. Sense Lines Placement with Inductor or Sense Resistor
Low Value Resistor Current Sensing
A typical sensing circuit using a discrete resistor is
shown in Figure 2a. RSENSE is chosen based on the
required output current. Each controller’s current comparator has a maximum threshold VSENSE(MAX) of 50mV.
The current comparator threshold voltage sets the peak
inductor current.
Using the maximum inductor current (IL(MAX)) and ripple
current (ΔIL) from the Inductor Value Calculation section,
the target sense resistor value is:
RSENSE(EQUIV) ≤
VSENSE(MAX)
ΔI
IL(MAX)+ L
2
To ensure that the application will deliver full load current over the full operating temperature range, choose
the minimum value for VSENSE(MAX) in the Electrical
Characteristics table.
To avoid potential jitter or instability due to PCB noise coupling into the current sense signal, the AC current sensing
ripple of ΔVSENSE = ΔIL • RSENSE should also be checked
to ensure a good signal-to-noise ratio. In general, for a
reasonably good PCB layout, a target ΔVSENSE voltage of
10mV to 20mV at nominal input voltage is recommended
for both RSENSE and DCR sensing applications.
The parasitic inductance (ESL) of the sense resistor
introduces significant error in the current sense signal
for lower inductor value (< 3μH) or higher current (> 5A)
applications. This error is proportional to input voltage
and may degrade line regulation or cause loop instability.
An RC filter into the sense pins, as shown in Figure 2a, can
be used to compensate for this error. Set the RC filter time
constant RF • CF =ESL/RSENSE for optimal cancellation of
the ESL. In general, select CF to be in the range of 1nF to
10nF and calculate the corresponding RF. Surface mount
sense resistors in low ESL wide footprint geometries are
recommended to minimize this error. If not specified on
the manufacturer’s data sheet, the ESL can be approximated as 0.4nH for a resistor with a 1206 footprint and
0.2nH for a 1225 footprint.
Inductor DCR Current Sensing
For applications requiring the highest possible efficiency
at high load currents, the LTC7802 is capable of sensing
the voltage drop across the inductor DCR, as shown in
Figure 2b. The DCR of the inductor represents the small
amount of DC winding resistance of the copper, which can
be less than 1mΩ for today’s low value, high current inductors. In a high current application requiring such an inductor, power loss through a sense resistor would cost several
points of efficiency compared to inductor DCR sensing.
If the external (R1||R2) • C1 time constant is chosen to be
exactly equal to the L/DCR time constant, the voltage drop
across the external capacitor is equal to the drop across
the inductor DCR multiplied by R2/(R1+R2). R2 scales the
voltage across the sense terminals for applications where
the DCR is greater than the target sense resistor value.
Rev. 0
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15
LTC7802
APPLICATIONS INFORMATION
the minimum value for VSENSE(MAX) in the Electrical
Characteristics table.
VIN1,2
TG
SENSE RESISTOR
WITH PARASITIC
INDUCTANCE
RSENSE ESL
BOOST
L
SW
LTC7802
VOUT1,2
RF*CF = ESL/RSENSE
POLE-ZERO
CANCELLATION
BG
RF
SENSE1,2+
CF
SENSE1,2–
PLACE RF AND CF NEAR SENSE PINS
Next, determine the DCR of the inductor. When provided,
use the manufacturer’s maximum value, usually given at
20°C. Increase this value to account for the temperature
coefficient of copper resistance, which is approximately
0.4%/°C. A conservative value for TL(MAX) is 100°C. To
scale the maximum inductor DCR to the desired sense
resistor value, use the divider ratio:
7802 F02a
(2a) Using a Resistor to Sense Current
VIN1,2
INDUCTOR
TG
L
SW
BG
DCR
VOUT1,2
R1
R2
SENSE1, 2–
R1! R2 =
7802 F02b
(R1||R2) • C1 = L/DCR
RSENSE(EQ) = DCR(R2/(R1+R2))
(2b) Using the Inductor DCR to Sense Current
Figure 2. Current Sensing Methods
To properly dimension the external filter components, the
DCR of the inductor must be known. It can be measured
using a good RLC meter, but the DCR tolerance is not
always the same and varies with temperature; consult
the manufacturers’ data sheets for detailed information.
Using the maximum inductor current (IL(MAX)) and ripple
current (ΔIL) from the Inductor Value Calculation section,
the target sense resistor value is:
VSENSE(MAX)
RSENSE(EQUIV) =
ΔI
ILMAX + L
2
To ensure that the application will deliver full load current over the full operating temperature range, choose
16
L
(DCR at 20°C) • C1
The sense resistor values are:
GND
*PLACE C1 NEAR SENSE PINS
DCRMAX at TL(MAX)
The target equivalent resistance R1||R2 is calculated from
the nominal inductance, C1 value, and DCR:
SENSE1, 2+
C1*
RSENSE(EQUIV)
C1 is usually selected to be in the range of 0.1μF to 0.47μF.
This forces R1||R2 to around 2k, reducing error that might
have been caused by the SENSE+ pin’s ≈1μA current.
BOOST
LTC7802
RD =
R1=
R1! R2
R1• RD
; R2 =
RD
1− RD
The maximum power loss in R1 is related to duty cycle and
occurs in continuous mode at the maximum input voltage:
PLOSS R1=
(VIN(MAX) − VOUT ) • VOUT
R1
Ensure that R1 has a power rating higher than this value.
If high efficiency is necessary at light loads, consider this
power loss when deciding whether to use DCR sensing
or sense resistors. Light load power loss can be modestly higher with a DCR network than with a sense resistor, due to the extra switching losses incurred through
R1. However, DCR sensing eliminates a sense resistor,
reduces conduction losses and provides higher efficiency
at heavy loads. Peak efficiency is about the same with
either method.
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APPLICATIONS INFORMATION
Setting the Operating Frequency
10M
In higher voltage applications transition losses contribute more significantly to power loss, and a good balance
between size and efficiency is generally achieved with a
switching frequency between 300kHz and 900kHz. Lower
voltage applications benefit from lower switching losses
and can therefore more readily operate at higher switching frequencies up to 3MHz if desired. The switching frequency is set using the FREQ and PLLIN/SPREAD pins
as shown in Table 1.
Table 1.
FREQ PIN
PLLIN/SPREAD PIN
FREQUENCY
0V
0V
350kHz
INTVCC
0V
2.25MHz
Resistor to GND
0V
100kHz to 3MHz
Any of the Above
External Clock 100kHz
to 3MHz
Phase-Locked to
External lock
Any of the Above
INTVCC
Spread Spectrum
Modulated
Tying the FREQ pin to ground selects 350kHz while tying
FREQ to INTVCC selects 2.25MHz. Placing a resistor
between FREQ and ground allows the frequency to be programmed anywhere between 100kHz and 3MHz. Choose a
FREQ pin resistor from Figure 3 or the following equation:
RFREQ (in kΩ) =
37MHz
fOSC
To improve electromagnetic interference (EMI) performance, spread spectrum mode can optionally be selected
by tying the PLLIN/SPREAD pin to INTVCC. When spread
spectrum is enabled, the switching frequency modulates
within –12% to +15% of the frequency selected by the
FREQ pin. Spread spectrum may be used in any operating
mode selected by the MODE pin (Burst Mode, pulse-skipping, or forced continuous mode).
FREQUENCY (Hz)
Selection of the operating frequency is a trade-off between
efficiency and component size. High frequency operation
allows the use of smaller inductor and capacitor values.
Operation at lower frequencies improves efficiency by
reducing gate charge and transition losses, but requires
larger inductance values and/or more output capacitance
to maintain low output ripple voltage.
1M
100k
10k
100k
FREQ PIN RESISTOR (Ω)
500k
7802 F03
Figure 3. Relationship Between Oscillator Frequency and
Resistor Value at the FREQ Pin
A phase-locked loop (PLL) is also available on the
LTC7802 to synchronize the internal oscillator to an external clock source connected to the PLLIN/SPREAD pin.
After the PLL locks, TG1 is synchronized to the rising edge
of the external clock signal, and TG2 is 180° out of phase
from TG1. See the Phase-Locked Loop and Frequency
Synchronization section for details.
Selecting the Light-Load Operating Mode
The LTC7802 can be set to enter high efficiency Burst Mode
operation, constant frequency pulse-skipping mode or
forced continuous conduction mode at light load currents.
To select Burst Mode operation, tie the MODE to ground.
To select forced continuous operation, tie the MODE pin
to INTVCC. To select pulse-skipping mode, tie the MODE
pin to INTVCC through a 100k resistor. An internal 100k
resistor from the MODE pin to ground selects Burst Mode
if the pin is floating. When synchronized to an external clock
through the PLLIN/SPREAD pin, the LTC7802 operates in
pulse-skipping mode if it is selected, or in forced continuous mode otherwise. Table 2 summarizes the use of the
MODE pin to select the light load operating mode.
Table 2.
MODE PIN
LIGHT-LOAD
OPERATING MODE
MODE WHEN
SYNCHRONIZED
0V or Floating
Burst Mode
Forced Continuous
100k to INTVCC
Pulse-Skipping
Pulse-Skipping
INTVCC
Forced Continuous
Forced Continuous
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LTC7802
APPLICATIONS INFORMATION
In general, the requirements of each application will dictate
the appropriate choice for light-load operating mode. In
Burst Mode operation, the inductor current is not allowed
to reverse. The reverse current comparator turns off the
bottom MOSFET just before the inductor current reaches
zero, preventing it from reversing and going negative.
Thus, the regulator operates in discontinuous operation.
In addition, when the load current is very light, the inductor
current will begin bursting at frequencies lower than the
switching frequency and enter a low current sleep mode
when not switching. As a result, Burst Mode operation has
the highest possible efficiency at light load.
In forced continuous mode, the inductor current is
allowed to reverse at light loads and switches at the same
frequency regardless of load. In this mode, the efficiency
at light loads is considerably lower than in Burst Mode
operation. However, continuous operation has the advantage of lower output voltage ripple and less interference
to audio circuitry. In forced continuous mode, the output
ripple is independent of load current.
In pulse-skipping mode, constant frequency operation
is maintained down to approximately 1% of designed
maximum output current. At very light loads, the PWM
comparator may remain tripped for several cycles and
force the top MOSFET to stay off for the same number of
cycles (i.e., skipping pulses). The inductor current is not
allowed to reverse (discontinuous operation). This mode,
like forced continuous operation, exhibits low output ripple as well as low audio noise and reduced RF interference
as compared to Burst Mode operation. It provides higher
light load efficiency than forced continuous mode, but not
nearly as high as Burst Mode operation. Consequently,
pulse-skipping mode represents a compromise between
light load efficiency, output ripple and EMI.
In some applications, it may be desirable to change light load
operating mode based on the conditions present in the system. For example, if a system is inactive, one might select
high efficiency Burst Mode operation by keeping the MODE
pin set to 0V. When the system wakes, one might send an
external clock to PLLIN/SPREAD, or tie MODE to INTVCC to
switch to low noise forced continuous mode. Such on-the-fly
mode changes can allow an individual application to benefit
from the advantages of each light load operating mode.
18
Power MOSFET Selection
Two external power MOSFETs must be selected for each
controller in the LTC7802: one N-channel MOSFET for
the top (main) switch and one N-channel MOSFET for
the bottom (synchronous) switch. The peak-to-peak
gate drive levels are set by the INTVCC regulation point of
5.1V. Consequently, logic level threshold MOSFETs must
be used in most applications. Pay close attention to the
BVDSS specification for the MOSFETs as well; many of the
logic level MOSFETs are limited to 30V or less.
Selection criteria for the power MOSFETs include the on
resistance RDS(ON), Miller capacitance CMILLER, input
voltage, and maximum output current. Miller capacitance,
CMILLER, can be approximated from the gate charge curve
usually provided on the MOSFET manufacturers’ data
sheet. CMILLER is equal to the increase in gate charge
along the horizontal axis while the curve is approximately
flat divided by the specified change in VDS. This result is
then multiplied by the ratio of the application applied VDS
to the gate charge curve specified VDS. When the IC is
operating in continuous mode the duty cycles for the top
and bottom MOSFETs are given by:
MAIN SWITCH DUTY CYCLE =
VOUT
VIN
SYNCHRONOUS SWITCH DUTY CYCLE =
VIN – VOUT
VIN
The MOSFET power dissipations at maximum output current are given by:
PMAIN_BUCK =
(
VOUT
I
VIN OUT(MAX)
) (1+ δ )RDS(ON) +
2
⎛ IOUT(MAX) ⎞
(VIN )2 ⎜
⎟⎠ (RDR )(CMILLER ) •
2
⎝
⎡
1
1 ⎤
+
⎢
⎥ (f)
⎣ VINTVCC − VTHMIN VTHMIN ⎦
V −V
PSYNC_BUCK = IN OUT IOUT(MAX)
VIN
(
) (1+ δ )RDS(ON)
2
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APPLICATIONS INFORMATION
where δ is the temperature dependency of RDS(ON) (δ ≈
0.005/°C) and RDR is the effective driver resistance at the
MOSFET’s Miller threshold voltage (RDR ≈ 2Ω). VTHMIN is
the typical MOSFET minimum threshold voltage.
Both MOSFETs have I2R losses while the main N-channel
equations include an additional term for transition losses,
which are highest at high input voltages. For VIN < 20V
the high current efficiency generally improves with larger
MOSFETs, while for VIN > 20V the transition losses rapidly increase to the point that the use of a higher RDS(ON)
device with lower CMILLER actually provides higher efficiency. The synchronous MOSFET losses are greatest at
high input voltage when the top switch duty factor is low
or during a short-circuit when the synchronous switch is
on close to 100% of the period.
CIN and COUT Selection
The selection of CIN is simplified by the 2-phase architecture and its impact on the worst-case RMS current
drawn through the input network (battery/fuse/capacitor).
It can be shown that the worst-case capacitor RMS current occurs when only one controller is operating. The
controller with the highest VOUT • IOUT product needs to
be used in the equation below to determine the maximum
RMS capacitor current requirement.
Increasing the output current drawn from the other controller will actually decrease the input RMS ripple current
from its maximum value. The out-of-phase technique typically reduces the input capacitor’s RMS ripple current by
a factor of 30% to 70% when compared to a single-phase
power supply solution.
In continuous mode, the source current of the top
MOSFET is a square wave of duty cycle VOUT/VIN. To prevent large voltage transients, a low ESR capacitor sized
for the maximum RMS current of one channel must be
used. At maximum load current IMAX, the maximum RMS
capacitor current is given by:
CIN Required IRMS ≈
IMAX
VIN
1/2
⎡⎣( VOUT ) ( VIN − VOUT ) ⎤⎦
This formula has a maximum at VIN = 2VOUT, where IRMS
= IOUT/2. This simple worst-case condition is commonly
used for design because even significant deviations do
not offer much relief. Note that capacitor manufacturers’
ripple current ratings are often based on only 2000 hours
of life. This makes it advisable to further derate the capacitor, or to choose a capacitor rated at a higher temperature
than required. Several capacitors may be paralleled to
meet size or height requirements in the design. Due to
the high operating frequency of the LTC7802, ceramic
capacitors can also be used for CIN. Always consult the
manufacturer if there is any question.
The benefit of the LTC7802 2-phase operation can be
calculated by using this equation for the higher power
controller and then calculating the loss that would have
resulted if both controller channels switched on at the
same time. The total RMS power lost is lower when both
controllers are operating due to the reduced overlap of
current pulses required through the input capacitor’s
ESR. This is why the input capacitor’s requirement calculated above for the worst-case controller is adequate
for the dual controller design. Also, the input protection
fuse resistance, battery resistance, and PC board trace
resistance losses are also reduced due to the reduced
peak currents in a 2-phase system. The overall benefit of
a multiphase design will only be fully realized when the
source impedance of the power supply/battery is included
in the efficiency testing.
The drains of the top MOSFETs should be placed within 1cm
of each other and share a common CIN(s). Separating the
drains and CIN may produce undesirable resonances at VIN.
A small (0.1μF to 1μF) bypass capacitor between the
chip VIN pin and ground, placed close to the LTC7802, is
also suggested. An optional 1Ω to 10Ω resistor placed
between CIN and the VIN pin provides further isolation
from a noisy input supply.
The selection of COUT is driven by the effective series
resistance (ESR). Typically, once the ESR requirement
is satisfied, the capacitance is adequate for filtering. The
output ripple (ΔVOUT) is approximated by:
⎛
1 ⎞
ΔVOUT ≈ ΔIL ⎜ ESR +
8fCOUT ⎟⎠
⎝
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19
LTC7802
APPLICATIONS INFORMATION
where f is the operating frequency, COUT is the output
capacitance and ΔIL is the ripple current in the inductor.
The output ripple is highest at maximum input voltage
since ΔIL increases with input voltage.
Setting the Output Voltage
The LTC7802 output voltages are each set by an external
feedback resistor divider carefully placed across the output, as shown in Figure 4. The regulated output voltage
is determined by:
⎛ R ⎞
VOUT = 0.8V ⎜ 1+ B ⎟
⎝ RA ⎠
VOUT
1/2 LTC7802
RB
The two channels of the LTC7802 are enabled using
the RUN1, and RUN2 pins. The RUN pins have a rising
threshold of 1.2V with 100mV of hysteresis. Pulling a
RUN pin below 1.1V shuts down the main control loop
and resets the soft-start for that channel. Pulling both
RUN pins below 0.7V disables the controllers and most
internal circuits, including the INTVCC LDOs. In this state,
the LTC7802 draws only ≈1.5μA of quiescent current.
The RUN pins are high impedance and must be externally
pulled up/down or driven directly by logic. Each RUN pin
can tolerate up to 40V (absolute maximum), so it can be
conveniently tied to VIN in always-on applications where
the controller is enabled continuously and never shut
down. Do not float the RUN pins.
The RUN pins can also be configured as precise undervoltage lockouts (UVLOs) on the input supply with a resistor divider from VIN to ground, as shown in Figure 5.
CFF
VFB
RA
The VIN UVLO thresholds can be computed as:
7802 F04
⎛ R ⎞
UVLO RISING = 1.2V ⎜ 1+ 1 ⎟
⎝ R2 ⎠
Figure 4. Setting Output Voltage
Place resistors RA and RB very close to the VFB pin to
minimize PCB trace length and noise on the sensitive VFB
node. Great care should be taken to route the VFB trace
away from noise sources, such as the inductor or the
SW trace. To improve frequency response, a feedforward
capacitor (CFF) may be used.
For applications with multiple output voltage levels, select
channel 1 to be the lowest output voltage that is greater
than 3.2V. When the SENSE1– pin (connected to VOUT1)
is above 3.2V, it biases some internal circuitry instead of
VIN, thereby increasing light load Burst Mode efficiency.
Similarly, connect EXTVCC to the lowest output voltage
that is greater than the 4.8V maximum EXTVCC rising
switch-over threshold. EXTVCC then supplies the high
current gate drivers and relieves additional quiescent
current from VIN, further reducing the VIN pin current to
≈1μA in sleep.
20
RUN Pins and Undervoltage Lockout
⎛ R ⎞
UVLO FALLING = 1.1V ⎜ 1+ 1 ⎟
⎝ R2 ⎠
VIN
1/2 LTC7802
R1
RUN
R2
7802 F06
Figure 5. Using the RUN Pins As a UVLD
The current that flows through the R1-R2 divider directly
adds to the shutdown, sleep, and active current of the
LTC7802, and care should be taken to minimize the
impact of this current on the overall efficiency of the
application circuit. Resistor values in the MΩ range may
be required to keep the impact on quiescent shutdown
and sleep currents low.
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Soft-Start and Tracking (TRACK/SS Pins)
Soft-start is enabled by simply connecting a capacitor
from the TRACK/SS pin to ground. An internal 12.5μA
current source charges the capacitor, providing a linear
ramping voltage at the TRACK/SS pin. The LTC7802 will
regulate its feedback voltage (and hence VOUT) according
to the voltage on the TRACK/SS pin, allowing VOUT to
rise smoothly from 0V to its final regulated value. For a
desired soft-start time, tSS, select a soft-start capacitor
CSS = tSS • 15μF/sec.
Alternatively, the TRACK/SS pins can be used to track two
or more supplies during start-up, as shown qualitatively
in Figure 6a and Figure 6b. To do this, a resistor divider
should be connected from the master supply (VX) to the
TRACK/SS pin of the slave supply (VOUT), as shown in
Figure 7. During start-up VOUT will track VX according to
the ratio set by the resistor divider:
OUTPUT (VOUT)
VX(MASTER)
VOUT(SLAVE)
TIME
7802 F07a
(6a) Coincident Tracking
VX(MASTER)
OUTPUT (VOUT)
The start-up of each VOUT is controlled by the voltage on
the TRACK/SS pin (TRACK/SS1 for channel 1, TRACK/
SS2 for channel 2). When the voltage on the TRACK/SS
pin is less than the internal 0.8V reference, the LTC7802
regulates the VFB pin voltage to the voltage on the TRACK/
SS pin instead of the internal reference. The TRACK/SS
pin can be used to program an external soft-start function
or to allow VOUT to track another supply during start-up.
VOUT(SLAVE)
TIME
7802 F07b
(6b) Ratiometric Tracking
Figure 6. Two Different Modes of Output Voltage Tracking
VOUT
RB
VFB
R
+R
VX
RA
=
• TRACKA TRACKB
VOUT R TRACKA
R A +RB
RA
VX
Set RTRACKA = RA and RTRACKB = RB for coincident tracking (VOUT = VX during start-up).
LTC7802
RTRACKB
TRACK/SS1,2
RTRACKA
Single Output 2-Phase Operation
For high power applications, the two channels can be
operated in a 2-phase single output configuration. The
channels switch 180° out-of-phase, which reduces the
required output capacitance in addition to the required
input capacitance and power supply induced noise. To
configure the LTC7802 for 2-phase operation, tie VFB2 to
INTVCC, ITH2 to ground, and RUN2 to RUN1.
The RUN1, VFB1, ITH1, TRACK/SS1 pins are then used
to control both channels, but each channel uses its own
ICMP and IR comparators to monitor their respective
7802 F08
Figure 7. Using the TRACK/SS Pin for Tracking
inductor currents. Figure 10 is a typical application configured for single output 2-phase operation.
INTVCC Regulators
The LTC7802 features two separate internal low dropout
linear regulators (LDOs) that supply power at the INTVCC
pin from either the VIN pin or the EXTVCC pin depending
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21
LTC7802
APPLICATIONS INFORMATION
on the EXTVCC pin voltage. INTVCC powers the MOSFET
gate drivers and most of the internal circuitry. The VIN
LDO and the EXTVCC LDO each regulate INTVCC to 5.1V
and can provide a peak current of at least 100mA.
The INTVCC pin must be bypassed to ground with a minimum of 4.7μF ceramic capacitor, placed as close as
possible to the pin. An additional 1μF ceramic capacitor
placed directly adjacent to the INTVCC and GND pins is
also highly recommended to supply the high frequency
transient currents required by the MOSFET gate drivers.
High input voltage applications in which large MOSFETs
are being driven at high frequencies may cause the maximum junction temperature rating for the LTC7802 to be
exceeded. The INTVCC current, which is dominated by the
gate charge current, may be supplied by either the VIN
LDO or the EXTVCC LDO. When the voltage on the EXTVCC
pin is less than 4.7V, the VIN LDO is enabled. Power dissipation for the IC in this case is equal to VIN • IINTVCC. The
gate charge current is dependent on operating frequency
as discussed in the Efficiency Considerations section. The
junction temperature can be estimated by using the equations given in Note 2 of the Electrical Characteristics. For
example, the LTC7802 INTVCC current is limited to less
than 35mA from a 36V supply when not using the EXTVCC
supply at a 70°C ambient temperature:
TJ = 70°C + (35mA)(36V)(43°C/W) = 125°C
To prevent the maximum junction temperature from being
exceeded, the input supply current must be checked
while operating in continuous conduction mode (MODE
= INTVCC) at maximum VIN.
When the voltage applied to EXTVCC rises above 4.7V (typical), the VIN LDO is turned off and the EXTVCC LDO is
enabled. The EXTVCC LDO remains on as long as the
voltage applied to EXTVCC remains above approximately
4.5V. The EXTVCC LDO attempts to regulate the INTVCC
voltage to 5.1V, so while EXTVCC is less than 5.1V, the
LDO is in dropout and the INTVCC voltage is approximately
equal to EXTVCC. When EXTVCC is greater than 5.1V (up
to an absolute maximum of 30V), INTVCC is regulated
to 5.1V. Using the EXTVCC LDO allows the MOSFET
driver and control power to be derived from one of the
22
LTC7802’s switching regulator outputs (4.8V ≤ VOUT ≤
30V) during normal operation and from the VIN LDO when
the output is out of regulation (e.g., start-up, short-circuit). If more current is required through the EXTVCC LDO
than is specified, an external Schottky diode can be added
between the EXTVCC and INTVCC pins. In this case, do not
apply more than 6V to the EXTVCC pin.
Significant efficiency and thermal gains can be realized
by powering INTVCC from an output, since the VIN current resulting from the driver and control currents will be
scaled by a factor of VOUT/(VIN • Efficiency). For 5V to 30V
regulator outputs, this means connecting the EXTVCC pin
directly to VOUT. Tying the EXTVCC pin to an 8.5V supply
reduces the junction temperature in the previous example
from 125°C to:
TJ = 70°C + (35mA)(8.5V)(43°C/W) = 83°C
However, for 3.3V and other low voltage outputs, additional circuitry is required to derive INTVCC power from
the output.
The following list summarizes the four possible connections for EXTVCC:
1. EXTVCC grounded. This will cause INTVCC to be powered from the internal VIN LDO resulting in an efficiency
penalty of up to 10% or more at high input voltages.
2. EXTVCC connected directly to one of the regulator outputs. This is the normal connection for an application
with an output in the range of 5V to 30V and provides
the highest efficiency. If both outputs are in the 5V to
30V range, connect EXTVCC to the lesser of the two
outputs to maximize efficiency.
3. EXTVCC connected to an external supply. If an external
supply is available, it may be used to power EXTVCC
provided that it is compatible with the MOSFET gate
drive requirements. This supply may be higher or lower
than VIN; however, a lower EXTVCC voltage results in
higher efficiency.
4. EXTVCC connected to an output-derived boost or
charge pump. For regulators where both outputs are
below 5V, efficiency gains can still be realized by connecting EXTVCC to an output-derived voltage that has
been boosted to greater than 4.8V.
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Topside MOSFET Driver Supply (CB, DB)
External bootstrap capacitors CB connected to the BOOST
pins supply the gate drive voltages for the topside MOSFETs.
Capacitor CB in the Functional Diagram is charged though
external diode DB from INTVCC when the SW pin is low.
When one of the topside MOSFETs is to be turned on, the
driver places the CB voltage across the gate-source of the
desired MOSFET. This enhances the MOSFET and turns on
the topside switch. The switch node voltage, SW, rises to
VIN and the BOOST pin follows. With the topside MOSFET
on, the boost voltage is above the input supply: VBOOST =
VIN + VINTVCC. The value of the boost capacitor CB needs
to be 100 times that of the total input capacitance of the
topside MOSFET(s). For a typical application, a value of
CB = 0.1μF is generally sufficient.
The external diode DB can be a Schottky diode or silicon diode, but in either case it should have low leakage
and fast recovery. The reverse breakdown of the diode
must be greater than VIN(MAX). Pay close attention to the
reverse leakage at high temperatures where it generally
increases substantially.
A leaky diode not only increases the quiescent current
of the regulator, but it can create current path from the
BOOST pin to INTVCC. This will cause INTVCC to rise if
the diode leakage exceeds the current consumption on
INTVCC, which is primarily a concern in Burst Mode operation where the load on INTVCC can be very small. There
is an internal voltage clamp on INTVCC that prevents the
INTVCC voltage from running away, but this clamp should
be regarded as a failsafe only.
Minimum On-Time Considerations
Minimum on-time tON(MIN) is the smallest time duration
that the LTC7802 is capable of turning on the top MOSFET.
It is determined by internal timing delays and the gate
charge required to turn on the MOSFET. Low duty cycle
applications may approach this minimum on time limit
and care should be taken to ensure that:
tON(MIN) <
VOUT
VIN • fOSC
If the duty cycle falls below what can be accommodated
by the minimum on-time, the controller will begin to
skip cycles. The output voltage will continue to be regulated, but the ripple voltage and current will increase.
The minimum on-time for the LTC7802 is approximately
40ns. However, as the peak sense voltage decreases the
minimum on-time for gradually increases up to about
60ns. This is of particular concern in forced continuous
applications with low ripple current at light loads. If the
duty cycle drops below the minimum on-time limit in this
situation, a significant amount of cycle skipping can occur
with correspondingly larger current and voltage ripple.
Fault Conditions: Current Limit and Foldback
The LTC7802 includes current foldback to reduce the load
current when the output is shorted to ground. If the output
voltage falls below 50% of its regulation point, then the
maximum sense voltage is progressively lowered from
100% to 40% of its maximum value. Under short-circuit
conditions with very low duty cycles, the LTC7802 will
begin cycle skipping to limit the short circuit current. In
this situation the bottom MOSFET dissipates most of the
power but less than in normal operation. The short-circuit
ripple current is determined by the minimum on-time,
tON(MIN) ≈ 40ns, the input voltage and inductor value:
ΔIL(SC) = tON(MIN) • VIN/L
The resulting average short-circuit current is:
ISC = 40% • ILIM(MAX) − ΔIL(SC)/2
Fault Conditions: Overvoltage Protection (Crowbar)
The overvoltage crowbar is designed to blow a system
input fuse when the output voltage of the regulator rises
much higher than nominal levels. The crowbar causes
huge currents to flow that blow the fuse to protect against
a shorted top MOSFET if the short occurs while the controller is operating.
If an output voltage rises 10% above the set regulation
point, the top MOSFET is turned off and the bottom
MOSFET is turned on until the overvoltage condition is
cleared. The bottom MOSFET remains on continuously
for as long as the overvoltage condition persists; if VOUT
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LTC7802
APPLICATIONS INFORMATION
returns to a safe level, normal operation automatically
resumes.
A shorted top MOSFET will result in a high current condition which will open the system fuse. The switching
regulator will regulate properly with a leaky top MOSFET
by altering the duty cycle to accommodate the leakage.
Fault Conditions: Overtemperature Protection
At higher temperatures, or in cases where the internal
power dissipation causes excessive self-heating (such as
a short from INTVCC to ground) internal overtemperature
shutdown circuitry will shut down the LTC7802. When
the internal die temperature exceeds 180°C, the INTVCC
LDO and gate drivers are disabled. When the die cools
to 160°C, the LTC7802 enables the INTVCC LDO and
resumes operation beginning with a soft-start startup.
Long-term overstress (TJ > 125°C) should be avoided
as it can degrade the performance or shorten the life of
the part.
Phase-Locked Loop and Frequency Synchronization
The LTC7802 has an internal phase-locked loop (PLL)
which allows the turn-on of the top MOSFET of controller
1 to be synchronized to the rising edge of an external
clock signal applied to the PLLIN/SPREAD pin. The turn
on of controller 2’s top MOSFET is thus 180° out of phase
with the external clock.
Rapid phase-locking can be achieved by using the FREQ
pin to set a free-running frequency near the desired
synchronization frequency. Before synchronization,
the PLL is prebiased to the frequency set by the FREQ
pin. Consequently, the PLL only needs to make minor
adjustments to achieve phase-lock and synchronization.
Although it is not required that the free-running frequency
be near the external clock frequency, doing so will prevent the oscillator from passing through a large range of
frequencies as the PLL locks.
When synchronized to an external clock, the LTC7802
operates in pulse-skipping mode if it is selected by the
MODE pin, or in forced continuous mode otherwise. The
LTC7802 is guaranteed to synchronize to an external
clock applied to the PLLIN/SPREAD pin that swings up
24
to at least 2.2V and down to 0.5V or less. Note that the
LTC7802 can only be synchronized to an external clock
frequency within the range of 100kHz to 3MHz.
Efficiency Considerations
The percent efficiency of a switching regulator is equal to
the output power divided by the input power times 100%.
It is often useful to analyze individual losses to determine
what is limiting the efficiency and which change would
produce the most improvement. Percent efficiency can
be expressed as:
%Efficiency = 100% – (L1 + L2 + L3 + ...)
where L1, L2, etc. are the individual losses as a percentage of input power.
Although all dissipative elements in the circuit produce
losses, four main sources usually account for most of the
losses in LTC7802 circuits: 1) IC VIN current, 2) INTVCC
regulator current, 3) I2R losses, 4) Topside MOSFET transition losses.
1. The VIN current is the DC supply current given in
the Electrical Characteristics table, which excludes
MOSFET driver and control currents. Other than at very
light loads in burst mode, VIN current typically results
in a small (1μF) supply bypass capacitors. The
discharged bypass capacitors are effectively put in parallel
with COUT, causing a rapid drop in VOUT. No regulator can
alter its delivery of current quickly enough to prevent this
sudden step change in output voltage if the load switch
resistance is low and it is driven quickly. If the ratio of
CLOAD to COUT is greater than 1:50, the switch rise time
should be controlled so that the load rise time is limited
to approximately CLOAD • 25μs/μF. Thus a 10μF capacitor
would require a 250μs rise time, limiting the charging
current to about 200mA.
Design Example
As a design example, assume VIN(NOMINAL) = 12V, VIN(MAX)
= 22V, VOUT = 3.3V, IOUT = 20A, and fSW = 1MHz.
1. Set the operating frequency. The frequency is not one
of the internal preset values, so a resistor from the
FREQ pin to GND is required, with a value of:
RFREQ (in kΩ) =
37MHz
– 37kΩ
1MHz
2. Determine the inductor value. Initially select a value
based on an inductor ripple current of 30%. The
26
inductor value can then be calculated from the following equation:
VOUT ⎛
VOUT ⎞
L=
⎜ 1–
⎟ = 0.4µH
fSW ( ΔIL ) ⎝ VIN(NOM) ⎠
The highest value of ripple current occurs at the maximum input voltage. In this case the ripple at VIN = 22V
is 35%
3. Verify that the minimum on-time of 40ns is not violated. The minimum on-time occurs at VIN(MAX):
tON(MIN) =
VOUT
= 150ns
VIN(MAX)(fSW )
This is more than sufficient to satisfy the minimum on
time requirement. If the minimum on time is violated,
the LTC7802 skips pulses at high input voltage, resulting in lower frequency operation and higher inductor
current ripple than desired. If undesirable, this behavior can be avoided by decreasing the frequency (with
the inductor value accordingly adjusted) to avoid operation near the minimum on-time.
4. Select the RSENSE resistor value. The peak inductor
current is the maximum DC output current plus half of
the inductor ripple current. Or 20A • (1+0.30/2) = 23A
in this case. The RSENSE resistor value can then be calculated based on the minimum value for the maximum
current sense threshold (45mV):
RSENSE ≤
45mV
≅ 2mΩ
23A
To allow for additional margin, a lower value RSENSE
may be used (for example, 1.8mΩ); however, be sure
that the inductor saturation current has sufficient margin above VSENSE(MAX)/RSENSE, where the maximum
value of 55mV is used for VSENSE(MAX).
For this low inductor value and high current application, an RC filter into the sense pins should be used
to compensate for the parasitic inductance (ESL) of
the sense resistor. Assuming an RSENSE geometry
of 1225 with a parasitic inductance of 0.2nH, the RC
Rev. 0
For more information www.analog.com
LTC7802
APPLICATIONS INFORMATION
filter time constant should be RC = ESL/RSENSE =
0.2nH/2mΩ = 100ns, which may be implemented with
100Ω resistor in series with the SENSE+ pin and 1nF
capacitor between SENSE+ and SENSE–.
5. Select the feedback resistors. If very light load efficiency is required, high value feedback resistors may
be used to minimize the current due to the feedback
divider. However, in most applications a feedback
divider current in the range of 10μA to 100μA or more
is acceptable. For a 50μA feedback divider current,
RA = 0.8V/50μA = 16kΩ. RB can then be calculated as
RB = RA(3.3V/0.8V – 1) = 50kΩ.
6. Select the MOSFETs. The best way to evaluate MOSFET
performance in a particular application is to build and
test the circuit on the bench, facilitated by an LTC7802
demo board. However, an educated guess about the
application is helpful to initially select MOSFETs. Since
this is a high current, low voltage application, I2R
losses will likely dominate over transition losses for the
top MOSFET. Therefore, choose a MOSFET with lower
RDS(ON) as opposed to lower gate charge to minimize
the combined loss terms. The bottom MOSFET does
not experience transition losses, and its power loss is
generally dominated by I2R losses. For this reason,
the bottom MOSFET is typically chosen to be of lower
RDS(ON) and subsequently higher gate charge than the
top MOSFET.
Due to the high current in this application, two MOSFETs
may needed in parallel to more evenly balance the dissipated power and to lower the RDS(ON). Be sure to
select logic-level threshold MOSFETs, since the gate
drive voltage is limited to 5.1V (INTVCC). Minimize the
inductance of the TG and BG gate drive traces and their
respective return paths to the controller IC (SW and
GND) by using wide traces and multiple parallel vias.
7. Select the input and output capacitors. CIN is chosen
for an RMS current rating of at least 10A (IOUT/2, with
margin) at temperature assuming only this channel
is on. COUT is chosen with an ESR of 3mΩ for low
output ripple. Multiple capacitors connected in parallel
may be required to reduce the ESR to this level. The
output ripple in continuous mode will be highest at the
maximum input voltage. The output voltage ripple due
to ESR is approximately:
VORIPPLE = ESR • ∆IL = 3mΩ • 6A = 18mVP-P
On the 3.3V output, this is equal to 0.55% of peak to
peak voltage ripple.
8. Determine the bias supply components. Since the regulated output is not greater than the EXTVCC switchover threshold (4.7V), it cannot be used to bias INTVCC.
However, if another supply is available, for example
if the other channel is regulating to 5V, connect that
supply to EXTVCC to improve the efficiency.
For a 6.5ms soft-start, select a 0.1μF capacitor for the
TRACK/SS pin. As a first pass estimate for the bias
components, select CINTVCC = 4.7μF, boost supply
capacitor CB = 0.1μF and low forward drop boost supply diode CMDSH-4E from Central Semiconductor.
9. Determine and set application-specific parameters.
Set the MODE pin based on the trade-off of light load
efficiency and constant frequency operation. Set the
PLLIN/SPREAD pin based on whether a fixed, spread
spectrum, or phase-locked frequency is desired. The
RUN pin can be used to control the minimum input
voltage for regulator operation or can be tied to VIN
for always-on operation. Use ITH compensation components from the typical applications as a first guess,
check the transient response for stability, and modify
as necessary.
PC Board Layout Checklist
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of
the IC. Figure 8 illustrates the current waveforms present
in the various branches of the synchronous regulators
operating in the continuous mode. Check the following
in your layout:
1. Are the top N-channel MOSFETs located within 1cm of
each other with a common drain connection at CIN?
Decoupling capacitors for the two channels they should
be close to each other to avoid a large resonant loop.
Rev. 0
For more information www.analog.com
27
LTC7802
APPLICATIONS INFORMATION
SW1
L1
HOT
LOOP
RSENSE1
VOUT1
COUT1
RL1
VIN
RIN
CIN
SW2
BOLD LINES INDICATE
HIGH SWITCHING
CURRENT. KEEP LINES
TO A MINIMUM LENGTH.
HOT
LOOP
L2
RSENSE2
VOUT2
COUT2
RL2
7802 F09
Figure 8. Branch Current Waveforms for Bucks
2. Are the signal and power grounds kept separate?
The combined IC ground pin and the ground return
of CINTVCC must return to the combined COUT (–) terminals. The area of the “hot loop” formed by the top
N-channel MOSFET, bottom N-channel MOSFET and the
high frequency (ceramic) input capacitors, as shown
in Figure 8, should be minimized with short leads, planar connections, and multiple paralleled vias where
needed. The output capacitor (–) terminals should be
connected as close as possible to the (–) terminals of
the input capacitor.
3. Do the LTC7802 VFB pins’ resistive dividers connect to
the (+) terminals of COUT? The resistive divider must
be connected between the (+) terminal of COUT and
signal ground. Place the divider close to the VFB pin to
minimize noise coupling into the sensitive VFB node.
28
The feedback resistor connections should not be along
the high current input feeds from the input capacitor(s).
4. Are the SENSE– and SENSE+ leads routed together with
minimum PC trace spacing? Route these traces away
from the high frequency switching nodes, on an inner
layer if possible. The filter capacitor between SENSE+
and SENSE– should be as close as possible to the IC.
Ensure accurate current sensing with Kelvin connections at the sense resistor.
5. Is the INTVCC decoupling capacitor connected close
to the IC, between the INTVCC and the power ground
pin? This capacitor carries the MOSFET drivers’ current peaks. An additional 1μF ceramic capacitor placed
immediately next to the INTVCC and GND pins can help
improve noise performance substantially. The boost
diodes should have separate routes directly to the
INTVCC capacitor near the IC, not shared with any signal connections to INTVCC.
Rev. 0
For more information www.analog.com
LTC7802
APPLICATIONS INFORMATION
6. Keep the switching nodes (SW1, SW2), top gate nodes
(TG1, TG2), and boost nodes (BOOST1, BOOST2) away
from sensitive small-signal nodes, especially from the
other channel’s voltage and current sensing feedback
pins. All of these nodes have very large and fast-moving
signals and therefore should be kept on the output side
of the LTC7802 and occupy minimum PC trace area.
Minimize the inductance of the TG and BG gate drive
traces and their respective return paths to the controller
IC (SW and GND) by using wide traces and multiple
parallel vias.
7. Use a modified star ground technique: a low impedance, large copper area central grounding point on the
same side of the PC board as the input and output
capacitors with tie-ins for the bottom of the INTVCC
decoupling capacitor, the bottom of the voltage feedback resistive divider and the GND pin of the IC.
For more detailed layout guidance, see Analog Devices
Application Notes AN136 “PCB Layout Considerations
for Non-Isolated Switching Power Supplies” and AN139
“Power Supply Layout and EMI”.
PC Board Layout Debugging
Start with one controller on at a time. It is helpful to use
a DC-50MHz current probe to monitor the current in the
inductor while testing the circuit. Monitor the output
switching node (SW pin) to synchronize the oscilloscope
to the internal oscillator and probe the actual output
voltage as well. Check for proper performance over the
operating voltage and current range expected in the application. The frequency of operation should be maintained
over the input voltage range down to dropout and until
the output load drops below the low current operation
threshold—typically 25% of the maximum designed current level in Burst Mode operation.
The duty cycle percentage should be maintained from
cycle to cycle in a well-designed, low noise PCB implementation. Variation in the duty cycle at a subharmonic
rate can suggest noise pickup at the current or voltage
sensing inputs or inadequate loop compensation.
Overcompensation of the loop can be used to tame a
poor PC layout if regulator bandwidth optimization is not
required. Only after each controller is checked for its individual performance should both controllers be turned on
at the same time. A particularly difficult region of operation is when one controller channel is nearing its current
comparator trip point when the other channel is turning
on its top MOSFET. This occurs around 50% duty cycle
on either channel due to the phasing of the internal clocks
and may cause minor duty cycle jitter.
Reduce VIN from its nominal level to verify operation
of the regulator in dropout. Check the operation of the
undervoltage lockout circuit by further lowering VIN while
monitoring the outputs to verify operation. Investigate
whether any problems exist only at higher output currents or only at higher input voltages. If problems coincide
with high input voltages and low output currents, look for
capacitive coupling between the BOOST, SW, TG, and possibly BG connections and the sensitive voltage and current
pins. The capacitor placed across the current sensing pins
needs to be placed immediately adjacent to the pins of
the IC. This capacitor helps to minimize the effects of differential noise injection due to high frequency capacitive
coupling. If problems are encountered with high current
output loading at lower input voltages, look for inductive
coupling between CIN, the top MOSFET, and the bottom
MOSFET components to the sensitive current and voltage
sensing traces. In addition, investigate common ground
path voltage pickup between these components and the
GND pin of the IC.
An embarrassing problem, which can be missed in an
otherwise properly working switching regulator, results
when the current sensing leads are hooked up backwards.
The output voltage under this improper hookup will still
be maintained but the advantages of current mode control
will not be realized. Compensation of the voltage loop
will be much more sensitive to component selection. This
behavior can be investigated by temporarily shorting out
the current sensing resistor—don’t worry, the regulator
will still maintain control of the output voltage.
Rev. 0
For more information www.analog.com
29
LTC7802
TYPICAL APPLICATIONS
VIN
4.5V TO 38V
+
INTVCC
CIN
100µF
63V
10µF
×3
INTVCC
VIN
RUN1
D1
MTOP1
L1
0.9µH
0.1µF
BOOST1
BOOST2
SW2
+
COUT1
330µF
6.3V
BG2
MBOT2
LTC7802
2mΩ
100µF
×2
L2
1.8µH
0.1µF
BG1
20Ω
VOUT1
3.3V, 12A
MTOP2
TG2
SW1
MBOT1
D2
RUN2
TG1
SENSE1+
SENSE2+
SENSE1–
SENSE2–
3mΩ
1nF
1nF
EXTVCC
210k
VFB2
VFB1
ITH2
ITH1
68.1k
COUT2
330µF
6.3V
VOUT2
5V*, 10A
100µF
×2
68.1k
TRACK/SS2
TRACK/SS1
4.5k
357k
PGOOD2
PGOOD1
+
11k
0.1µF
0.1µF
3.3nF
100pF
4.7µF
PLLIN/SPREAD
FREQ
INTVCC
MODE
GND
100pF
3.3nF
fSW = 350kHz
7802 F09a
L1: WURTH 744355090
L2: WURTH 744313180
MTOP1,2: INFINEON BSC059N04LS6
MBOT1,2: INFINEON BSC022N04LS6
D1,2: CENTRAL SEMI CMDSH-4E
CIN: SUNCON 63CE100LX
COUT1,2: KEMET T520V337M006ATE015
*VOUT2 FOLLOWS VIN WHEN VIN < 5V
No-Load Burst Mode Input
Current vs Input Voltage
Efficiency vs Load Current
100
50
BOTH CHANNELS ON
BURST MODE OPERATION
VIN CURRENT (µA)
EFFICIENCY (%)
VOUT2
5V/DIV
40
90
85
80
VOUT1 = 3.3V
VIN = 12V
VIN = 24V
VIN = 36V
75
70
ONLY CHANNEL 1 ON
BOTH CHANNELS ON
45
95
Short-Circuit Response
0
3
VOUT2 = 5V
VIN = 12V
VIN = 24V
VIN = 36V
6
9
LOAD CURRENT (A)
35
INDUCTOR
CURRENT
5A/DIV
30
25
20
15
VIN = 12V
10
100µs/DIV
5
12
7802 F09b
0
FORCED CONTINUOUS MODE
5
10
15
20
25
30
VIN VOLTAGE (V)
35
7802 F09d
40
7802 F09c
Figure 9. High Efficiency Dual 3.3V, 5V Step-Down Regulator with Spread Spectrum
30
Rev. 0
For more information www.analog.com
LTC7802
TYPICAL APPLICATIONS
INTVCC
VIN
4.5V TO 38V
12V NOMINAL
+
D1
VIN
10µF
100µF
BOOST1
RUN1
MTOP1
TG1
RUN2
0.1µF
L1, 0.16µH
SW1
VFB2
INTVCC
VIN
LTC7802
BG1
MODE
FREQ
MBOT1
150Ω
SENSE1+
INTVCC
3mΩ
1nF
4.7µF
SENSE1–
SENSE2–
PGOOD1
1nF
PGOOD2
150Ω
SENSE2+
ITH1
3mΩ
210k
4.7µF
×6
+
VOUT
3.3V, 24A
COUT
470µF
4V
VFB1
6k
INTVCC
TRACK/SS1
47pF
0.1µF
ITH2
470pF
68.1k
D2
VIN
BOOST2
MTOP2
TG2
TRACK/SS2
L2, 0.16µH
0.1µF
PLLIN/SPREAD
SW2
EXTVCC
BG2
GND
MBOT2
7802 F10a
fSW = 2.25MHz
MTOP1,2: INFINEON BSC059N04LS6
MBOT1,2: INFINEON BSC022N04LS6
L1,2: COILCRAFT XAL5030-161ME
D1,2: INFINEON BAS140WE6327HTSA1
COUT: KEMET T520D477M004ATE012
Load Step Transient Response
Efficiency vs Load Current
95
VOUT
200mV/DIV
Output Voltage Noise Spectrum
0
FORCED CONTINUOUS OPERATION
DETECTOR = PEAK-HOLD
–10 RBW = 9.1kHz
90
INDUCTOR L2
CURRENT
10A/DIV
10µs/DIV
VIN = 15V
0A TO 15A LOAD STEP
7802 F10b
–20
AMPLITUDE (dBm)
EFFICIENCY (%)
INDUCTOR L1
CURRENT
10A/DIV
85
80
75
VIN = 8V
VIN = 12V
VIN = 24V
70
65
0
5
10
15
20
LOAD CURRENT (A)
25
30
PLLIN/SPREAD = GND
–30
PLLIN/SPREAD = INTVCC
–40
–50
–60
–70
–80
–90
–100
1
2
7802 F10c
3
4
5
6
7
FREQUENCY (MHz)
8
9
10
7802 F10d
Figure 10. 2.25MHz 2-Phase Single Output 3.3V, 24A Step-Down Regulator
Rev. 0
For more information www.analog.com
31
LTC7802
TYPICAL APPLICATIONS
VIN
4.5V TO 38V
+
INTVCC
CIN
100µF
63V
4.7µF
×4
MTOP1
INTVCC
VIN
RUN1
D1
TG1
L1
1µH
0.1µF
BOOST2
SW2
+
COUT1
220µF
4V
BG2
MBOT2
LTC7802
3mΩ
100µF
SENSE1+
SENSE2+
SENSE1–
SENSE2–
60Ω
2.2nF
22pF
34k
L2
0.2µH
0.1µF
BG1
33Ω
VOUT1
2.5V, 10A
MTOP2
TG2
BOOST1
SW1
MBOT1
D2
RUN2
PGOOD1
ITH2
TRACK/SS1
0.1µF
47pF
INTVCC
4.7µF
COUT2
470µF
2.5V
VOUT2
1V, 20A
100µF
×3
5k
0.1µF
FREQ
PLLIN/SPREAD
+
60.4k
TRACK/SS2
MODE
1.5nF
15k
VFB2
ITH1
8k
22pF
PGOOD2
VFB1
16k
1.5mΩ
2.2nF
47pF
EXTVCC
3.3nF
75k
GND
fSW = 500kHz
7802 F11a
L1: WURTH 744311100
L2: WURTH 744308020
COUT1: KEMET T520V227M004ATE007
COUT2: KEMET T520V477M2R5ATE006
CIN: SUNCON 63HVPF100M
Operating Waveforms
at VIN = 36V
VOUT1 Efficiency vs Load Current
FORCED CONTINUOUS OPERATION
VOUT1 = 2.5V
EFFICIENCY (%)
100
VSW1
20V/DIV
90
VSW2
20V/DIV
70
INDUCTOR L2
CURRENT
5A/DIV
60
VIN = 6V
VIN = 12V
VIN = 24V
0
2
4
6
8
LOAD CURRENT (A)
10
VOUT2 Efficiency vs Load Current
FORCED CONTINUOUS OPERATION
VOUT2 = 1V
90
INDUCTOR L1
CURRENT
5A/DIV
80
50
IN
EFFICIENCY (%)
100
MTOP1: VISHAY SIR426DP
MTOP2: VISHAY SIJA72ADP
MBOT1,2: VISHAY SIR640ADP
D1,2: CENTRAL SEMI CMDSH-4E
400ns/DIV
VIN = 36V
5A LOAD ON EACH CHANNEL
12
7802 F11b
7802 F11c
80
70
60
50
VIN = 6V
VIN = 12V
VIN = 24V
0
5
10
15
LOAD CURRENT (A)
20
25
7802 F11d
Figure 11. High Efficiency 500kHz 1V, 20A and 2.5V, 10A Regulator with Spread Spectrum
32
Rev. 0
For more information www.analog.com
LTC7802
PACKAGE DESCRIPTION
UFDM Package
28-Lead Plastic Side Wettable QFN (4mm × 5mm)
(Reference LTC DWG # 05-08-1682 Rev Ø)
0.75 ±0.05
4.00 ±0.10
(2 SIDES)
PIN 1 NOTCH
R = 0.20 OR 0.35
× 45° CHAMFER
2.50 REF
R = 0.115
TYP
R = 0.05
TYP
27
28
0.40 ±0.10
PIN 1
TOP MARK
(NOTE 6)
1
2
5.00 ±0.10
(2 SIDES)
3.50 REF
3.65 ±0.10
DETAIL A
2.65 ±0.10
(UFDM28) QFN 1218 REV Ø
0.25 ±0.05
0.200 REF
0.50 BSC
0.00 – 0.05
BOTTOM VIEW—EXPOSED PAD
NOTE:
1. DRAWING NOT TO SCALE
2. ALL DIMENSIONS ARE IN MILLIMETERS
3. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
4. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON THE TOP AND BOTTOM OF PACKAGE
DETAIL A
TERMINAL LENGTH
0.40 ± 0.10
0.10 REF
0.05 REF
0.203 REF
TERMINAL THICKNESS
PLATED AREA
0.70 ±0.05
4.50 ±0.05
3.10 ±0.05
2.50 REF
2.65 ±0.05
3.65 ±0.05
PACKAGE OUTLINE
0.25 ±0.05
0.50 BSC
3.50 REF
4.10 ±0.05
5.50 ±0.05
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog
Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications
subject to change without notice. No license For
is granted
implication or
otherwise under any patent or patent rights of Analog Devices.
more by
information
www.analog.com
33
LTC7802
TYPICAL APPLICATION
VIN
16V TO 38V
INTVCC
+
VIN
D1
VIN
10µF
100µF
BOOST1
RUN1
MTOP1
TG1
RUN2
INTVCC
VFB2
0.1µF
L1, 4.7µH
SW1
LTC7802
MODE
INTVCC
MBOT1
BG1
SENSE1+
4.7µF
2mΩ
1nF
SENSE1–
EXTVCC
SENSE2–
VFB1
ITH1
INTVCC
185k
10nF
COUT
330µF
16V
VIN
BOOST2
FREQ
TG2
ITH2
100pF
10µF
×6
VOUT
12V, 30A
10k
D2
TRACK/SS1
0.1µF
140k
SENSE2+
PGOOD2
5.9k
2mΩ
1nF
PGOOD1
+
10pF
MTOP2
0.1µF
TRACK/SS2
L2, 4.7µH
SW2
PLLIN/SPREAD
GND
BG2
MBOT2
7802 F12a
fSW = 200kHz
MTOP1,2: VISHAY SIJA72ADP
MBOT1,2: VISHAY SIR640ADP
L1,2: COILCRAFT XAL1510-472MEB
D1,2: CENTRAL SEMI CMDSH-4E
COUT: KEMET T521X337M016ATE025
Figure 12. High Efficiency 360W 2-Phase Single Output 12V Step-Down Regulator
RELATED PARTS
PART NUMBER
DESCRIPTION
LTC7802-3.3
40V Dual Low IQ, 3MHz, 2-Phase Synchronous Step-Down 4.5V ≤ VIN ≤ 40V, VOUT Up to 40V, IQ = 12µA Fixed Frequency
Controller with Spread Spectrum and Fixed 3.3VOUT1
100kHz to 3MHz, 4mm × 5mm QFN-28
LTC7803
40V Low IQ, 100% Duty Cycle, Synchronous Step-Down
Controller with Spread Spectrum
4.5V ≤ VIN ≤ 40V, VOUT Up to 40V, IQ = 12µA Fixed Frequency
100kHz to 3MHz, 3mm × 3mm QFN-16/MSOP-16
LTC3807
38V Low IQ, Synchronous Step-Down Controller with
24V Output Voltage Capability
4V ≤ VIN ≤ 38V, 0.8V ≤ VOUT ≤ 24V, IQ = 50µA PLL Fixed Frequency
50kHz to 900kHz, 3mm × 4mm QFN-20/TSSOP-20
LTC3890/LTC3890-1/ 60V, Low IQ, Dual 2-Phase Synchronous Step-Down
LTC3890-2/LTC3890-3 DC/DC Controller with 99% Duty Cycle
4V ≤ VIN ≤ 60V, 0.8V ≤ VOUT ≤ 24V, IQ = 50µA PLL Fixed Frequency
50kHz to 900kHz
LTC3892
60V Low IQ, Dual, 2-Phase Synchronous Step-Down
DC/DC Controller with Adjustable Gate Drive Voltage
4V ≤ VIN ≤ 60V, 0.8V ≤ VOUT ≤ 24V, IQ = 29µA PLL Fixed Frequency
50kHz to 900kHz
LTC3850
Dual, 2-Phase Synchronous Step-Down DC/DC Controller
4V ≤ VIN ≤ 24V, VOUT Up to 5.5V PLL Fixed Frequency 250kHz to 750kHz
LTC3855
Dual, Multiphase, Synchronous Step-Down DC/DC Controller
with Diff Amp and DCR Temperature Compensation
4.5V ≤ VIN ≤ 38V, 0.8V ≤ VOUT ≤ 12V PLL Fixed Frequency 250kHz
to 770kHz, Excellent Current Share
LTC3869/LTC3869-2
Dual Output, 2-Phase Synchronous Step-Down DC/DC
Controller, with Accurate Current Share
4V ≤ VIN ≤ 38V, VOUT Up to 12.5V PLL Fixed 250kHz to 750kHz
Frequency
LTC3875
Dual, 2-Phase, Synchronous Controller with Sub-Milliohm 4.75V ≤ VIN ≤ 38V, 0.6V ≤ VOUT ≤ 3.5V/5V, Excellent Current Share
DCR Sensing and Temperature Compensation
LTC3774
Dual, Multiphase Current Mode Synchronous Step-Down
DC/DC Controller for Sub-Milliohm DCR Sensing
34
COMMENTS
Operates with DrMOS, Power Blocks or External Drivers/MOSFETs,
4.5V≤ VIN ≤ 38V, 0.6V ≤ VOUT ≤ 3.5V
Rev. 0
09/20
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