LTM4600
10A High Efficiency
DC/DC µModule
Features
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Description
Complete Switch Mode Power Supply
Wide Input Voltage Range: 4.5V to 20V
10A DC, 14A Peak Output Current
Parallel Two µModule® DC/DC Converters for 20A
Output Current
0.6V to 5V Output Voltage
1.5% Output Voltage Regulation
Ultrafast Transient Response
Current Mode Control
RoHS Compliant Package
Up to 92% Efficiency
Programmable Soft-Start
Output Overvoltage Protection
Optional Short-Circuit Shutdown Timer
Small Footprint, Low Profile (15mm × 15mm ×
2.82mm) Surface Mount LGA Package
Applications
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Telecom and Networking Equipment
Servers
Industrial Equipment
Point of Load Regulation
L, LT, LTC, LTM, µModule and OPTI-LOOP are registered trademarks of Linear Technology
Corporation. All other trademarks are the property of their respective owners. Protected by U.S.
Patents including 5481178, 6100678, 6580258, 5847554, 6304066.
The LTM®4600 is a complete 10A, DC/DC step down power
supply. Included in the package are the switching controller, power FETs, inductor, and all support components.
Operating over an input voltage range of 4.5V to 20V, the
LTM4600 supports an output voltage range of 0.6V to 5V,
set by a single resistor. This high efficiency design delivers
10A continuous current (14A peak), needing no heat sinks
or airflow to meet power specifications. Only bulk input
and output capacitors are needed to finish the design.
The low profile package (2.82mm) enables utilization of
unused space on the bottom of PC boards for high density
point of load regulation. High switching frequency and an
adaptive on-time current mode architecture enables a very
fast transient response to line and load changes without
sacrificing stability. Fault protection features include
integrated overvoltage and short circuit protection with
a defeatable shutdown timer. A built-in soft-start timer is
adjustable with a small capacitor.
The LTM4600 is packaged in a compact (15mm × 15mm)
and low profile (2.82mm) over-molded Land Grid Array
(LGA) package suitable for automated assembly by standard surface mount equipment. The LTM4600 is RoHS
compliant.
Typical Application
Efficiency vs Load Current
with 12VIN (FCB = 0)
100
10A µModule Power Supply with 4.5V to 20V Input
CIN
VIN
VOUT
LTM4600
VOSET
PGND SGND
VOUT
1.5V
10A
COUT
66.5k
80
EFFICIENCY (%)
VIN
4.5V TO 20V
90
70
60
50
40
4600 TA01a
1.2VOUT
1.5VOUT
2.5VOUT
3.3VOUT
30
20
0
2
4
6
LOAD CURRENT (A)
8
10
4600 TA01b
4600fd
For more information www.linear.com/LTM4600
1
LTM4600
Absolute Maximum Ratings
Pin Configuration
(Note 1)
TOP VIEW
fADJ
SVIN
EXTVCC
VOSET
FCB, EXTVCC, PGOOD, RUN/SS, VOUT.......... –0.3V to 6V
VIN, SVIN, fADJ............................................. –0.3V to 20V
VOSET, COMP............................................. –0.3V to 2.7V
Operating Temperature Range (Note 2)....–40°C to 85°C
Junction Temperature............................................ 125°C
Storage Temperature Range................... –55°C to 125°C
Peak Solder Reflow Body Temperature.................. 245°C
COMP
SGND
RUN/SS
FCB
VIN
PGOOD
PGND
VOUT
LGA PACKAGE
104-LEAD (15mm × 15mm × 2.82mm)
TJMAX = 125°C, θJA = 15°C/W, θJC = 6°C/W,
θJA DERIVED FROM 95mm × 76mm PCB WITH 4 LAYERS
WEIGHT = 1.7g
Order Information
PART MARKING*
PART NUMBER
LTM4600EV#PBF
LTM4600IV#PBF
PAD OR BALL FINISH
Au (RoHS)
DEVICE
FINISH CODE
PACKAGE
TYPE
MSL
RATING
e4
LGA
3
LTM4600EV
LTM4600IV
TEMPERATURE RANGE
(SEE NOTE 2)
–40°C to 85°C
• Consult Marketing for parts specified with wider operating temperature
ranges. *Pad or ball finish code is per IPC/JEDEC J-STD-609.
• Recommended LGA and BGA PCB Assembly and Manufacturing
Procedures: www.linear.com/umodule/pcbassembly
• Terminal Finish Part Marking: www.linear.com/leadfree
• LGA and BGA Package and Tray Drawings: www.linear.com/packaging
2
4600fd
For more information www.linear.com/LTM4600
LTM4600
Electrical
Characteristics
The l denotes the specifications which apply over the –40°C to 85°C
temperature range, otherwise specifications are at TA = 25°C, VIN = 12V. Per typical application (front page) configuration.
SYMBOL
PARAMETER
VIN(DC)
Input DC Voltage
VOUT(DC)
Output Voltage
CONDITIONS
MIN
l
4.5
l
1.478
1.470
FCB = 0V
VIN = 5V or 12V, VOUT = 1.5V, IOUT = 0A
TYP
MAX
UNITS
20
V
1.50
1.50
1.522
1.530
V
V
4
V
Input Specifications
VIN(UVLO)
Under Voltage Lockout Threshold
IOUT = 0A
3.4
IINRUSH(VIN)
Input Inrush Current at Startup
IOUT = 0A. VOUT = 1.5V, FCB = 0
VIN = 5V
VIN = 12V
0.6
0.7
A
A
IQ(VIN)
Input Supply Bias Current
IOUT = 0A, EXTVCC Open
VIN = 12V, VOUT = 1.5V, FCB = 5V
VIN = 12V, VOUT = 1.5V, FCB = 0V
VIN = 5V, VOUT = 1.5V, FCB = 5V
VIN = 5V, VOUT = 1.5V, FCB = 0V
Shutdown, RUN = 0.8V, VIN = 12V
1.2
42
1.0
52
35
mA
mA
mA
mA
µA
VIN = 12V, VOUT = 1.5V, IOUT = 10A
VIN = 12V, VOUT = 3.3V, IOUT = 10A
VIN = 5V, VOUT = 1.5V, IOUT = 10A
1.52
3.13
3.64
IS(VIN)
Input Supply Current
75
A
A
A
Output Specifications
IOUTDC
Output Continuous Current Range
VIN = 12V, VOUT = 1.5V
(See Output Current Derating Curves for
Different VIN, VOUT and TA)
ΔVOUT(LINE)
Line Regulation Accuracy
VOUT = 1.5V, IOUT = 0A, FCB = 0V,
VIN = 4.5V to 20V
Load Regulation Accuracy
VOUT = 1.5V, IOUT = 0A to 10A, FCB = 0V
VIN = 5V
VIN = 12V (Notes 3, 4)
VOUT
ΔVOUT(LOAD)
VOUT
0
0.15
l
l
10
A
0.3
%
±1
±1.5
%
%
VOUT(AC)
Output Ripple Voltage
VIN = 12V, VOUT = 1.5V, IOUT = 0A, FCB = 0V
10
fs
Output Ripple Voltage Frequency
VOUT = 1.5V, IOUT = 5A, FCB = 0V
850
kHz
tSTART
Turn-On Time
VOUT = 1.5V, IOUT = 1A
VIN = 12V
VIN = 5V
0.5
0.7
ms
ms
ΔVOUTLS
Voltage Drop for Dynamic Load Step
VOUT = 1.5V, Load Step: 0A/µs to 5A/µs
COUT = 3 • 22µF 6.3V, 470µF 4V POSCAP,
See Table 2
36
mV
tSETTLE
Settling Time for Dynamic Load Step
Load: 10% to 90% to 10% of Full Load
25
µs
IOUTPK
Output Current Limit
Output Voltage in Foldback
VIN = 12V, VOUT = 1.5V
VIN = 5V, VOUT = 1.5V
14
14
A
A
VOSET
Voltage at VOSET Pin
IOUT = 0A, VOUT = 1.5V
15
mVP-P
Control Stage
l
0.591
0.594
0.6
0.6
0.609
0.606
V
V
VRUN/SS
RUN ON/OFF Threshold
0.8
1.5
2
V
IRUN(C)/SS
Soft-Start Charging Current
VRUN/SS = 0V
–0.5
–1.2
–3
µA
IRUN(D)/SS
Soft-Start Discharging Current
VRUN/SS = 4V
0.8
1.8
3
µA
VIN – SVIN
EXTVCC = 0V, FCB = 0V
100
mV
4600fd
For more information www.linear.com/LTM4600
3
LTM4600
Electrical
Characteristics
The l denotes the specifications which apply over the –40°C to 85°C
temperature range, otherwise specifications are at TA = 25°C, VIN = 12V. Per typical application (front page) configuration.
SYMBOL
PARAMETER
CONDITIONS
MIN
IEXTVCC
Current into EXTVCC Pin
EXTVCC = 5V, FCB = 0V, VOUT = 1.5V,
IOUT = 0A
RFBHI
Resistor Between VOUT and VOSET Pins
VFCB
Forced Continuous Threshold
IFCB
Forced Continuous Pin Current
VFCB = 0.6V
ΔVOSETH
PGOOD Upper Threshold
VOSET Rising
ΔVOSETL
PGOOD Lower Threshold
VOSET Falling
ΔVOSET(HYS)
PGOOD Hysteresis
VOSET Returning
VPGL
PGOOD Low Voltage
IPGOOD = 5mA
0.57
TYP
MAX
UNITS
16
mA
100
kΩ
0.6
0.63
V
–1
–2
µA
7.5
10
12.5
%
–7.5
–10
–12.5
%
PGOOD Output
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTM4600E is guaranteed to meet performance specifications
from 0°C to 85°C. Specifications over the –40°C to 85°C operating
4
2
0.15
%
0.4
V
temperature range are assured by design, characterization and correlation
with statistical process controls. The LTM4600I is guaranteed over the
–40°C to 85°C temperature range.
Note 3: Test assumes current derating versus temperature.
Note 4: Guaranteed by correlation.
4600fd
For more information www.linear.com/LTM4600
LTM4600
Typical Performance Characteristics
100
Efficiency vs Load Current
with 12VIN (FCB = 0)
100
90
90
80
80
80
70
60
50
30
0
2
8
6
4
LOAD CURRENT (A)
70
60
0.6VOUT
1.2VOUT
1.5VOUT
2.5VOUT
3.3VOUT
50
0.6VOUT
1.2VOUT
1.5VOUT
2.5VOUT
40
EFFICIENCY (%)
90
EFFICIENCY (%)
EFFICIENCY (%)
100
Efficiency vs Load Current
with 5VIN (FCB = 0)
(See Figure 18 for all curves)
40
10
30
0
2
4
6
LOAD CURRENT (A)
4600 G01
Efficiency vs Load Current
with Different FCB Settings
8
Efficiency vs Load Current
with 18VIN (FCB = 0)
70
60
50
1.5VOUT
1.8VOUT
2.5VOUT
3.3VOUT
40
10
30
0
2
4
6
LOAD CURRENT (A)
10
4600 G03
4600 G02
1.2V Transient Response
8
1.5V Transient Response
90
FCB > 0.7V
80
VOUT = 50mV/DIV
EFFICIENCY (%)
70
60
FCB = GND
50
IOUT = 5A/DIV
40
30
20
0.1
VIN = 12V
VOUT = 1.5V
1
LOAD CURRENT (A)
10
25µs/DIV
4600 G05
25µs/DIV
1.2V AT 5A/µs LOAD STEP
COUT = 3 • 22µF 6.3V CERAMICS
470µF 4V SANYO POSCAP
C3 = 100pF
1.5V AT 5A/µs LOAD STEP
COUT = 3 • 22µF 6.3V CERAMICS
470µF 4V SANYO POSCAP
C3 = 100pF
2.5V Transient Response
3.3V Transient Response
4600 G06
4600 G04
1.8V Transient Response
25µs/DIV
1.8V AT 5A/µs LOAD STEP
COUT = 3 • 22µF 6.3V CERAMICS
470µF 4V SANYO POSCAP
C3 = 100pF
4600 G07
25µs/DIV
4600 G08
2.5V AT 5A/µs LOAD STEP
COUT = 3 • 22µF 6.3V CERAMICS
470µF 4V SANYO POSCAP
C3 = 100pF
25µs/DIV
4600 G09
3.3V AT 5A/µs LOAD STEP
COUT = 3 • 22µF 6.3V CERAMICS
470µF 4V SANYO POSCAP
C3 = 100pF
4600fd
For more information www.linear.com/LTM4600
5
LTM4600
Typical Performance Characteristics (See Figure 18 for all curves)
Start-Up, IOUT = 10A
(Resistive Load)
Start-Up, IOUT = 0A
Short-Circuit Protection,
IOUT = 0A
VOUT
(0.5V/DIV)
VOUT
(0.5V/DIV)
VOUT
(0.5V/DIV)
IIN
(0.5A/DIV)
IIN
(0.5A/DIV)
IIN
(0.2A/DIV)
200µs/DIV
VIN = 12V
VOUT = 1.5V
COUT = 200µF
NO EXTERNAL SOFT-START CAPACITOR
4600 G10
200µs/DIV
VIN = 12V
VOUT = 1.5V
COUT = 200µF
NO EXTERNAL SOFT-START CAPACITOR
Short-Circuit Protection,
IOUT = 10A
5.5
fADJ = OPEN
0.00
5V
–0.05
4.5
–0.10
VIN = 12V
VOUT = 1.5V
COUT = 2× 200µF/X5R
NO EXTERNAL SOFT-START CAPACITOR
3.3V
VOUT (V)
3.5
4600 G13
3.0
2.5V
2.5
1.8V
1.5V
2.0
1.5
1.0
5
–0.20
–0.25
25°C
–0.30
100°C
–45°C
–0.40
0.6V
0
–0.15
–0.35
1.2V
0.5
0
LOAD REGULATION %
IIN
(0.5A/DIV)
4600 G12
12V Input Load Regulation vs
Temperature
4.0
20µs/DIV
200µs/DIV
VIN = 12V
VOUT = 1.5V
COUT = 2× 200µF/X5R
NO EXTERNAL SOFT-START CAPACITOR
VIN to VOUT Step-Down Ratio
5.0
VOUT
(0.5V/DIV)
4600 G11
10
20
15
VIN (V)
SEE FREQUENCY ADJUSTMENT DISCUSSION
FOR 12VIN TO 5VOUT AND 5VIN TO 3.3VOUT
CONVERSION
–0.45
0
5
LOAD CURRENT
10
4600 G15
4600 G14
6
4600fd
For more information www.linear.com/LTM4600
LTM4600
(See Package Description for Pin Assignment)
SGND (Pin D23): Signal Ground Pin. All small-signal
components should connect to this ground, which in turn
connects to PGND at one point.
VIN (Bank 1): Power Input Pins. Apply input voltage between these pins and PGND pins. Recommend placing
input decoupling capacitance directly between VIN pins
and PGND pins.
RUN/SS (Pin F23): Run and Soft-Start Control. Forcing
this pin below 0.8V will shut down the power supply.
Inside the power module, there is a 1000pF capacitor
which provides approximately 0.7ms soft-start time with
200µF output capacitance. Additional soft-start time can
be achieved by adding additional capacitance between the
RUN/SS and SGND pins. The internal short-circuit latchoff
can be disabled by adding a resistor between this pin and
the VIN pin. This pull-up resistor must supply a minimum
5µA pull up current. The RUN/SS pin has an internal 6V
Zener to ground.
fADJ (Pin A15): A 110k resistor from VIN to this pin sets
the one-shot timer current, thereby setting the switching
frequency. The LTM4600 switching frequency is typically
850kHz. An external resistor to ground can be selected to
reduce the one-shot timer current, thus lower the switching
frequency to accommodate a higher duty cycle step down
requirement. See the applications section.
SVIN (Pin A17): Supply Pin for Internal PWM Controller.
Leave this pin open or add additional decoupling capacitance.
EXTVCC (Pin A19): External 5V supply pin for controller. If
left open or grounded, the internal 5V linear regulator will
power the controller and MOSFET drivers. For high input
voltage applications, connecting this pin to an external
5V will reduce the power loss in the power module. The
EXTVCC voltage should never be higher than VIN.
FCB (Pin G23): Forced Continuous Input. Grounding this
pin enables forced continuous mode operation regardless
of load conditions. Tying this pin above 0.63V enables
discontinuous conduction mode to achieve high efficiency
operation at light loads. There is an internal 4.75K resistor
between the FCB and SGND pins.
VOSET (Pin A21): The Negative Input of The Error Amplifier.
Internally, this pin is connected to VOUT with a 100k precision resistor. Different output voltages can be programmed
with additional resistors between the VOSET and SGND pins.
PGOOD (Pin J23): Output Voltage Power Good Indicator.
When the output voltage is within 10% of the nominal
voltage, the PGOOD is open drain output. Otherwise, this
pin is pulled to ground.
COMP (Pin B23): Current Control Threshold and Error
Amplifier Compensation Point. The current comparator
threshold increases with this control voltage. The voltage
ranges from 0V to 2.4V with 0.8V corresponding to zero
sense voltage (zero current).
PGND (Bank 2): Power ground pins for both input and
output returns.
VOUT (Bank 3): Power Output Pins. Apply output load
between these pins and PGND pins. Recommend placing
High Frequency output decoupling capacitance directly
between these pins and PGND pins.
4
5
6
VOSET
3
EXTVCC
2
SVIN
TOP VIEW
fADJ
Pin Functions
16
17
18
19
7
1
VIN
BANK 1
9
10
8
13
14
32
PGND
BANK 2
VOUT
BANK 3
1
26
27
28
29
30
31
33
34
35
36
37
38
40
43
44
45
46
47
48
49
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
2
3
4
5
6
7
8
9
10
11
12
22
E
24
42
50
C
23
41
39
A
15
12
25
20
21
11
13
14
15
16
17
18
19
20
21
22
G
J
B
COMP
D
SGND
F
RUN/SS
H
K
FCB
PGOOD
L
M
N
P
R
T
23
4600 PN01
4600fd
For more information www.linear.com/LTM4600
7
LTM4600
Simplified Block Diagram
SVIN
RUN/SS
LTM4600
VIN 4.5V TO 20V
1000pF
CIN
1.5μF
PGOOD
Q1
COMP
INT
COMP
VOUT 1.5V/10A MAX
FCB
COUT
4.75k
15μF
6.3V
CONTROLLER
fADJ
SGND
PGND
Q2
10Ω
EXTVCC
100k
0.5%
VOSET
R6
66.5k
4600 F01
Figure 1. Simplified LTM4600 Block Diagram
Decoupling
Requirements TA = 25°C, VIN = 12V. Use Figure 1 configuration.
SYMBOL
PARAMETER
CONDITIONS
CIN
External Input Capacitor Requirement
(VIN = 4.5V to 20V, VOUT = 1.5V)
IOUT = 10A
20
COUT
External Output Capacitor Requirement
(VIN = 4.5V to 20V, VOUT = 1.5V)
IOUT = 10A, Refer to Table 2 in the
Applications Information Section
100
8
MIN
TYP
MAX
UNITS
µF
200
µF
4600fd
For more information www.linear.com/LTM4600
LTM4600
Operation
µModule Description
The LTM4600 is a standalone non-isolated synchronous
switching DC/DC power supply. It can deliver up to 10A of
DC output current with only bulk external input and output
capacitors. This module provides a precisely regulated
output voltage programmable via one external resistor from
0.6VDC to 5.0VDC, not to exceed 80% of the input voltage.
The input voltage range is 4.5V to 20V. A simplified block
diagram is shown in Figure 1 and the typical application
schematic is shown in Figure 18.
The LTM4600 contains an integrated LTC constant on-time
current-mode regulator, ultra-low RDS(ON) FETs with fast
switching speed and integrated Schottky diode. The typical
switching frequency is 850kHz at full load. With current
mode control and internal feedback loop compensation,
the LTM4600 module has sufficient stability margins and
good transient performance under a wide range of operating conditions and with a wide range of output capacitors,
even all ceramic output capacitors (X5R or X7R).
Current mode control provides cycle-by-cycle fast current
limit. In addition, foldback current limiting is provided in
an over-current condition while VOSET drops. Also, the
LTM4600 has defeatable short circuit latch off. Internal
overvoltage and undervoltage comparators pull the opendrain PGOOD output low if the output feedback voltage exits
a ±10% window around the regulation point. Furthermore,
in an overvoltage condition, internal top FET Q1 is turned
off and bottom FET Q2 is turned on and held on until the
overvoltage condition clears.
Pulling the RUN/SS pin low forces the controller into its
shutdown state, turning off both Q1 and Q2. Releasing the
pin allows an internal 1.2µA current source to charge up
the soft-start capacitor. When this voltage reaches 1.5V,
the controller turns on and begins switching.
At low load current the module works in continuous current mode by default to achieve minimum output voltage
ripple. It can be programmed to operate in discontinuous
current mode for improved light load efficiency when the
FCB pin is pulled up above 0.8V and no higher than 6V.
The FCB pin has a 4.75k resistor to ground, so a resistor
to VIN can set the voltage on the FCB pin.
When EXTVCC pin is grounded or open, an integrated 5V
linear regulator powers the controller and MOSFET gate
drivers. If a minimum 4.7V external bias supply is applied on the EXTVCC pin, the internal regulator is turned
off, and an internal switch connects EXTVCC to the gate
driver voltage. This eliminates the linear regulator power
loss with high input voltage, reducing the thermal stress
on the controller. The maximum voltage on EXTVCC pin is
6V. The EXTVCC voltage should never be higher than the
VIN voltage. Also EXTVCC must be sequenced after VIN.
4600fd
For more information www.linear.com/LTM4600
9
LTM4600
Applications Information
The typical LTM4600 application circuit is shown in Figure
18. External component selection is primarily determined
by the maximum load current and output voltage.
Output Voltage Programming and Margining
The PWM controller of the LTM4600 has an internal
0.6V±1% reference voltage. As shown in the block diagram, a 100k/0.5% internal feedback resistor connects
VOUT and VOSET pins. Adding a resistor RSET from VOSET
pin to SGND pin programs the output voltage:
VO = 0.6V •
100k +RSET
RSET
Table 1.
RSET
(kΩ)
Open
100
66.5
49.9
43.2
31.6
22.1
13.7
VO
(V)
0.6
1.2
1.5
1.8
2
2.5
3.3
5
Voltage margining is the dynamic adjustment of the output
voltage to its worst case operating range in production
testing to stress the load circuitry, verify control/protection functionality of the board and improve the system
reliability. Figure 2 shows how to implement margining
function with the LTM4600. In addition to the feedback
resistor RSET, several external components are added.
Turn off both transistor QUP and QDOWN to disable the
margining. When QUP is on and QDOWN is off, the output
VOUT
RDOWN
100k
QDOWN
2N7002
VOSET
PGND
SGND
RSET
RUP
QUP
2N7002
4600 F02
Figure 2. LTM4600 Margining Implementation
10
(RSET RUP ) • VO • (1+M%)
= 0.6V
(RSET RUP )+ 100kΩ
RSET • VO • (1– M%)
= 0.6V
RSET +(100kΩ RDOWN )
Input Capacitors
Table 1 shows the standard values of 1% RSET resistor
for typical output voltages:
LTM4600
voltage is margined up. The output voltage is margined
down when QDOWN is on and QUP is off. If the output
voltage VO needs to be margined up/down by ±M%, the
resistor values of RUP and RDOWN can be calculated from
the following equations:
The LTM4600 µModule should be connected to a low
ac-impedance DC source. High frequency, low ESR input
capacitors are required to be placed adjacent to the module. In Figure 18, the bulk input capacitor CIN is selected
for its ability to handle the large RMS current into the
converter. For a buck converter, the switching duty-cycle
can be estimated as:
D=
VO
VIN
Without considering the inductor current ripple, the RMS
current of the input capacitor can be estimated as:
ICIN(RMS) =
IO(MAX)
η%
• D • (1−D)
In the above equation, η% is the estimated efficiency of
the power module. C1 can be a switcher-rated electrolytic
aluminum capacitor, OS-CON capacitor or high volume
ceramic capacitors. Note the capacitor ripple current
ratings are often based on only 2000 hours of life. This
makes it advisable to properly derate the input capacitor,
or choose a capacitor rated at a higher temperature than
required. Always contact the capacitor manufacturer for
derating requirements.
In Figure 18, the input capacitors are used as high frequency input decoupling capacitors. In a typical 10A
output application, 1-2 pieces of very low ESR X5R or
X7R, 10µF ceramic capacitors are recommended. This
4600fd
For more information www.linear.com/LTM4600
LTM4600
applications information
decoupling capacitor should be placed directly adjacent
the module input pins in the PCB layout to minimize the
trace inductance and high frequency AC noise.
Output Capacitors
The LTM4600 is designed for low output voltage ripple.
The bulk output capacitors COUT is chosen with low enough
effective series resistance (ESR) to meet the output voltage
ripple and transient requirements. COUT can be low ESR
tantalum capacitor, low ESR polymer capacitor or ceramic
capacitor (X5R or X7R). The typical capacitance is 200µF
if all ceramic output capacitors are used. The internally
optimized loop compensation provides sufficient stability
margin for all ceramic capacitors applications. Additional
output filtering may be required by the system designer,
if further reduction of output ripple or dynamic transient
spike is required. Refer to Table 2 for an output capacitance matrix for each output voltage Droop, peak to peak
deviation and recovery time during a 5A/µs transient with
a specific output capacitance.
Fault Conditions: Current Limit and Over current
Foldback
The LTM4600 has a current mode controller, which inherently limits the cycle-by-cycle inductor current not only in
steady state operation, but also in transient.
To further limit current in the event of an over load condition, the LTM4600 provides foldback current limiting. If the
output voltage falls by more than 50%, then the maximum
output current is progressively lowered to about one sixth
of its full current limit value.
VIN to VOUT Step-Down Ratios
There are restrictions in the maximum VIN to VOUT step
down ratio that can be achieved for a given input voltage.
These constraints are shown in VIN to VOUT Step-Down
Ratio in the the Typical Performance Characteristics section. Note that additional thermal derating may apply. See
the Thermal Considerations and Output Current Derating
sections of this data sheet.
Soft-Start and Latchoff with the RUN/SS pin
The RUN/SS pin provides a means to shut down the
LTM4600 as well as a timer for soft-start and over-current latchoff. Pulling the RUN/SS pin below 0.8V puts the LTM4600
into a low quiescent current shutdown (IQ ≤ 75µA). Releasing the pin allows an internal 1.2µA current source
to charge up the timing capacitor CSS. Inside LTM4600,
there is an internal 1000pF capacitor from RUN/SS
pin to ground. If RUN/SS pin has an external capacitor
CSS_EXT to ground, the delay before starting is about:
tDELAY =
1.5V
• (CSS _ EXT + 1000pF)
1.2µA
When the voltage on RUN/SS pin reaches 1.5V, the
LTM4600 internal switches are operating with a clamping
of the maximum output inductor current limited by the
RUN/SS pin total soft-start capacitance. As the RUN/SS
pin voltage rises to 3V, the soft-start clamping of the
inductor current is released.
After the controller has been started and given adequate
time to charge up the output capacitor, CSS is used as a
short-circuit timer. After the RUN/SS pin charges above 4V,
if the output voltage falls below 75% of its regulated value,
then a short-circuit fault is assumed. A 1.8µA current then
begins discharging CSS. If the fault condition persists until
the RUN/SS pin drops to 3.5V, then the controller turns
off both power MOSFETs, shutting down the converter
permanently. The RUN/SS pin must be actively pulled
down to ground in order to restart operation.
The over-current protection timer requires the soft-start
timing capacitor CSS be made large enough to guarantee
that the output is in regulation by the time CSS has reached
the 4V threshold. In general, this will depend upon the size
of the output capacitance, output voltage and load current
characteristic. A minimum external soft-start capacitor
can be estimated from:
CSS _ EXT + 1000pF >
COUT • VOUT
10kV
Generally 0.1µF is more than sufficient.
4600fd
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11
LTM4600
Applications Information
Table 2. Output Voltage Response Versus Component Matrix (Refer to Figure 18)
TYPICAL MEASURED VALUES
COUT1 VENDORS
TDK
TAIYO YUDEN
TAIYO YUDEN
VOUT
(V)
1.2
1.2
1.2
1.2
1.2
1.2
1.2
1.2
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.8
1.8
1.8
1.8
1.8
1.8
1.8
1.8
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
5
5
CIN
(CERAMIC)
2 × 10µF 25V
2 × 10µF 25V
2 × 10µF 25V
2 × 10µF 25V
2 × 10µF 25V
2 × 10µF 25V
2 × 10µF 25V
2 × 10µF 25V
2 × 10µF 25V
2 × 10µF 25V
2 × 10µF 25V
2 × 10µF 25V
2 × 10µF 25V
2 × 10µF 25V
2 × 10µF 25V
2 × 10µF 25V
2 × 10µF 25V
2 × 10µF 25V
2 × 10µF 25V
2 × 10µF 25V
2 × 10µF 25V
2 × 10µF 25V
2 × 10µF 25V
2 × 10µF 25V
2 × 10µF 25V
2 × 10µF 25V
2 × 10µF 25V
2 × 10µF 25V
2 × 10µF 25V
2 × 10µF 25V
2 × 10µF 25V
2 × 10µF 25V
2 × 10µF 25V
2 × 10µF 25V
2 × 10µF 25V
2 × 10µF 25V
2 × 10µF 25V
2 × 10µF 25V
2 × 10µF 25V
2 × 10µF 25V
2 × 10µF 25V
2 × 10µF 25V
12
PART NUMBER
C4532X5R0J107MZ (100µF,6.3V)
JMK432BJ107MU-T ( 100µF, 6.3V)
JMK316BJ226ML-T501 ( 22µF, 6.3V)
CIN
(BULK)
150µF 35V
150µF 35V
150µF 35V
150µF 35V
150µF 35V
150µF 35V
150µF 35V
150µF 35V
150µF 35V
150µF 35V
150µF 35V
150µF 35V
150µF 35V
150µF 35V
150µF 35V
150µF 35V
150µF 35V
150µF 35V
150µF 35V
150µF 35V
150µF 35V
150µF 35V
150µF 35V
150µF 35V
150µF 35V
150µF 35V
150µF 35V
150µF 35V
150µF 35V
150µF 35V
150µF 35V
150µF 35V
150µF 35V
150µF 35V
150µF 35V
150µF 35V
150µF 35V
150µF 35V
150µF 35V
150µF 35V
150µF 35V
150µF 35V
COUT1
(CERAMIC)
3 × 22µF 6.3V
1 × 100µF 6.3V
2 × 100µF 6.3V
4 × 100µF 6.3V
3 × 22µF 6.3V
1 × 100µF 6.3V
2 × 100µF 6.3V
4 × 100µF 6.3V
3 × 22µF 6.3V
1 × 100µF 6.3V
2 × 100µF 6.3V
4 × 100µF 6.3V
3 × 22µF 6.3V
1 × 100µF 6.3V
2 × 100µF 6.3V
4 × 100µF 6.3V
3 × 22µF 6.3V
1 × 100µF 6.3V
2 × 100µF 6.3V
4 × 100µF 6.3V
3 × 22µF 6.3V
1 × 100µF 6.3V
2 × 100µF 6.3V
4 × 100µF 6.3V
1 × 100µF 6.3V
2 × 100µF 6.3V
3 × 22µF 6.3V
4 × 100µF 6.3V
1 × 100µF 6.3V
3 × 22µF 6.3V
2 × 100µF 6.3V
4 × 100µF 6.3V
2 × 100µF 6.3V
1 × 100µF 6.3V
3 × 22µF 6.3V
4 × 100µF 6.3V
1 × 100µF 6.3V
3 × 22µF 6.3V
2 × 100µF 6.3V
4 × 100µF 6.3V
4 × 100µF 6.3V
4 × 100µF 6.3V
COUT2
(BULK)
470µF 4V
470µF 2.5V
330µF 6.3V
NONE
470µF 4V
470µF 2.5V
330µF 6.3V
NONE
470µF 4V
470µF 2.5V
330µF 6.3V
NONE
470µF 4V
470µF 2.5V
330µF 6.3V
NONE
470µF 4V
470µF 2.5V
330µF 6.3V
NONE
470µF 4V
470µF 2.5V
330µF 6.3V
NONE
470µF 4V
330µF 6.3V
470µF 4V
NONE
470µF 4V
470µF 4V
330µF 6.3V
NONE
330µF 6.3V
470µF 4V
470µF 4V
NONE
470µF 4V
470µF 4V
330µF 6.3V
NONE
NONE
NONE
COUT2 VENDORS
SANYO POSCAP
SANYO POSCAP
SANYO POSCAP
CCOMP
C3
NONE
NONE
NONE
NONE
NONE
NONE
NONE
NONE
NONE
NONE
NONE
NONE
NONE
NONE
NONE
NONE
NONE
NONE
NONE
NONE
NONE
NONE
NONE
NONE
NONE
NONE
NONE
NONE
NONE
NONE
NONE
NONE
NONE
NONE
NONE
NONE
NONE
NONE
NONE
NONE
NONE
NONE
100pF
100pF
100pF
100pF
100pF
100pF
100pF
100pF
100pF
100pF
100pF
100pF
100pF
100pF
100pF
100pF
100pF
100pF
100pF
100pF
100pF
100pF
100pF
100pF
100pF
100pF
100pF
100pF
100pF
100pF
100pF
100pF
100pF
100pF
100pF
100pF
100pF
100pF
100pF
100pF
100pF
100pF
VIN
(V)
5
5
5
5
12
12
12
12
5
5
5
5
12
12
12
12
5
5
5
5
12
12
12
12
5
5
5
5
12
12
12
12
7
7
7
7
12
12
12
12
15
20
DROOP
(mV)
35
35
40
49
35
35
40
49
36
37
44
61
36
37
44
54
40
44
46
62
40
44
44
62
48
56
57
60
48
51
56
70
64
66
82
100
52
64
64
76
188
159
PART NUMBER
6TPE330MIL (330µF, 6.3V)
2R5TPE470M9 (470µF, 2.5V)
4TPE470MCL (470µF, 4V)
PEAK TO PEAK
(mV)
68
70
80
98
68
70
80
98
75
79
84
118
75
79
89
108
81
88
91
128
81
85
91
125
103
113
116
115
103
102
113
159
126
132
166
200
106
129
126
144
375
320
RECOVERY TIME
(µs)
25
20
20
20
25
20
20
20
25
20
20
20
25
20
20
20
30
20
20
20
30
20
20
20
30
30
30
25
30
30
30
25
30
30
35
25
30
35
30
25
25
25
LOAD STEP
(A/µs)
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
4600fd
For more information www.linear.com/LTM4600
LTM4600
applications information
Since the load current is already limited by the current mode
control and current foldback circuitry during a short circuit,
over-current latchoff operation is NOT always needed or
desired, especially if the output has a large amount of
capacitance or the load draws huge currents during start
up. The latchoff feature can be overridden by a pull-up
current greater than 5µA but less than 80µA to the RUN/SS
pin. The additional currents prevents the discharge of CSS
during a fault and also shortens the soft-start period. Using a resistor from RUN/SS pin to VIN is a simple solution
to defeat latchoff. Any pull-up network must be able to
maintain RUN/SS above 4V maximum latchoff threshold
and overcome the 4µA maximum discharge current. With a
pull-up resistor, the delay before starting is approximately:
tDELAY = –RRUN/SS • (CSS _ EXT + 1000pF )
⎛
⎞
1.5V
⎟⎟
• ln ⎜⎜1−
⎝ VIN + (1.2µA • RRUN/SS ) ⎠
Figure 3 shows a conceptual drawing of VRUN during
startup and short circuit.
Enable
The RUN/SS pin can be driven from logic as shown in
Figure 5. This function allows the LTM4600 to be turned
on or off remotely. The ON signal can also control the
sequence of the output voltage.
VRUN/SS
4V
3.5V
3V
1.5V
SHORT-CIRCUIT
LATCH ARMED
SOFT-START
CLAMPING
OF IL RELEASED
OUTPUT
OVERLOAD
HAPPENS
SHORT-CIRCUIT
LATCHOFF
t
VO
75%VO
t
SWITCHING
STARTS
4600 F03
Figure 3. RUN/SS Pin Voltage During Startup and
Short-Circuit Protection
VIN
RRUN/SS
VIN
LTM4600
RUN/SS
PGND SGND
RUN/SS
4600 F04
RECOMMENDED VALUES FOR RRUN/SS
VIN
RRUN/SS
4.5V TO 5.5V
10.8V TO 13.8V
16V TO 20V
50k
150k
330k
LTM4600
ON
PGND SGND
2N7002
4600 F05
Figure 4. Defeat Short-Circuit Latchoff with a Pull-Up
Resistor to VIN
Figure 5. Enable Circuit with External Logic
4600fd
For more information www.linear.com/LTM4600
13
LTM4600
Applications Information
Output Voltage Tracking
For the applications that require output voltage tracking,
several LTM4600 modules can be programmed by the
power supply tracking controller such as the LTC2923.
Figure 6 shows a typical schematic with LTC2923. Coincident, ratiometric and offset tracking for VO rising and
falling can be implemented with different sets of resistor
values. See the LTC2923 data sheet for more details.
VIN
5V
Q1
DC/DC
VCC
RAMP
GATE
ON
RONA
FB1
RAMPBUF
VIN
LTM4600
VOSET
VOUT
STATUS
VIN
RTB1
TRACK1
RTA1
SDO
VIN
FB2
LTM4600
VOSET
VOUT
RTB2
TRACK2
RTA2
1.8V
49.9k
LTC2923
GND
2. EXTVCC connected to an external supply. Internal LDO
is shut off. A high efficiency supply compatible with the
MOSFET gate drive requirements (typically 5V) can improve overall efficiency. With this connection, it is always
required that the EXTVCC voltage can not be higher than
VIN pin voltage.
Discontinuous Operation and FCB Pin
3.3V
VIN
RONB
1. EXTVCC grounded. Internal 5V LDO is always powered
from the internal 5V regulator.
1.5V
66.5k
4600 F06
Figure 6. Output Voltage Tracking with the LTC2923 Controller
The FCB pin determines whether the internal bottom
MOSFET remains on when the inductor current reverses.
There is an internal 4.75k pull-down resistor connecting
this pin to ground. The default light load operation mode
is forced continuous (PWM) current mode. This mode
provides minimum output voltage ripple.
In the application where the light load efficiency is important, tying the FCB pin above 0.6V threshold enables
discontinuous operation where the bottom MOSFET turns
off when inductor current reverses. Therefore, the conduction loss is minimized and light load efficiency is improved.
The penalty is that the controller may skip cycle and the
output voltage ripple increases at light load.
EXTVCC Connection
Paralleling Operation with Load Sharing
An internal low dropout regulator produces an internal 5V
supply that powers the control circuitry and FET drivers.
Therefore, if the system does not have a 5V power rail,
the LTM4600 can be directly powered by VIN. The gate
driver current through LDO is about 18mA. The internal
LDO power dissipation can be calculated as:
Two or more LTM4600 modules can be paralleled to provide
higher than 10A output current. Figure 7 shows the necessary interconnection between two paralleled modules. The
OPTI-LOOP® current mode control ensures good current
sharing among modules to balance the thermal stress.
The new feedback equation for two or more LTM4600s
in parallel is:
PLDO_LOSS = 18mA • (VIN – 5V)
The LTM4600 also provides an external gate driver voltage pin EXTVCC. If there is a 5V rail in the system, it is
recommended to connect EXTVCC pin to the external 5V
rail. Whenever the EXTVCC pin is above 4.7V, the internal
5V LDO is shut off and an internal 50mA P-channel switch
connects the EXTVCC to internal 5V. Internal 5V is supplied
from EXTVCC until this pin drops below 4.5V. Do not apply
more than 6V to the EXTVCC pin and ensure that EXTVCC
< VIN. The following list summaries the possible connections for EXTVCC:
14
VOUT
100k
+RSET
N
= 0.6V •
RSET
where N is the number of LTM4600s in parallel.
4600fd
For more information www.linear.com/LTM4600
LTM4600
applications information
VIN
VIN
VOUT
LTM4600
VOUT
(20AMAX)
PGND COMP VOSET SGND
RSET
COMP VOSET SGND
VIN
LTM4600
VOUT
PGND
4600 F07
Figure 7. Parallel Two µModules with Load Sharing
Thermal Considerations and Output Current Derating
The power loss curves in Figures 8 and 13 can be used
in coordination with the load current derating curves in
Figures 9 to 12, and Figures 14 to 15 for calculating an
approximate qJA for the module with various heat sinking methods. Thermal models are derived from several
temperature measurements at the bench, and thermal
modeling analysis. Application Note 103 provides a detailed
explanation of the analysis for the thermal models, and the
derating curves. Tables 3 and 4 provide a summary of the
equivalent qJA for the noted conditions. These equivalent
qJA parameters are correlated to the measured values, and
improve with air-flow. The case temperature is maintained
at 100°C or below for the derating curves. This allows for
4W maximum power dissipation in the total module with
top and bottom heat sinking, and 2W power dissipation
through the top of the module with an approximate qJC
between 6°C/W to 9°C/W. This equates to a total of 124°C
at the junction of the device.
Safety Considerations
The LTM4600 modules do not provide isolation from VIN
to VOUT. There is no internal fuse. If required, a slow blow
fuse with a rating twice the maximum input current should
be provided to protect each unit from catastrophic failure.
Table 3. 1.5V Output
DERATING CURVE
VIN (V)
POWER LOSS CURVE
AIR FLOW (LFM)
HEAT SINK
qJA (°C/W)
Figures 9, 11
5, 12
Figure 8
0
None
15.2
Figures 9, 11
5, 12
Figure 8
200
None
14
Figures 9, 11
5, 12
Figure 8
400
None
12
Figures 10, 12
5, 12
Figure 8
0
BGA Heat Sink
13.9
Figures 10, 12
5, 12
Figure 8
200
BGA Heat Sink
11.3
Figures 10, 12
5, 12
Figure 8
400
BGA Heat Sink
10.25
DERATING CURVE
VIN (V)
POWER LOSS CURVE
AIR FLOW (LFM)
HEAT SINK
qJA (°C/W)
Figure 14
12
Figure 13
0
None
15.2
Figure 14
12
Figure 13
200
None
14.6
Table 4. 3.3V Output
Figure 14
12
Figure 13
400
None
13.4
Figure 15
12
Figure 13
0
BGA Heat Sink
13.9
Figure 15
12
Figure 13
200
BGA Heat Sink
11.1
Figure 15
12
Figure 13
400
BGA Heat Sink
10.5
4600fd
For more information www.linear.com/LTM4600
15
LTM4600
Applications Information
10
MAXIMUM LOAD CURRENT (A)
VOUT = 1.5V
4.0
POWER LOSS (W)
3.5
3.0
2.5
2.0
12V LOSS
1.5
5V LOSS
1.0
0.5
0
2
0
4
6
8
OUTPUT CURRENT (A)
9
8
7
6
5
4
10
0 LFM
200 LFM
400 LFM
50
60
80
70
AMBIENT TEMPERATURE (°C)
5
0 LFM
200 LFM
400 LFM
50
55
60 65 70 75 80 85
AMBIENT TEMPERATURE (°C)
7
6
90
50
2.5
2.0
1.5
0.5
60
80
90
70
AMBIENT TEMPERATURE (°C)
0
100
0
2
4
6
8
OUTPUT CURRENT (A)
5
4
3
0 LFM
200 LFM
400 LFM
50
60
80
70
AMBIENT TEMPERATURE (°C)
90
Figure 13. Power Loss vs Load Current
10
VIN = 12V
VO = 3.3V
9
8
7
0LFM
200LFM
400LFM
6
5
60
80
AMBIENT TEMPERATURE (°C)
40
16
100
4600 G15
4600 F14
Figure 14. No Heat Sink
10
4600 F13
Figure 12. BGA Heat Sink
MAXIMUM LOAD CURRENT (A)
MAXIMUM LOAD CURRENT (A)
3.0
4600 G12
6
40
3.5
1.0
0LFM
200LFM
400LFM
7
0
VIN = 12V
4.5 VOUT = 3.3V
8
5
100
4.0
8
1
60
80
90
70
AMBIENT TEMPERATURE (°C)
5.0
9
VIN = 12V
VO = 3.3V
2
50
4600 G10
VIN = 12V
VO = 1.5V
Figure 11. No Heat Sink
9
5
0LFM
200LFM
400LFM
Figure 10. BGA Heat Sink
4600 F11
10
6
POWER LOSS (W)
6
4
10
MAXIMUM LOAD CURRENT (A)
MAXIMUM LOAD CURRENT (A)
7
7
Figure 9. No Heat Sink
VIN = 12V
VO = 1.5V
8
8
4600 F09
Figure 8. Power Loss vs Load Current
9
VIN = 5V
VO = 1.5V
9
90
4600 F08
10
10
VIN = 5V
VO = 1.5V
MAXIMUM LOAD CURRENT (A)
4.5
Figure 15. BGA Heat Sink
4600fd
For more information www.linear.com/LTM4600
LTM4600
applications information
Layout Checklist/Example
LTM4600 Frequency Adjustment
The high integration of the LTM4600 makes the PCB
board layout very simple and easy. However, to optimize
its electrical and thermal performance, some layout considerations are still necessary.
The LTM4600 is designed to typically operate at 850kHz
across most input and output conditions. The control architecture is constant on time valley mode current control.
The fADJ pin is typically left open or decoupled with an
optional 1000pF capacitor. The switching frequency has
been optimized to maintain constant output ripple over the
operating conditions. The equations for setting the operating frequency are set around a programmable constant on
time. This on time is developed by a programmable current
into an on board 10pF capacitor that establishes a ramp
that is compared to a voltage threshold equal to the output
voltage up to a 2.4V clamp. This ION current is equal to: ION
= (VIN – 0.7V)/110k, with the 110k onboard resistor from
VIN to fADJ. The on time is equal to tON = (VOUT/ION) • 10pF
and tOFF = ts – tON. The frequency is equal to: Freq. = DC/
tON. The ION current is proportional to VIN, and the regulator duty cycle is inversely proportional to VIN, therefore
the step-down regulator will remain relatively constant
frequency as the duty cycle adjustment takes place with
lowering VIN. The on time is proportional to VOUT up to a
2.4V clamp. This will hold frequency relatively constant
with different output voltages up to 2.4V. The regulator
switching period is comprised of the on time and off time
as depicted in Figure 17.
• Use large PCB copper areas for high current path, including VIN, PGND and VOUT. It helps to minimize the
PCB conduction loss and thermal stress
• Place high frequency ceramic input and output capacitors next to the VIN, PGND and VOUT pins to minimize
high frequency noise
• Place a dedicated power ground layer underneath
the unit
• To minimize the via conduction loss and reduce module
thermal stress, use multiple vias for interconnection
between top layer and other power layers
• Do not put a via directly on pad unless it is capped
• Use a separated SGND ground copper area for components connected to signal pins. Connect the SGND
to PGND underneath the unit
Figure 16 gives a good example of the recommended layout.
VIN
SGND
CIN
PGND
VOUT
LOAD
TOP LAYER
4600 F16
Figure 16. Recommended PCB Layout
4600fd
For more information www.linear.com/LTM4600
17
LTM4600
Applications Information
t
(DC) DUTY CYCLE = ON
ts
tOFF
tON
t
V
DC = ON = OUT
ts
VIN
DC
FREQ =
tON
4600 F21
PERIOD ts
Figure 17. LTM4600 Switching Period
The LTM4600 has a minimum (tON) on time of 100 nanoseconds and a minimum (tOFF) off time of 400 nanoseconds.
The 2.4V clamp on the ramp threshold as a function of
VOUT will cause the switching frequency to increase by the
ratio of VOUT/2.4V for 3.3V and 5V outputs. This is due to
the fact the on time will not increase as VOUT increases
past 2.4V. Therefore, if the nominal switching frequency
is 850kHz, then the switching frequency will increase
to ~1.2MHz for 3.3V, and ~1.7MHz for 5V outputs due
to Frequency = (DC/tON) When the switching frequency
increases to 1.2MHz, then the time period tS is reduced
to ~833 nanoseconds and at 1.7MHz the switching period
reduces to ~588 nanoseconds. When higher duty cycle
conversions like 5V to 3.3V and 12V to 5V need to be
accommodated, then the switching frequency can be
lowered to alleviate the violation of the 400ns minimum
off time. Since the total switching period is tS = tON + tOFF ,
tOFF will be below the 400ns minimum off time. A resistor
from the fADJ pin to ground can shunt current away from
the on time generator, thus allowing for a longer on time
and a lower switching frequency. 12V to 5V and 5V to
3.3V derivations are explained in the data sheet to lower
switching frequency and accommodate these step-down
conversions.
Equations for setting frequency for 12V to 5V:
ION = (VIN – 0.7V)/110k; ION = 103µA
frequency = (ION/[2.4V • 10pF]) • DC = 1.79MHz;
DC = duty cycle, duty cycle is (VOUT/VIN)
tS = tON + tOFF, tON = on-time, tOFF = off-time of the
switching period; tS = 1/frequency
tOFF must be greater than 400ns, or tS – tON > 400ns.
tON = DC • tS
1MHz frequency or 1µs period is chosen for 12V to 5V.
18
tON = 0.41 • 1µs @ 410ns
tOFF = 1µs – 410ns @ 590ns
tON and tOFF are above the minimums with adequate guard
band.
Using the frequency = (ION/[2.4V • 10pF]) • DC, solve for
ION = (1MHz • 2.4V • 10pF) • (1/0.41) @ 58µA. ION current
calculated from 12V input was 103µA, so a resistor from
fADJ to ground = (0.7V/15k) = 46µA. 103µA – 46µA =
57µA, sets the adequate ION current for proper frequency
range for the higher duty cycle conversion of 12V to
5V. Input voltage range is limited to 9V to 16V. Higher
input voltages can be used without the 15k on fADJ. The
inductor ripple current gets too high above 16V, and the
400ns minimum off-time is limited below 9V.
Equations for setting frequency for 5V to 3.3V:
ION = (VIN – 0.7V)/110k; ION = 39µA
frequency = (ION/[2.4V • 10pF]) • DC = 1.07MHz;
DC = duty cycle, duty cycle is (VOUT/VIN)
tS = tON + tOFF, tON = DC • tS, tOFF = off-time of the
switching period; tS = 1/frequency
tOFF must be greater than 400ns, or tS – tON > 400ns.
The ~450kHz frequency or 2.22µs period is chosen for
5V to 3.3V. Frequency range is about 450kHz to 650kHz
from 4.5V to 7V input.
tON = 0.66 • 2.22µs @ 1.46ms
tOFF = 2.22µs – 1.46µs @ 760ns
tON and tOFF are above the minimums with adequate guard
band.
Using the frequency = (ION/[2.4V • 10pF]) • DC, solve for
ION = (450kHz • 2.4V • 10pF) • (1/0.66) @ 16µA. ION current
calculated from 5V input was 39µA, so a resistor from fADJ
to ground = (0.7V/30.1k) = 23µA. 39µA – 23µA = 16µA,
sets the adequate ION current for proper frequency range
for the higher duty cycle conversion of 5V to 3.3V. Input
voltage range is limited to 4.5V to 7V. Higher input voltages
can be used without the 30.1k on fADJ. The inductor ripple
current gets too high above 7V, and the 400ns minimum
off-time is limited below 4.5V.
4600fd
For more information www.linear.com/LTM4600
LTM4600
applications information
5V to 3.3V at 8A
R1
30.1k
4.5V TO 7V
C3
10µF
25V
C1
10µF
25V
C5
100pF
fADJ
VIN
EXTVCC
3.3V AT 8A
VOUT
FCB
VOSET
R2
22.1k
1%
LTM4600
RUN/SS
RUN/SOFT-START
SVIN
SGND
C2
22µF
+
C4
330µF
6.3V
OPEN DRAIN
PGOOD
COMP
EFFICIENCY = 93%
PGND
4600 F18
5V TO 3.3V AT 8A WITH fADJ = 30.1k
C1, C3: TDK C3216X5R1E106MT
C2: TAIYO YUDEN, JMK316BJ226ML
C4: SANYO POS CAP, 6TPE330MIL
12V to 5V at 8A
R1
15k
9V TO 16V
C3
10µF
25V
C1
10µF
25V
C5
100pF
fADJ
VIN
EXTVCC
5V AT 8A
VOUT
FCB
VOSET
R2
13.7k
1%
LTM4600
RUN/SS
RUN/SOFT-START
SVIN
SGND
C2
22µF
+
C4
330µF
6.3V
OPEN DRAIN
PGOOD
COMP
EFFICIENCY = 94%
PGND
4600 F19
12V TO 5V AT 8A WITH fADJ = 15k
C1, C3: TDK C3216X5R1E106MT
C2: TAIYO YUDEN, JMK316BJ226ML
C4: SANYO POSCAP, 6TPE330MIL
VIN to VOUT Step-Down Ratio for
12VIN to 5VOUT and 5VIN to 3.3VOUT
5.0
3.3V: fADJ = 30.1k
4.5 5V: fADJ = 15k
4.0
VOUT (V)
3.5
3.0
2.5
2.0
1.5
1.0
3.3V AT 8A
5V AT 8A
0.5
0
1
3
5
7
9 11
VIN (V)
13
15
17
4600 F20
4600fd
For more information www.linear.com/LTM4600
19
LTM4600
Typical Application
VIN
+
5V TO 20V
CIN (BULK)
150µF
CIN (CER)
10μF
2x
GND
EXTVCC
C3
100pF
SVIN
VIN
(MULTIPLE PINS)
VOUT
(MULTIPLE PINS)
fADJ
VOSET
VOUT
COMP
LTM4600
FCB
COUT1 +
22µF
6.3V
×3
REFER TO
TABLE 2
RUN/SS
PGOOD
VOUT
COUT2
470µF
REFER TO
TABLE 2
0.6V TO 5V
SGND
C4
OPT
REFER TO STEP-DOWN
RATIO GRAPH
PGND
(MULTIPLE PINS)
R1
66.5k
REFER TO
TABLE 1
GND
4600 F18
Figure 18. Typical Application, 5V to 20V Input, 0.6V to 5V Output, 10A Max
20
4600fd
For more information www.linear.com/LTM4600
LTM4600
Typical Application
Parallel Operation and Load Sharing
4.5V TO 20V
C8
10µF
25V
C7
10µF
25V
VOUT = 0.6V • ([100k/N] + RSET)/RSET
WHERE N = 2
VIN
fADJ
EXTVCC
2.5V
VOUT
FCB
C9
22µF
x3
VOSET
LTM4600
RUN
R4
15.8k
1%
SVIN
+
C10
470µF
4V
PGOOD
COMP
SGND
PGND
2.5V AT 20A
RUN/SOFT-START
C1
10µF
25V
VIN
C4
220pF
fADJ
EXTVCC
2.5V
VOUT
FCB
C2
22µF
x3
VOSET
LTM4600
RUN
+
C5
470µF
4V
R1
100k
SVIN
PGOOD
COMP
SGND
PGND
C1, C3, C7, C8: TDK C3216X5R1E106MT
C2, C9: TAIYO YUDEN, JMK316BJ226ML-T501
C5, C10: SANYO POSCAP, 4TPE470MCL
4600 TA02
Current Sharing Between Two
LTM4600 Modules
12
12VIN
2.5VOUT
10 20AMAX
INDIVIDUAL SHARE
C3
10µF
25V
8
6
IOUT2
4
IOUT1
2
0
0
5
10
TOTAL LOAD
15
20
4600 TA03
4600fd
For more information www.linear.com/LTM4600
21
5.7150
2.5400
0.3175
0.3175
2.7375
For more information www.linear.com/LTM4600
C(0.30)
PAD 1
13.97
BSC
0.11 – 0.27
6.9850
4.4450
1.2700
0.0000
1.4675
4.0075
1
6.9421
1
1
8
12
25
32
32
25
12
8
94
83
72
61
50
39
5.7158
2
3
4
40
3
5
6
41
34
27
7
4
8
89
78
67
56
45
100
88
77
66
55
44
36
29
15
11
99
35
28
14
10
7
98
87
76
65
54
43
13
9
6
0.0000
37
30
16
10
9
13
43
54
65
76
87
98
35
11
6
28
36
13
7
29
13.93
BSC
12
10
14
44
55
66
77
88
99
12.70
BSC
14
11
15
45
56
67
78
89
100
37
15
16
30
BOTTOM VIEW
9
5
34
27
33
26
42
53
52
51
86
97
64
85
96
63
50
1.9058
5
91
102
101
80
69
58
47
90
79
68
57
46
38
31
17
3.1742
18
16
46
57
68
79
90
101
38
17
17
31
18
47
58
69
80
91
102
19
18
SUGGESTED SOLDER PAD LAYOUT
TOP VIEW
62
61
97
86
75
64
53
42
75
73
72
96
85
74
63
52
41
33
26
4.4950
5.7650
4
3.1758
74
84
83
2
95
84
73
62
51
40
1.0900
95
39
4.4458
2.3600
94
6.3500
5.2775
3.8100
6.5475
5.0800
0.6358
1.2700
1.9042
0.3175
0.3175
0.0000
3
2.5400
0.6342
1.2700
2
2.5400
4.4442
3.8100
6.9888
103
92
81
70
59
48
104
93
82
71
60
49
20
48
59
21
22
49
60
71
70
93
104
82
19
19
5.7142
81
92
103
5.0800
23
20
21
22
23
24
24
23
22
21
20
6.9865
6.3500
2.45 – 2.55
A
C
E
G
J
L
M
N
P
R
B
D
F
H
K
4600 02-18
eee M X Y
7
SEE NOTES
PADS
SEE NOTES
T
3
DETAIL B
MOLD
CAP
DETAIL B
4
PAD 1
CORNER
aaa Z
DETAILS OF PAD #1 IDENTIFIER ARE OPTIONAL,
BUT MUST BE LOCATED WITHIN THE ZONE INDICATED.
THE PAD #1 IDENTIFIER IS A MARKED FEATURE OR A
NOTCHED BEVELED PAD
4
7
15
BSC
TOP VIEW
LGA 104 1112 REV C
PACKAGE ROW AND COLUMN LABELING MAY VARY
AMONG µModule PRODUCTS. REVIEW EACH PACKAGE
LAYOUT CAREFULLY
SYMBOL TOLERANCE
aaa
0.15
bbb
0.10
eee
0.15
!
6. THE TOTAL NUMBER OF PADS: 104
5. PRIMARY DATUM -Z- IS SEATING PLANE
LAND DESIGNATION PER JESD MO-222, SPP-010
3
2. ALL DIMENSIONS ARE IN MILLIMETERS
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M-1994
0.27 – 0.37
SUBSTRATE
2.72 – 2.92
(Reference LTM DWG # 05-05-1800 Rev C)
Z
22
bbb Z
LGA Package
104-Lead (15mm × 15mm × 2.82mm)
X
15
BSC
Y
aaa Z
LTM4600
Package Description
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
4600fd
LTM4600
package description
Pin Assignment Tables
(Arranged by Pin Number)
PIN NAME
A1 A2 A3 VIN
A4 A5 VIN
A6 A7 VIN
A8 A9 VIN
A10 A11 VIN
A12 -
PIN NAME
B1 VIN
B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 -
PIN NAME
C1 C2 C3 C4 C5 C6 C7 C8 C9 C10 VIN
C11 -
PIN NAME
D1 VIN
D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 -
PIN NAME
E1 E2 E3 E4 E5 E6 E7 E8 E9 E10 VIN
E11 -
PIN NAME
F1 VIN
F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 -
PIN NAME
G1 PGND
G2 G3 G4 G5 G6 G7 G8 G9 G10 G11 -
PIN NAME
H1 H2 H3 H4 H5 H6 H7 PGND
H8 H9 PGND
H10 H11 PGND
A13 VIN
A14 A15 fADJ
A16 A17 SVIN
A18 A19 EXTVCC
A20 A21 VOSET
A22 A23 -
B12 B13 B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 COMP
C12 VIN
C13 C14 VIN
C15 C16 C17 C18 C19 C20 C21 C22 C23 -
D12 D13 D14 D15 D16 D17 D18 D19 D20 D21 D22 D23 SGND
E12 VIN
E13 E14 VIN
E15 E16 E17 E18 E19 E20 E21 E22 E23 -
F12 F13 F14 F15 F16 F17 F18 F19 F20 F21 F22 F23 RUN/SS
G12 G13 G14 G15 G16 G17 G18 G19 G20 G21 G22 G23 FCB
H12 H13 PGND
H14 H15 PGND
H16 H17 PGND
H18 H19 H20 H21 H22 H23 -
PIN NAME
J1 PGND
J2 J3 J4 J5 J6 J7 J8 J9 J10 J11 J12 J13 J14 J15 J16 J17 J18 J19 J20 J21 J22 J23 PGOOD
PIN NAME
K1 K2 K3 K4 K5 K6 K7 PGND
K8
K9 PGND
K10
K11 PGND
K12 K13 PGND
K14 K15 PGND
K16 K17 PGND
K18 K19 K20 K21 K22 K23 -
PIN NAME
L1 L2 PGND
L3 L4 PGND
L5 L6 PGND
L7 L8 PGND
L9 L10 PGND
L11 L12 PGND
L13 L14 PGND
L15 L16 PGND
L17 L18 PGND
L19 L20 PGND
L21 L22 PGND
L23 -
PIN NAME
M1 M2 PGND
M3 M4 PGND
M5 M6 PGND
M7 M8 PGND
M9 M10 PGND
M11 M12 PGND
M13 M14 PGND
M15 M16 PGND
M17 M18 PGND
M19 M20 PGND
M21 M22 PGND
M23 -
PIN NAME
N1 N2 PGND
N3 N4 PGND
N5 N6 PGND
N7 N8 PGND
N9 N10 PGND
N11 N12 PGND
N13 N14 PGND
N15 N16 PGND
N17 N18 PGND
N19 N20 PGND
N21 N22 PGND
N23 -
PIN NAME
P1 P2 VOUT
P3 P4 VOUT
P5 P6 VOUT
P7 P8 VOUT
P9 P10 VOUT
P11 P12 VOUT
P13 P14 VOUT
P15 P16 VOUT
P17 P18 VOUT
P19 P20 VOUT
P21 P22 VOUT
P23 -
PIN NAME
R1 R2 VOUT
R3 R4 VOUT
R5 R6 VOUT
R7 R8 VOUT
R9 R10 VOUT
R11 R12 VOUT
R13 R14 VOUT
R15 R16 VOUT
R17 R18 VOUT
R19 R20 VOUT
R21 R22 VOUT
R23 -
PIN NAME
T1 T2 VOUT
T3 T4 VOUT
T5 T6 VOUT
T7 T8 VOUT
T9 T10 VOUT
T11 T12 VOUT
T13 T14 VOUT
T15 T16 VOUT
T17 T18 VOUT
T19 T20 VOUT
T21 T22 VOUT
T23 4600fd
For more information www.linear.com/LTM4600
23
LTM4600
Package Description
Pin Assignment Tables
(Arranged by Pin Number)
PIN NAME
24
G1
PGND
H7
H9
H11
H13
H15
H17
PGND
PGND
PGND
PGND
PGND
PGND
J1
PGND
K7
K9
K11
K13
K15
K17
PGND
PGND
PGND
PGND
PGND
PGND
L2
L4
L6
L8
L10
L12
L14
L16
L18
L20
L22
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
M2
M4
M6
M8
M10
M12
M14
M16
M18
M20
M22
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
N2
N4
N6
N8
N10
N12
N14
N16
N18
N20
N22
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PIN NAME
P2
P4
P6
P8
P10
P12
P14
P16
P18
P20
P22
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
R2
R4
R6
R8
R10
R12
R14
R16
R18
R20
R22
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
T2
T4
T6
T8
T10
T12
T14
T16
T18
T20
T22
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
PIN NAME
PIN NAME
A3
A5
A7
A9
A11
A13
VIN
VIN
VIN
VIN
VIN
VIN
B1
VIN
C10
C12
C14
VIN
VIN
VIN
D1
VIN
E10
E12
E14
VIN
VIN
VIN
F1
VIN
A15
fADJ
A17
SVIN
A19
EXTVCC
A21
VOSET
B23
COMP
D23
SGND
F23
RUN/SS
G23
FCB
J23
PGOOD
4600fd
For more information www.linear.com/LTM4600
LTM4600
Revision History
(Revision history begins at Rev D)
REV
DATE
DESCRIPTION
D
6/14
Updated Order Information table.
PAGE NUMBER
2
Updated RUN/SS pin description.
7
Updated Soft-Start section.
13
4600fd
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation
of its
circuits
as described
herein will not infringe on existing patent rights.
that the interconnectionFor
more
information
www.linear.com/LTM4600
25
LTM4600
Typical Application
1.8V, 10A Regulator
4.5V AT 20V
C2
10µF
25V
C1
10µF
25V
VIN
C5
100pF
fADJ
EXTVCC
1.8V AT 10A
VOUT
FCB
VOSET
R1
100k
LTM4600
RUN
SVIN
SGND
PGND
4600 TA04
+
C4
470µF
4V
PGOOD
PGOOD
COMP
C3
22µF
x3
R2
49.9k
1%
C1, C2: TDK C3216X5R1E106MT
C3: TAIYO YUDEN, JMK316BJ226ML-T501
C4: SANYO POSCAP, 4TPE470MCL
Related Parts
PART NUMBER DESCRIPTION
COMMENTS
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tracking, 9mm × 15mm x 4.92mm BGA
LTM4641
38VIN, 10A Step-Down μModule Regulator
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LTM4633
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and Tracking, PGOOD, Internal Temperature Monitor, 15mm × 15mm × 5.01mm BGA
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20VIN, 15A DC/DC Step-Down μModule
Regulator
LTM4611
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15mm × 15mm × 4.32mm LGA
LTM4613
36VIN, 8A EN55022 Class B DC/DC
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LTM8061
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with Programmable Input Current Limit
8.2V, or 8.4V), 4.95V ≤ VIN ≤ 32V, C/10 or Adjustable Timer Charge Termination, NTC
Resistor Monitor Input, 9mm × 15mm × 4.32mm LGA
LTM8045
Inverting or SEPIC μModule DC/DC
Converter with Up to 700mA Output Current
LTM8048
1.5W, 725VDC Galvanically Isolated µModule 3.1V ≤ VIN ≤ 32V, 2.5V ≤ VOUT ≤ 12V, 1mVP-P Output Ripple, Internal Isolated
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Converter with LDO Post Regulator
LTC2977
8-Channel PMBus Power System Manager
0.25% TUE 16-Bit ADC, Voltage/Temperature Monitoring and Supervision
LTC2974
4-Channel PMBus Power System Manager
0.25% TUE 16-Bit ADC, Voltage/Current/Temperature Monitoring and Supervision
4.5V ≤ VIN ≤ 20V, 0.6V ≤ VOUT ≤ 5V, PLL Input, VOUT Tracking, Remote Sense Amplifier,
15mm × 15mm × 4.32mm LGA or 15mm × 15mm × 4.92mm BGA
5V ≤ VIN ≤ 36V, 3.3V ≤ VOUT ≤ 15V, PLL Input, VOUT Tracking and Margining, 15mm ×
15mm × 4.32mm LGA
2.8V ≤ VIN ≤ 18V, ±2.5V ≤ VOUT ≤ ±15V, Synchronizable, No Derating or Logic Level Shift
for Control Inputs When Inverting, 6.25mm × 11.25mm × 4.92mm BGA
This product contains technology licensed from Silicon Semiconductor Corporation.
26 Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
For more information www.linear.com/LTM4600
(408) 432-1900 ● FAX: (408) 434-0507
●
www.linear.com/LTM4600
®
4600fd
LT 0614 REV D • PRINTED IN USA
LINEAR TECHNOLOGY CORPORATION 2006
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