LTM4601AHV
12A, 28VIN DC/DC µModule
Regulator with PLL, Output
Tracking and Margining
Description
Features
Complete Switch Mode Power Supply
Wide Input Voltage Range: 4.5V to 28V
12A DC Typical, 14A Peak Output Current
0.6V to 5V Output Voltage
Output Voltage Tracking and Margining
Redundant Mounting Pads for Enhanced
Solder-Joint Strength
n Parallel Multiple µModule® Regulators for
Current Sharing
n Differential Remote Sensing for Precision Regulation
n PLL Frequency Synchronization
n ±1.5% Total DC Error
n Current Foldback Protection (Disabled at Start-Up)
n SnPb or RoHS Compliant Finish
n –55°C to 125°C Operating Temperature Range
(LTM4601AHVMPV)
n Ultrafast™ Transient Response
n Up to 95% Efficiency at 5V , 3.3V
IN
OUT
n Programmable Soft-Start
n Output Overvoltage Protection
n Enhanced (15mm × 15mm × 2.82mm) Surface Mount
LGA and (15mm × 15mm × 3.42mm) BGA Packages
n
n
n
n
n
n
Applications
Telecom, Industrial and Networking Equipment
Military and Avionics Systems
The LTM®4601AHV is a complete 12A step-down switch
mode DC/DC power supply with onboard switching controller, MOSFETs, inductor and all support components.
The µModule regulator is housed in a small surface mount
15mm × 15mm × 2.82mm LGA or 15mm × 15mm ×
3.42mm BGA package. The LTM4601AHV LGA and BGA
packages are designed with redundant mounting pads to
enhance solder-joint strength for extended temperature
cycling endurance. Operating over an input voltage range
of 4.5V to 28V, the LTM4601AHV supports an output voltage range of 0.6V to 5V as well as output voltage tracking
and margining. The high efficiency design delivers 12A
continuous current (14A peak). Only bulk input and output
capacitors are needed to complete the design.
The low profile and light weight package easily mounts
in unused space on the back side of PC boards for high
density point of load regulation. The µModule regulator
can be synchronized with an external clock for reducing
undesirable frequency harmonics and allows PolyPhase®
operation for high load currents.
An onboard differential remote sense amplifier can be used
to accurately regulate an output voltage independent of
load current. The LTM4601AHV is available with SnPb or
RoHS compliant terminal finish.
L, LT, LTC and LTM, Linear Technology, the Linear logo, µModule and PolyPhase are
registered trademarks and Ultrafast and LTpowerCAD are trademarks of Linear Technology
Corporation. All other trademarks are the property of their respective owners. Protected by U.S.
Patents including 5481178, 5847554, 6580258, 6304066, 6476589, 6774611, 6677210.
n
n
Typical Application
Efficiency and Power Loss
vs Load Current
2.5V/12A Power Supply with 4.5V to 28V Input
95
CLOCK SYNC
TRACK/SS CONTROL
ON/OFF
CIN
R1
392k
5% MARGIN
RUN
COMP
INTVCC
DRVCC
MPGM
LTM4601AHV
SGND
PGND
VFB
MARG0
MARG1
100pF
MARGIN
CONTROL
COUT
VOUT_LCL
DIFFVOUT
VOSNS+
VOSNS–
fSET
5
85
VOUT
2.5V
12A
6
12VIN
24VIN
80
4
75
POWER LOSS
70
3
24VIN
65
12VIN
60
2
55
1
50
RSET
19.1k
45
POWER LOSS (W)
PLLIN TRACK/SS
VOUT
VIN
PGOOD
EFFICIENCY
90
EFFICIENCY (%)
VIN
4.5V TO 28V
0
4601AHV TA01a
2
8
6
4
10
LOAD CURRENT (A)
12
14
4601AHV TA01b
For more information www.linear.com/LTM4601AHV
0
4601ahvfc
1
LTM4601AHV
Absolute Maximum Ratings
(Note 1)
INTVCC, DRVCC, VOUT_LCL, VOUT (VOUT ≤ 3.3V with
Remote Sense Amp)..................................... –0.3V to 6V
PLLIN, TRACK/SS, MPGM, MARG0, MARG1,
PGOOD, fSET...............................–0.3V to INTVCC + 0.3V
RUN.............................................................. –0.3V to 5V
VFB, COMP................................................. –0.3V to 2.7V
VIN.............................................................. –0.3V to 28V
VOSNS+, VOSNS –...........................–0.3V to INTVCC + 0.3V
Operating Temperature Range (Note 2)
E and I Grades......................................–40°C to 85°C
MP Grade............................................ –55°C to 125°C
Junction Temperature............................................ 125°C
Storage Temperature Range................... –55°C to 125°C
VIN
MTP1
MTP2
INTVCC
MTP3
MPGM
COMP
RUN
MTP1
MARG0
MTP2
MARG1
INTVCC
DRVCC
MTP3
fSET
MARG0
MARG1
DRVCC
VFB
PGND
PGOOD
PGOOD
SGND
SGND
VOSNS+
VOSNS+
DIFFVOUT
DIFFVOUT
VOUT
TRACK/SS
VIN
fSET
VFB
PGND
PLLIN
INTVCC
MPGM
COMP
TOP VIEW
RUN
PLLIN
INTVCC
TOP VIEW
TRACK/SS
Pin Configuration
VOUT
VOUT_LCL
VOUT_LCL
VOSNS–
VOSNS–
BGA PACKAGE
133-LEAD (15mm × 15mm × 3.42mm)
LGA PACKAGE
133-LEAD (15mm × 15mm × 2.82mm)
TJMAX = 125°C, θJA = 15°C/W, θJCbottom = 6°C/W
θJA DERIVED FROM 95mm × 76mm PCB WITH 4 LAYERS
WEIGHT = 1.7g
TJMAX = 125°C, θJA = 15.5°C/W, θJCbottom = 6.5°C/W
θJA DERIVED FROM 95mm × 76mm PCB WITH 4 LAYERS
WEIGHT = 1.9g
Order Information
PART NUMBER
PAD OR BALL FINISH
DEVICE
PART MARKING*
FINISH CODE
PACKAGE
TYPE
MSL
RATING
TEMPERATURE RANGE
(Note 2)
LTM4601AHVEV#PBF
Au (RoHS)
LTM4601AHVV
e4
LGA
3
–40°C to 125°C
LTM4601AHVIV#PBF
Au (RoHS)
LTM4601AHVV
e4
LGA
3
–40°C to 125°C
LTM4601AHVMPV#PBF
Au (RoHS)
LTM4601AHVMPV
e4
LGA
3
–55°C to 125°C
LTM4601AHVEY#PBF
SAC305 (RoHS)
LTM4601AHVY
e1
BGA
3
–40°C to 125°C
LTM4601AHVIY#PBF
SAC305 (RoHS)
LTM4601AHVY
e1
BGA
3
–40°C to 125°C
LTM4601AHVIY
SnPb (63/37)
LTM4601AHVY
e0
BGA
3
–40°C to 125°C
LTM4601AHVMPY#PBF
SAC305 (RoHS)
LTM4601AHVMPY
e1
BGA
3
–55°C to 125°C
LTM4601AHVMPY
SnPb (63/37)
LTM4601AHVMPY
e0
BGA
3
–55°C to 125°C
Consult Marketing for parts specified with wider operating temperature
ranges. *Device temperature grade is indicated by a label on the shipping
container. Pad or ball finish code is per IPC/JEDEC J-STD-609.
• Recommended LGA and BGA PCB Assembly and Manufacturing
Procedures:
www.linear.com/umodule/pcbassembly
• Terminal Finish Part Marking:
www.linear.com/leadfree
• LGA and BGA Package and Tray Drawings:
www.linear.com/packaging
2
For more information www.linear.com/LTM4601AHV
4601ahvfc
LTM4601AHV
Electrical Characteristics
The l denotes the specifications which apply over the specified operating
temperature range (Note 2). Otherwise specifications are at TA = 25°C, VIN = 12V, per typical application (front page) configuration,
RSET = 40.2k.
SYMBOL
PARAMETER
VIN(DC)
Input DC Voltage
CONDITIONS
VOUT(DC)
Output Voltage Total Variation with
Line and Load
CIN = 10µF ×3, COUT = 200µF, RSET = 40.2k
VIN = 5V to 28V, IOUT = 0A to 12A (Note 5)
VIN(UVLO)
Undervoltage Lockout Threshold
IINRUSH(VIN)
Input Inrush Current at Startup
IQ(VIN,NO LOAD)
MIN
l
4.5
l
1.478
TYP
MAX
UNITS
28
V
1.5
1.522
V
IOUT = 0A
3.2
4
V
IOUT = 0A. VOUT = 1.5V
VIN = 5V
VIN = 12V
0.6
0.7
A
A
Input Supply Bias Current
VIN = 12V, No Switching
VIN = 12V, VOUT = 1.5V, Switching Continuous
VIN = 5V, No Switching
VIN = 5V, VOUT = 1.5V, Switching Continuous
Shutdown, RUN = 0, VIN = 12V
3.8
38
2.5
42
22
mA
mA
mA
mA
µA
IS(VIN)
Input Supply Current
VIN = 12V, VOUT = 1.5V, IOUT = 12A
VIN = 12V, VOUT = 3.3V, IOUT = 12A
VIN = 5V, VOUT = 1.5V, IOUT = 12A
1.81
3.63
4.29
A
A
A
INTVCC
VIN = 12V, RUN > 2V
No Load
Input Specifications
4.7
5
5.3
V
12
A
Output Specifications
IOUTDC
Output Continuous Current Range
VIN = 12V, VOUT = 1.5V (Note 5)
ΔVOUT(LINE)
VOUT
Line Regulation Accuracy
VOUT = 1.5V, IOUT = 0A, VIN from 4.5V to 28V
l
0.3
%
ΔVOUT(LOAD)
VOUT
Load Regulation Accuracy
VOUT = 1.5V, IOUT = 0A to 12A, VIN = 12V, with
Remote Sense Amplifier (Note 5)
l
0.25
%
VOUT(AC)
Output Ripple Voltage
IOUT = 0A, COUT = 2× 100µF X5R Ceramic
VIN = 12V, VOUT = 1.5V
VIN = 5V, VOUT = 1.5V
20
18
mVP-P
mVP-P
fS
Output Ripple Voltage Frequency
IOUT = 5A, VIN = 12V, VOUT = 1.5V
850
kHz
ΔVOUT(START)
Turn-On Overshoot
COUT = 200µF, VOUT = 1.5V, IOUT = 0A,
TRACK/SS = 10nF
VIN = 12V
VIN = 5V
20
20
mV
mV
COUT = 200µF, VOUT = 1.5V, TRACK/SS = Open,
IOUT = 1A Resistive Load
VIN = 12V
VIN = 5V
0.5
0.7
ms
ms
Load: 0% to 50% to 0% of Full Load,
COUT = 2 × 22µF Ceramic, 470µF 4V Sanyo
POSCAP
VIN = 12V
VIN = 5V
35
35
mV
mV
25
µs
17
17
A
A
tSTART
ΔVOUTLS
Turn-On Time
Peak Deviation for Dynamic Load
tSETTLE
Settling Time for Dynamic Load Step Load: 0% to 50%, or 50% to 0% of Full Load
VIN = 12V
IOUTPK
Output Current Limit
COUT = 200µF Ceramic
VIN = 12V, VOUT = 1.5V
VIN = 5V, VOUT = 1.5V
0
4601ahvfc
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3
LTM4601AHV
Electrical
Characteristics l denotes the specifications which apply over the specified operating
The
temperature range (Note 2). Otherwise specifications are at TA = 25°C, VIN = 12V, per typical application (front page) configuration,
RSET = 40.2k.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Remote Sense Amp (Note 3)
VOSNS+, VOSNS–
CM Range
Common Mode Input Voltage Range VIN = 12V, RUN > 2V
0
INTVCC – 1
V
DIFFVOUT Range
Output Voltage Range
0
INTVCC – 1
V
VOS
Input Offset Voltage Magnitude
VIN = 12V, DIFFVOUT Load = 100k
1.25
2
l
mV
mV
AV
Differential Gain
1
V/V
GBP
Gain Bandwidth Product
3
MHz
SR
Slew Rate
2
V/µs
20
kW
100
dB
RIN
Input Resistance
CMRR
Common Mode Rejection Mode
+ to GND
VOSNS
Control Stage
VFB
Error Amplifier Input Voltage
Accuracy
VRUN
RUN Pin On/Off Threshold
IOUT = 0A, VOUT = 1.5V
l
0.594
0.6
0.606
V
1
1.5
1.9
V
–1.0
ITRACK/SS
Soft-Start Charging Current
VTRACK/SS = 0V
–1.5
–2.0
µA
tON(MIN)
Minimum On Time
(Note 4)
50
100
ns
tOFF(MIN)
Minimum Off Time
(Note 4)
250
400
ns
RPLLIN
PLLIN Input Resistance
IDRVCC
Current into DRVCC Pin
18
25
mA
RFBHI
Resistor Between VOUT_LCL and VFB
60.4
60.702
kΩ
VMPGM
Margin Reference Voltage
1.18
V
VMARG0, VMARG1
MARG0, MARG1 Voltage Thresholds
1.4
V
50
VOUT = 1.5V, IOUT = 1A, DRVCC = 5V
60.098
kΩ
PGOOD Output
ΔVFBH
PGOOD Upper Threshold
VFB Rising
7
10
13
%
ΔVFBL
PGOOD Lower Threshold
VFB Falling
–7
–10
–13
%
ΔVFB(HYS)
PGOOD Hysteresis
VFB Returning
1.5
VPGL
PGOOD Low Voltage
IPGOOD = 5mA
0.15
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTM4601AHV is tested under pulsed load conditions such
that TJ ≈ TA. The LTM4601AHVE is guaranteed to meet performance
specifications from 0°C to 85°C. Specifications over the –40°C to 85°C
operating temperature range are assured by design, characterization
and correlation with statistical process controls. The LTM4601AHVI is
4
%
0.4
V
guaranteed over the –40°C to 85°C operating temperature range. The
LTM4601AHVMP is guaranteed and tested over the –55°C to 125°C
operating temperature range. For output current derating at high
temperature, please refer to Thermal Considerations and Output Current
Derating discussion.
Note 3: Remote sense amplifier recommended for ≤3.3V output.
Note 4: 100% tested at wafer level only.
Note 5: See output current derating curves for different VIN, VOUT and TA.
4601ahvfc
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LTM4601AHV
Typical Performance Characteristics
Efficiency vs Load Current
with 5VIN
100
EFFICIENCY (%)
90
85
80
75
0.6VOUT
1.2VOUT
1.5VOUT
2.5VOUT
3.3VOUT
70
65
0
5
95
95
90
90
85
85
80
80
75
70
0.6VOUT
1.2VOUT
1.5VOUT
2.5VOUT
3.3VOUT
5VOUT
65
60
55
10
LOAD CURRENT (A)
15
EFFICIENCY (%)
95
EFFICIENCY (%)
Efficiency vs Load Current
with 24VIN
Efficiency vs Load Current
with 12VIN
100
60
(See Figures 19 and 20 for all curves)
50
0
10
5
LOAD CURRENT (A)
4601AHV G01
1.2V Transient Response
75
70
65
60
1.5VOUT
2.5VOUT
3.3VOUT
5.0VOUT
55
50
45
15
4601AHV G02
1.5V Transient Response
VOUT
50mV/DIV
VOUT
50mV/DIV
IOUT
5A/DIV
IOUT
5A/DIV
IOUT
5A/DIV
20µs/DIV
1.5V AT 6A/µs LOAD STEP
COUT = 3× 22µF 6.3V CERAMICS,
470µF 4V SANYO POSCAP
C3 = 100pF
4601AHV G04
2.5V Transient Response
15
4601AHV G03
1.8V Transient Response
VOUT
50mV/DIV
20µs/DIV
1.2V AT 6A/µs LOAD STEP
COUT = 3× 22µF 6.3V CERAMICS,
470µF 4V SANYO POSCAP
C3 = 100pF
10
5
LOAD CURRENT (A)
0
4601AHV G05
20µs/DIV
1.8V AT 6A/µs LOAD STEP
COUT = 3× 22µF 6.3V CERAMICS,
470µF 4V SANYO POSCAP
C3 = 100pF
3.3V Transient Response
4601AHV G06
VFB vs Temperature
0.606
VOUT
50mV/DIV
IOUT
5A/DIV
IOUT
5A/DIV
20µs/DIV
2.5V AT 6A/µs LOAD STEP
COUT = 3× 22µF 6.3V CERAMICS,
470µF 4V SANYO POSCAP
C3 = 100pF
4601AHV G07
0.604
0.602
VFB (V)
VOUT
50mV/DIV
20µs/DIV
3.3V AT 6A/µs LOAD STEP
COUT = 3× 22µF 6.3V CERAMICS,
470µF 4V SANYO POSCAP
C3 = 100pF
4601AHV G08
0.600
0.598
0.596
0.594
–55
–25
35
65
5
TEMPERATURE (°C)
95
125
4601AHV G15
4601ahvfc
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5
LTM4601AHV
Typical Performance Characteristics (See Figures 19 and 20 for all curves)
Start-Up, TA = –55°C
Start-Up, IOUT = 12A
(Resistive Load)
Start-Up, IOUT = 0A
VOUT
0.5V/DIV
VOUT
0.5V/DIV
NO LOAD
10A LOAD
IIN
1A/DIV
IIN
0.5A/DIV
10ms/DIV
VIN = 12V
VOUT = 1.5V
COUT = 470µF, 3× 22µF
SOFT-START = 10nF
5ms/DIV
VIN = 12V
VOUT = 1.5V
COUT = 470µF, 3× 22µF
SOFT-START = 10nF
4601AHV G16
4601AHV G09
VIN to VOUT Step-Down Ratio
3.3V OUTPUT WITH
130k FROM VOUT
TO fSET
5.0
4.5
OUTPUT VOLTAGE (V)
4601AHV G10
Track, IOUT = 12A
5.5
TRACK/SS
0.5V/DIV
VFB
0.5V/DIV
5V OUTPUT WITH
100k RESISTOR
ADDED FROM fSET
TO GND
4.0
3.5
3.0
VOUT
1V/DIV
2.0
5V OUTPUT WITH
NO RESISTOR ADDED
FROM fSET TO GND
1.5
2.5V OUTPUT
1.0
1.8V OUTPUT
0.5
1.5V OUTPUT
2.5
0
2ms/DIV
VIN = 12V
VOUT = 1.5V
COUT = 470µF, 3× 22µF
SOFT-START = 10nF
2ms/DIV
VIN = 12V
VOUT = 1.5V
COUT = 470µF, 3× 22µF
SOFT-START = 10nF
1.2V OUTPUT
4601AHV G12
0 2 4 6 8 10 12 14 16 18 20 22 24 26 28
INPUT VOLTAGE (V)
4601AHV G11
Short-Circuit Protection, IOUT = 0A
VOUT
0.5V/DIV
VOUT
0.5V/DIV
IIN
1A/DIV
IIN
1A/DIV
50µs/DIV
VIN = 12V
VOUT = 1.5V
COUT = 470µF, 3× 22µF
SOFT-START = 10nF
6
Short-Circuit Protection, IOUT = 12A
4601AHV G13
50µs/DIV
VIN = 12V
VOUT = 1.5V
COUT = 470µF, 3× 22µF
SOFT-START = 10nF
4601AHV G14
4601ahvfc
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LTM4601AHV
Pin Functions
(See Package Description for Pin Assignment)
VIN (Bank 1): Power Input Pins. Apply input voltage between these pins and PGND pins. Recommend placing
input decoupling capacitance directly between VIN pins
and PGND pins.
VOUT (Bank 3): Power Output Pins. Apply output load
between these pins and PGND pins. Recommend placing
output decoupling capacitance directly between these pins
and PGND pins. See Figure 17.
PGND (Bank 2): Power ground pins for both input and
output returns.
VOSNS– (Pin M12): (–) Input to the Remote Sense Amplifier. This pin connects to the ground remote sense point.
The remote sense amplifier is used for VOUT ≤3.3V. Tie to
INTVCC if not used.
VOSNS+ (Pin J12): (+) Input to the Remote Sense Amplifier. This pin connects to the output remote sense point.
The remote sense amplifier is used for VOUT ≤3.3V. Tie to
GND if not used.
DIFFVOUT (Pin K12): Output of the Remote Sense Amplifier. This pin connects to the VOUT_LCL pin. Leave floating
if remote sense amplifier is not used.
DRVCC (Pin E12): This pin normally connects to INTVCC
for powering the internal MOSFET drivers. This pin can
be biased up to 6V from an external supply with about
50mA capability, or an external circuit shown in Figure 18.
This improves efficiency at the higher input voltages by
reducing power dissipation in the module.
INTVCC (Pin A7, D9): This pin is for additional decoupling
of the 5V internal regulator. These pins are internally connected. Pin A7 is a test pin.
PLLIN (Pin A8): External Clock Synchronization Input to
the Phase Detector. This pin is internally terminated to
SGND with a 50k resistor. Apply a clock with high level
above 2V and below INTVCC. See Applications Information.
TRACK/SS (Pin A9): Output Voltage Tracking and Soft- Start
Pin. When the module is configured as a master output,
then a soft-start capacitor is placed on this pin to ground to
control the master ramp rate. A soft-start capacitor can be
used for soft-start turn on as a stand alone regulator. Slave
operation is performed by putting a resistor divider from
the master output to ground, and connecting the center
point of the divider to this pin. See Applications Information.
MPGM (Pins A12, B11): Programmable Margining Input.
A resistor from this pin to ground sets a current that is
equal to 1.18V/R. This current multiplied by 10kΩ will
equal a value in millivolts that is a percentage of the 0.6V
reference voltage. See Applications Information. To parallel
LTM4601AHVs, each requires an individual MPGM resistor.
Do not tie MPGM pins together. Both pins are internally
connected. Pin A12 is a test pin.
fSET (Pins B12, C11): Frequency Set Internally to 850kHz.
An external resistor can be placed from this pin to ground
to increase frequency. See Applications Information for
frequency adjustment. Both pins are internally connected.
Pin B12 is a test pin.
VFB (Pin F12): The Negative Input of the Error Amplifier.
Internally, this pin is connected to VOUT_LCL pin with a
60.4k precision resistor. Different output voltages can be
programmed with an additional resistor between VFB and
SGND pins. See Applications Information.
MARG0 (Pin C12): This pin is the LSB logic input for the
margining function. Together with the MARG1 pin it will
determine if margin high, margin low or no margin state
is applied. The pin has an internal pull-down resistor of
50k. See Applications Information.
MARG1 (Pin D12): This pin is the MSB logic input for the
margining function. Together with the MARG0 pin it will
determine if margin high, margin low or no margin state
is applied. The pin has an internal pull-down resistor of
50k. See Applications Information.
SGND (Pins H12, H11, G11): Signal Ground. These pins
connect to PGND at output capacitor point. See Figure 17.
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7
LTM4601AHV
Pin Functions
(See Package Description for Pin Assignment)
COMP (Pin A11): Current Control Threshold and Error
Amplifier Compensation Point. The current comparator
threshold increases with this control voltage. The voltage
ranges from 0V to 2.4V with 0.7V corresponding to zero
sense voltage (zero current).
off the module. A programmable UVLO function can be
accomplished by connecting to a resistor divider from
VIN to ground. See Figure 1. This pin has a 5.1V Zener to
ground. Maximum pin voltage is 5V. Limit current into the
RUN pin to less than 1mA.
PGOOD (Pins G12, F11): Output Voltage Power Good
Indicator. Open-drain logic output that is pulled to ground
when the output voltage is not within ±10% of the regulation point, after a 25µs power bad mask timer expires.
VOUT_LCL (Pin L12): VOUT connects directly to this pin to
bypass the remote sense amplifier, or DIFFVOUT connects
to this pin when the remote sense amplifier is used.
RUN (Pin A10): Run Control Pin. A voltage above 1.9V
will turn on the module, and when below 1V, will turn
MTP1, MTP2, MPT3 (Pins C10, D10, D11 ): Extra Mounting Pads. These pads must be left floating (electrical open
circuit) and are used for enhanced solder joint strength.
Simplified Block Diagram
VIN
VOUT_LCL
R1
UVLO
FUNCTION
>1.9V = ON
4.8V use 4.8V
LTM4601AHV minimum on-time = 100ns
tON = [(VOUT • 10pF)/IfSET]
LTM4601AHV minimum off-time = 400ns
LTM4601AHV minimum off-time = 400ns
tOFF = t – tON, where t = 1/Frequency
tOFF = t – tON, where t = 1/Frequency
Duty Cycle (DC) = tON /t or VOUT /VIN
Duty Cycle = tON /t or VOUT/VIN
Equations for setting frequency:
Equations for setting frequency:
IfSET = [VIN /(3 • RfSET)], for 28V operation, IfSET = 238µA,
tON = [(4.8 • 10pF)/IfSET], tON = 202ns, where the internal
RfSET is 39.2k. Frequency = [VOUT/(VIN • tON)] = [5V/(28 •
202ns)] ~ 884kHz. The inductor ripple current begins to
get high at the higher input voltages due to a larger voltage
across the inductor. This is noted in the Inductor Ripple
Current vs Duty Cycle graph (Figure 3) where IL ≈ 10A at
20% duty cycle. The inductor ripple current can be lowered
at the higher input voltages by adding an external resistor
from fSET to ground to increase the switching frequency.
A 7A ripple current is chosen, and the total peak current
is equal to 1/2 of the 7A ripple current plus the output
current. The 5V output current is limited to 8A, so the
total peak current is less than 11.5A. This is below the
14A peak specified value. A 100k resistor is placed from
fSET to ground, and the parallel combination of 100k and
39.2k equates to 28k. The IfSET calculation with 28k and
28V input voltage equals 333µA. This equates to a tON of
144ns. This will increase the switching frequency from
~884kHz to ~1.24MHz for the 28V to 5V conversion. The
minimum on time is above 100ns at 28V input. Since the
switching frequency is approximately constant over input
and output conditions, then the lower input voltage range
is limited to 10V for the 1.24MHz operation due to the
400ns minimum off time. Equation: tON = (VOUT /VIN) • (1/
Frequency) equates to a 400ns on time, and a 400ns off
time. The VIN to VOUT Step-Down Ratio curves reflect an
operating range of 10V to 28V for 1.24MHz operation with
a 100k resistor to ground as shown in Figure 18, and an
8V to 16V operation for fSET floating. These modifications
are made to provide wider input voltage ranges for the 5V
output designs while limiting the inductor ripple current,
and maintaining the 400ns minimum off-time.
20
IfSET = [VIN /(3 • RfSET)], for 28V operation, IfSET = 238µA,
tON = [(3.3 • 10pF)/IfSET], tON = 138.7ns, where the internal
RfSET is 39.2k. Frequency = [VOUT /(VIN • tON)] = [3.3V/(28 •
138.7ns)] ~ 850kHz. The minimum on-time and minimum
off-time are within specification at 139ns and 1037ns. The
4.5V minimum input for converting 3.3V output will not
meet the minimum off-time specification of 400ns. tON =
868ns, Frequency = 850kHz, tOFF = 315ns.
Solution
Lower the switching frequency at lower input voltages to
allow for higher duty cycles, and meet the 400ns minimum
off-time at 4.5V input voltage. The off-time should be about
500ns, which includes a 100ns guard band. The duty cycle
for (3.3V/4.5V) = ~73%. Frequency = (1 – DC)/tOFF or
(1 – 0.73)/500ns = 540kHz. The switching frequency
needs to be lowered to 540kHz at 4.5V input. tON = DC/
frequency, or 1.35µs. The fSET pin voltage is 1/3 of VIN, and
the IfSET current equates to 38µA with the internal 39.2k.
The IfSET current needs to be 24µA for 540kHz operation.
As shown in Figure 19, a resistor can be placed from VOUT
to fSET to lower the effective IfSET current out of the fSET
pin to 24µA. The fSET pin is 4.5V/3 =1.5V and VOUT = 3.3V,
therefore 130k will source 14µA into the fSET node and
lower the IfSET current to 24µA. This enables the 540kHz
operation and the 4.5V to 28V input operation for down
converting to 3.3V output. The frequency will scale from
540kHz to 1.1 MHz over this input range. This provides
for an effective output current of 8A over the input range.
4601ahvfc
For more information www.linear.com/LTM4601AHV
LTM4601AHV
Applications Information
VOUT
VIN
10V TO 28V
R2
100k
TRACK/SS CONTROL
R4
100k
MPGM
RUN
COMP
INTVCC
DRVCC
5% MARGIN
R1
392k
1%
C1
10µF
35V
C2
10µF
35V
REVIEW TEMPERATURE
DERATING CURVE
PLLIN TRACK/SS
VOUT
VIN
PGOOD
LTM4601AHV
SGND
PGND
C3
100µF
6.3V
SANYO
POSCAP
+
VFB
MARG0
MARG1
VOUT_LCL
DIFFVOUT
VOSNS+
VOSNS–
VOUT
5V
8A
22µF
6.3V
REFER TO
TABLE 2
fSET
RfSET
100k
RSET
8.25k
MARGIN CONTROL
IMPROVE
EFFICIENCY
FOR ≥12V INPUT
SOT-323
CMSSH-3C3
4601AHV F18
Figure 18. 5V at 8A Design Without Differential Amplifier
VIN
4.5V TO 16V
VOUT
R2
100k
TRACK/SS CONTROL
R4
100k
PGOOD
C2
10µF
25V
3x
PLLIN TRACK/SS
VOUT
VIN
PGOOD
MPGM
RUN
COMP
INTVCC
DRVCC
LTM4601AHV
R1
392k
SGND
5% MARGIN
PGND
REVIEW TEMPERATURE
DERATING CURVE
VFB
MARG0
MARG1
VOUT_LCL
DIFFVOUT
VOSNS+
VOSNS–
fSET
+
RfSET
130k
MARGIN CONTROL
VOUT
3.3V
10A
C3
100µF
6.3V
SANYO
POSCAP
22µF
6.3V
RSET
13.3k
4601AHV F19
Figure 19. 3.3V at 10A Design
4601ahvfc
For more information www.linear.com/LTM4601AHV
21
LTM4601AHV
Applications Information
CLOCK SYNC
C5
0.01µF
VOUT
VIN
22V TO 28V
R2
100k
R4
100k
PGOOD
CIN
BULK
OPT
+
CIN
10µF
35V
3x CER
PLLIN TRACK/SS
VOUT
VIN
PGOOD
MPGM
RUN
ON/OFF
COMP
INTVCC
DRVCC
R1
392k
LTM4601AHV
SGND
PGND
REVIEW TEMPERATURE
DERATING CURVE
C3 100pF
VFB
MARG0
MARG1
VOUT_LCL
DIFFVOUT
VOSNS+
VOSNS–
fSET
COUT1
100µF
6.3V
MARGIN
CONTROL
RfSET
175k
RSET
40.2k
VIN
4601AHV F20
5% MARGIN
+
COUT2
470µF
6.3V
VOUT
1.5V
10A
REFER TO
TABLE 2 FOR
DIFFERENT
OUTPUT
VOLTAGE
Figure 20. Typical 22V to 28V, 1.5V at 10A Design, 500kHz
VOUT
VIN
6V TO 28V
118k
1%
R2
100k
+
C1
0.1µF
LTC6908-1
1
2
3
V+
OUT1
GND
OUT2
SET
MOD
6
5
4
CLOCK SYNC
0° PHASE
C5*
100µF
35V
C2
10µF
35V
2x
R4
100k
MPGM
RUN
COMP
INTVCC
DRVCC
R1
392k
PLLIN TRACK/SS
VOUT
VIN
PGOOD
LTM4601AHV
SGND
5%
MARGIN
2-PHASE
OSCILLATOR
VFB
MARG0
MARG1
TRACK/SS CONTROL
C6 220pF
VOUT_LCL
DIFFVOUT
VOSNS+
VOSNS–
fSET
PGND
60.4k + R
SET
N
RSET
N = NUMBER OF PHASES
VOUT = 0.6V
C3
22µF
6.3V
C4
470µF
6.3V
VOUT
3.3V
20A
+
REFER TO
TABLE 2
RSET
6.65k
100pF
MARGIN CONTROL
CLOCK SYNC
180° PHASE
TRACK/SS CONTROL
C7
0.033µF
VIN
PGOOD
PGOOD
MPGM
RUN
COMP
INTVCC
DRVCC
C8
10µF
35V
2x
PLLIN TRACK/SS
VOUT
LTM4601AHV
392k
* C5 OPTIONAL TO REDUCE ANY LC RINGING.
NOT NEEDED FOR LOW INDUCTANCE
PLANE CONNECTION
SGND
PGND
C3
22µF
6.3V
VFB
MARG0
MARG1
+
C4
470µF
6.3V
REFER TO
TABLE 2
VOUT_LCL
DIFFVOUT
VOSNS+
VOSNS–
fSET
4601AHV F21
Figure 21. 2-Phase Parallel, 3.3V at 20A Design
22
4601ahvfc
For more information www.linear.com/LTM4601AHV
C1
10µF
35V
VIN
6V TO
28V
R2
392k
R3
100k
C3
0.15µF
MOD
SET
VIN
OUT2
GND
OUT1
PLLIN
180° PHASE
SGND
PGND
For more information www.linear.com/LTM4601AHV
MARGIN CONTROL
R1
13.3k
C2
100µF
6.3V
TRACK
R15
19.1k
R16
60.4k
3.3V
VOUT1
3.3V
C4 10A
150µF
6.3V
0° PHASE
C5
10µF
35V
R7
100k
R6
392k
R8
100k
3.3V
VIN
PLLIN
SGND
4601AHV F22
PGND
VOUT
PGOOD
FB
RUN
VOUT_LCL
COMP
DIFFVOUT
INTVCC
LTM4601AHV
DRVCC
VOSNS+
MPGM
VOSNS–
MARG0
fSET
TRACK/SS
MARG1
Figure 22. Dual Outputs (3.3V and 2.5V) with Coincident Tracking
VOUT
PGOOD
FB
RUN
VOUT_LCL
COMP
DIFFVOUT
INTVCC
LTM4601AHV
DRVCC
VOSNS+
MPGM
VOSNS–
MARG0
fSET
TRACK/SS
MARG1
C8
0.1µF
R4
100k
3.3V
R1
118k
V+
LTC6908-1
2-PHASE
OSCILLATOR
C6
100µF
6.3V
MARGIN CONTROL
R5
19.1k
VOUT2
2.5V
C7 10A
150µF
6.3V
LTM4601AHV
Typical Applications
23
4601ahvfc
24
C1
10µF
35V
VIN
6V TO
28V
R2
392k
R3
100k
C3
0.15µF
R4
100k
1.8V
R1
182k
MOD
VIN
OUT2
SET
OUT1
GND
V+
PLLIN
180° PHASE
SGND
PGND
For more information www.linear.com/LTM4601AHV
MARGIN CONTROL
R1
30.1k
C8
47pF
C2
100µF
6.3V
R15
40.2k
1.8V
TRACK
R16
60.4k
VOUT1
1.8V
C4 10A
220µF
6.3V
0° PHASE
C5
10µF
35V
R7
100k
R6
392k
R8
100k
1.8V
PLLIN
SGND
4601AHV F23
PGND
VOUT
PGOOD
FB
RUN
VOUT_LCL
COMP
DIFFVOUT
INTVCC
LTM4601AHV
DRVCC
VOSNS+
MPGM
VOSNS–
MARG0
fSET
TRACK/SS
MARG1
VIN
Figure 23. Dual Outputs (1.8V and 1.5V) with Coincident Tracking
VOUT
PGOOD
FB
RUN
VOUT_LCL
COMP
DIFFVOUT
INTVCC
LTM4601AHV
DRVCC
VOSNS+
MPGM
VOSNS–
MARG0
fSET
TRACK/SS
MARG1
C8
0.1µF
LTC6908-1
2-PHASE
OSCILLATOR
MARGIN CONTROL
R5
40.2k
C9
47pF
C6
100µF
6.3V
VOUT2
1.5V
C7 10A
220µF
6.3V
LTM4601AHV
Typical Applications
4601ahvfc
aaa Z
0.630 ±0.025 Ø 133x
3.1750
3.1750
SUGGESTED PCB LAYOUT
TOP VIEW
1.9050
PACKAGE TOP VIEW
E
0.6350
0.0000
0.6350
4
1.9050
PIN “A1”
CORNER
6.9850
5.7150
4.4450
4.4450
5.7150
6.9850
Y
For more information www.linear.com/LTM4601AHV
6.9850
5.7150
4.4450
3.1750
1.9050
0.6350
0.0000
0.6350
1.9050
3.1750
4.4450
5.7150
6.9850
X
D
2.45 – 2.55
aaa Z
SYMBOL
A
A1
A2
b
b1
D
E
e
F
G
aaa
bbb
ccc
ddd
eee
NOM
3.42
0.60
2.82
0.75
0.63
15.0
15.0
1.27
13.97
13.97
DIMENSIONS
0.15
0.10
0.20
0.30
0.15
MAX
3.62
0.70
2.92
0.90
0.66
NOTES
DETAIL B
PACKAGE SIDE VIEW
A2
TOTAL NUMBER OF BALLS: 133
MIN
3.22
0.50
2.72
0.60
0.60
DETAIL A
b1
0.27 – 0.37
SUBSTRATE
A1
ddd M Z X Y
eee M Z
DETAIL B
MOLD
CAP
ccc Z
Øb (133 PLACES)
// bbb Z
A
Z
F
e
b
b
L
K
J
G
G
F
e
E
PACKAGE BOTTOM VIEW
H
D
C
B
A
DETAILS OF PIN #1 IDENTIFIER ARE OPTIONAL,
BUT MUST BE LOCATED WITHIN THE ZONE INDICATED.
THE PIN #1 IDENTIFIER MAY BE EITHER A MOLD OR
MARKED FEATURE
4
TRAY PIN 1
BEVEL
BGA 133 0511 REV B
PACKAGE IN TRAY LOADING ORIENTATION
LTMXXXXXX
µModule
5. PRIMARY DATUM -Z- IS SEATING PLANE
BALL DESIGNATION PER JESD MS-028 AND JEP95
3
2. ALL DIMENSIONS ARE IN MILLIMETERS
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M-1994
M
DETAIL A
COMPONENT
PIN “A1”
3
SEE NOTES
(Reference
LTC DWG
# 05-08-1877
RevRev
B) B)
(Reference
LTC DWG
# 05-08-1877
BGA Package
BGA Package
133-Lead
(15mm
× 15mm
× 3.42mm)
133-Lead
(15mm
× 15mm
× 3.42mm)
1
2
3
4
5
6
7
8
9
10
11
12
PIN 1
LTM4601AHV
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
Package Description
25
4601ahvfc
For more information www.linear.com/LTM4601AHV
6.9850
5.7150
4.4450
3.1750
1.9050
0.6350
0.0000
0.6350
1.9050
3.1750
4.4450
5.7150
6.9850
4
PAD 1
CORNER
15
BSC
PACKAGE TOP VIEW
3.1750
3.1750
SUGGESTED PCB LAYOUT
TOP VIEW
1.9050
X
15
BSC
Y
DETAIL B
2.72 – 2.92
DETAILS OF PAD #1 IDENTIFIER ARE OPTIONAL,
BUT MUST BE LOCATED WITHIN THE ZONE INDICATED.
THE PAD #1 IDENTIFIER MAY BE EITHER A MOLD OR
MARKED FEATURE
LAND DESIGNATION PER JESD MO-222, SPP-010
SYMBOL TOLERANCE
aaa
0.10
bbb
0.10
eee
0.05
6. THE TOTAL NUMBER OF PADS: 133
5. PRIMARY DATUM -Z- IS SEATING PLANE
4
3
2. ALL DIMENSIONS ARE IN MILLIMETERS
3
M
L
TRAY PIN 1
BEVEL
COMPONENT
PIN “A1”
PADS
SEE NOTES
1.27
BSC
13.97
BSC
0.12 – 0.28
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M-1994
DETAIL A
0.27 – 0.37
SUBSTRATE
eee S X Y
DETAIL B
MOLD
CAP
0.630 0.025 SQ. 133x
aaa Z
2.45 – 2.55
bbb Z
aaa Z
0.6350
0.0000
0.6350
(Reference LTC DWG # 05-08-1755 Rev Ø)
Z
26
1.9050
LGA Package
133-Lead (15mm × 15mm × 2.82mm)
K
G
F
E
LTMXXXXXX
µModule
PACKAGE BOTTOM VIEW
H
D
C
B
LGA 133 0807 REV Ø
A
DETAIL A
PACKAGE IN TRAY LOADING ORIENTATION
J
13.97
BSC
1
2
3
4
5
6
7
8
9
10
11
12
C(0.30)
PAD 1
LTM4601AHV
Package Description
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
4601ahvfc
6.9850
5.7150
4.4450
4.4450
5.7150
6.9850
LTM4601AHV
Package Description
Pin Assignment Table 5
(Arranged by Pin Number)
PIN NAME
A1 VIN
A2 VIN
A3 VIN
A4 VIN
A5 VIN
A6 VIN
A7 INTVCC
A8 PLLIN
A9 TRACK/SS
A10 RUN
A11 COMP
A12 MPGM
PIN NAME
B1 VIN
B2 VIN
B3 VIN
B4 VIN
B5 VIN
B6 VIN
B7 PGND
B8 B9 PGND
B10 B11 MPGM
B12 fSET
PIN NAME
C1 VIN
C2 VIN
C3 VIN
C4 VIN
C5 VIN
C6 VIN
C7 PGND
C8 C9 PGND
C10 MTP1
C11 fSET
PIN NAME
D1 PGND
D2 PGND
D3 PGND
D4 PGND
D5 PGND
D6 PGND
D7 D8 PGND
D9 INTVCC
D10 MPT2
D11 MPT3
PIN NAME
E1 PGND
E2 PGND
E3 PGND
E4 PGND
E5 PGND
E6 PGND
E7 PGND
E8 E9 PGND
E10 E11 -
PIN NAME
F1 PGND
F2 PGND
F3 PGND
F4 PGND
F5 PGND
F6 PGND
F7 PGND
F8 PGND
F9 PGND
F10 F11 PGOOD
C12 MARG0
D12 MARG1
E12 DRVCC
F12 VFB
PIN NAME
G1 PGND
G2 PGND
G3 PGND
G4 PGND
G5 PGND
G6 PGND
G7 PGND
G8 PGND
G9 PGND
G10 G11 SGND
G12 PGOOD
PIN NAME
H1 PGND
H2 PGND
H3 PGND
H4 PGND
H5 PGND
H6 PGND
H7 PGND
H8 PGND
H9 PGND
H10 H11 SGND
H12 SGND
PIN NAME
J1 VOUT
J2 VOUT
J3 VOUT
J4 VOUT
J5 VOUT
J6 VOUT
J7 VOUT
J8 VOUT
J9 VOUT
J10 VOUT
J11 J12 VOSNS+
PIN NAME
K1 VOUT
K2 VOUT
K3 VOUT
K4 VOUT
K5 VOUT
K6 VOUT
K7 VOUT
K8 VOUT
K9 VOUT
K10 VOUT
K11 VOUT
K12 DIFFVOUT
PIN NAME
L1 VOUT
L2 VOUT
L3 VOUT
L4 VOUT
L5 VOUT
L6 VOUT
L7 VOUT
L8 VOUT
L9 VOUT
L10 VOUT
L11 VOUT
L12 VOUT_LCL
PIN NAME
M1 VOUT
M2 VOUT
M3 VOUT
M4 VOUT
M5 VOUT
M6 VOUT
M7 VOUT
M8 VOUT
M9 VOUT
M10 VOUT
M11 VOUT
M12 VOSNS–
4601ahvfc
For more information www.linear.com/LTM4601AHV
27
LTM4601AHV
Package Description
Pin Assignment Tables
(Arranged by Pin Function)
PIN NAME
A1
A2
A3
A4
A5
A6
VIN
VIN
VIN
VIN
VIN
VIN
B1
B2
B3
B4
B5
B6
VIN
VIN
VIN
VIN
VIN
VIN
C1
C2
C3
C4
C5
C6
VIN
VIN
VIN
VIN
VIN
VIN
28
PIN NAME
PIN NAME
D1
D2
D3
D4
D5
D6
D8
PGND
PGND
PGND
PGND
PGND
PGND
PGND
E1
E2
E3
E4
E5
E6
E7
PGND
PGND
PGND
PGND
PGND
PGND
PGND
F1
F2
F3
F4
F5
F6
F7
F8
F9
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
G1
G2
G3
G4
G5
G6
G7
G8
G9
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
H1
H2
H3
H4
H5
H6
H7
H8
H9
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PIN NAME
J1
J2
J3
J4
J5
J6
J7
J8
J9
J10
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
A7
A8
A9
A10
A11
A12
INTVCC
PLLIN
TRACK/SS
RUN
COMP
MPGM
B12
fSET
C12
MARG0
K1
K2
K3
K4
K5
K6
K7
K8
K9
K10
K11
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
D12
MARG1
E12
DRVCC
F12
VFB
G12
PGOOD
H12
SGND
J12
VOSNS+
K12
DIFFVOUT
L12
VOUT_LCL
L1
L2
L3
L4
L5
L6
L7
L8
L9
L10
L11
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
M12
VOSNS–
M1
M2
M3
M4
M5
M6
M7
M8
M9
M10
M11
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
PIN NAME
B7
B8
B9
B10
B11
PGND
PGND
MPGM
C7
C8
C9
C10
C11
PGND
PGND
MTP1
fSET
D7
D8
D9
D10
D11
PGND
INTVCC
MTP2
MTP3
E8
E9
E10
E11
PGND
-
F10
F11
PGOOD
G10
G11
SGND
H10
H11
SGND
J11
-
4601ahvfc
For more information www.linear.com/LTM4601AHV
LTM4601AHV
Revision History
REV
DATE
DESCRIPTION
PAGE NUMBER
A
12/10
Updated DIFFVOUT Range specification in the Electrical Characteristics section.
3
Updated MTP1, MTP2, MTP3 pin description in the Pin Functions section.
8
Updated the Simplified Block Diagram.
Edited various text in the Applications Information section.
Updated Figures 7 and 8.
B
8/11
Added BGA package. Changes reflected throughout the data sheet.
C
2/14
Added SnPb BGA option
8
10 to 21
15
1 to 30
1, 2
4601ahvfc
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representaFor moreof information
www.linear.com/LTM4601AHV
tion that the interconnection
its circuits as described
herein will not infringe on existing patent rights.
29
LTM4601AHV
Package Photos
3.42mm
15mm
2.82mm
15mm
15mm
15mm
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500mA, 36VIN DC/DC µModule Regulator
3V ≤ VIN ≤ 36V, 0.8V ≤ VOUT ≤ 5V,
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LTM8022/LTM8023 1A/2A, 36VIN DC/DC µModule Regulator Family
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This product contains technology licensed from Silicon Semiconductor Corporation.
30
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA For
95035-7417
more information www.linear.com/LTM4601AHV
●
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(408) 432-1900 FAX: (408) 434-0507
www.linear.com/LTM4601AHV
®
4601ahvfc
LT 0214 REV C • PRINTED IN USA
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