LTM4608A
Low VIN, 8A DC/DC µModule
Regulator with Tracking, Margining,
and Frequency Synchronization
DESCRIPTION
FEATURES
Complete Standalone Power Supply
n ±1.75% Total DC Output Error (–55°C to 125°C)
n 2.7V to 5.5V Input Voltage Range
n 8A DC, 10A Peak Output Current
n 0.6V Up to 5V Output
n Output Voltage Tracking and Margining
n Power Good Tracks Margining
n Multiphase Operation
n Parallel Current Sharing
n Onboard Frequency Synchronization
n Spread Spectrum Frequency Modulation
n Overcurrent/Thermal Shutdown Protection
n Current Mode Control/Fast Transient Response
n Selectable Burst Mode® Operation
n Up to 95% Efficiency
n Output Overvoltage Protection
n 9mm × 15mm × 2.82mm LGA and
9mm × 15mm × 3.42mm BGA Packages
The LTM®4608A is a complete 8A switch mode DC/DC power
supply with ±1.75% total output voltage error. Included
in the package are the switching controller, power FETs,
inductor and all support components. Operating over an
input voltage range of 2.7V to 5.5V, the LTM4608A supports an output voltage range of 0.6V to 5V, set by a single
external resistor. This high efficiency design delivers up
to 8A continuous current (10A peak). Only bulk input and
output capacitors are needed to complete the design.
n
The low profile package (2.82mm) enables utilization
of unused space on the back side of PC boards for high
density point-of-load regulation. The 0.630mm LGA pads
with 1.27mm pitch simplify PCB layout by providing standard trace routing and via placement. The high switching
frequency and current mode architecture enable a very
fast transient response to line and load changes without
sacrificing stability. The device supports frequency synchronization, programmable multiphase and/or spread
spectrum operation, output voltage tracking for supply
rail sequencing and voltage margining.
APPLICATIONS
Telecom, Networking and Industrial Equipment
Storage Systems
n Point of Load Regulation
Fault protection features include overvoltage protection, overcurrent protection and thermal shutdown. The
LTM4608A is offered in 9mm × 15mm × 2.82mm LGA and
9mm × 15mm × 3.42mm BGA packages. The LTM4608A is
available with SnPb (BGA) or RoHS compliant terminal finish.
n
n
L, LT, LTC, LTM, Linear Technology, the Linear logo, Burst Mode, µModule and PolyPhase
are registered trademarks and LTpowerCAD is a trademark of Linear Technology Corporation.
All other trademarks are the property of their respective owners. Protected by U.S. Patents
including 5481178, 6580258, 6304066, 6127815, 6498466, 6611131.
TYPICAL APPLICATION
Efficiency vs Load Current
100
2.7V to 5.5V Input to 1.8V Output DC/DC µModule® Regulator
CLKIN
CLKIN
VIN
10µF
95
SVIN
FB
SW
RUN
VOUT
1.8V
VOUT
LTM4608A
ITH
100µF
4.87k
ITHM
PLLLPF
PGOOD
TRACK
MGN
CLKOUT GND SGND
VIN = 3.3V
EFFICIENCY (%)
VIN
2.7V TO 5.5V
VOUT = 1.8V
90
VIN = 5V
85
80
PGOOD
75
4608A TA01a
70
0
For more information www.linear.com/LTM4608A
2
4
6
LOAD CURRENT (A)
8
10
4608A TA01b
4608afe
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LTM4608A
ABSOLUTE MAXIMUM RATINGS
(Note 1)
Internal Operating Temperature Range
(Note 2)................................................... –55°C to 125°C
Storage Temperature Range................... –55°C to 125°C
Peak Solder Reflow Body Temperature.................. 245°C
VIN, SVIN....................................................... –0.3V to 6V
CLKOUT........................................................ –0.3V to 2V
PGOOD, PLLLPF, CLKIN, PHMODE, MODE.. –0.3V to VIN
ITH, ITHM, RUN, FB, TRACK,MGN, BSEL....... –0.3V to VIN
VOUT, SW....................................... –0.3V to (VIN + 0.3V)
PIN CONFIGURATION
1
A
GND
B
PHMODE
MODE
F
G
GND
SW
1
PLLLPF
4
CLKIN
SVIN
5
PHMODE
ITHM
TRACK
MODE
9
10
10
GND
F
G
GND
RUN
SGND
SW
CLKOUT
PLLLPF
SVIN
5
9
11
VIN
4
8
MGN
ITH
FB
7
TOP VIEW
C
D
E
3
PGOOD 6
BSEL
7
MGN
8
PGOOD
BSEL
GND
2
CLKOUT
3
6
B
A
RUN
SGND
2
CLKIN
TOP VIEW
C
D
E
VIN
ITHM
TRACK
FB
ITH
11
VOUT
GND
BGA PACKAGE
68-LEAD (15mm × 9mm × 3.42mm)
TJMAX = 125°C, θJA = 25°C/W, θJCbottom = 7°C/W, θJCtop = 50°C/W, WEIGHT = 1.1g
VOUT
LGA PACKAGE
68-LEAD (15mm × 9mm × 2.82mm)
TJMAX = 125°C, θJA = 25°C/W, θJCbottom = 7°C/W, θJCtop = 50°C/W, WEIGHT = 1.0g
ORDER INFORMATION
PART MARKING*
PART NUMBER
PAD OR BALL FINISH
LTM4608AEV#PBF
LTM4608AIV#PBF
Au (RoHS)
PACKAGE
TYPE
MSL
RATING
e4
LGA
3
LTM4608AV
LTM4608AMPV
LTM4608AEY#PBF
SAC305 (RoHS)
LTM4608AY
e1
LTM4608AY
SnPb (63/37)
LTM4608AY
• Consult Marketing for parts specified with wider operating temperature
ranges. *Pad or ball finish code is per IPC/JEDEC J-STD-609.
• Device temperature grade is indicated by a label on the shipping
container.
TEMPERATURE RANGE
(SEE NOTE 2)
–40°C to 125°C
–55°C to 125°C
LTM4608AY
LTM4608AMPY#PBF
LTM4608AMPY
FINISH CODE
LTM4608AV
LTM4608AMPV#PBF
LTM4608AIY#PBF
DEVICE
–40°C to 125°C
BGA
e0
3
–55°C to 125°C
• Recommended LGA and BGA PCB Assembly and Manufacturing
Procedures: www.linear.com/umodule/pcbassembly
• LGA and BGA Package and Tray Drawings: www.linear.com/packaging
• Terminal Finish Part Marking: www.linear.com/leadfree
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LTM4608A
ELECTRICAL
CHARACTERISTICS
The l denotes the specifications which apply over the specified internal
operating temperature range (Note 2), otherwise specifications are at TA = 25°C. VIN = 5V unless otherwise noted. See Figure 1.
SYMBOL
PARAMETER
VIN(DC)
Input DC Voltage
VOUT(DC)
Output Voltage, Total Variation
with Line and Load
CONDITIONS
CIN = 10µF × 1, COUT = 100µF Ceramic,
100µF POSCAP, RFB = 6.65k, MODE = 0V
VIN = 2.7V to 5.5V, IOUT = IOUT(DC)MIN to
IOUT(DC)MAX (Note 3)
MIN
l
2.7
l
1.472
1.464
2.05
1.85
TYP
MAX
UNITS
5.5
V
1.49
1.49
1.508
1.516
V
V
2.2
2.0
2.35
2.15
V
V
Input Specifications
VIN(UVLO)
Undervoltage Lockout Threshold
SVIN Rising
SVIN Falling
IQ(VIN)
Input Supply Bias Current
VIN = 3.3V, No Switching, MODE = VIN
VIN = 3.3V, No Switching, MODE = 0V
VIN = 3.3V, VOUT = 1.5V, Switching Continuous
400
1.15
55
µA
mA
mA
VIN = 5V, No Switching, MODE = VIN
VIN = 5V, No Switching, MODE = 0V
VIN = 5V, VOUT = 1.5V, Switching Continuous
450
1.3
75
µA
mA
mA
1
µA
4.5
2.93
A
A
Shutdown, RUN = 0, VIN = 5V
IS(VIN)
Input Supply Current
VIN = 3.3V, VOUT = 1.5V, IOUT = 8A
VIN = 5V, VOUT = 1.5V, IOUT = 8A
Output Specifications
IOUT(DC)
Output Continuous Current Range VOUT = 1.5V
(Note 3)
VIN = 3.3V, 5.5V
VIN = 2.7V
∆VOUT(LINE)
VOUT
Line Regulation Accuracy
VOUT = 1.5V, VIN from 2.7V to 5.5V, IOUT = 0A
l
0.1
0.25
%/V
∆VOUT(LOAD)
VOUT
Load Regulation Accuracy
VOUT = 1.5V (Note 3)
VIN = 3.3V, 5.5V, ILOAD = 0A to 8A
VIN = 2.7V, ILOAD = 0A to 5A
l
l
0.3
0.3
0.75
0.75
%
%
VOUT(AC)
Output Ripple Voltage
IOUT = 0A, COUT = 100µF X5R Ceramic, VIN = 5V,
VOUT = 1.5V
fS
Switching Frequency
IOUT = 8A, VIN = 5V, VOUT = 1.5V
fSYNC
SYNC Capture Range
∆VOUT(START)
Turn-On Overshoot
COUT = 100µF, VOUT = 1.5V, IOUT = 0A
VIN = 3.3V
VIN = 5V
tSTART
Turn-On Time
COUT = 100µF, VOUT = 1.5V, VIN = 5V,
IOUT = 1A Resistive Load, Track = VIN,
∆VOUT(LS)
0
0
8
5
10
1.25
1.5
0.75
A
A
mVP-P
1.75
MHz
2.25
MHz
10
10
mV
mV
100
µs
Peak Deviation for Dynamic Load Load: 0% to 50% to 0% of Full Load,
COUT = 100µF Ceramic, 100µF POSCAP,
VIN = 5V, VOUT = 1.5V
15
mV
tSETTLE
Settling Time for Dynamic Load
Step
Load: 0% to 50% to 0% of Full Load, VIN = 5V,
VOUT = 1.5V, COUT = 100µF
10
µs
IOUT(PK)
Output Current Limit
COUT = 100µF
VIN = 2.7V, VOUT = 1.5V
VIN = 3.3V, VOUT = 1.5V
VIN = 5V, VOUT = 1.5V
8
11
13
A
A
A
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LTM4608A
ELECTRICAL
CHARACTERISTICS
The l denotes the specifications which apply over the specified internal
operating temperature range (Note 2), otherwise specifications are at TA = 25°C. VIN = 5V unless otherwise noted. See Figure 1.
SYMBOL
PARAMETER
CONDITIONS
Voltage at FB Pin
IOUT = 0A, VOUT = 1.5V, VIN = 2.7V to 5.5V
MIN
TYP
MAX
UNITS
0.590
0.587
0.596
0.596
0.602
0.606
V
V
Control Section
VFB
l
SS Delay
Internal Soft-Start Delay
90
µs
0.2
IFB
VRUN
RUN Pin On/Off Threshold
RUN Rising
RUN Falling
TRACK
Tracking Threshold (Rising)
Tracking Threshold (Falling)
Tracking Disable Threshold
RUN = VIN
RUN = 0V
RFBHI
Resistor Between VOUT and FB
Pins
∆VPGOOD
PGOOD Range
%Margining
Output Voltage Margining
Percentage
1.4
1.3
1.55
1.4
µA
1.7
1.5
0.57
0.18
VIN – 0.5
9.95
10
V
V
V
10.05
±10
MGN = VIN, BSEL = 0V
MGN = VIN, BSEL = VIN
MGN = VIN, BSEL = Float
MGN = 0V, BSEL = 0V
MGN = 0V, BSEL = VIN
MGN = 0V, BSEL = Float
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTM4608A is tested under pulsed load conditions such that
TJ ≈ TA. The LTM4608AE is guaranteed to meet specifications from
0°C to 125°C internal temperature. Specifications over the –40°C to
125°C internal operating temperature range are assured by design,
characterization and correlation with statistical process controls.
V
V
4
9
14
–4
–9
–14
5
10
15
–5
–10
–15
kΩ
%
6
11
16
–6
–11
–16
%
%
%
%
%
%
The LTM4608AI is guaranteed over the –40°C to 125°C internal operating
temperature range and the LTM4608AMP is tested and guaranteed over
the full –55°C to 125°C internal operating temperature range. Note that
the maximum ambient temperature consistent with these specifications
is determined by specific operating conditions in conjunction with board
layout, the rated package thermal impedance and other environmental
factors.
Note 3: See output current derating curves for different VIN, VOUT and TA.
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LTM4608A
TYPICAL PERFORMANCE CHARACTERISTICS
Efficiency vs Load Current
Efficiency vs Load Current
100
CONTINUOUS MODE
CONTINUOUS MODE
95
90
90
90
85
80
5VIN 1.2VOUT
5VIN 1.5VOUT
5VIN 1.8VOUT
5VIN 2.5VOUT
5VIN 3.3VOUT
70
0
2
4
LOAD CURRENT
EFFICIENCY (%)
95
75
85
80
3.3VIN 1.2VOUT
3.3VIN 1.5VOUT
3.3VIN 1.8VOUT
3.3VIN 2.5VOUT
75
6
70
8
0
2
4
LOAD CURRENT
6
60
VOUT = 1.5V
VOUT = 2.5V
VOUT = 3.3V
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1
LOAD CURRENT (A)
3.5
3.5
3.0
3.0
2.5
2.5
2.0
1.5
1.0
0.5
0
2
3
4
5
0.6
1.5
0
VOUT = 1.8V
VOUT = 2.5V
VOUT = 3.3V
IOUT = 6A
VOUT = 1.2V
VOUT = 1.5V
2
3
VIN (V)
4
5
6
VIN (V)
4608A G05
4608A G06
Load Transient Response
ILOAD
2A/DIV
VOUT
20mV/DIV
AC COUPLED
VOUT
20mV/DIV
AC COUPLED
0.8
VO = 1.2V BURST MODE
0.4
0.2
0
6
VIN
2V/DIV
1
7
6
2.0
0.5
Load Transient Response
VO = 1.2V PULSE-SKIPPING MODE
4
3
2
5
LOAD CURRENT (A)
1
1.0
VOUT = 1.8V
VOUT = 2.5V
VOUT = 3.3V
IOUT = 8A
VOUT = 1.2V
VOUT = 1.5V
ILOAD
1A/DIV
1.2
0
VIN to VOUT Step-Down Ratio
4.0
Supply Current vs VIN
1.4
2.7VIN 1.0VOUT
2.7VIN 1.5VOUT
2.7VIN 1.8VOUT
4608A G03
4.0
4608A G04
1.6
70
8
VOUT (V)
80
VOUT (V)
EFFICIENCY (%)
90
40
80
VIN to VOUT Step-Down Ratio
100
50
85
4608A G02
Burst Mode Efficiency with
5V Input
70
CONTINUOUS MODE
75
4608A G01
SUPPLY CURRENT (mA)
Efficiency vs Load Current
100
95
EFFICIENCY (%)
EFFICIENCY (%)
100
2.5
3
3.5
4
4.5
INPUT VOLTAGE (V)
5
5.5
4608A G08
VIN = 5V
20µs/DIV
VOUT = 3.3V, RFB = 2.21k
2A/µs STEP
COUT = 100µF X5R
C1 = 100pF, C3 = 22pF FROM FIGURE 18
4608A G09
VIN = 5V
20µs/DIV
VOUT = 2.5V, RFB = 3.09k
2.5A/µs STEP
COUT = 100µF X5R
C1 = 120pF, C3 = 47pF FROM FIGURE 18
4608A G07
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LTM4608A
TYPICAL PERFORMANCE CHARACTERISTICS
Load Transient Response
Load Transient Response
Load Transient Response
ILOAD
2A/DIV
ILOAD
2A/DIV
ILOAD
2A/DIV
VOUT
20mV/DIV
AC COUPLED
VOUT
20mV/DIV
AC COUPLED
VOUT
20mV/DIV
AC COUPLED
4608A G10
VIN = 5V
20µs/DIV
VOUT = 1.8V, RFB = 4.87k
2.5A/µs STEP
COUT = 100µF X5R
C1 = NONE, C3 = NONE FROM FIGURE 18
4608A G11
VIN = 5V
20µs/DIV
VOUT = 1.5V, RFB = 6.65k
2.5A/µs STEP
COUT = 100µF X5R
C1 = NONE, C3 = NONE FROM FIGURE 18
Start-Up
4608A G12
VIN = 5V
20µs/DIV
VOUT = 1.2V, RFB = 10k
2.5A/µs STEP
COUT = 2 × 100µF
C1 = 100pF, C3 = NONE FROM FIGURE 18
VFB vs Temperature
Load Regulation vs Current
0
602
–0.1
600
VOUT
0.5V/DIV
VFB (mV)
598
VIN
2V/DIV
LOAD REGULATION (%)
VIN = 5.5V
VIN = 3.3V
596
VIN = 2.7V
594
VIN = 5V
50µs/DIV
VOUT = 1.5V
COUT = 100µF NO LOAD AND 8A LOAD
(DEFAULT 100µs SOFT-START)
4608A G13
–0.2
–0.3
–0.4
FC MODE
VIN = 3.3V
VOUT = 1.5V
–0.5
592
590
–55
–25
5
65
35
TEMPERATURE (°C)
95
125
–0.6
2
0
4608A G14
4
6
LOAD CURRENT (A)
8
4608A G15
Short-Circuit Protection
(2.5V Short, No Load)
2.5V Output Current
Short-Circuit Protection
(2.5V Short, 4A Load)
3.0
2V/DIV
OUTPUT VOLTAGE (V)
2.5
2V/DIV
2.0
5A/DIV
1.5
VIN
5V/DIV
5V/DIV
VOUT
VIN
VOUT
IOUT LOAD
5A/DIV
IOUT
1.0
VIN = 5V
VOUT = 2.5V
0.5
0
0
5
10
15
OUTPUT CURRENT (A)
50µs/DIV
4608A G17
VIN = 5V
VOUT = 2.5V
50µs/DIV
4608A G18
20
4608A G16
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LTM4608A
PIN FUNCTIONS
VIN (C1, C8, C9, D1, D3-D5, D7-D9 and E8): Power Input
Pins. Apply input voltage between these pins and GND
pins. Recommend placing input decoupling capacitance
directly between VIN pins and GND pins.
VOUT (C10-C11, D10-D11, E9-E11, F9-F11, G9-G11):
Power Output Pins. Apply output load between these pins
and GND pins. Recommend placing output decoupling
capacitance directly between these pins and GND pins.
See Table 1.
GND (A1-A11, B1, B9-B11, F3, F7-F8, G1-G8): Power
Ground Pins for Both Input and Output Returns.
SVIN (F4): Signal Input Voltage. This pin is internally connected to VIN through a lowpass filter.
SGND (E1): Signal Ground Pin. Return ground path for all
analog and low power circuitry. Tie a single connection to
GND in the application.
MODE (B5): Mode Select Input. Tying this pin high enables
Burst Mode operation. Tying this pin low enables forced
continuous operation. Floating this pin or tying it to VIN/2
enables pulse-skipping operation.
CLKIN (B3): External Synchronization Input to Phase
Detector. This pin is internally terminated to SGND with a
50k resistor. The phase locked loop will force the internal
top power PMOS turn on to be synchronized with the
rising edge of the CLKIN signal. Connect this pin to SVIN
to enable spread spectrum modulation. During external
synchronization, make sure the PLLLPF pin is not tied to
VIN or GND.
PLLLPF (E3): Phase Locked Loop Lowpass Filter. An internal lowpass filter is tied to this pin. In spread spectrum
mode, placing a capacitor here to SGND controls the slew
rate from one frequency to the next. Alternatively, floating
this pin allows normal running frequency at 1.5MHz, tying
this pin to SVIN forces the part to run at 1.33 times its
normal frequency (2MHz), tying it to ground forces the
frequency to run at 0.67 times its normal frequency (1MHz).
PHMODE (B4): Phase Selector Input. This pin determines
the phase relationship between the internal oscillator and
CLKOUT. Tie it high for 2-phase operation, tie it low for
3-phase operation, and float or tie it to VIN/2 for 4-phase
operation.
MGN (B8): Margining Pin. Increases or decreases the
output voltage by the amount specified by the BSEL pin.
To disable margining, tie the MGN pin to a voltage divider
with 50k resistors from VIN to ground. See the Applications
Information section and Figure 20.
BSEL (B7): Margining Bit Select Pin. Tying BSEL low selects ±5%, tying it high selects ±10%. Floating it or tying
it to VIN/2 selects ±15%.
TRACK (E5): Output Voltage Tracking Pin. Voltage tracking is enabled when the TRACK voltage is below 0.57V.
If tracking is not desired, then connect the TRACK pin to
SVIN. If TRACK is not tied to SVIN, then the TRACK pin’s
voltage needs to be below 0.18V before the chip shuts
down even though RUN is already low. Do not float this
pin. A resistor divider and capacitor can be applied to the
TRACK pin to increase the soft-start time of the regulator.
See the Applications Information section. Can tie together
for parallel operation and tracking. Load current needs to
be present during track down.
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LTM4608A
PIN FUNCTIONS
FB (E7): The Negative Input of the Error Amplifier. Internally,
this pin is connected to VOUT with a 10k precision resistor.
Different output voltages can be programmed with an additional resistor between FB and GND pins. In PolyPhase®
operation, tie FB pins together for parallel operation. See
the Applications Information section for details.
ITH (F6): Current Control Threshold and Error Amplifier
Compensation Point. The current comparator threshold
increases with this control voltage. Tie together in parallel
operation.
ITHM (F5): Negative Input to the Internal ITH Differential
Amplifier. Tie this pin to SGND for single phase operation.
For PolyPhase operation, tie the master’s ITHM to SGND
while connecting all of the ITHM pins together.
PGOOD (C7): Output Voltage Power Good Indicator.
Open-drain logic output that is pulled to ground when the
output voltage is not within ±10% of the regulation point.
Disabled during margining.
RUN (F1): Run Control Pin. A voltage above 1.5V will turn
on the module.
SW (C3-C5): Switching Node of the Circuit is Used for
Testing Purposes. This can be connected to an electrically open circuit copper pad on the board for improved
thermal performance.
CLKOUT (F2): Output Clock Signal for PolyPhase Operation. The phase of CLKOUT is determined by the state of
the PHMODE pin.
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LTM4608A
SIMPLIFIED BLOCK DIAGRAM
SVIN
VIN
INTERNAL
FILTER
TRACK
10µF
10µF
VIN
2.7 TO 5.5V
+
10µF
CIN
MGN
BSEL
SW
M1
PGOOD
MODE
0.22µH
POWER
CONTROL
RUN
VOUT
VOUT
1.5V
CLKIN
CLKOUT
M2
PHMODE
22pF
22µF
COUT
GND
ITH
PLLLPF
10k
INTERNAL
COMP
FB
RFB
6.65k
INTERNAL
FILTER
ITHM
SGND
4608A BD
Figure 1. Simplified LTM4608A Block Diagram
Table 1. Decoupling Requirements. TA = 25°C, Block Diagram Configuration
SYMBOL
PARAMETER
CONDITIONS
CIN
External Input Capacitor Requirement
(VIN = 2.7V to 5.5V, VOUT = 1.5V)
IOUT = 8A
COUT
External Output Capacitor Requirement
(VIN = 2.7V to 5.5V, VOUT = 1.5V)
IOUT = 8A
MIN
TYP
10
MAX
UNITS
µF
100
µF
OPERATION
The LTM4608A is a standalone nonisolated switch mode
DC/DC power supply. It can deliver up to 8A of DC output
current with few external input and output capacitors.
This module provides precisely regulated output voltage
programmable via one external resistor from 0.6V DC to
5.0V DC over a 2.7V to 5.5V input voltage. The typical
application schematic is shown in Figure 18.
The LTM4608A has an integrated constant frequency current mode regulator and built-in power MOSFET devices
with fast switching speed. The typical switching frequency
is 1.5MHz. For switching noise sensitive applications, it
can be externally synchronized from 0.75MHz to 2.25MHz.
Even spread spectrum switching can be implemented in
the design to reduce noise.
4608afe
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9
LTM4608A
OPERATION
With current mode control and internal feedback loop
compensation, the LTM4608A module has sufficient
stability margins and good transient performance with
a wide range of output capacitors, even with all ceramic
output capacitors.
conditions. The Linear Technology µModule Power Design
Tool is provided for transient and stability analysis. The
FB pin is used to program the output voltage with a single
external resistor to ground.
Current mode control provides cycle-by-cycle fast current
limit and thermal shutdown in an overcurrent condition.
Internal overvoltage and undervoltage comparators pull
the open-drain PGOOD output low if the output feedback
voltage exits a ±10% window around the regulation point.
Multiphase operation can be easily employed with the
synchronization and phase mode controls. Up to 12 phases
can be cascaded to run simultaneously with respect to
each other by programming the PHMODE pin to different
levels. The LTM4608A has clock in and clock out for poly
phasing multiple devices or frequency synchronization.
Pulling the RUN pin below 1.3V forces the controller into
its shutdown state, by turning off both M1 and M2 at low
load current. The TRACK pin is used for programming the
output voltage ramp and voltage tracking during start-up.
See Applications Information.
High efficiency at light loads can be accomplished with
selectable Burst Mode operation using the MODE pin. These
light load features will accommodate battery operation.
Efficiency graphs are provided for light load operation in
the Typical Performance Characteristics.
The LTM4608A is internally compensated to be stable
over all operating conditions. Table 3 provides a guideline
for input and output capacitances for several operating
Output voltage margining is supported, and can be programed from ±5% to ±15% using the MGN and BSEL pins.
The PGOOD pin is disabled during margining
APPLICATIONS INFORMATION
The typical LTM4608A application circuit is shown in
Figure 18. External component selection is primarily
determined by the maximum load current and output
voltage. Refer to Table 3 for specific external capacitor
requirements for a particular application.
no feedback resistor. Adding a resistor RFB from FB pin
to GND programs the output voltage:
VIN to VOUT Step-Down Ratios
Table 2. RFB Resistor vs Output Voltage
There are restrictions in the maximum VIN to VOUT stepdown ratio that can be achieved for a given input voltage.
The LTM4608A is 100% duty cycle, but the VIN to VOUT
minimum dropout is a function of its load current. Please
refer to the curves in the Typical Performance Characteristics section of this data sheet for more information.
Output Voltage Programming
The PWM controller has an internal 0.596V reference
voltage. As shown in the Block Diagram, a 10k 0.5%
internal feedback resistor connects VOUT and FB pins
together. The output voltage will default to 0.596V with
VOUT = 0.596V •
10k + RFB
RFB
VOUT
0.596V
1.2V
1.5V
1.8V
2.5V
3.3V
RFB
Open
10k
6.65k
4.87k
3.09k
2.21k
Input Capacitors
The LTM4608A module should be connected to a low AC
impedance DC source. Three 10µF ceramic capacitors
are included inside the module. Additional input capacitors are only needed if a large load step is required up to
the 4A level. A 47µF to 100µF surface mount aluminum
electrolytic bulk capacitor can be used for more input bulk
capacitance. This bulk input capacitor is only needed if
the input source impedance is compromised by long inductive leads, traces or not enough source capacitance.
4608afe
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LTM4608A
APPLICATIONS INFORMATION
If low impedance power planes are used, then this 47µF
capacitor is not needed.
For a buck converter, the switching duty-cycle can be
estimated as:
D=
VOUT
VIN
Burst Mode Operation
Without considering the inductor current ripple, the RMS
current of the input capacitor can be estimated as:
ICIN(RMS) =
a function of stability and transient response. The Linear
Technology LTpowerCAD Design Tool will calculate the
output ripple reduction as the number phases implemented
increases by N times.
IOUT(MAX)
η%
• D • (1– D)
In the above equation, η% is the estimated efficiency of
the power module. The bulk capacitor can be a switcherrated electrolytic aluminum capacitor, polymer capacitor
for bulk input capacitance due to high inductance traces
or leads. If a low inductance plane is used to power the
device, then only one 10µF ceramic is required. The three
internal 10µF ceramics are typically rated for 2A of RMS
ripple current, so the ripple current at the worse case for
8A maximum current is 4A or less.
Output Capacitors
The LTM4608A is designed for low output voltage ripple
noise. The bulk output capacitors defined as COUT are
chosen with low enough effective series resistance (ESR)
to meet the output voltage ripple and transient requirements. COUT can be a low ESR tantalum capacitor, a low
ESR polymer capacitor or ceramic capacitor. The typical
output capacitance range is from 47µF to 220µF. Additional
output filtering may be required by the system designer,
if further reduction of output ripple or dynamic transient
spikes is desired. Table 3 shows a matrix of different output
voltages and output capacitors to minimize the voltage
droop and overshoot during a 3A/µs transient. The table
optimizes total equivalent ESR and total bulk capacitance
to optimize the transient performance. Stability criteria are
considered in the Table 3 matrix, and the Linear Technology
LTpowerCAD™ Design Tool is available for stability analysis.
Multiphase operation will reduce effective output ripple as
a function of the number of phases. Application Note 77
discusses this noise reduction versus output ripple current cancellation, but the output capacitance will be more
The LTM4608A is capable of Burst Mode operation in which
the power MOSFETs operate intermittently based on load
demand, thus saving quiescent current. For applications
where maximizing the efficiency at very light loads is a
high priority, Burst Mode operation should be applied. To
enable Burst Mode operation, simply tie the MODE pin to
VIN. During this operation, the peak current of the inductor
is set to approximately 20% of the maximum peak current
value in normal operation even though the voltage at the
ITH pin indicates a lower value. The voltage at the ITH pin
drops when the inductor’s average current is greater than
the load requirement. As the ITH voltage drops below 0.2V,
the BURST comparator trips, causing the internal sleep
line to go high and turn off both power MOSFETs.
In sleep mode, the internal circuitry is partially turned off,
reducing the quiescent current to about 450µA. The load
current is now being supplied from the output capacitor.
When the output voltage drops, causing ITH to rise above
0.25V, the internal sleep line goes low, and the LTM4608A
resumes normal operation. The next oscillator cycle will
turn on the top power MOSFET and the switching cycle
repeats.
Pulse-Skipping Mode Operation
In applications where low output ripple and high efficiency
at intermediate currents are desired, pulse-skipping mode
should be used. Pulse-skipping operation allows the
LTM4608A to skip cycles at low output loads, thus increasing efficiency by reducing switching loss. Floating the MODE
pin or tying it to VIN/2 enables pulse-skipping operation.
This allows discontinuous conduction mode (DCM) operation down to near the limit defined by the chip’s minimum
on-time (about 100ns). Below this output current level, the
converter will begin to skip cycles in order to maintain output regulation. Increasing the output load current slightly,
above the minimum required for discontinuous conduction
mode, allows constant frequency PWM.
For more information www.linear.com/LTM4608A
4608afe
11
LTM4608A
APPLICATIONS INFORMATION
Table 3. Output Voltage Response Versus Component Matrix (Refer to Figure 18) 0A to 3A Load Step
TYPICAL MEASURED VALUES
VALUE
COUT1 VENDORS
TDK
22µF, 6.3V
Murata
22µF, 16V
TDK
100µF, 6.3V
Murata
100µF, 6.3V
VOUT
(V)
1.0
1.0
1.0
1.0
1.0
1.0
1.2
1.2
1.2
1.2
1.2
1.2
1.5
1.5
1.5
1.5
1.5
1.5
1.8
1.8
CIN
(CERAMIC)
10µF
10µF
10µF
10µF
10µF
10µF
10µF
10µF
10µF
10µF
10µF
10µF
10µF
10µF
10µF
10µF
10µF
10µF
10µF
10µF
CIN
(BULK)*
100µF
100µF
100µF
100µF
100µF
100µF
100µF
100µF
100µF
100µF
100µF
100µF
100µF
100µF
100µF
100µF
100µF
100µF
100µF
100µF
PART NUMBER
C3216X7S0J226M
GRM31CR61C226KE15L
C4532X5R0J107MZ
GRM32ER60J107M
COUT1
(CERAMIC)
100µF × 2
22µF × 1
100µF × 2
22µF × 1
100µF × 2
22µF × 1
100µF × 2
22µF × 1
100µF × 2
22µF × 1
100µF × 2
22µF × 1
100µF × 2
22µF × 1
100µF × 2
22µF × 1
100µF × 2
22µF × 1
100µF × 1
22µF × 1
COUT2
(BULK)
COUT2 VENDORS
Sanyo POSCAP
CIN (BULK) VENDORS
Sanyo
VALUE
150µF, 10V
VALUE
100µF, 10V
PART NUMBER
10TPD150M
PART NUMBER
10CE100FH
ITH
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
C1
68pF
None
68pF
None
68pF
None
100pF
None
100pF
None
100pF
47pF
100pF
None
100pF
None
100pF
None
47pF
None
C3
None
100pF
None
100pF
None
100pF
None
100pF
None
100pF
None
None
None
47pF
None
47pF
None
None
None
47pF
VIN
(V)
5
5
3.3
3.3
2.7
2.7
5
5
3.3
3.3
2.7
2.7
5
5
3.3
3.3
2.7
2.7
5
5
DROOP
(mV)
13
17
13
17
13
17
16
20
16
20
16
16
18
20
16
20
18
20
22
21
PEAK-TO- PEAK
DEVIATION (mV)
26
34
26
34
26
34
32
41
32
41
32
32
36
41
32
41
36
41
42
42
RECOVERY
TIME (µs)
7
8
7
10
7
8
8
10
8
10
10
8
8
12
10
12
10
12
8
12
LOAD STEP
(A/µs)
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
RFB
(kΩ)
14.7
14.7
14.7
14.7
14.7
14.7
10
10
10
10
10
10
6.65
6.65
6.65
6.65
6.65
6.65
4.87
4.87
1.8
10µF
100µF
100µF × 2
None
1.8
10µF
100µF
22µF × 1
150µF × 2
None
1.8
10µF
100µF
100µF × 2
None
1.8
10µF
100µF
22µF × 1
150µF × 2
None
2.5
10µF
100µF
100µF × 1
None
2.5
10µF
100µF
22µF × 1
150µF × 1
None
2.5
10µF
100µF
100µF × 1
None
2.5
10µF
100µF
22µF × 1
150µF × 1
None
3.3
10µF
100µF
100µF × 1
100pF
3.3
10µF
100µF
22µF × 1
150µF × 1
None
*Bulk capacitance is optional if VIN has very low input impedance.
120pF
None
120pF
None
100pF
22pF
100pF
22pF
22pF
None
None
47pF
None
None
None
None
None
None
None
None
3.3
3.3
2.7
2.7
5
5
3.3
3.3
5
5
21
21
22
21
28
33
30
21
38
39
43
41
44
42
42
60
60
41
74
75
12
12
12
14
10
10
10
10
10
12
3
3
3
3
3
3
3
3
3
3
4.87
4.87
4.87
4.87
3.09
3.09
3.09
3.09
2.21
2.21
150µF × 2
150µF × 2
150µF × 2
150µF × 2
150µF × 2
150µF × 2
150µF × 2
150µF × 2
150µF × 2
150µF × 2
Forced Continuous Operation
In applications where fixed frequency operation is more
critical than low current efficiency, and where the lowest
output ripple is desired, forced continuous operation should
be used. Forced continuous operation can be enabled by
tying the MODE pin to GND. In this mode, inductor current is allowed to reverse during low output loads, the ITH
voltage is in control of the current comparator threshold
throughout, and the top MOSFET always turns on with each
oscillator pulse. During start-up, forced continuous mode
is disabled and inductor current is prevented from reversing until the LTM4608A’s output voltage is in regulation.
Multiphase Operation
For output loads that demand more than 8A of current,
multiple LTM4608As can be cascaded to run out of phase
4608afe
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LTM4608A
APPLICATIONS INFORMATION
to provide more output current without increasing input and
output voltage ripple. The CLKIN pin allows the LTM4608A
to synchronize to an external clock (between 0.75MHz
and 2.25MHz) and the internal phase locked loop allows
the LTM4608A to lock onto CLKIN’s phase as well. The
CLKOUT signal can be connected to the CLKIN pin of the
following LTM4608A stage to line up both the frequency
and the phase of the entire system. Tying the PHMODE
pin to SVIN, SGND or SVIN/2 (floating) generates a phase
difference (between CLKIN and CLKOUT) of 180°, 120°
or 90° respectively, which corresponds to a 2-phase,
3-phase or 4-phase operation. A total of 6 phases can be
cascaded to run simultaneously with respect to each other
by programming the PHMODE pin of each LTM4608A to
different levels. For a 6-phase example in Figure 2, the
2nd stage that is 120° out of phase from the 1st stage can
generate a 240° (PHMODE = 0) CLKOUT signal for the 3rd
0
CLKIN CLKOUT
120
+120
PHMODE
PHASE 1
A multiphase power supply significantly reduces the
amount of ripple current in both the input and output
capacitors. The RMS input ripple current is reduced by,
and the effective ripple frequency is multiplied by, the
number of phases used (assuming that the input voltage
is greater than the number of phases used times the output
voltage). The output ripple amplitude is also reduced by
the number of phases used.
The LTM4608A device is an inherently current mode con(420)
60
240
CLKIN CLKOUT
PHMODE
stage, which then can generate a CLKOUT signal that’s
420°, or 60° (PHMODE = SVIN) for the 4th stage. With
the 60° CLKIN input, the next two stages can shift 120°
(PHMODE = 0) for each to generate a 300° signal for the
6th stage. Finally, the signal with a 60° phase shift on the
6th stage (PHMODE is floating) goes back to the 1st stage.
Figure 3 shows the configuration for 12-phase operation.
+120
SVIN
CLKIN CLKOUT
+180
PHMODE
CLKIN CLKOUT
PHMODE
PHASE 5
PHASE 3
180
+120
300
CLKIN CLKOUT
+120
PHMODE
PHASE 2
CLKIN CLKOUT
PHMODE
PHASE 4
4608A F02
PHASE 6
Figure 2. 6-Phase Operation
0
CLKIN CLKOUT
120
+120
PHMODE
V+
OUT1
(420)
60
240
CLKIN CLKOUT
PHMODE
+120
SVIN
CLKIN CLKOUT
+180
PHMODE
CLKIN CLKOUT
PHMODE
CLKIN CLKOUT
300
+120
PHMODE
CLKIN CLKOUT
PHMODE
4608 F02
PHASE 1
PHASE 5
PHASE 9
PHASE 3
PHASE 7
PHASE 11
90
210
330
(510)
150
270
(390)
30
LTC6908-2
OUT2
180
+120
CLKIN CLKOUT
PHMODE
PHASE 4
+120
CLKIN CLKOUT
PHMODE
PHASE 8
+120
SVIN
CLKIN CLKOUT
PHMODE
+180
CLKIN CLKOUT
PHMODE
PHASE 12
PHASE 6
+120
CLKIN CLKOUT
PHMODE
PHASE 10
+120
CLKIN CLKOUT
PHMODE
4608A F03
PHASE 2
Figure 3. 12-Phase Operation
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LTM4608A
APPLICATIONS INFORMATION
trolled device. Parallel modules will have very good current
sharing. This will balance the thermals on the design.
Tie the ITH pins of each LTM4608A together to share the
current evenly. To reduce ground potential noise, tie the
ITHM pins of all LTM4608As together and then connect to
the SGND at only one point. Figure 19 shows a schematic
of the parallel design. The FB pins of the parallel module
are tied together. With parallel operation, input and output capacitors may be reduced in part according to the
operating duty cycle.
Input RMS Ripple Current Cancellation
Application Note 77 provides a detailed explanation of
multiphase operation. The input RMS ripple current cancellation mathematical derivations are presented, and a
graph is displayed representing the RMS ripple current
reduction as a function of the number of interleaved phases.
Figure 4 shows this graph.
Spread Spectrum Operation
Switching regulators can be particularly troublesome
where electromagnetic interference (EMI) is concerned.
Switching regulators operate on a cycle-by-cycle basis to
transfer power to an output. In most cases, the frequency
of operation is fixed based on the output load. This method
of conversion creates large components of noise at the
frequency of operation (fundamental) and multiples of the
operating frequency (harmonics).
To reduce this noise, the LTM4608A can run in spread
spectrum operation by tying the CLKIN pin to SVIN. In
spread spectrum operation, the LTM4608A’s internal
oscillator is designed to produce a clock pulse whose
period is random on a cycle-by-cycle basis but fixed
between 70% and 130% of the nominal frequency. This
has the benefit of spreading the switching noise over
a range of frequencies, thus significantly reducing the
peak noise. Spread spectrum operation is disabled if
0.60
1-PHASE
2-PHASE
3-PHASE
4-PHASE
6-PHASE
0.55
0.50
RMS INPUT RIPPLE CURRENT
DC LOAD CURRENT
0.45
0.40
0.35
0.30
0.25
0.20
0.15
0.10
0.05
0
0.1 0.15
0.2 0.25 0.3 0.35 0.4 0.45 0.5 0.55 0.6 0.65 0.7 0.75 0.8 0.85 0.9
DUTY FACTOR (VO/VIN)
4608A F04
Figure 4. Normalized Input RMS Ripple Current vs Duty Factor for One to Six Phases
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LTM4608A
APPLICATIONS INFORMATION
CLKIN is tied to ground or if it’s driven by an external
frequency synchronization signal. A capacitor value of
0.01µF must be placed from the PLLLPF pin to ground to
control the slew rate of the spread spectrum frequency
change. Add a control ramp on the TRACK pin with RSR
and CSR referenced to VIN. Figure 21 shows an example
for spread spectrum operation.
1
RSR ≥
0.592
− ln 1−
•
500
•
C
SR
VIN
Output Voltage Tracking
Output voltage tracking can be programmed externally
using the TRACK pin. The output can be tracked up and
down with another regulator. The master regulator’s output
is divided down with an external resistor divider that is the
VIN
5V
same as the slave regulator’s feedback divider to implement
coincident tracking. The LTM4608A uses an accurate 10k
resistor internally for the top feedback resistor. Figure 5
shows an example of coincident tracking:
10k
Slave = 1+
• VTRACK
R
FB4
VTRACK is the track ramp applied to the slave’s track pin.
VTRACK has a control range of 0V to 0.596V, or the internal
reference voltage. When the master’s output is divided
down with the same resistor values used to set the slave’s
output, this resistor divider is connected to the slave’s track
pin. The slave will then coincident track with the master
until it reaches its final value. The master will continue to
its final value from the slave’s regulation point. Voltage
tracking is disabled when VTRACK is more than 0.596V.
CLKIN
VIN
VOUT
SVIN
TIE TO VIN
FOR DISABLE
AND DEFAULT
100µs SOFT-START
RSR
SW
RUN
TRACK
CSR
RUN
LTM4608A
C2
100pF
FB
ITH
PLLLPF
ITHM
TRACK
PGOOD
MODE
BSEL
RFB1
2.21k
100µF
C3
22pF
VIN
50k
PHMODE
MGN
APPLY A CONTROL
CLKOUT GND SGND
RAMP WITH RSR AND
CSR TIED TO VIN WHERE
t = –(ln (1 – 0.596/VIN) • RSR • CSR)
OR APPLY AN EXTERNAL TRACKING RAMP
CLKIN
VIN
50k
VOUT
C1
100µF
SVIN
SW
MASTER
3.3V
RUN
RFB3
10k
TRACK
RFB4
6.65k
RUN
LTM4608A
MASTER
3.3V
7A
+
C4
100µF
SLAVE
1.5V
8A
FB
ITH
PLLLPF
ITHM
TRACK
PGOOD
MODE
BSEL
PHMODE
MGN
RFB2
6.65k
CLKOUT GND SGND
4608A F05
Figure 5. Dual Outputs (3.3V and 1.5V) with Tracking
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LTM4608A
APPLICATIONS INFORMATION
0.596V
t = – ln 1–
• RSR • CSR
VIN
Ratiometric tracking can be achieved by a few simple
calculations and the slew rate value applied to the master’s track pin. As mentioned above, the TRACK pin has
a control range from 0V to 0.596V. The master’s TRACK
pin slew rate is directly equal to the master’s output slew
rate in Volts/Time:
MR
• 10k = RFB3
SR
where MR is the master’s output slew rate and SR is the
slave’s output slew rate in Volts/Time. When coincident
tracking is desired, then MR and SR are equal, thus RFB3
is equal the 10k. RFB4 is derived from equation:
RFB4 =
0.596V
VFB VFB VTRACK
+
–
10k RFB2
RFB3
MASTER OUTPUT
OUTPUT VOLTAGE (V)
The track pin of the master can be controlled by an external
ramp or by RSR and CSR in Figure 5 referenced to VIN. The
RC ramp time can be programmed using equation:
SLAVE OUTPUT
TIME
4608A F06
Figure 6. Output Voltage Coincident Tracking
For example: MR = 3.3V/ms and SR = 1.5V/ms. Then
RFB3 = 22.1k. Solve for RFB4 to equal to 4.87k.
For applications that do not require tracking or sequencing,
simply tie the TRACK pin to SVIN to let RUN control the
turn on/off. Connecting TRACK to SVIN also enables the
~100µs of internal soft-start during start-up. Load current
needs to be present during track down.
Power Good
where VFB is the feedback voltage reference of the regulator
and VTRACK is 0.596V. Since RFB3 is equal to the 10k top
feedback resistor of the slave regulator in equal slew rate
or coincident tracking, then RFB4 is equal to RFB2 with VFB =
VTRACK. Therefore RFB3 = 10k and RFB4 = 6.65k in Figure 5.
In ratiometric tracking, a different slew rate maybe desired
for the slave regulator. RFB3 can be solved for when SR
is slower than MR. Make sure that the slave supply slew
rate is chosen to be fast enough so that the slave output
voltage will reach it final value before the master output.
The PGOOD pin is an open-drain pin that can be used to
monitor valid output voltage regulation. This pin monitors
a ±10% window around the regulation point. As shown
in Figure 20, the sequencing function can be realized in a
dual output application by controlling the RUN pins and the
PGOOD signals from each other. The 1.5V output begins
its soft starting after the PGOOD signal of 3.3V output
becomes high, and 3.3V output starts its shut down after
the PGOOD signal of 1.5V output becomes low. This can
be applied to systems that require voltage sequencing
between the core and sub-power supplies.
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LTM4608A
APPLICATIONS INFORMATION
Slope Compensation
The module has already been internally compensated for
all output voltages. Table 3 is provided for most application requirements. A spice model will be provided for other
control loop optimization. For single module operation,
connect ITHM pin to SGND. For parallel operation, tie ITHM
pins together and then connect to SGND at one point. Tie
ITH pins together to share currents evenly for all phases.
Output Margining
Thermal Considerations and Output Current Derating
The power loss curves in Figures 7 and 8 can be used
in coordination with the load current derating curves in
Figures 9 to 16 for calculating an approximate θJA for the
module with various heat sinking methods. Thermal models
are derived from several temperature measurements at
the bench, and thermal modeling analysis. Thermal Application Note 103 provides a detailed explanation of the
analysis for the thermal models and the derating curves.
Tables 4 and 5 provide a summary of the equivalent θJA
for the noted conditions. These equivalent θJA parameters
are correlated to the measured values and improve with
air flow. The junction temperature is maintained at 125°C
or below for the derating curves.
4.0
4.0
3.5
3.5
3.0
3.0
POWER LOSS (W)
POWER LOSS (W)
For a convenient system stress test on the LTM4608A’s
output, the user can program the LTM4608A’s output to
±5%, ±10% or ±15% of its normal operational voltage.
The margin pin with a voltage divider is driven with a small
three-state gate as shown in Figure 18, for the three margin
states (high, low, no margin). When the MGN pin is < 0.3V,
it forces negative margining in which the output voltage
is below the regulation point. When MGN is >VIN – 0.3V,
the output voltage is forced above the regulation point.
The amount of output voltage margining is determined by
the BSEL pin. When BSEL is low, it is 5%. When BSEL is
high, it is 10%. When BSEL is floating, it is 15%. When
margining is active, the internal output overvoltage and
undervoltage comparators are disabled and PGOOD remains high. Margining is disabled by tying the MGN pin
to a voltage divider as shown in Figure 20.
2.5
2.0
1.5
2.0
1.5
1.0
1.0
0.5
0
2.5
0.5
3.3VIN 1.5VOUT
3.3VIN 2.5VOUT
0
2
4
6
8
0
5VIN 1.5VOUT
5VIN 3.3VOUT
0
2
4
6
8
LOAD CURRENT (A)
LOAD CURRENT (A)
4608A F08
4608A F07
Figure 7. 3.3VIN, 2.5V and 1.5VOUT Power Loss
Figure 8. 5VIN, 3.3V and 1.5VOUT Power Loss
4608afe
For more information www.linear.com/LTM4608A
17
LTM4608A
9
9
8
8
7
7
LOAD CURRENT (A)
LOAD CURRENT (A)
APPLICATIONS INFORMATION
6
5
4
3
2
0
40
50
5
4
3
2
400LFM
200LFM
0LFM
1
6
400LFM
200LFM
0LFM
1
0
60 70 80 90 100 110 120
AMBIENT TEMPERATURE (°C)
40
50
60 70 80 90 100 110 120
AMBIENT TEMPERATURE (°C)
4608A F10
4608A F09
Figure 10. BGA Heat Sink with 3.3VIN to 1.5VOUT
9
9
8
8
7
7
LOAD CURRENT (A)
LOAD CURRENT (A)
Figure 9. No Heat Sink with 3.3VIN to 1.5VOUT
6
5
4
3
2
0
40
50
5
4
3
2
400LFM
200LFM
0LFM
1
6
400LFM
200LFM
0LFM
1
0
60 70 80 90 100 110 120
AMBIENT TEMPERATURE (°C)
40
50
60 70 80 90 100 110 120
AMBIENT TEMPERATURE (°C)
4608A F12
4608A F11
Figure 12. BGA Heat Sink with 5VIN to 1.5VOUT
9
9
8
8
7
7
LOAD CURRENT (A)
LOAD CURRENT (A)
Figure 11. No Heat Sink with 5VIN to 1.5VOUT
6
5
4
3
2
0
40
50
5
4
3
2
400LFM
200LFM
0LFM
1
6
400LFM
200LFM
0LFM
1
60 70 80 90 100 110 120
AMBIENT TEMPERATURE (°C)
0
40
60 70 80 90 100 110 120
AMBIENT TEMPERATURE (°C)
4608A F14
4608A F13
Figure 13. No Heat Sink with 3.3VIN to 2.5VOUT
50
Figure 14. BGA Heat Sink with 3.3VIN to 2.5VOUT
4608afe
18
For more information www.linear.com/LTM4608A
LTM4608A
9
9
8
8
7
7
LOAD CURRENT (A)
LOAD CURRENT (A)
APPLICATIONS INFORMATION
6
5
4
3
2
0
40
50
5
4
3
2
400LFM
200LFM
0LFM
1
6
400LFM
200LFM
0LFM
1
0
60 70 80 90 100 110 120
AMBIENT TEMPERATURE (°C)
40
50
60 70 80 90 100 110 120
AMBIENT TEMPERATURE (°C)
4608A F15
4608A F16
Figure 15. No Heat Sink with 5VIN to 3.3VOUT
Figure 16. BGA Heat Sink with 5VIN to 3.3VOUT
Table 4. 1.5V Output
DERATING CURVE
VIN (V)
POWER LOSS CURVE
AIR FLOW (LFM)
HEAT SINK
qJA (°C/W)
Figures 9, 11
3.3, 5
Figures 9, 11
3.3, 5
Figures 7, 8
0
None
25
Figures 7, 8
200
None
21
Figures 9, 11
3.3, 5
Figures 7, 8
400
None
20
Figures 10, 12
3.3, 5
Figures 7, 8
0
BGA Heat Sink
23.5
Figures 10, 12
3.3, 5
Figures 7, 8
200
BGA Heat Sink
22
Figures 10, 12
3.3, 5
Figures 7, 8
400
BGA Heat Sink
22
DERATING CURVE
VIN (V)
POWER LOSS CURVE
AIR FLOW (LFM)
HEAT SINK
qJA (°C/W)
Figure 15
5
Figure 8
0
None
25
Figure 15
5
Figure 8
200
None
21
Table 5. 3.3V Output
Figure 15
5
Figure 8
400
None
20
Figure 16
5
Figure 8
0
BGA Heat Sink
23.5
Figure 16
5
Figure 8
200
BGA Heat Sink
22
Figure 16
5
Figure 8
400
BGA Heat Sink
22
4608afe
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19
LTM4608A
APPLICATIONS INFORMATION
Safety Considerations
The LTM4608A modules do not provide isolation from VIN
to VOUT. There is no internal fuse. If required, a slow blow
fuse with a rating twice the maximum input current needs
to be provided to protect each unit from catastrophic failure.
Layout Checklist/Example
The high integration of LTM4608A makes the PCB board
layout very simple and easy. However, to optimize its
electrical and thermal performance, some layout considerations are still necessary.
• Use large PCB copper areas for high current path,
including VIN, GND and VOUT. It helps to minimize the
PCB conduction loss and thermal stress.
• Place high frequency ceramic input and output capacitors next to the VIN, GND and VOUT pins to minimize
high frequency noise.
• Place a dedicated power ground layer underneath the
unit.
• To minimize the via conduction loss and reduce module
thermal stress, use multiple vias for interconnection
between top layer and other power layers.
• Do not put vias directly on the pads, unless they are
capped.
• Use a separated SGND ground copper area for components connected to signal pins. Connect the SGND
to GND underneath the unit.
Figure 17 gives a good example of the recommended layout.
GND
VOUT
COUT
COUT
COUT
GND
CIN
VIN
CIN
GND
4608A F17
Figure 17. Recommended PCB Layout
(LGA Shown, for BGA Use Circle Pads)
4608afe
20
For more information www.linear.com/LTM4608A
LTM4608A
TYPICAL APPLICATIONS
CLKIN
VIN
3V TO 5.5V
CLKIN
VIN
CIN
10µF
VOUT
C1
220pF
SVIN
SW
RUN
MODE
PHMODE
FB
LTM4608A
RFB
3.09k
ITH
PLLLPF
ITHM
TRACK
PGOOD
MODE
BSEL
PHMODE
MGN
VOUT
2.5V
8A
8A AT 5V INPUT
6A AT 3.3V INPUT
COUT
100µF
C3
47pF
VIN
100k
PGOOD
VIN
(HIGH = 10%)
(FLOAT = 15%)
(LOW = 5%)
1
50k
YOUT 4 5
2
U1
U1: PERICOM PI74ST1G126CEX 3
OR TOSHIBA TC7SZ126AFE
BSEL
CLKOUT GND SGND
50k
OE
AIN
4608A F18
OE AIN YOUT MGN
H
H
L
H
L
X
MARGIN VALUE
H + OF BSEL SELECTION
L – OF BSEL SELECTION
NO MARGIN
VIN/2
H
L
Z
Figure 18. Typical 3V to 5.5VIN, 2.5V at 8A Design
VIN
3V TO 5.5V
CLKIN
VIN
10µF
TRACK
C4
100pF
SVIN
SW
RUN
VOUT
RUN
LTM4608A
100µF
6.3V
X5R
FB
3.32k
ITH
PLLLPF
ITHM
TRACK
PGOOD
MODE
BSEL
PHMODE
MGN
C3
100µF
6.3V
X5R
CLKOUT GND SGND
C2
10µF
CLKIN
VIN
VOUT
C1
100µF
6.3V
X5R
SVIN
SW
RUN
LTM4608A
FB
ITH
PLLLPF
ITHM
TRACK
PGOOD
MODE
BSEL
PHMODE
MGN
VOUT
1.5V
16A
VIN
50k
50k
CLKOUT GND SGND
4608A F19
Figure 19. Two LTM4608As in Parallel, 1.5V at 16A Design.
See Also Dual 8A per Channel LTM4616
4608afe
For more information www.linear.com/LTM4608A
21
LTM4608A
TYPICAL APPLICATIONS
CLKIN
VIN
5V
CLKIN
VIN
VOUT
SW
SHDN
RUN
LTM4608A
FB
C3
22pF
ITH
PLLLPF
ITHM
TRACK
PGOOD
MODE
BSEL
PHMODE
MGN
100k
CLKOUT GND SGND
R1
100k
100µF
6.3V
X5R
C2
100pF
SVIN
D1
MMSD4148
R2
100k
RFB1
2.21k
VIN
SHDN
50k
3.3V
50k
CLKIN
VIN
VOUT
SVIN
D2
MMSD4148
SW
SHDN
RUN
FB
LTM4608A
RFB2
6.65k
ITH
ITHM
PLLLPF
VOUT2
3.3V
7A
C1
100µF
6.3V
X5R
1.5V
+
C4
100µF
SANYO
POSCAP
10mΩ
VOUT1
1.5V
8A
100k
TRACK
PGOOD
MODE
BSEL
PHMODE
MGN
CLKOUT GND SGND
4608A F20
Figure 20. Dual LTM4608A Output Sequencing Application.
See Also Dual 8A per Channel LTM4616
SVIN
VIN
2.7V TO 5.5V
0.01µF
CLKIN
VIN
CSR
0.22µF
10µF
SVIN
RSR
180k
SW
MODE
PHMODE
RUN
VOUT
100pF
LTM4608A
FB
10k
ITH
PLLLPF
ITHM
TRACK
PGOOD
MODE
BSEL
PHMODE
MGN
CLKOUT GND SGND
PGOOD
BSEL
4608A F21
C2
100µF
6.3V
X5R
C1
100µF
6.3V
X5R
VOUT
1.2V/8A
5A AT
2.7V INPUT
VIN
50k
50k
Figure 21. 2.7V to 5.5VIN, 1.2VOUT Design in Spread Spectrum Operation
4608afe
22
For more information www.linear.com/LTM4608A
VIN
5V
R5
3.09k
R4
10k
3.3V
TRACK
OR
RAMP
CONTROL
BSEL
MGN
MODE
PHMODE
For more information www.linear.com/LTM4608A
MGN
PHMODE
C8
47pF
C4
22pF
R2
3.09k
C7
220pF
50k
50k
VIN
R10
2.21k
C2
100pF
C1
100µF
6.3V
X5R
VOUT2
2.5V
8A
VOUT1
3.3V
100µF 7A
6.3V
X5R
R7
6.65k
R6
10k
3.3V
R9
4.87k
R8
10k
3.3V
MGN
PHMODE
MGN
BSEL
PGOOD
ITHM
ITH
FB
VOUT
CLKOUT GND SGND
PHMODE
MODE
TRACK
CLKIN
LTM4608A
PLLLPF
RUN
SW
SVIN
VIN
CLKOUT GND SGND
BSEL
MODE
ITHM
PGOOD
ITH
FB
VOUT
TRACK
LTM4608A
CLKIN
PLLLPF
RUN
SW
SVIN
VIN
Figure 22. 4-Phase, Four Outputs (3.3V, 2.5V, 1.8V and 1.5V) with Tracking
BSEL
MODE
CLKOUT GND SGND
PGOOD
TRACK
ITH
FB
VOUT
ITHM
LTM4608A
CLKIN
PLLLPF
RUN
SW
SVIN
VIN
CLKOUT GND SGND
ITHM
PGOOD
ITH
FB
VOUT
TRACK
LTM4608A
CLKIN
PLLLPF
RUN
SW
SVIN
VIN
CLKIN
4608A F22
R8
6.65k
R1
4.87k
C8
100pF
C5
100µF
6.3V
X5R
+
C3
100µF
6.3V
X5R
C9
100µF
6.3V
SANYO
POSCAP
10mΩ
VOUT4
1.5V
8A
VOUT3
1.8V
8A
LTM4608A
TYPICAL APPLICATIONS
4608afe
23
LTM4608A
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
BGA Package
68-Lead (15.00mm × 9.00mm × 3.42mm)
(Reference LTC DWG# 05-08-1993 Rev Ø)
A
aaa Z
E
Y
X
Z
SEE NOTES
DETAIL A
A2
A1
7
G
SEE NOTES
PIN 1
3
ccc Z
1
PIN “A1”
CORNER
2
4
b
b1
MOLD
CAP
3
4
SUBSTRATE
F
6
Z
// bbb Z
5
H1
H2
D
7
DETAIL B
8
Øb (68 PLACES)
9
e
ddd M Z X Y
eee M Z
10
11
aaa Z
G
PACKAGE TOP VIEW
3.810
2.540
0.000
1.270
0.3175
0.3175
1.270
2.540
3.810
C
B
A
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M-1994
DIMENSIONS
5.080
3.810
0.000
1.270
2.540
3.810
5.080
6.350
SUGGESTED PCB LAYOUT
TOP VIEW
D
2. ALL DIMENSIONS ARE IN MILLIMETERS
6.350
0.630 ±0.025 Ø 68x
E
PACKAGE BOTTOM VIEW
DETAIL B
PACKAGE SIDE VIEW
DETAIL A
F
SYMBOL
A
A1
A2
b
b1
D
E
e
F
G
H1
H2
aaa
bbb
ccc
ddd
eee
MIN
3.22
0.50
2.72
0.60
0.60
0.27
2.45
NOM
3.42
0.60
2.82
0.75
0.63
15.00
9.00
1.27
12.70
7.62
0.32
2.50
MAX
3.62
0.70
2.92
0.90
0.66
0.37
2.55
0.15
0.10
0.20
0.30
0.15
TOTAL NUMBER OF BALLS: 68
NOTES
3
BALL DESIGNATION PER JESD MS-028 AND JEP95
4
DETAILS OF PIN #1 IDENTIFIER ARE OPTIONAL,
BUT MUST BE LOCATED WITHIN THE ZONE INDICATED.
THE PIN #1 IDENTIFIER MAY BE EITHER A MOLD OR
MARKED FEATURE
5. PRIMARY DATUM -Z- IS SEATING PLANE
6. SOLDER BALL COMPOSITION CAN BE 96.5% Sn/3.0% Ag/0.5% Cu
OR Sn Pb EUTECTIC
7
!
PACKAGE ROW AND COLUMN LABELING MAY VARY
AMONG µModule PRODUCTS. REVIEW EACH PACKAGE
LAYOUT CAREFULLY
LTMXXXXXX
µModule
COMPONENT
PIN “A1”
TRAY PIN 1
BEVEL
PACKAGE IN TRAY LOADING ORIENTATION
BGA 68 1114 REV Ø
4608afe
24
For more information www.linear.com/LTM4608A
LTM4608A
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
LGA Package
68-Lead (15mm × 9mm × 2.82mm)
(Reference LTC DWG # 05-08-1821 Rev A)
SEE NOTES
DETAIL A
2.72 – 2.92
G
aaa Z
7
F
E
D
C
B
A
PAD 1
1
PAD “A1”
CORNER
2
4
3
4
5
15.00
BSC
MOLD
CAP
12.70
BSC
SUBSTRATE
6
7
0.290 – 0.350
2.200 – 2.600
8
9
Z
// bbb Z
DETAIL B
10
11
0.630 ±0.025 SQ. 68x
X
aaa Z
9.00
BSC
eee S X Y
DETAIL B
3.810
2.540
1.270
0.000
1.270
2.540
PACKAGE TOP VIEW
3.810
7.620
BSC
Y
1.27
BSC
PADS
SEE NOTES
3
PACKAGE BOTTOM VIEW
DETAIL A
6.350
5.080
3.810
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M-1994
2. ALL DIMENSIONS ARE IN MILLIMETERS
3
LAND DESIGNATION PER JESD MO-222
4
DETAILS OF PAD #1 IDENTIFIER ARE OPTIONAL,
BUT MUST BE LOCATED WITHIN THE ZONE INDICATED.
THE PAD #1 IDENTIFIER MAY BE EITHER A MOLD OR
MARKED FEATURE
2.540
1.270
0.000
1.270
2.540
5. PRIMARY DATUM -Z- IS SEATING PLANE
6. THE TOTAL NUMBER OF PADS: 68
7
!
PACKAGE ROW AND COLUMN LABELING MAY VARY
AMONG µModule PRODUCTS. REVIEW EACH PACKAGE
LAYOUT CAREFULLY
3.810
5.080
6.350
SYMBOL TOLERANCE
aaa
0.15
bbb
0.10
eee
0.05
COMPONENT
PIN “A1”
TRAY PIN 1
BEVEL
LTMXXXXXX
µModule
PACKAGE IN TRAY LOADING ORIENTATION
LGA 68 1212 REV A
SUGGESTED PCB LAYOUT
TOP VIEW
4608afe
For more information www.linear.com/LTM4608A
25
LTM4608A
PACKAGE PHOTOS
4608afe
26
For more information www.linear.com/LTM4608A
LTM4608A
REVISION HISTORY
(Revision history begins at Rev B)
REV
DATE
DESCRIPTION
B
12/10
Voltage changed in the Typical Application drawing.
1
Changes made to the Absolute Maximum Ratings section.
2
Updated the Pin Configuration package dimensions.
2
Changes made to the VOUT conditions in the Electrical Characteristics section.
2
Updated Note 2 in the Electrical Characteristics section.
4
Replaced graphs G05 and G06 in the Typical Performance Characteristics section.
5
Updated MGN (B8) in the Pin Functions section.
7
C
D
E
3/11
3/12
8/15
PAGE NUMBER
Text changes made to the Applications Information section.
10, 11, 14, 19
Changes made to Figures 5, 18, 20, 21, 23.
15, 21, 22, 23
Updated the Related Parts table.
26
Updated Pin Configuration drawing
2
Removed Pin Configuration drawing from Pin Functions
8
Added value of 0.22µH to Inductor in Figure 1
9
Updated Figure 3
13
Updated Figure 17
20
Added Package Photo
24
Revised the Typical Application circuit.
1
Changed the format of the Pin Assignment Table.
26
Added BGA package.
2, 24
4608afe
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection
of itsinformation
circuits as described
herein will not infringe on existing patent rights.
For more
www.linear.com/LTM4608A
27
LTM4608A
PACKAGE DESCRIPTION
Pin Assignment Table
(Arranged by Pin Number)
PIN
NAME
A1
PIN
PIN
PIN
FUNCTION NAME FUNCTION
GND
B1
PIN
NAME
GND
PIN
PIN
PIN
PIN
FUNCTION NAME FUNCTION NAME
C1
VIN
D1
VIN
E1
PIN
PIN
PIN
PIN
PIN
FUNCTION NAME FUNCTION NAME FUNCTION
SGND
F1
RUN
G1
GND
A2
GND
B2
–
C2
–
D2
–
E2
–
F2
CLKOUT
G2
GND
A3
GND
B3
CLKIN
C3
SW
D3
VIN
E3
PLLLPF
F3
GND
G3
GND
A4
GND
B4
PHMODE
C4
SW
D4
VIN
E4
–
F4
SVIN
G4
GND
A5
GND
B5
MODE
C5
SW
D5
VIN
E5
TRACK
F5
ITHM
G5
GND
A6
GND
B6
–
C6
–
D6
–
E6
–
F6
ITH
G6
GND
A7
GND
B7
BSEL
C7
PGOOD
D7
VIN
E7
FB
F7
GND
G7
GND
A8
GND
B8
MGN
C8
VIN
D8
VIN
E8
VIN
F8
GND
G8
GND
A9
GND
B9
GND
C9
VIN
D9
VIN
E9
VOUT
F9
VOUT
G9
VOUT
A10
GND
B10
GND
C10
VOUT
D10
VOUT
E10
VOUT
F10
VOUT
G10
VOUT
A11
GND
B11
GND
C11
VOUT
D11
VOUT
E11
VOUT
F11
VOUT
G11
VOUT
RELATED PARTS
PART NUMBER
LTM4623
DESCRIPTION
20VIN, 3A Step-Down µModule Regulator
COMMENTS
4V ≤ VIN ≤ 20V, 0.6V ≤ VOUT ≤ 5.5V, PLL Input, CLKOUT, VOUT Tracking, PGOOD,
6.25mm × 6.25mm × 1.82mm LGA
4V ≤ VIN ≤ 14V, 0.6V ≤ VOUT ≤ 5.5V, VOUT Tracking, PGOOD,
6.25mm × 6.25mm × 5.01mm BGA
4V ≤ VIN ≤ 20V, 0.6V ≤ VOUT ≤ 5.5V, PLL Input, CLKOUT, VOUT Tracking, PGOOD,
6.25mm × 6.25mm × 5.01mm BGA
4.5V ≤ VIN ≤ 26.5V, 0.8V ≤ VOUT ≤ 5V, PLL Input, VOUT Tracking, PGOOD,
15mm × 15mm × 2.82mm LGA
4.5V ≤ VIN ≤ 26.5V, 0.8V ≤ VOUT ≤ 5V, PLL Input, VOUT Tracking,
9mm × 15mm × 4.32mm LGA
LTM4624
14VIN, 4A Step-Down µModule Regulator
LTM4625
20VIN, 5A Step-Down µModule Regulator
LTM4619
Dual, 4A Step-Down µModule Regulator
LTM4618
26VIN, 6A Step-Down µModule Regulator
LTM4614
Dual, 4A µModule Regulator
2.375V ≤ VIN ≤ 5.5V, 0.8V ≤ VOUT ≤ 5V, 15mm × 15mm × 2.82mm LGA
LTM4622
Ultrathin, Dual 2.5A, Single 5A µModule Regulator
3.3V ≤ VIN ≤ 20V, 0.6V ≤ VOUT ≤ 5.5V, 6.25mm × 6.25mm × 1.82mm LGA
LTM4628
Dual 8A, Single 16A µModule Regulator
4.5V ≤ VIN ≤ 26.5V, 0.6V ≤ VOUT ≤ 5.5V, 15mm × 15mm × 4.32mm LGA,
15mm × 15mm × 4.92mm BGA
4608afe
28 Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
For more information www.linear.com/LTM4608A
(408) 432-1900 ● FAX: (408) 434-0507
●
www.linear.com/LTM4608A
LT 0815 REV E • PRINTED IN USA
LINEAR TECHNOLOGY CORPORATION 2008
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