LTM4644/LTM4644-1
Quad DC/DC µModule
Regulator with Configurable 4A Output Array
FEATURES
DESCRIPTION
Quad Output Step-Down µModule® Regulator with 4A
per Output
n Wide Input Voltage Range: 4V to 14V
n 2.375V to 14V with External Bias
n 0.6V to 5.5V Output Voltage
n 4A DC, 5A Peak Output Current Each Channel
n Up to 5.5W Power Dissipation (T = 60°C, 200 LFM,
A
No Heat Sink)
n ±1.5% Total Output Voltage Regulation
n Current Mode Control, Fast Transient Response
n Parallelable for Higher Output Current
n Output Voltage Tracking
n Internal Temperature Sensing Diode Output
n External Frequency Synchronization
n Overvoltage, Current and Temperature Protection
n 9mm × 15mm × 5.01mm BGA Package
The LTM®4644/LTM4644-1 is a quad DC/DC step-down
µModule (micromodule) regulator with 4A per output.
Outputs can be paralleled in an array for up to 16A capability. Included in the package are the switching controllers,
power FETs, inductors and support components. Operating
over an input voltage range of 4V to 14V or 2.375V to 14V
with an external bias supply, the LTM4644/LTM4644-1
supports an output voltage range of 0.6V to 5.5V. Its
high efficiency design delivers 4A continuous (5A peak)
output current per channel. Only bulk input and output
capacitors are needed.
n
LTM4644
LTM4644-1
Top Feedback Resistor
from VOUT-to-VFB
(one resistor per channel)
Integrated
60.4k 0.5%
Resistor
External (to be added on
PCB)
Application
General
Applications
To Interface with
PMBus power system
management supervisory
ICs such as the LTC2975
APPLICATIONS
Multirail Point of Load Regulation
FPGAs, DSPs and ASICs Applications
n
Configurable Output Array*
n
4A
4A
4A
4A
All registered trademarks and trademarks are the property of their respective owners.
8A
12A
4A
4A
16A
4A
* Note 4
Click to view associated TechClip Videos.
TYPICAL APPLICATION
4V to 14V Input, Quad 0.9V, 1V, 1.2V and 1.5V Output DC/DC µModule Regulator*
22µF
×2
16V
VIN1
SVIN1
RUN1
CLKIN
CLKOUT
VOUT1
FB1
PGOOD1
95
1.5V/4A
40.2k
47µF
4V
LTM4644
VOUT2
FB2
PGOOD2
VIN3
SVIN3
RUN3
VOUT3
FB3
PGOOD3
VIN4
SVIN4
RUN4
VOUT4
FB4
PGOOD4
GND
TEMP
SGND
1.2V/4A
60.4k
47µF
4V
90.9k
47µF
4V
1V/4A
1.5
80
75
1
70
65
0.9V/4A
121k
85
47µF
4V
0.5
VIN = 5V
VIN = 12V
60
55
POWER LOSS (W)
VIN2
SVIN2
RUN2
2
90
EFFICIENCY (%)
4V to 14V
1.5V Output Efficiency and
Power Loss (Each Channel)
0
1
2
3
LOAD CURRENT (A)
4
0
4644 TA01b
4644 TA01a
*TA = 60°C, 200LFM, NO HEAT SINK
Rev. G
Document Feedback
For more information www.analog.com
1
LTM4644/LTM4644-1
ABSOLUTE MAXIMUM RATINGS
PIN CONFIGURATION
(Note 1)
TOP VIEW
VIN, SVIN (Per Channel)............................... –0.3V to 15V
VOUT (Per Channel) (Note 3).............–0.3V to SVIN or 6V
RUN (Per Channel)...................................... –0.3V to 15V
INTVCC (Per Channel)................................ –0.3V to 3.6V
PGOOD, MODE, TRACK/SS,
FB (Per Channel).................................... –0.3V to INTVCC
CLKOUT (Note 3), CLKIN........................ –0.3V to INTVCC
Internal Operating Temperature Range (Note 2, 5)
E and I-Grade...................................... –40°C to 125°C
MP-Grade........................................... –55°C to 125°C
Storage Temperature Range................... –65°C to 150°C
Peak Solder Reflow Body Temperature.................. 245°C
TRACK/SS1
VIN1
1
2
3
4
VOUT1
5
6
7
FB1
GND
A
GND
B
COMP1
C
CLKIN
SVIN1
MODE1
RUN1
VOUT2
PGOOD2 PGOOD1 INTVCC1
TRACK/SS2
D
FB2
E
COMP2
F
SGND
GND
VIN2
VOUT3
RUN2
PGOOD3 TEMP
INTVCC2
TRACK/SS3
G
FB3
H
COMP3
GND
VIN3
VOUT4
SVIN2
MODE2
SVIN3
MODE3
RUN3
INTVCC3
FB4
J
PGOOD4 CLKOUT
TRACK/SS4
RUN4
K
INTVCC4
GND
L
COMP4
VIN4
SVIN4 MODE4
BGA PACKAGE
77-LEAD (9mm × 15mm × 5.01mm)
TJMAX = 125°C, θJCtop = 17°C/W, θJCbottom = 2.75°C/W,
θJB + θBA = 11°C/W, θJA = 10°C/W
θ VALUES PER JESD 51-12
WEIGHT = 1.9g
ORDER INFORMATION
PART MARKING*
DEVICE
FINISH CODE
PACKAGE
TYPE
MSL
RATING
SAC305 (RoHS)
LTM4644Y
e1
BGA
3
–40°C to 125°C
LTM4644IY#PBF
SAC305 (RoHS)
LTM4644Y
e1
BGA
3
–40°C to 125°C
LTM4644MPY#PBF
SAC305 (RoHS)
LTM4644Y
e1
BGA
3
–55°C to 125°C
LTM4644IY
SnPb (63/37)
LTM4644Y
e0
BGA
3
–40°C to 125°C
LTM4644MPY
SnPb (63/37)
LTM4644Y
e0
BGA
3
–55°C to 125°C
LTM4644EY-1#PBF
SAC305 (RoHS)
LTM4644Y-1
e1
BGA
3
–40°C to 125°C
LTM4644IY-1#PBF
SAC305 (RoHS)
LTM4644Y-1
e1
BGA
3
–40°C to 125°C
LTM4644IY-1
SnPb (63/37)
LTM4644Y-1
e0
BGA
3
–40°C to 125°C
PART NUMBER
PAD OR BALL FINISH
LTM4644EY#PBF
TEMPERATURE RANGE
(SEE NOTE 2)
Note: The LTM4644-1 does not include the internal top feedback resistor.
• Contact the factory for parts specified with wider operating temperature
ranges. *Pad or ball finish code is per IPC/JEDEC J-STD-609.
• Recommended LGA and BGA PCB Assembly and Manufacturing
Procedures
• LGA and BGA Package and Tray Drawings
2
Rev. G
For more information www.analog.com
LTM4644/LTM4644-1
ELECTRICAL
CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C (Note 2). VIN = 12V, per the typical application.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Switching Regulator Section: per Channel
VIN, SVIN
Input DC Voltage
SVIN = VIN
l
4
14
V
VOUT(RANGE)
Output Voltage Range
VOUT(DC)
Output Voltage, Total Variation
with Line and Load
CIN = 22µF, COUT = 100µF Ceramic,
MODE = INTVCC,VIN = 4V to 14V, IOUT = 0A to 4A (Note 4) l
LTM4644: RFB(BOT) = 40.2k
LTM4644-1: RFB(TOP) = 60.4k, RFB(BOT) = 40.2k
l
0.6
5.5
V
V
VRUN
RUN Pin On Threshold
VRUN Rising
IQ(SVIN)
Input Supply Bias Current
VIN = 12V, VOUT = 1.5V, MODE = INTVCC
VIN = 12V, VOUT = 1.5V, MODE = GND
Shutdown, RUN = 0, VIN = 12V
IS(VIN)
Input Supply Current
VIN = 12V, VOUT = 1.5V, IOUT = 4A
IOUT(DC)
Output Continuous Current Range VIN = 12V, VOUT = 1.5V (Note 4)
ΔVOUT (Line)/VOUT
Line Regulation Accuracy
1.477
1.50
1.523
1.1
1.2
1.3
6
2
11
0.62
0
V
mA
mA
µA
A
4
A
VOUT = 1.5V, VIN = 4V to 14V, IOUT = 0A
l
0.04
0.15
ΔVOUT (Load)/VOUT Load Regulation Accuracy
VOUT = 1.5V, IOUT = 0A to 4A
l
0.5
1
VOUT(AC)
Output Ripple Voltage
IOUT = 0A, COUT = 100µF Ceramic, VIN = 12V,
VOUT = 1.5V
5
mV
ΔVOUT(START)
Turn-On Overshoot
IOUT = 0A, COUT = 100µF Ceramic, VIN = 12V,
VOUT = 1.5V
30
mV
tSTART
Turn-On Time
COUT = 100µF Ceramic, No Load, TRACK/SS = 0.01µF,
VIN = 12V, VOUT = 1.5V
2.5
ms
ΔVOUTLS
Peak Deviation for Dynamic Load
Load: 0% to 50% to 0% of Full Load, COUT = 47µF
Ceramic, VIN = 12V, VOUT = 1.5V
160
mV
tSETTLE
Settling Time for Dynamic Load
Step
Load: 0% to 50% to 0% of Full Load, COUT = 47µF
Ceramic, VIN = 12V, VOUT = 1.5V
40
µs
IOUTPK
Output Current Limit
VIN = 12V, VOUT = 1.5V
VFB
Voltage at FB Pin
IOUT = 0A, VOUT = 1.5V, 0°C to 125°C
IOUT = 0A, VOUT = 1.5V, –40°C to 125°C
l
%/V
%
6
7
0.594
0.592
0.60
0.60
0.606
0.608
A
±30
nA
60.05
60.40
60.75
kΩ
2.5
4
µA
2.6
350
2.8
V
mV
V
V
IFB
Current at FB Pin
(Note 3)
RFBHI
Resistor Between VOUT and FB
Pins
LTM4644 Only
ITRACK/SS
Track Pin Soft-Start Pull-Up
Current
TRACK/SS = 0V
VIN(UVLO)
VIN Undervoltage Lockout
VIN Falling
VIN Hysteresis
tON(MIN)
Minimum On-Time
(Note 3)
40
ns
tOFF(MIN)
Minimum Off-Time
(Note 3)
70
ns
VPGOOD
PGOOD Trip Level
VFB With Respect to Set Output
VFB Ramping Negative
VFB Ramping Positive
IPGOOD
PGOOD Leakage
VPGL
PGOOD Voltage Low
IPGOOD = 1mA
VINTVCC
Internal VCC Voltage
SVIN = 4V to 14V
VINTVCC Load Reg
INTVCC Load Regulation
ICC = 0mA to 20mA
fOSC
Oscillator Frequency
CLKIN
CLKIN Threshold
2.4
–13
7
3.2
–10
10
–7
13
%
%
2
µA
0.02
0.1
V
3.3
3.4
0.5
1
0.7
V
%
MHz
V
Rev. G
For more information www.analog.com
3
LTM4644/LTM4644-1
ELECTRICAL CHARACTERISTICS
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTM4644E/LTM4644E-1 is tested under pulsed load
conditions such that TJ ≈ TA. The LTM4644E/LTM4644-1 is guaranteed to
meet performance specifications over the 0°C to 125°C internal operating
temperature range. Specifications over the full –40°C to 125°C internal
operating temperature range are assured by design, characterization and
correlation with statistical process controls. The LTM4644I/LTM4644I-1
is guaranteed to meet specifications over the full –40°C to 125°C internal
operating temperature range. The LTM4644MP/LTM4644MP-1 is tested
and guaranteed over full –55°C to 125°C internal operating temperature
range. Note that the maximum ambient temperature consistent with
these specifications is determined by specific operating conditions in
conjunction with board layout, the rated package thermal resistance and
other environmental factors.
Note 3: 100% tested at wafer level.
Note 4: See output current derating curves for different VIN, VOUT and TA.
Note 5: This IC includes overtemperature protection that is intended
to protect the device during momentary overload conditions. Junction
temperature will exceed 125°C when overtemperature protection is active.
Continuous operation above the specified maximum operating junction
temperature may impair device reliability.
TYPICAL PERFORMANCE CHARACTERISTICS
Efficiency vs Load Current from
5VIN (One Channel Operating)
(Per Channel)
Efficiency vs Load Current from
12VIN (One Channel Operating)
100
95
95
90
90
85
DCM Mode Efficiency from
1.5VOUT
100
85
80
3.3VOUT
2.5VOUT
1.8VOUT
1.5VOUT
1.2VOUT
75
70
0
1
80
5VOUT
3.3VOUT
2.5VOUT
1.8VOUT
1.5VOUT
1.2VOUT
75
70
4
3
2
LOAD CURRENT (A)
80
EFFICIENCY (%)
EFFICIENCY (%)
EFFICIENCY (%)
90
65
0
1
60
50
40
30
20
0
0.001
4644 G02
4644 G01
1.0V Output Transient Response
1.5V Output Transient Response
VOUT
50mV/DIV
AC-COUPLED
LOAD STEP
1A/DIV
LOAD STEP
1A/DIV
LOAD STEP
1A/DIV
4
10
2.5V Output Transient Response
VOUT
50mV/DIV
AC-COUPLED
4644 G05
20µs/DIV
VIN = 12V, VOUT = 1.5V, IOUT = 3A TO 4A, 1A/µs
CFF = 10pF
OUTPUT CAPACITOR = 1 • 47µF CERAMIC
0.1
1
0.01
LOAD CURRENT (A)
4644 G03
VOUT
50mV/DIV
AC-COUPLED
4644 G04
20µs/DIV
VIN = 12V, VOUT = 1V, IOUT = 3A TO 4A, 1A/µs
CFF = 10pF
OUTPUT CAPACITOR = 1 • 47µF CERAMIC
5VIN
12VIN
10
4
3
2
LOAD CURRENT (A)
70
4644 G06
20µs/DIV
VIN = 12V, VOUT = 2.5V, IOUT = 3A TO 4A, 1A/µs
CFF = 10pF
OUTPUT CAPACITOR = 1 • 47µF CERAMIC
Rev. G
For more information www.analog.com
LTM4644/LTM4644-1
TYPICAL PERFORMANCE CHARACTERISTICS
3.3V Output Transient Response
5V Output Transient Response
Start-Up with No Load
VOUT
50mV/DIV
AC-COUPLED
VOUT
50mV/DIV
AC-COUPLED
IIN
0.1A/DIV
LOAD STEP
1A/DIV
LOAD STEP
1A/DIV
VOUT
0.5V/DIV
4644 G08
20µs/DIV
VIN = 12V, VOUT = 5V, IOUT = 3A TO 4A, 1A/µs
OUTPUT CAPACITOR = 47µF CERAMIC
4644 G07
20µs/DIV
VIN = 12V, VOUT = 3.3V, IOUT = 3A TO 4A, 1A/µs
OUTPUT CAPACITOR = 47µF CERAMIC
Start-Up with 4A Load
4644 G09
5ms/DIV
VIN = 12V, VOUT = 1.5V
INPUT CAPACITOR = 150µF SANYO ELECTROLYTIC
CAPACITOR (OPTIONAL) + 22µF CERAMIC CAPACITOR
OUTPUT CAPACITOR = 47µF CERAMIC CAPACITOR
SOFT-START CAPACITOR = 0.1µF
Short-Circuit with No Load
Short-Circuit with 4A Load
IIN
0.2A/DIV
IIN
0.5A/DIV
IIN
0.5A/DIV
VOUT
0.5V/DIV
VOUT
0.5V/DIV
VOUT
0.5V/DIV
4644 G10
5ms/DIV
VIN = 12V, VOUT = 1.5V
INPUT CAPACITOR = 150µF SANYO ELECTROLYTIC
CAPACITOR (OPTIONAL) + 22µF CERAMIC CAPACITOR
OUTPUT CAPACITOR = 47µF CERAMIC CAPACITOR
SOFT-START CAPACITOR = 0.1µF
4644 G11
20µs/DIV
VIN = 12V, VOUT = 1.5V
INPUT CAPACITOR = 150µF SANYO ELECTROLYTIC
CAPACITOR (OPTIONAL) + 22µF CERAMIC CAPACITOR
OUTPUT CAPACITOR = 47µF CERAMIC CAPACITOR
Recovery to No Load from
Short-Circuit
4644 G12
20µs/DIV
VIN = 12V, VOUT = 1.5V
INPUT CAPACITOR = 150µF SANYO ELECTROLYTIC
CAPACITOR (OPTIONAL) + 22µF CERAMIC CAPACITOR
OUTPUT CAPACITOR = 47µF CERAMIC CAPACITOR
Output Ripple
Start Into Pre-Biased Output
VIN
2V/DIV
VOUT
200mV/DIV
VOUT
1V/DIV
5mV/DIV
AC-COUPLED
IOUT
20A/DIV
4644 G13
VIN = 12V
5µs/DIV
VOUT = 1V
INPUT CAPACITOR = 22µF SANYO ELECTROLYTIC
CAPACITOR (OPTIONAL) + 2× 22µF CERAMIC CAP.
OUTPUT CAPACITOR = 2× 47µF CERAMIC CAP.
SOFT-START CAPACITOR = 0.1µF
4644 G14
VIN = 12V
500µs/DIV
VOUT = 1.5V
INPUT CAPACITOR = 22µF SANYO ELECTROLYTIC
CAPACITOR (OPTIONAL) + 2× 22µF CERAMIC CAP.
OUTPUT CAPACITOR = 2× 47µF CERAMIC CAP.
SOFT-START CAPACITOR = 0.1µF
20MHz MEASUREMENT BANDWIDTH
4644 G15
VIN = 12V
1µs/DIV
VOUT = 5V
INPUT CAPACITOR = 22µF SANYO ELECTROLYTIC
CAPACITOR (OPTIONAL) + 2× 22µF CERAMIC CAP.
OUTPUT CAPACITOR = 2× 47µF CERAMIC CAP.
SOFT-START CAPACITOR = 0.1µF
Rev. G
For more information www.analog.com
5
LTM4644/LTM4644-1
PIN FUNCTIONS
PACKAGE ROW AND COLUMN LABELING MAY VARY
AMONG µModule PRODUCTS. REVIEW EACH PACKAGE
LAYOUT CAREFULLY.
VOUT1 (A1, A2, A3), VOUT2 (C1, D1, D2), VOUT3 (F1,
G1, G2), VOUT4 (J1, K1, K2): Power Output Pins of Each
Switching Mode Regulator Channel. Apply output load
between these pins and GND pins. Recommend placing
output decoupling capacitance directly between these pins
and GND pins. See the Applications Information section
for paralleling outputs.
GND (A4-A5, B1-B2, C5, D3-D5, E1-E2, F5, G3-G5,
H1-H2, J5, K3-K4, L1-L2): Power Ground Pins for Both
Input and Output Returns. Use large PCB copper areas to
connect all GND together.
VIN1 (B3, B4), VIN2 (E3, E4), VIN3 (H3, H4), VIN4 (L3, L4):
Power input pins connect to the drain of the internal top
MOSFET for each switching mode regulator channel.
Apply input voltages between these pins and GND pins.
Recommend placing input decoupling capacitance directly
between each of VIN pins and GND pins.
PGOOD1, PGOOD2, PGOOD3, PGOOD4 (C3, C2, F2,
J2): Output Power Good with Open-Drain Logic of Each
Switching Mode Regulator Channel. PGOOD is pulled to
ground when the voltage on the FB pin is not within ±10%
of the internal 0.6V reference.
CLKOUT (J3): Output Clock Signal for PolyPhase® Operation of the Module. The phase of CLKOUT with respect to
CLKIN is set to 180°. CLKOUT’s peak-to-peak amplitude
is INTVCC to GND. See the Application Information section
for details. Strictly output; do not drive this pin. CLKOUT
is only active when RUN4 is enabled.
INTVCC1, INTVCC2, INTVCC3, INTVCC4 (C4, F4, J4, K5):
Internal 3.3V Regulator Output of Each Switching Mode
Regulator Channel. The internal power drivers and control circuits are powered from this voltage. Each pin is
internally decoupled to GND with 1µF low ESR ceramic
capacitor already.
6
SVIN1, SVIN2, SVIN, SVIN4 (B5, E5, H5, L5): Signal VIN.
Filtered input voltage to the internal 3.3V regulator for
the control circuitry of each Switching mode Regulator
Channel. Tie this pin to the VIN pin respectively in most
applications. Connect SVIN to an external voltage supply
of at least 4V which must also be greater than VOUT.
TRACK/SS1, TRACK/SS2, TRACK/SS3, TRACK/SS4 (A6,
D6, G6, K6): Output Tracking and Soft-Start Pin of Each
Switching Mode Regulator Channel. Allows the user to
control the rise time of the output voltage. Putting a voltage below 0.6V on this pin bypasses the internal reference
input to the error amplifier, instead it servos the FB pin
to match the TRACK voltage. Above 0.6V, the tracking
function stops and the internal reference resumes control
of the error amplifier. There’s an internal 2.5µA pull-up
current from INTVCC on this pin, so putting a capacitor
here provides soft-start function.
MODE1, MODE2, MODE3, MODE4 (B6, E6, H6, L6):
Operation Mode Select for Each Switching Mode Regulator Channel. Tie this pin to INTVCC to force continuous
synchronous operation at all output loads. Tying it to
SGND enables discontinuous current mode operation at
light loads. Do not leave floating.
RUN1, RUN2, RUN3, RUN4 (C6, F6, J6, K7): Run Control
Input of Each Switching Mode Regulator Channel. Enable
regulator operation by tying the specific RUN pin above
1.2V. Pulling it below 1.1V shuts down the respective
regulator channel. Do not leave floating.
FB1, FB2, FB3, FB4 (A7, D7, G7, J7): The Negative Input
of the Error Amplifier for Each Switching Mode Regulator
Channel. Internally, in LTM4644, this pin is connected to
VOUT of each channel with a 60.4kΩ precision resistor.
Different output voltages can be programmed with an
additional resistor between the FB and GND pins for the
LTM4644, and two resistors between the VOUT, FB and
GND pins for the LTM4644-1. In PolyPhase operation, tying
the FB pins together allows for parallel operation. See the
Applications Information section for details.
Rev. G
For more information www.analog.com
LTM4644/LTM4644-1
PIN FUNCTIONS
COMP1, COMP2, COMP3, COMP4 (B7, E7, H7, L7): Current Control Threshold and Error Amplifier Compensation
Point of Each Switching Mode Regulator Channel. The
internal current comparator threshold is proportional to
this voltage. Tie the COMP pins together for parallel operation. The device is internally compensated.
CLKIN (C7): External Synchronization Input to Phase
Detector of the Module. This pin is internally terminated
to SGND with 20kΩ. The phase-locked loop will force
the channel 1 turn-on signal to be synchronized with the
rising edge of the CLKIN signal. Channel 2, channel 3 and
channel 4 will also be synchronized with the rising edge of
the CLKIN signal with a pre-determined phase shift. See
the Applications Information section for details.
SGND (F7): Signal Ground Connection. SGND is connected
to GND internally through single point. Use a separated
SGND ground copper area for the ground of the feedback
resistor and other components connected to signal pins.
A second connection between the PGND plane and SGND
plane is recommended on the backside of the PCB underneath the module.
TEMP (F3): Onboard Temperature Diode for Monitoring
the VBE Junction Voltage Change with Temperature. See
the Applications Information section.
Rev. G
For more information www.analog.com
7
LTM4644/LTM4644-1
BLOCK DIAGRAM
CLKIN
VOUT1
FB1
60.4k
PGOOD1
60.4k
(*LTM4644 ONLY)
VIN1
INTVCC1
0.22µF
1µF
1µH
MODE1
1µF
RUN1
VIN
4V TO 14V
VOUT1
1.2V
4A
CLKOUT
SGND
INTERNAL
FILTER
GND
FREQ1
162k
VOUT2
PGOOD2
60.4k
(*LTM4644 ONLY)
FB2
100k
SVIN2
VIN2
INTVCC2
1µF
0.22µF
CLKIN
1µH
MODE2
1µF
RUN2
INTVCC2
VIN
10µF
VOUT2
POWER CONTROL
TRACK/SS2
0.1µF
47µF
INTVCC1
GND
COMP1
INTERNAL
COMP
40.2k
10µF
VOUT1
POWER CONTROL
TRACK/SS1
0.1µF
100k
SVIN1
47µF
VOUT2
1.5V
4A
GND
COMP2
CLKOUT
INTERNAL
COMP
INTERNAL
FILTER
FREQ2
162k
PGOOD3
60.4k
(*LTM4644 ONLY)
FB3
30.1k
VOUT3
SVIN3
VIN3
INTVCC3
1µF
0.22µF
CLKIN
1µH
MODE3
1µF
RUN3
INTVCC3
VIN
10µF
VOUT3
POWER CONTROL
TRACK/SS3
0.1µF
100k
47µF
VOUT3
1.8V
4A
GND
COMP3
CLKOUT
INTERNAL
COMP
INTERNAL
FILTER
FREQ3
162k
FB4
90.9k
VOUT4
PGOOD4
60.4k
(*LTM4644 ONLY)
VIN4
INTVCC4
1µF
0.22µF
CLKIN
1µH
MODE4
1µF
RUN4
INTVCC4
VIN
10µF
VOUT4
POWER CONTROL
TRACK/SS4
0.1µF
100k
SVIN4
47µF
VOUT4
1V
4A
GND
COMP4
CLKOUT
INTERNAL
COMP
INTERNAL
FILTER
TEMP
FREQ4
162k
CLKOUT
*LTM4644-1 DOES NOT INCLUDE 60.4k RESISTOR
8
4644 BD
Rev. G
For more information www.analog.com
LTM4644/LTM4644-1
DECOUPLING REQUIREMENTS
(per Channel)
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
CIN
External Input Capacitor Requirement
(VIN = 4V to 14V, VOUT = 1.5V)
IOUT = 4A
4.7
10
µF
COUT
External Output Capacitor Requirement
(VIN = 4V to 14V, VOUT = 1.5V)
IOUT = 4A
22
47
µF
OPERATION
The LTM4644 is a quad output standalone non-isolated
switch mode DC/DC power supply. It has four separate
regulator channels with each of them capable of delivering
up to 4A continuous output current with few external input
and output capacitors. Each regulator provides precisely
regulated output voltage programmable from 0.6V to 5.5V
via a single external resistor (two resistors for LTM4644-1)
over 4V to 14V input voltage range. With an external bias
voltage, this module can operate from an input voltage
as low as 2.375V. The typical application schematic is
shown in Figure 33.
The LTM4644 integrates four separate constant frequency
controlled on-time valley current mode regulators, power
MOSFETs, inductors, and other supporting discrete components. The typical switching frequency is set to 1MHz.
For switching noise-sensitive applications, the µModule
regulator can be externally synchronized to a clock from
700kHz to 1.3MHz. See the Applications Information
section.
With current mode control and internal feedback loop
compensation, the LTM4644 module has sufficient stability margins and good transient performance with a wide
range of output capacitors, even with all ceramic output
capacitors.
Current mode control provides the flexibility of paralleling
any of the separate regulator channels with accurate current sharing. With a built-in clock interleaving between
each two regulator channels, the LTM4644 could easily
employ a 2+2, 3+1 or 4 channels parallel operation which
is more than flexible in a multirail POL application like
FPGA. Furthermore, the LTM4644 has CLKIN and CLKOUT pins for frequency synchronization or polyphasing
multiple devices which allow up to 8 phases cascaded to
run simultaneously.
Current mode control also provides cycle-by-cycle fast
current monitoring. Foldback current limiting is provided
in an overcurrent condition to reduce the inductor valley
current to approximately 40% of the original value when
VFB drops. An internal overvoltage and undervoltage
comparators pull the open-drain PGOOD output low if
the output feedback voltage exits a ±10% window around
the regulation point. Continuous conduction mode (CCM)
operation is forced during OV and UV conditions except
during start-up when the TRACK pin is ramping up to 0.6V.
Pulling the RUN pin below 1.1V forces the controller into
its shutdown state, turning off both power MOSFETs and
most of the internal control circuitry. At light load currents, discontinuous conduction mode (DCM) operation
can be enabled to achieve higher efficiency compared to
continuous conduction mode (CCM) by setting the MODE
pin to SGND. The TRACK/SS pin is used for power supply
tracking and soft-start programming. See the Applications
Information section.
A temperature diode is included inside the module to monitor the temperature of the module. See the Applications
Information section for details.
Rev. G
For more information www.analog.com
9
LTM4644/LTM4644-1
APPLICATIONS INFORMATION
The typical LTM4644 application circuit is shown in
Figure 33. External component selection is primarily
determined by the input voltage, the output voltage and
the maximum load current. Refer to Table 7 for specific
external capacitor requirements for a particular application.
VIN to VOUT Step-Down Ratios
There are restrictions in the maximum VIN and VOUT stepdown ratio that can be achieved for a given input voltage
due to the minimum off-time and minimum on-time limits
of each regulator. The minimum off-time limit imposes a
maximum duty cycle which can be calculated as:
DMAX = 1 – tOFF(MIN) • fSW
where tOFF(MIN) is the minimum off-time, 70ns typical for
LTM4644, and fSW is the switching frequency. Conversely
the minimum on-time limit imposes a minimum duty cycle
of the converter which can be calculated as:
DMIN = tON(MIN) • fSW
where tON(MIN) is the minimum on-time, 40ns typical for
LTM4644. In the rare cases where the minimum duty
cycle is surpassed, the output voltage will still remain
in regulation, but the switching frequency will decrease
from its programmed value. Note that additional thermal
derating may be applied. See the Thermal Considerations
and Output Current Derating section in this data sheet.
For parallel operation of N channels, use the following
equation can be used to solve for RFB(BOT). Tie the VOUT
and the FB and COMP pins together for each paralleled
output with a single resistor to GND as determined by:
⎛ 60.4k ⎞
⎜
⎟
⎝ N ⎠
RFB(BOT) =
⎛ VOUT ⎞
− 1⎟
⎜
⎝ 0.6
⎠
OUTPUT VOLTAGE PROGRAMMING (LTM4644-1)
The PWM controller has an internal 0.6V reference voltage.
Adding two resistors RFB(TOP) from VOUT to FB pin and
RFB(BOT) from FB pin to GND programs the output voltage:
RFB(TOP)
VOUT
–1
0.6
For parallel operation of N Channels, only one set of
RFB(TOP) and RFB(BOT) is needed while tying the VOUT, FB
and COMP pins from different channels together. See
Figure 1 for example.
RFB(BOT) =
VOUT1
RFB(TOP)
COMP1
FB2
COMP2
VOUT3
FB3
COMP3
The PWM controller has an internal 0.6V reference voltage.
As shown in the Block Diagram, a 60.4k internal feedback
resistor connects each regulator channel from VOUT pin
to FB pin. Adding a resistor RFB(BOT) from FB pin to GND
programs the output voltage:
60.4k
VOUT
−1
0.6
Table 1. VFB Resistor Table vs Various Output Voltages
VOUT (V)
0.6
RFB(BOT) (k) Open
10
RFB(BOT)
VOUT2
Output Voltage Programming (LTM4644)
RFB(BOT) =
FB1
LTM4644-1
1.0
1.2
1.5
1.8
2.5
3.3
5.0
90.9
60.4
40.2
30.1
19.1
13.3
8.25
4644 F01
Figure 1. LTM4644-1 Feedback Resistor
for Paralleling Application
LTM4644
LTM4644-1
Top Feedback Resistor
from VOUT-to-VFB
(one resistor per channel)
Integrated
60.4k 0.5%
Resistor
External (to be added on
PCB)
Application
General
Applications
To Interface with
PMBus power system
management supervisory
ICs such as the LTC2975
Rev. G
For more information www.analog.com
LTM4644/LTM4644-1
APPLICATIONS INFORMATION
Input Decoupling Capacitors
The LTM4644 module should be connected to a low acimpedance DC source. For each regulator channel, a 10µF
input ceramic capacitor is recommended for RMS ripple
current decoupling. A bulk input capacitor is only needed
when the input source impedance is compromised by long
inductive leads, traces or not enough source capacitance.
The bulk capacitor can be an electrolytic aluminum capacitor or polymer capacitor.
Without considering the inductor ripple current, the RMS
current of the input capacitor can be estimated as:
IOUT(MAX)
ICIN(RMS) =
• D • (1−D)
η%
where η% is the estimated efficiency of the power module.
Output Decoupling Capacitors
With an optimized high frequency, high bandwidth design,
only single piece of low ESR output ceramic capacitor is
required for each regulator channel to achieve low output
voltage ripple and very good transient response. Additional
output filtering may be required by the system designer,
if further reduction of output ripples or dynamic transient
spikes is required. Table 7 shows a matrix of different
output voltages and output capacitors to minimize the
voltage droop and overshoot during a 2A load step transient. Multiphase operation will reduce effective output
ripple as a function of the number of phases. Application
Note 77 discusses this noise reduction versus output ripple
current cancellation, but the output capacitance will be
more a function of stability and transient response. The
LTpowerCAD™ Design Tool is available to download online
for output ripple, stability and transient response analysis
and calculating the output ripple reduction as the number
of phases implemented increases by N times.
Discontinuous Conduction Mode (DCM)
In applications where low output ripple and high efficiency
at intermediate current are desired, discontinuous conduction mode (DCM) should be used by connecting the
MODE pin to SGND. At light loads the internal current
comparator may remain tripped for several cycles and
force the top MOSFET to stay off for several cycles, thus
skipping cycles. The inductor current does not reverse
in this mode.
Force Continuous Conduction Mode (CCM)
In applications where fixed frequency operation is more
critical than low current efficiency, and where the lowest
output ripple is desired, forced continuous conduction
mode operation should be used. Forced continuous operation can be enabled by tying the MODE pin to INTVCC. In
this mode, inductor current is allowed to reverse during
low output loads, the COMP voltage is in control of the
current comparator threshold throughout, and the top
MOSFET always turns on with each oscillator pulse. During
start-up, forced continuous mode is disabled and inductor
current is prevented from reversing until the LTM4644’s
output voltage is in regulation.
Operating Frequency
The operating frequency of the LTM4644 is optimized to
achieve the compact package size and the minimum output
ripple voltage while still keeping high efficiency. The default
operating frequency is internally set to 1MHz. In most applications, no additional frequency adjusting is required.
If any operating frequency other than 1MHz is required
by application, the µModule regulator can be externally
synchronized to a clock from 700kHz to 1.3MHz.
Frequency Synchronization and Clock In
The power module has a phase-locked loop comprised
of an internal voltage controlled oscillator and a phase
detector. This allows all internal top MOSFET turn-on to
be locked to the rising edge of the same external clock.
The external clock frequency range must be within ±30%
around the 1MHz set frequency. A pulse detection circuit
is used to detect a clock on the CLKIN pin to turn on the
phase-locked loop. The pulse width of the clock has to
be at least 400ns. The clock high level must be above 2V
and clock low level below 0.3V. During the start-up of
the regulator, the phase-locked loop function is disabled.
Rev. G
For more information www.analog.com
11
LTM4644/LTM4644-1
APPLICATIONS INFORMATION
Multichannel Parallel Operation
For loads that demand more than 4A of output current,
the LTM4644 multiple regulator channels can be easily
paralleled to provide more output current without increasing input and output voltage ripples. The LTM4644 has
preset built-in phase shift between each two of the four
regulator channels which is suitable to employ a 2+2, 3+1
or 4 channels parallel operation. Table 2 gives the phase
difference between regulator channels.
Table 2. Phase Difference Between Regulator Channels
CHANNEL
CH1
Phase Difference
CH2
180°
CH3
90°
CH4
180°
Figure 2 shows a 2+2 and a 4-channels parallel concept
schematic for clock phasing.
A multiphase power supply significantly reduces the
amount of ripple current in both the input and output capacitors. The RMS input ripple current is reduced by, and
the effective ripple frequency is multiplied by, the number
of phases used (assuming that the input voltage is greater
than the number of phases used times the output voltage).
The output ripple amplitude is also reduced by the number
of phases used when all of the outputs are tied together
to achieve a single high output current design.
The LTM4644 device is an inherently current mode controlled device, so parallel modules will have very good
current sharing. This will balance the thermals on the
design. Please tie the RUN, TRACK/SS, FB and COMP
pins of each paralleling channel together. Figure 35 and
Figure 36 shows an example of parallel operation and pin
connection.
VOUT1
CH2
(180°)
CH3
(0°)
VOUT2
VOUT3
RUN4
COMP4
FB4
180°
TRACK/SS4
RUN3
COMP3
FB3
TRACK/SS3
RUN2
COMP2
FB2
180°
CH1
(0°)
TRACK/SS2
RUN1
COMP1
FB1
TRACK/SS1
Input RMS Ripple Current Cancellation
CH4
(180°)
Soft-Start and Output Voltage Tracking
VOUT4
LTM4644
CH1
(0°)
180°
CH2
(180°)
CH3
(270°)
RUN4
COMP4
FB4
180°
TRACK/SS4
RUN3
COMP3
FB3
90°
TRACK/SS3
RUN2
COMP2
FB2
8A
TRACK/SS2
RUN1
COMP1
FB1
TRACK/SS1
8A
Application Note 77 provides a detailed explanation of
multiphase operation. The input RMS ripple current cancellation mathematical derivations are presented, and a
graph is displayed representing the RMS ripple current
reduction as a function of the number of interleaved phases.
Figure 3 shows this graph.
CH4
(90°)
The TRACK/SS pin provides a means to either soft-start
of each regulator channel or track it to a different power
supply. A capacitor on the TRACK/SS pin will program the
ramp rate of the output voltage. An internal 2.5µA current
source will charge up the external soft-start capacitor
towards the INTVCC voltage. When the TRACK/SS voltage
is below 0.6V, it will take over the internal 0.6V reference
voltage to control the output voltage. The total soft-start
time can be calculated as:
VOUT1
VOUT2
VOUT3
VOUT4
LTM4644
4644 F02
tSS = 0.6 •
CSS
2.5µA
where CSS is the capacitance on the TRACK/SS pin. Current foldback and forced continuous mode are disabled
during the soft-start process.
16A
Figure 2. 2+2 and 4 Channels Parallel Concept Schematic
12
Rev. G
For more information www.analog.com
LTM4644/LTM4644-1
APPLICATIONS INFORMATION
0.60
1-PHASE
2-PHASE
4-PHASE
0.55
0.50
RMS INPUT RIPPLE CURRENT
DC LOAD CURRENT
0.45
0.40
0.35
0.30
0.25
0.20
0.15
0.10
0.05
0
0.1 0.15
0.2 0.25 0.3 0.35 0.4 0.45 0.5 0.55 0.6 0.65 0.7 0.75 0.8 0.85 0.9
DUTY CYCLE (VOUT/VIN)
4644 F03
Figure 3. Normalized RMS Ripple Current for Single Phase or Polyphase Applications
Output voltage tracking can also be programmed externally
using the TRACK/SS pin of each regulator channel. The
output can be tracked up and down with another regulator. Figure 4 and Figure 5 show an example waveform
and schematic of a ratiometric tracking where the slave
regulator’s (VOUT2 , VOUT3 and VOUT4) output slew rate is
proportional to the master’s (VOUT1).
Since the slave regulator’s TRACK/SS is connected to
the master’s output through a RTR(TOP)/RTR(BOT) resistor
divider and its voltage used to regulate the slave output
voltage when TRACK/SS voltage is below 0.6V, the slave
output voltage and the master output voltage should satisfy
the following equation during the start-up.
VOUT(SL) •
RFB(SL)
Where the 60.4k is the integrated top feedback resistor
and the RFB(SL) is the external bottom feedback resistor
of the LTM4644. The RTR(TOP)/RTR(BOT) is the resistor
divider on the TRACK/SS pin of the slave regulator, as
shown in Figure 5.
Following the upper equation, the master’s output slew
rate (MR) and the slave’s output slew rate (SR) in volts/
time is determined by:
RFB(SL)
RFB(SL) + 60.4k
RTR(BOT)
MR
=
SR
RTR(TOP) +RTR(BOT)
RFB(SL) + 60.4k
= VOUT(MA) •
RTR(BOT)
RTR(TOP) +RTR(BOT)
Rev. G
For more information www.analog.com
13
LTM4644/LTM4644-1
APPLICATIONS INFORMATION
The TRACK pins will have the 2.5µA current source on
when a resistive divider is used to implement tracking on
that specific channel. This will impose an offset on the
TRACK pin input. Smaller value resistors with the same
ratios as the resistor values calculated from the above
equation can be used. For example, where the 60.4k is
used then a 6.04k can be used to reduce the TRACK pin
offset to a negligible value.
VOUT1 = 3.3V
OUTPUT VOLTAGE
VOUT2 = 2.5V
VOUT3 = 1.8V
VOUT4 = 1.2V
TIME
The coincident output tracking can be recognized as a
special ratiometric output tracking which the master’s
output slew rate (MR) is the same as the slave’s output
slew rate (SR), as waveform shown in Figure 6.
4644 F04
Figure 4. Output Ratiometric Tracking Waveform
From the equation we could easily find out that, in the
coincident tracking, the slave regulator’s TRACK/SS pin
resistor divider is always the same as its output voltage
divider.
For example, VOUT(MA) = 3.3V, MR = 3.3V/24ms and VOUT(SL)
= 1.2V, SR = 1.2V/24ms as VOUT1 and VOUT4 shown in
Figure 5. From the equation, we could solve out that
RTR4(TOP) = 60.4k and RTR4(BOT) = 13.3k is a good combination. Follow the same equation, we can get the same
RTR(TOP) /RTR(BOT) resistor divider value for VOUT2 and
VOUT3.
RFB(SL)
RFB(SL) + 60.4k
=
RTR(BOT)
RTR(TOP) +RTR(BOT)
VOUT4
FB4
COMP4
1.2V/4A
RFB(SL)3
30.1k
LTM4644
INTVCC4
MODE4
TRACK/SS4
PGOOD4
60.4k
TRACK/SS3
PGOOD3
TRACK/SS2
PGOOD2
RFB(SL)2
19.1k
1.8V/4A
2.5V/4A
RTR(TOP)2
60.4k
CH4
60.4k
VOUT2
FB2
COMP2
VOUT1
FB1
COMP1
TRACK/SS1
PGOOD1
3.3V/4A
RFB1
13.3k
VIN4
SVIN4
RUN4
CH3
60.4k
CSS
0.1µF
INTVCC3
MODE3
VIN3
SVIN3
RUN3
CH2
60.4k
VOUT3
FB3
COMP3
CH1
INTVCC2
MODE2
VIN2
SVIN2
RUN2
VIN1
SVIN1
RUN1
INTVCC1
MODE1
VIN
4V TO 14V
RFB(SL)4
60.4k
4644 F05
RTR(BOT)2
13.3k
RTR(TOP)3
60.4k
RTR(BOT)3
13.3k
RTR(TOP)4
60.4k
RTR(BOT)4
13.3k
Figure 5. Output Ratiometric Tracking Schematic
14
Rev. G
For more information www.analog.com
LTM4644/LTM4644-1
APPLICATIONS INFORMATION
For example, RTR4(TOP) = 60.4k and RTR4(BOT) = 60.4k is
a good combination for coincident tracking for VOUT(MA)
= 3.3V and VOUT(SL) = 1.2V application.
Pre-Biased Output Start-Up
VOUT1 = 3.3V
There may be situations that require the power supply to
start up with some charge on the output capacitors. The
LTM4644 can safely power up into a pre-biased output
without discharging it.
OUTPUT VOLTAGE
VOUT2 = 2.5V
VOUT3 = 1.8V
VOUT4 = 1.2V
TIME
reference only, while still keeping the power MOSFETs
off. Further increasing the RUN pin voltage above 1.2V
will turn on the entire regulator channel.
4644 F06
Figure 6. Output Coincident Tracking Waveform
Power Good
The PGOOD pins are open drain pins that can be used
to monitor each valid output voltage regulation. This pin
monitors a ±10% window around the regulation point. A
resistor can be pulled up to a particular supply voltage for
monitoring. To prevent unwanted PGOOD glitches during transients or dynamic VOUT changes, the LTM4644’s
PGOOD falling edge includes a blanking delay of approximately 52 switching cycles.
Stability Compensation
The LTM4644 module internal compensation loop of each
regulator channel is designed and optimized for low ESR
ceramic output capacitors only application. Table 6 is
provided for most application requirements. In case of
bulk output capacitors is required for output ripples or
dynamic transient spike reduction, an additional 10pF to
15pF phase boost capacitor is required between the VOUT
and FB pins. The LTpowerCAD Design Tool is available to
download for control loop optimization.
RUN Enable
Pulling the RUN pin of each regulator channel to ground
forces the regulator into its shutdown state, turning off both
power MOSFETs and most of its internal control circuitry.
Bringing the RUN pin above 0.7V turns on the internal
The LTM4644 accomplishes this by forcing discontinuous
mode (DCM) operation until the TRACK/SS pin voltage
reaches 0.6V reference voltage. This will prevent the BG
from turning on during the pre-biased output start-up
which would discharge the output.
Do not pre-bias LTM4644 with an output voltage higher
than INTVCC (3.3V).
Overtemperature Protection
The internal overtemperature protection monitors the junction temperature of the module. If the junction temperature
reaches approximately 160°C, both power switches will be
turned off until the temperature drops about 15°C cooler.
Low Input Application
The LTM4644 module has a separate SVIN pin for each
regulator channel which makes it compatible with operation from an input voltage as low as 2.375V. The SVIN pin
is the signal input of the regulator control circuitry while
the VIN pin is the power input which directly connected
to the drain of the top MOSFET. In most application with
input voltage ranges from 4V to 14V, connect the SVIN
pin directly to the VIN pin of each regulator channel. An
optional filter, consisting of a resistor (1Ω to 10Ω) between SVIN and VIN ground, can be placed for additional
noise immunity. This filter is not necessary in most cases
if good PCB layout practices are followed (see Figure 32).
In a low input voltage (2.375V to 4V) application, or to
reduce power dissipation by the internal bias LDO, connect
SVIN to an external voltage higher than 4V with a 0.1µF
local bypass capacitor. Figure 34 shows an example of a
low input voltage application. Please note, SVIN voltage
cannot go below VOUT voltage.
Rev. G
For more information www.analog.com
15
LTM4644/LTM4644-1
APPLICATIONS INFORMATION
Temperature Monitoring
A diode connected PNP transistor is used for the TEMP
monitor function by monitoring its voltage over temperature. The temperature dependence of this diode voltage
can be understood in the equation:
Solving for T, T = –(VG0 – VD)/(dVD/dT) provides the
temperature.
1st Example: Figure 7 for 27°C, or 300K the diode
voltage is 0.598V, thus, 300K = –(1200mV – 598mV)/
–2.0 mV/K)
⎛I ⎞
VD =nVT ln ⎜ D ⎟
⎝ IS ⎠
2nd Example: Figure 7 for 75°C, or 350K the diode
voltage is 0.50V, thus, 350K = –(1200mV – 500mV)/
–2.0mV/K)
where VT is the thermal voltage (kT/q), and n, the ideality
factor, is 1 for the diode connected PNP transistor being used in the LTM4644. IS is expressed by the typical
empirical equation:
Converting the Kelvin scale to Celsius is simply taking the
Kelvin temp and subtracting 273 from it.
where I0 is a process and geometry dependent current, (I0
is typically around 20k orders of magnitude larger than IS
at room temperature) and VG0 is the band gap voltage of
1.2V extrapolated to absolute zero or –273°C.
If we take the IS equation and substitute into the VD equation, then we get:
⎛ kT ⎞ ⎛ I ⎞
kT
VD = VG0 – ⎜ ⎟ln ⎜ 0 ⎟, VT =
q
⎝ q ⎠ ⎝ ID ⎠
The expression shows that the diode voltage decreases
(linearly if I0 were constant) with increasing temperature
and constant diode current. Figure 6 shows a plot of VD
vs Temperature over the operating temperature range of
the LTM4644.
If we take this equation and differentiate it with respect to
temperature T, then:
ID = 100µA
0.7
0.6
0.5
0.4
0.3
–50
–25
50
25
0
75
TEMPERATURE (°C)
100
125
4637 F07
Figure 7. Diode Voltage VD vs Temperature T(°C)
Thermal Considerations and Output Current Derating
V –V
dVD
= – G0 D
T
dT
This dVD/dT term is the temperature coefficient equal to
about –2mV/K or –2mV/°C. The equation is simplified for
the first order derivation.
16
0.8
DIODE VOLTAGE (V)
⎛ –V ⎞
IS =I0 exp ⎜ G0 ⎟
⎝ VT ⎠
A typical forward voltage is given in the electrical characteristics section of the data sheet, and Figure 7 is the plot
of this forward voltage. Measure this forward voltage at
27°C to establish a reference point. Then using the above
expression while measuring the forward voltage over
temperature will provide a general temperature monitor.
Connect a resistor between TEMP and VIN to set the current to 100µA. See Figure 35 for an example.
The thermal resistances reported in the Pin Configuration section of the data sheet are consistent with those
parameters defined by JESD 51-12 and are intended for
use with finite element analysis (FEA) software modeling
tools that leverage the outcome of thermal modeling,
simulation, and correlation to hardware evaluation performed on a µModule package mounted to a hardware
test board: defined by JESD 51-9 (“Test Boards for Area
Rev. G
For more information www.analog.com
LTM4644/LTM4644-1
APPLICATIONS INFORMATION
Array Surface Mount Package Thermal Measurements”).
The motivation for providing these thermal coefficients in
found in JESD 51-12 (“Guidelines for Reporting and Using
Electronic Package Thermal Information”).
Many designers may opt to use laboratory equipment
and a test vehicle such as the demo board to predict the
µModule regulator’s thermal performance in their application at various electrical and environmental operating
conditions to compliment any FEA activities. Without FEA
software, the thermal resistances reported in the Pin Configuration section are in-and-of themselves not relevant to
providing guidance of thermal performance; instead, the
derating curves provided in this data sheet can be used
in a manner that yields insight and guidance pertaining to
one’s application-usage, and can be adapted to correlate
thermal performance to one’s own application.
The Pin Configuration section typically gives four thermal
coefficients explicitly defined in JESD 51-12; these coefficients are quoted or paraphrased below:
1. θJA, the thermal resistance from junction to ambient, is
the natural convection junction-to-ambient air thermal
resistance measured in a one cubic foot sealed enclosure. This environment is sometimes referred to as
“still air” although natural convection causes the air to
move. This value is determined with the part mounted to
a JESD 51-9 defined test board, which does not reflect
an actual application or viable operating condition.
2. θJCbottom, the thermal resistance from junction to the
bottom of the product case, is determined with all of
the component power dissipation flowing through the
bottom of the page. In the typical µModule regulator,
the bulk of the heat flows out the bottom of the package, but there is always heat flow out into the ambient
environment. As a result, this thermal resistance value
may be useful for comparing packages but the test
conditions don’t generally match the user’s application.
3. θJCtop, the thermal resistance from junction to top of
the product case, is determined with nearly all of the
component power dissipation flowing through the top of
the package. As the electrical connections of the typical
µModule regulator are on the bottom of the package, it
is rare for an application to operate such that most of
the heat flows from the junction to the top of the part.
As in the case of θJCbottom, this value may be useful
for comparing packages but the test conditions don’t
generally match the user’s application.
4. θJB, the thermal resistance from junction to the printed
circuit board, is the junction-to-board thermal resistance
where almost all of the heat flows through the bottom of
the µModule regulator and into the board, and is really
the sum of the θJCbottom and the thermal resistance of
the bottom of the part through the solder joints and
through a portion of the board. The board temperature
is measured a specified distance from the package.
A graphical representation of the aforementioned thermal resistances is given in Figure 8; blue resistances are
contained within the μModule regulator, whereas green
resistances are external to the µModule package.
As a practical matter, it should be clear to the reader that
no individual or sub-group of the four thermal resistance
parameters defined by JESD 51-12 or provided in the
Pin Configuration section replicates or conveys normal
operating conditions of a μModule regulator. For example,
in normal board-mounted applications, never does 100%
of the device’s total power loss (heat) thermally conduct
exclusively through the top or exclusively through bottom of the µModule package—as the standard defines
for θJCtop and θJCbottom, respectively. In practice, power
loss is thermally dissipated in both directions away from
the package—granted, in the absence of a heat sink and
airflow, a majority of the heat flow is into the board.
Within the LTM4644, be aware there are multiple power
devices and components dissipating power, with a consequence that the thermal resistances relative to different
junctions of components or die are not exactly linear with
respect to total package power loss. To reconcile this
complication without sacrificing modeling simplicity—
but also, not ignoring practical realities—an approach
has been taken using FEA software modeling along with
laboratory testing in a controlled-environment chamber
to reasonably define and correlate the thermal resistance
values supplied in this data sheet: (1) Initially, FEA software
Rev. G
For more information www.analog.com
17
LTM4644/LTM4644-1
APPLICATIONS INFORMATION
is used to accurately build the mechanical geometry of
the LTM4644 and the specified PCB with all of the correct material coefficients along with accurate power loss
source definitions; (2) this model simulates a softwaredefined JEDEC environment consistent with JESD 51-12
to predict power loss heat flow and temperature readings
at different interfaces that enable the calculation of the
JEDEC-defined thermal resistance values; (3) the model
and FEA software is used to evaluate the LTM4644 with
heat sink and airflow; (4) having solved for and analyzed
these thermal resistance values and simulated various
operating conditions in the software model, a thorough
laboratory evaluation replicates the simulated conditions
with thermocouples within a controlled-environment
chamber while operating the device at the same power loss
as that which was simulated. An outcome of this process
and due diligence yields the set of derating curves shown
in this data sheet.
The 1V to 5V power loss curves in Figures 9 to 15 can
be used in coordination with the load current derating
curves in Figures 16 to 29 for calculating an approximate
θJA thermal resistance for the LTM4644 with various heat
sinking and airflow conditions. The power loss curves
are taken at room temperature, and are increased with a
multiplicative factor according to the junction temperature.
This approximate factor is 1.35 for 120°C. The derating
curves are plotted with the output current starting at 16A
and the ambient temperature at 30°C. These are chosen
to include the lower and higher output voltage ranges
for correlating the thermal resistance. Thermal models
are derived from several temperature measurements in a
controlled temperature chamber along with thermal modeling analysis. The junction temperatures are monitored
while ambient temperature is increased with and without
airflow. The power loss increase with ambient temperature
change is factored into the derating curves. The junctions
are maintained at 120°C maximum while lowering output
current or power with increasing ambient temperature. The
decreased output current will decrease the internal module
loss as ambient temperature is increased. The monitored
junction temperature of 120°C minus the ambient operating temperature specifies how much module temperature
rise can be allowed. As an example in Figure 16 the load
current is derated to 9.6A at ~90°C with 400LFM of airflow
and no heat sink and the power loss for the 12V to 1.0V
at 9.5A output is about 3.2W. The 3.2W loss is calculated
with 4 times the 0.6W room temperature loss from the
12V to 1.0V power loss curve each channel at 2.4A, and
the 1.35 multiplying factor at 120°C junction. If the 90°C
ambient temperature is subtracted from the 120°C junction temperature, then the difference of 30°C divided by
3.2W equals ~9.4°C/W θJA thermal resistance. Table 3
specifies a 10°C/W value which is very close. Tables 3 to
6 provide equivalent thermal resistances for the different
outputs with and without airflow and heat sinking. The
derived thermal resistances in Tables 3 to 6 for the various
conditions can be multiplied by the calculated power loss
as a function of ambient temperature to derive temperature
JUNCTION-TO-AMBIENT THERMAL RESISTANCE COMPONENTS
JUNCTION-TO-CASE (TOP)
RESISTANCE
JUNCTION
CASE (TOP)-TO-AMBIENT
RESISTANCE
JUNCTION-TO-BOARD RESISTANCE
JUNCTION-TO-CASE
CASE (BOTTOM)-TO-BOARD
(BOTTOM) RESISTANCE
RESISTANCE
AMBIENT
BOARD-TO-AMBIENT
RESISTANCE
4644 F08
µMODULE DEVICE
Figure 8. Graphical Representation of JESD 51-12 Thermal Coefficients
18
Rev. G
For more information www.analog.com
LTM4644/LTM4644-1
APPLICATIONS INFORMATION
rise above ambient, thus maximum junction temperature.
Room temperature power loss can be derived from the efficiency curves in the Typical Performance Characteristics
section and adjusted with the above junction temperature
multiplicative factor. The printed circuit board is a 1.6mm
thick four layer board with two ounce copper for the two
outer layers and one ounce copper for the two inner layers.
The PCB dimensions are 95mm × 76mm.
The 16A represents all four channels in parallel at 4A each.
The four parallel channels have their currents reduced at
the same rate to develop an equivalent θJA circuit evaluation with thermal couples or IR camera used to validate
the thermal resistance values.
Maximum Operating Ambient Temperature
Figures 30 and 31 display the Maximum Power Loss
Allowance Curves vs ambient temperature with various
heat sinking and airflow conditions.
This data was derived
from the thermal impedance generated by various thermal derating examinations with the junction temperature
measured at 120°C. This maximum power loss limitation
serves as a guideline when designing multiple output
rails with different voltages and currents by calculating
the total power loss.
For example, to determine the maximum ambient temperature when VOUT1 = 2.5V at 0.6A, VOUT2 = 3.3V at 3A,
VOUT3 = 1.8V at 1A, VOUT4 = 1.2V at 3A, without a heat sink
and 400LFM airflow, simply add up the total power loss
for each channel read from Figure 9 to Figure 15 which in
this example equals 2.5W, then multiply by the 1.35 coefficient for 120°C junction temperature and
compare the
total power loss number, 3.4W with Figure 30. Figure 30
indicates with a 3.4W total power loss, the maximum ambient temperature for this particular application is around
86°C. For reference, the actual thermal derating test in the
chamber resulted in a maximum ambient temperature
of 86.3°C, very close to the calculated value. Also from
Figure 30, it is easy to determine with a 3.4W total power
loss, the maximum ambient temperature is around 77°C
with no airflow and 81°C with 200LFM airflow.
Safety Considerations
The LTM4644 modules do not provide galvanic isolation
from VIN to VOUT. There is no internal fuse. If required,
a slow blow fuse with a rating twice the maximum input
current needs to be provided to protect each unit from
catastrophic failure. The device does support thermal
shutdown and overcurrent protection.
Rev. G
For more information www.analog.com
19
LTM4644/LTM4644-1
1.5
1.4
1.3
1.2
1.1
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
12VIN
5VIN
POWER LOSS (W)
POWER LOSS (W)
APPLICATIONS INFORMATION
0
0.5
1
1.5 2 2.5 3
LOAD CURRENT (A)
3.5
1.5
1.4
1.3
1.2
1.1
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
4641 F09
12VIN
5VIN
0
0.5
1
1.5 2 2.5 3
LOAD CURRENT (A)
3.5
Figure 11. Power Loss at 1.5V
Output, (Each Channel, 25°C)
1.6
4
1
1.5 2 2.5 3
LOAD CURRENT (A)
3.5
4
4641 F10
12VIN
5VIN
0
0.5
1
1.5 2 2.5 3
LOAD CURRENT (A)
3.5
4
4641 F12
12VIN
5VIN
1.6
1.4
POWER LOSS (W)
POWER LOSS (W)
0.5
1.8
1.0
0.8
0.6
0.4
1.2
1.0
0.8
0.6
0.4
0.2
0.2
0
0.5
1
1.5 2 2.5 3
LOAD CURRENT (A)
3.5
Figure 13. Power Loss at 2.5V
Output, (Each Channel, 25°C)
20
0
Figure 12. Power Loss at 1.8V
Output, (Each Channel, 25°C)
1.2
0
1.5
1.4
1.3
1.2
1.1
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
4641 F11
12VIN
5VIN
1.4
12VIN
5VIN
Figure 10. Power Loss at 1.2V
Output, (Each Channel, 25°C)
POWER LOSS (W)
POWER LOSS (W)
Figure 9. Power Loss at 1.0V
Output, (Each Channel, 25°C)
4
1.5
1.4
1.3
1.2
1.1
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
4
4641 F13
0
0
0.5
1
1.5 2 2.5 3
LOAD CURRENT (A)
3.5
Figure 14.Power Loss at 3.3V
Output, (Each Channel, 25°C)
4
4641 F14
Rev. G
For more information www.analog.com
LTM4644/LTM4644-1
APPLICATIONS INFORMATION
1.8
1.6
16
1.4
14
1.2
12
CURRENT (A)
POWER LOSS (W)
18
12VIN
1.0
0.8
0.6
10
8
6
0.4
4
0.2
2
0
0
0.5
1
1.5 2 2.5 3
LOAD CURRENT (A)
3.5
0
4
0LFM
200LFM
400LFM
30
40
50 60 70 80 90 100 110 120
AMBIENT TEMPERATURE (°C)
4641 F15
4641 F16
Figure 16. 5VIN to 1.0VOUT
Derating Curve 4-Channel
Paralleled, No Heat Sink
18
18
16
16
14
14
12
12
CURRENT (A)
CURRENT (A)
Figure 15. Power Loss at 5V
Output, (Each Channel, 25°C)
10
8
6
4
0
30
40
8
6
4
0LFM
200LFM
400LFM
2
10
0LFM
200LFM
400LFM
2
0
50 60 70 80 90 100 110 120
AMBIENT TEMPERATURE (°C)
30
40
50 60 70 80 90 100 110 120
AMBIENT TEMPERATURE (°C)
4641 F17
4641 F18
Figure 18. 5VIN to 1.0VOUT
Derating Curve 4-Channel
Paralleled, BGA Heat Sink
18
18
16
16
14
14
12
12
CURRENT (A)
CURRENT (A)
Figure 17. 12VIN to 1.0VOUT
Derating Curve 4-Channel
Paralleled, No Heat Sink
10
8
6
4
0
30
40
8
6
4
0LFM
200LFM
400LFM
2
10
0LFM
200LFM
400LFM
2
50 60 70 80 90 100 110 120
AMBIENT TEMPERATURE (°C)
0
30
40
50 60 70 80 90 100 110 120
AMBIENT TEMPERATURE (°C)
4641 F19
Figure 19. 12VIN to 1.0VOUT
Derating Curve 4-Channel
Paralleled, BGA Heat Sink
4641 F20
Figure 20. 5VIN to 1.5VOUT
Derating Curve 4-Channel
Paralleled, No Heat Sink
Rev. G
For more information www.analog.com
21
LTM4644/LTM4644-1
18
18
16
16
14
14
12
12
CURRENT (A)
CURRENT (A)
APPLICATIONS INFORMATION
10
8
6
4
0
30
40
8
6
4
0LFM
200LFM
400LFM
2
10
0LFM
200LFM
400LFM
2
0
50 60 70 80 90 100 110 120
AMBIENT TEMPERATURE (°C)
30
40
50 60 70 80 90 100 110 120
AMBIENT TEMPERATURE (°C)
4641 F21
4641 F22
Figure 22. 5VIN to 1.5VOUT
Derating Curve 4-Channel
Paralleled, BGA Heat Sink
18
18
16
16
14
14
12
12
CURRENT (A)
CURRENT (A)
Figure 21. 12VIN to 1.5VOUT
Derating Curve 4-Channel
Paralleled, No Heat Sink
10
8
6
4
0
30
40
8
6
4
0LFM
200LFM
400LFM
2
10
0LFM
200LFM
400LFM
2
0
50 60 70 80 90 100 110 120
AMBIENT TEMPERATURE (°C)
30
40
50 60 70 80 90 100 110 120
AMBIENT TEMPERATURE (°C)
4641 F23
4641 F24
Figure 24. 5VIN to 3.3VOUT
Derating Curve 4-Channel
Paralleled, No Heat Sink
18
18
16
16
14
14
12
12
CURRENT (A)
CURRENT (A)
Figure 23. 12VIN to 1.5VOUT
Derating Curve 4-Channel
Paralleled, BGA Heat Sink
10
8
6
4
0
30
40
8
6
4
0LFM
200LFM
400LFM
2
10
0LFM
200LFM
400LFM
2
50 60 70 80 90 100 110 120
AMBIENT TEMPERATURE (°C)
0
30
40
50 60 70 80 90 100 110 120
AMBIENT TEMPERATURE (°C)
4641 F25
Figure 25. 12VIN to 3.3VOUT
Derating Curve 4-Channel
Paralleled, No Heat Sink
22
4641 F26
Figure 26. 5VIN to 3.3VOUT
Derating Curve 4-Channel
Paralleled, BGA Heat Sink
Rev. G
For more information www.analog.com
LTM4644/LTM4644-1
18
16
16
16
14
14
14
12
12
12
10
8
6
4
30
40
8
6
50 60 70 80 90 100 110 120
AMBIENT TEMPERATURE (°C)
0
30
40
50 60 70 80 90 100 110 120
AMBIENT TEMPERATURE (°C)
12
9
11
8
7
6
5
4
3
0LFM
200LFM
400LFM
1
0
30
40
6
0LFM
200LFM
400LFM
0
30
40
50 60 70 80 90 100 110 120
AMBIENT TEMPERATURE (°C)
4641 F28
Figure 28. 12VIN to 5VOUT
Derating Curve 4-Channel
Paralleled, No Heat Sink
10
2
8
2
4641 F27
Figure 27. 12VIN to 3.3VOUT
Derating Curve 4-Channel
Paralleled, BGA Heat Sink
10
4
0LFM
200LFM
400LFM
2
POWER LOSS ALLOWANCE (W)
0
10
4
0LFM
200LFM
400LFM
2
CURRENT (A)
18
CURRENT (A)
18
POWER LOSS ALLOWANCE (W)
CURRENT (A)
APPLICATIONS INFORMATION
10
9
8
7
6
5
4
3
0LFM
200LFM
400LFM
2
1
50 60 70 80 90 100 110 120
AMBIENT TEMPERATURE (°C)
0
30
40
4641 F30
Figure 30. Power Loss Allowance
vs. Ambient Temperature No Heat
Sink
4641 F29
Figure 29. 12VIN to 5VOUT
Derating Curve 4-Channel
Paralleled, BGA Heat Sink
50 60 70 80 90 100 110 120
AMBIENT TEMPERATURE (°C)
4641 F31
Figure 31. Power Loss Allowance
vs. Ambient Temperature BGA
Heat Sink
Rev. G
For more information www.analog.com
23
LTM4644/LTM4644-1
APPLICATIONS INFORMATION
Table 3. 1.0V Output
DERATING CURVE
Figures 16, 17
Figures 16, 17
Figures 16, 17
Figures 18, 19
Figures 18, 19
Figures 18, 19
VIN (V)
5, 12
5, 12
5, 12
5, 12
5, 12
5, 12
POWER LOSS CURVE
Figure 9
Figure 9
Figure 9
Figure 9
Figure 9
Figure 9
AIR FLOW (LFM)
0
200
400
0
200
400
HEAT SINK
None
None
None
BGA Heat Sink
BGA Heat Sink
BGA Heat Sink
ΘJA (°C/W)
12.5
11
10
11
9
8
DERATING CURVE
VIN (V)
POWER LOSS CURVE
AIR FLOW (LFM)
HEAT SINK
ΘJA (°C/W)
Figures 20, 21
Figures 20, 21
Figures 20, 21
Figures 22, 23
Figures 22, 23
Figures 22, 23
5, 12
5, 12
5, 12
5, 12
5, 12
5, 12
Figure 11
Figure 11
Figure 11
Figure 11
Figure 11
Figure 11
0
200
400
0
200
400
None
None
None
BGA Heat Sink
BGA Heat Sink
BGA Heat Sink
12.5
11
10
11
9
8
VIN (V)
5, 12
5, 12
5, 12
5, 12
5, 12
5, 12
POWER LOSS CURVE
Figure 14
Figure 14
Figure 14
Figure 14
Figure 14
Figure 14
AIR FLOW (LFM)
0
200
400
0
200
400
HEAT SINK
None
None
None
BGA Heat Sink
BGA Heat Sink
BGA Heat Sink
ΘJA (°C/W)
12.5
11
10
11
9
8
VIN (V)
12
12
12
12
12
12
POWER LOSS CURVE
Figure 15
Figure 15
Figure 15
Figure 15
Figure 15
Figure 15
AIR FLOW (LFM)
0
200
400
0
200
400
HEAT SINK
None
None
None
BGA Heat Sink
BGA Heat Sink
BGA Heat Sink
ΘJA (°C/W)
12.5
11
10
11
9
8
Table 4. 1.5V Output
Table 5. 3.3V Output
DERATING CURVE
Figures 24, 25
Figures 24, 25
Figures 24, 25
Figures 26, 27
Figures 26, 27
Figures 26, 27
Table 6. 5V Output
DERATING CURVE
Figures 26, 27
Figures 26, 27
Figures 26, 27
Figures 28, 29
Figures 28, 29
Figures 28, 29
24
Rev. G
For more information www.analog.com
LTM4644/LTM4644-1
APPLICATIONS INFORMATION
Table 7
CIN
PART NUMBER
VALUE
COUT1
PART NUMBER
Murata
GRM21BR61C106KE15L
10µF, 16V,
0805, X5R
Murata
GRM21BR60J476ME15 47µF, 6.3V,
0805, X5R
Taiyo Yuden EMK212BJ106KG-T
10µF, 16V,
0805, X5R
Taiyo Yuden
JMK212BJ476MG-T
Murata
22µF, 16V,
1206, X5R
GRM31CR61C226ME15L
Taiyo Yuden EMK316BJ226ML-T
CIN
(CERAMIC)
VOUT (V)
(µF)
1
10
1
10
1
10
1
10
1.2
10
1.2
10
1.2
10
1.2
10
1.5
10
1.5
10
1.5
10
1.5
10
1.8
10
1.8
10
1.8
10
1.8
10
2.5
10
2.5
10
2.5
10
2.5
10
3.3
10
3.3
10
3.3
10
3.3
10
5
10
5
10
CIN
(BULK)
VALUE
COUT2
PART NUMBER
VALUE
Sanyo
4TPE100MZB
4V 100µF
47µF, 6.3V,
0805, X5R
22µF, 16V,
1206, X5R
COUT1
(CERAMIC)
(µF)
COUT2
(BULK)
(µF)
CFF
(pF)
100µF
10
47
72
40
1
1
90.9
60
40
1
1
90.9
5,12
5
127
40
2
1
90.9
5,12
5
90
40
2
1
90.9
5,12
5
76
40
1
1
60.4
5,12
5
65
40
1
1
60.4
5,12
5
145
40
2
1
60.4
5,12
5
103
40
2
1
60.4
5,12
5
80
40
1
1
40.2
5,12
5
70
40
1
1
40.2
5,12
5
161
40
2
1
40.2
5,12
5
115
40
2
1
40.2
5,12
5
95
40
1
1
30.1
5,12
5
80
40
1
1
30.1
5,12
5
177
40
2
1
30.1
5,12
5
128
40
2
1
30.1
5,12
5
125
40
1
1
19.1
5,12
5
100
50
1
1
19.1
5,12
5
225
40
2
1
19.1
5,12
5
161
50
2
1
19.1
5,12
5
155
40
1
1
13.3
5,12
5
122
60
1
1
13.3
5,12
5
285
40
2
1
13.3
10
5,12
5
198
60
2
1
13.3
10
5,12
5
220
40
1
1
8.25
10
5,12
5
420
40
2
1
8.25
10
10
10
100µF
10
47
47
10
47
10
47
100µF
10
100µF
10
100µF
10
47
47
47
100µF
10
47
100µF
47
100µF
RFB
(kΩ)
5
100µF
100µF
LOAD STEP
SLEW RATE
(A/µs)
5
47
100µF
LOAD
STEP
(A)
5,12
47
100µF
P-P
DROOP DERIVATION RECOVERY
(mv)
(mV)
TIME (µs)
5,12
47
100µF
VIN
(V)
Rev. G
For more information www.analog.com
25
LTM4644/LTM4644-1
APPLICATIONS INFORMATION
Layout Checklist/Example
The high integration of LTM4644 makes the PCB board
layout very simple and easy. However, to optimize its
electrical and thermal performance, some layout considerations are still necessary.
• To minimize the via conduction loss and reduce module
thermal stress, use multiple vias for interconnection
between top layer and other power layers.
• Do not put via directly on the pad, unless they are
capped or plated over.
• Use large PCB copper areas for high current paths,
including VIN1 to VIN4, GND, VOUT1 to VOUT4. It helps to
minimize the PCB conduction loss and thermal stress.
• Use a separated SGND ground copper area for components connected to signal pins. Connect the SGND
to GND underneath the unit.
• Place high frequency ceramic input and output capacitors next to the VIN, GND and VOUT pins to minimize
high frequency noise.
• For parallel modules, tie the VOUT, VFB, and COMP pins
together. Use an internal layer to closely connect these
pins together. The TRACK/SS pin can be tied a common
capacitor for regulator soft-start.
• Place a dedicated power ground layer underneath the
unit.
• Bring out test points on the signal pins for monitoring.
Figure 32 gives a good example of the recommended layout.
COUT
COUT
COUT
CIN
Figure 32. Recommended PCB Layout
26
Rev. G
For more information www.analog.com
LTM4644/LTM4644-1
TYPICAL APPLICATIONS
4V to 14V
10µF
×4
16V
1206
CLKIN
CLKOUT
VIN1
VOUT1
SVIN1
FB1
LTM4644
RUN1
COMP1
INTVCC1
TRACK/SS1
MODE1
PGOOD1
VIN2
SVIN2
RUN2
INTVCC2
MODE2
VOUT2
FB2
COMP2
TRACK/SS2
PGOOD2
VIN3
SVIN3
RUN3
INTVCC3
MODE3
VOUT3
FB3
COMP3
TRACK/SS3
PGOOD3
VIN4
SVIN4
RUN4
INTVCC4
MODE4
VOUT4
FB4
COMP4
TRACK/SS4
PGOOD4
TEMP
SGND
3.3V/4A
47µF
6.3V
0805
13.3k
0.1µF
2.5V/4A
19.1k
47µF
4V
0805
60.4k
1.5V/4A
40.2k
47µF
4V
0805
13.3k
60.4k
1V/4A
90.9k
47µF
4V
0805
13.3k
60.4k
GND
4644 F41
13.3k
Figure 33. 4V to 14V Input, Quad 1.2V, 1.5V, 2.5V and 3.3V Output with Tracking
Rev. G
For more information www.analog.com
27
LTM4644/LTM4644-1
TYPICAL APPLICATIONS
2.375V to 5V
10µF
×4
6.3V
1206
5V BIAS
1µF
6.3V
CLKIN
CLKOUT
VIN1
VOUT1
SVIN1
FB1
LTM4644
RUN1
COMP1
INTVCC1
TRACK/SS1
MODE1
PGOOD1
VIN2
SVIN2
RUN2
INTVCC2
MODE2
VOUT2
FB2
COMP2
TRACK/SS2
PGOOD2
VIN3
SVIN3
RUN3
INTVCC3
MODE3
VOUT3
FB3
COMP3
TRACK/SS3
PGOOD3
VIN4
SVIN4
RUN4
INTVCC4
MODE4
VOUT4
FB4
COMP4
TRACK/SS4
PGOOD4
TEMP
SGND
30.1k
47µF
4V
0805
40.2k
47µF
4V
0805
60.4k
47µF
4V
0805
90.9k
47µF
4V
0805
1.8V/4A
0.1µF
1.5V/4A
0.1µF
1.2V/4A
0.1µF
1V/4A
0.1µF
GND
4644 F41
Figure 34. 2.375V to 5V Input, Quad 1V, 1.2V, 1.5V, 1.8V Output
28
Rev. G
For more information www.analog.com
LTM4644/LTM4644-1
TYPICAL APPLICATIONS
VIN
4V to 14V
CLKIN
CLKOUT
VIN1
VOUT1
SVIN1
FB1
LTM4644
RUN1
COMP1
INTVCC1
TRACK/SS1
MODE1
PGOOD1
22µF
×2
16V
1206
VIN
V – 0.6V
RT = IN
100µA
VIN2
SVIN2
RUN2
INTVCC2
MODE2
VOUT2
FB2
COMP2
TRACK/SS2
PGOOD2
VIN3
SVIN3
RUN3
INTVCC3
MODE3
VOUT3
FB3
COMP3
TRACK/SS3
PGOOD3
VIN4
SVIN4
RUN4
INTVCC4
MODE4
VOUT4
FB4
COMP4
TRACK/SS4
PGOOD4
TEMP
RT
SGND
15.1k
47µF
×3
4V
0805
1.2V/16A
0.1µF
GND
4644 F35
A/D
Figure 35. 4V to 14V Input, 4-Phase, 1.2V at 16A Design with Temperature Monitoring
Rev. G
For more information www.analog.com
29
LTM4644/LTM4644-1
TYPICAL APPLICATIONS
CLKIN
VIN
4V to 14V
VIN1
SVIN1
RUN1
INTVCC1
MODE1
22µF
×2
16V
1206
VIN
V – 0.6V
RT = IN
100µA
VOUT1
60.4k
LTM4644-1
FB1
COMP1
TRACK/SS1
PGOOD1
VIN2
SVIN2
RUN2
INTVCC2
MODE2
VOUT2
FB2
COMP2
TRACK/SS2
PGOOD2
VIN3
SVIN3
RUN3
INTVCC3
MODE3
VOUT3
FB3
COMP3
TRACK/SS3
PGOOD3
VIN4
SVIN4
RUN4
INTVCC4
MODE4
VOUT4
FB4
COMP4
TRACK/SS4
PGOOD4
TEMP
RT
CLKOUT
SGND
47µF
×3
4V
0805
1.2V/16A
60.4k
0.1µF
GND
4644 F36
A/D
Figure 36. 4V to 14V Input, 4-Phase, 1.2V at 16A Design with Temperature Monitoring
30
Rev. G
For more information www.analog.com
LTM4644/LTM4644-1
TYPICAL APPLICATIONS
5V
12V
22µF
×2
16V
1206
22µF
×2
16V
1206
CLKIN
CLKOUT
VIN1
VOUT1
SVIN1
FB1
LTM4644
RUN1
COMP1
INTVCC1
TRACK/SS1
MODE1
PGOOD1
VIN2
SVIN2
RUN2
INTVCC2
MODE2
VOUT2
FB2
COMP2
TRACK/SS2
PGOOD2
VIN3
SVIN3
RUN3
INTVCC3
MODE3
VOUT3
FB3
COMP3
TRACK/SS3
PGOOD3
VIN4
SVIN4
RUN4
INTVCC4
MODE4
VOUT4
FB4
COMP4
TRACK/SS4
PGOOD4
TEMP
SGND
30.2k
47µF
×2
4V
0805
6.65k
47µF
×2
6.3V
0805
1.2V/8A
0.1µF
3.3V/8A
0.1µF
GND
4644 F36
Figure 37. 12V and 5V Two Separate Input Rails, 1.2V at 8A and 3.3V at 8A Output
Rev. G
For more information www.analog.com
31
10.0m
19.1k
13.3k
40.2k
60.4k
VOUT3
60.4k
VOUT2
60.4k
VOUT1
VIN
4.5V TO 14V
0.1µF
For more information www.analog.com
MODE1
MODE2
MODE3
MODE4
SGND
GND
RUN1
RUN2
RUN3
RUN4
FB4
VOUT4
FB3
90.9k
10.0m
40.2k
10.0m
19.1k
10.0m
13.3k
10.0m
60.4k
60.4k
60.4k
60.4k
10.0k
10.0k
10.0k
10.0k
47µF
1k
47µF
1k
47µF
1k
47µF
1k
1k
1k
1k
1k
VOUT1
3.3V/4A
VOUT2
2.5V/4A
VOUT3
1.5V/4A
VOUT4
1.0V/4A
100Ω 10nF
0.1µF 100Ω
10nF
100Ω 10nF
0.1µF 100Ω
10nF
100Ω 10nF
0.1µF 100Ω
10nF
100Ω 10nF
0.1µF 100Ω
10nF
U6
10nF
10nF
10nF
10nF
IIN_SNSP
TSENSE1
TSENSE2
TSENSE3
VPWR
4644 F38
0.1µF
VDD33
12
0.1µF
VDD25
14
GND
CONTROL0
CONTROL1
CONTROL2
CONTROL3
SCL
SDA
ALERTB
SHARE_CLK
FAULTB0
FAULTB1
PWRGD
AUXFAULTB
LTC2975
ASEL0
ASEL1
WP
WDI/RESETB
REFM
REFP
VIN_SNS_CAP
IIN_SNSM
19
VOUT_EN0
VOUT_EN1
VOUT_EN2
VOUT_EN3
VDAC3
VSENSEM3
VSENSEP3
ISENSEM3
VDAC2
ISENSEP3
VSENSEM2
VSENSEP2
ISENSEM2
VDAC1
ISENSEP2
VSENSEM1
VSENSEP1
ISENSEM1
VDAC0
ISENSEP1
VSENSEM0
VSENSEP0
ISENSEM0
ISENSEP0
TSENSE0
VIN_SNS
Figure 38. LTM4644-1 Together with LTC2975, 4.5V to 14V Input, 3.3V, 2.5V, 1.5V, 1V
Output at 4A Each with Input and Output Voltage, Current and Temperature Telemetry.
PGOOD1
PGOOD2
PGOOD3
PGOOD4
COMP4
COMP3
COMP2
COMP1
TRACK/SS4
TRACK/SS3
TRACK/SS2
TRACK/SS1
VOUT3
FB2
VIN4
SVIN4
INTVCC4
LTM4644-1
VOUT2
FB1
VOUT1
TEMP
VIN3
SVIN3
INTVCC3
VIN2
SVIN2
INTVCC2
VIN1
SVIN1
INTVCC1
CLKOUT
CHANNEL 0
CHANNEL 1
CHANNEL 2
32
CHANNEL 3
CLKIN
0.1µF
0.1µF
10k 10k 10k 10k 10k 10k 10k 10k 10k 10k 10k
0.1µF
LTM4644/LTM4644-1
TYPICAL APPLICATIONS
Rev. G
LTM4644/LTM4644-1
PACKAGE DESCRIPTION
PACKAGE ROW AND COLUMN LABELING MAY VARY
AMONG µModule PRODUCTS. REVIEW EACH PACKAGE
LAYOUT CAREFULLY.
LTM4644/LTM4644-1 Component BGA Pinout
PIN
NAME
PIN
NAME
PIN
NAME
PIN
NAME
PIN
NAME
PIN
NAME
A1
VOUT1
B1
GND
C1
VOUT2
D1
VOUT2
E1
GND
F1
VOUT3
A2
VOUT1
B2
GND
C2
PGOOD2
D2
VOUT2
E2
GND
F2
PGOOD3
A3
VOUT1
B3
VIN1
C3
PGOOD1
D3
GND
E3
VIN2
F3
TEMP
A4
GND
B4
VIN1
C4
INTVCC1
D4
GND
E4
VIN2
F4
INTVCC2
A5
GND
B5
SVIN1
C5
GND
D5
GND
E5
SVIN2
F5
GND
A6
TRACK/SS1
B6
MODE1
C6
RUN1
D6
TRACK/SS2
E6
MODE2
F6
RUN2
A7
FB1
B7
COMP1
C7
CLKIN
D7
FB2
E7
COMP2
F7
SGND
PIN
NAME
PIN
NAME
PIN
NAME
PIN
NAME
PIN
NAME
G1
VOUT3
H1
GND
J1
VOUT4
K1
VOUT4
L1
GND
G2
VOUT3
H2
GND
J2
PGOOD4
K2
VOUT4
L2
GND
G3
GND
H3
VIN3
J3
CLKOUT
K3
GND
L3
VIN4
G4
GND
H4
VIN3
J4
INTVCC3
K4
GND
L4
VIN4
G5
GND
H5
SVIN3
J5
GND
K5
INTVCC4
L5
SVIN4
G6
TRACK/SS3
H6
MODE3
J6
RUN3
K6
TRACK/SS4
L6
MODE4
G7
FB3
H7
COMP3
J7
FB4
K7
RUN4
L7
COMP4
Rev. G
For more information www.analog.com
33
0.630 ±0.025 Ø 77x
SUGGESTED PCB LAYOUT
TOP VIEW
2.540
PACKAGE TOP VIEW
1.270
4
0.3175
0.000
0.3175
PIN “A1”
CORNER
E
1.270
aaa Z
2.540
Y
For more information www.analog.com
6.350
5.080
3.810
2.540
1.270
0.000
1.270
2.540
3.810
5.080
6.350
D
X
aaa Z
SYMBOL
A
A1
A2
b
b1
D
E
e
F
G
H1
H2
aaa
bbb
ccc
ddd
eee
b1
DETAIL A
NOM
5.01
0.60
4.41
0.75
0.63
15.00
9.00
1.27
12.70
7.62
0.41
4.00
BALL DIMENSION
PAD DIMENSION
BALL HT
NOTES
DETAIL B
PACKAGE SIDE VIEW
MAX
5.21
0.70
4.51
0.90
0.66
DIMENSIONS
A
A2
SUBSTRATE THK
0.46
MOLD CAP HT
4.05
0.15
0.10
0.20
0.30
0.15
TOTAL NUMBER OF BALLS: 77
0.36
3.95
MIN
4.81
0.50
4.31
0.60
0.60
H1
SUBSTRATE
A1
ddd M Z X Y
eee M Z
DETAIL B
H2
MOLD
CAP
ccc Z
Øb (77 PLACES)
// bbb Z
(Reference LTC DWG# 05-08-1900 Rev E)
Z
34
Z
BGA Package
77-Lead (15.00mm × 9.00mm × 5.01mm)
F
e
7
5
4
3
2
1
DETAIL A
PACKAGE BOTTOM VIEW
6
G
L
K
J
H
G
F
E
D
C
B
A
PIN 1
DETAILS OF PIN #1 IDENTIFIER ARE OPTIONAL,
BUT MUST BE LOCATED WITHIN THE ZONE INDICATED.
THE PIN #1 IDENTIFIER MAY BE EITHER A MOLD OR
MARKED FEATURE
4
TRAY PIN 1
BEVEL
COMPONENT
PIN “A1”
6
!
BGA 77 0517 REV E
PACKAGE IN TRAY LOADING ORIENTATION
LTMXXXXXX
µModule
PACKAGE ROW AND COLUMN LABELING MAY VARY
AMONG µModule PRODUCTS. REVIEW EACH PACKAGE
LAYOUT CAREFULLY
5. PRIMARY DATUM -Z- IS SEATING PLANE
BALL DESIGNATION PER JESD MS-028 AND JEP95
3
2. ALL DIMENSIONS ARE IN MILLIMETERS
6
SEE NOTES
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M-1994
b
3
SEE NOTES
LTM4644/LTM4644-1
PACKAGE DESCRIPTION
Rev. G
3.810
3.810
LTM4644/LTM4644-1
REVISION HISTORY
REV
DATE
DESCRIPTION
PAGE NUMBER
A
01/14
Add SnPb BGA package option
B
06/14
Add Tech Clip video link
1
Update Order Information
2
1, 2
Update Run Threshold
3
Update Figure 5
13
Update Soft-Start and Output Voltage Tracking Section
14
C
05/16
Added MP-grade (–55°C to 125°C)
2
D
12/16
Added LTM4644-1
1 ,2, 4, 9, 10, 33
Added Comparison Table between LTM4644 and LTM4644-1
1
Added Output Voltage Programing (LTM4644-1)
10
Added Figure 36
30
Added Figure 38
32
E
01/18
Changed IOUTPK (MIN) from 5A to 6A
3
F
02/19
Increased Storage Temperature Range to −65ºC to 150ºC
2
G
01/20
Added text to CLKOUT
6
Rev. G
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog
Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications
subject to change without notice. No licenseFor
is granted
implication or
otherwise under any patent or patent rights of Analog Devices.
more by
information
www.analog.com
35
LTM4644/LTM4644-1
PACKAGE PHOTO
DESIGN RESOURCES
SUBJECT
DESCRIPTION
µModule Design and Manufacturing Resources
Design:
•
Selector Guides
•
Demo Boards and Gerber Files
•
Free Simulation Tools
Manufacturing:
•
Quick Start Guide
•
PCB Design, Assembly and Manufacturing Guidelines
•
Package and Board Level Reliability
µModule Regulator Products Search
1. Sort table of products by parameters and download the result as a spread sheet.
2. Search using the Quick Power Search parametric table.
Digital Power System Management
Analog Devices’ family of digital power supply management ICs are highly integrated solutions that
offer essential functions, including power supply monitoring, supervision, margining and sequencing,
and feature EEPROM for storing user configurations and fault logging.
RELATED PARTS
PART NUMBER DESCRIPTION
LTM4622
Ultrathin, Dual 2.5A Step-Down µModule
Regulator
LTM4622A
High Vout, Ultrathin, Dual 2.5A Step-Down
µModule Regulator
LTM4623
Ultrathin, Single 3A µModule Regulator
LTM4624
Single 4A µModule Regulator
LTM4625
Single 5A µModule Regulator
LTM4626
Single 12A µModule Regulator
LTM4638
Single 15A µModule Regulator
LTM4643
Ultrathin, Quad 3A, Step-Down µModule
Regulator. Pin Compatible with the LTM4644.
LTM4646
Dual 10A µModule Regulator
LTC2978
Octal Digital Power Supply Manager with EEPROM
LTC2974
36
COMMENTS
3.6V ≤ VIN ≤ 20V. 0.6V ≤ VOUT ≤ 5.5V. 6.25mm x 6.25mm x 1.82mm LGA, 2.42mm
BGA.
3.6V ≤ VIN ≤ 20V. 1.5V ≤ VOUT ≤ 12V. 6.25mm x 6.25mm x 1.82mm LGA, 2.42mm BGA.
4V ≤ VIN ≤ 20V. 0.6V ≤ VOUT ≤ 5.5V. 6.25mm x 6.25mm x 1.82mm LGA, 2.42mm BGA.
4V ≤ VIN ≤ 14V. 0.6V ≤ VOUT ≤ 5.5V. 6.25mm x 6.25mm x 5.01mm BGA.
4V ≤ VIN ≤ 20V. 0.6V ≤ VOUT ≤ 5.5V. 6.25mm x 6.25mm x 5.01mm BGA.
3.1V ≤ VIN ≤ 20V. 0.6V ≤ VOUT ≤ 5.5V. 6.25mm x 6.25mm x 3.87mm BGA.
3.1V ≤ VIN ≤ 20V. 0.6V ≤ VOUT ≤ 5.5V. 6.25mm x 6.25mm x 5.02mm BGA.
4V ≤ VIN ≤ 20V, 0.6V ≤ VOUT ≤ 3.3V, 9mm x 15mm x 1.82mm LGA, 2.42mm BGA.
4.5V ≤ VIN ≤ 20V. 0.6V ≤ VOUT ≤ 5.5V. 11.25mm x 15mm x 5.01mm BGA
I2C/PMBus Interface, Configuration EEPROM, Fault Logging, 16-Bit ADC with
±0.25% TUE, 3.3V to 15V Operation
Quad Digital Power Supply Manager with EEPROM I2C/PMBus Interface, Configuration EEPROM, Fault Logging, Per Channel Voltage,
Current and Temperature Measurements
Rev. G
01/20
www.analog.com
For more information www.analog.com
ANALOG DEVICES, INC. 2018–2020
工商网监
湘ICP备2023018690号
