LTM8047MPY#PBF

LTM8047 3.1VIN to 32VIN Isolated µModule DC/DC Converter FEATURES DESCRIPTION n n n n n n n n n The LTM®8047 is an isolated flyback µModule DC/DC converter. The LTM8047 has an isolation rating of 725VDC. For a similar product with LDO post regulator, see the LTM8048. Included in the package are the switching controller, power switches, transformer, and all support components. Operating over an input voltage range of 3.1V to 32V, the LTM8047 supports an output voltage range of 2.5V to 12V, set by a single resistor. Only output, input, and bypass capacitors are needed to finish the design. Other components may be used to control the soft-start control and biasing. n Complete Switch Mode Power Supply 725VDC Isolation Wide Input Voltage Range: 3.1V to 32V Up to 440mA Output Current (VOUT = 2.5V) 2.5V to 12V Output Voltage Current Mode Control Programmable Soft-Start User Configurable Undervoltage Lockout SnPb or RoHS Compliant Finish Low Profile (11.25mm × 9mm × 4.92mm) Surface Mount BGA Package The LTM8047 is packaged in a thermally enhanced, compact (11.25mm × 9mm × 4.92mm) over-molded ball grid array (BGA) package suitable for automated assembly by standard surface mount equipment. The LTM8047 is available with SnPb (BGA) or RoHS compliant terminal finish. APPLICATIONS Industrial Sensors Industrial Switches n Ground Loop Mitigation n n L, LT, LTC, LTM, Linear Technology, the Linear logo and µModule are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. TYPICAL APPLICATION Maximum Load vs VIN 725V DC Isolated Low Noise µModule Regulator RUN BIAS 4.7µF 6.98k ADJ SS GND VOUT 5V 280mA (15VIN) VOUT ISOLATION BARRIER 2.2µF VIN 22µF VOUT– 725VDC ISOLATION 8047 TA01 MAXIMUM VOUT LOAD (mA) LTM8047 VIN 3.1V TO 29V 400 350 300 250 200 150 100 0 5 10 15 VIN (V) 20 25 30 8047 TA01b 8047fc For more information www.linear.com/LTM8047 1 LTM8047 ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION (Note 1) TOP VIEW VIN, RUN, BIAS .........................................................32V ADJ, SS........................................................................5V VOUT Relative to VOUT–...............................................16V (VIN – GND) + (VOUT – VOUT–)....................................36V BIAS Above VIN......................................................... 0.1V GND to VOUT– Isolation (Note 2)......................... 725VDC Maximum Internal Temperature (Note 3)............... 125°C Maximum Solder Temperature............................... 250°C A B C BANK 1 VOUT BANK 2 VOUT– D E F BANK 3 VIN G BANK 4 GND RUN ADJ H BIAS SS 1 2 3 4 5 6 7 BGA PACKAGE 45-LEAD (11.25mm × 9mm × 4.92mm) TJMAX = 125°C, θJA = 16°C/W, θJCbottom = 4.1°C/W, θJCtop = 15°C/W, θJB = 4°C/W WEIGHT = 1.1g, θ VALUES DETERMINED PER JEDEC 51-9, 51-12 ORDER INFORMATION PART NUMBER PAD OR BALL FINISH DEVICE PART MARKING* CODE PACKAGE TYPE MSL RATING TEMPERATURE RANGE (Note 3) LTM8047EY#PBF SAC305 (RoHS) LTM8047Y e1 BGA 3 –40°C to 125°C LTM8047IY#PBF SAC305 (RoHS) LTM8047Y e1 BGA 3 –40°C to 125°C LTM8047MPY#PBF SAC305 (RoHS) LTM8047Y e1 BGA 3 –55°C to 125°C LTM8047MPY SnPb (63/37) LTM8047Y e0 BGA 3 –55°C to 125°C Consult Marketing for parts specified with wider operating temperature ranges. *Device temperature grade is indicated by a label on the shipping container. Pad or ball finish code is per IPC/JEDEC J-STD-609. • Recommended LGA and BGA PCB Assembly and Manufacturing Procedures: www.linear.com/umodule/pcbassembly • Pb-free and Non-Pb-free Part Markings: www.linear.com/leadfree • BGA Package and Tray Drawings: www.linear.com/packaging ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C, RUN = 12V (Note 3). PARAMETER CONDITIONS Minimum Input DC Voltage BIAS = VIN l MIN VOUT DC Voltage RADJ = 12.4k RADJ = 6.98k RADJ = 3.16k l 4.75 TYP 2.5 5 12 VIN Quiescent Current VRUN = 0V Not Switching 850 VOUT Line Regulation 6V ≤ VIN ≤ 31V, IOUT = 0.15A 1.7 MAX UNITS 3.1 V 5.25 V V V 1 µA µA % 8047fc 2 For more information www.linear.com/LTM8047 LTM8047 ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C, RUN = 12V (Note 3). PARAMETER CONDITIONS VOUT Load Regulation 0.05A ≤ IOUT ≤ 0.2A MIN 1.5 % VOUT Ripple (RMS) IOUT = 0.1A 20 mV Input Short Circuit Current VOUT Shorted RUN Pin Input Threshold RUN Pin Rising RUN Pin Current VRUN = 1V VRUN = 1.3V TYP MAX UNITS 30 1.18 SS Threshold SS Sourcing Current SS = 0V BIAS Current VIN = 12V, BIAS = 5V, ILOAD1 = 100mA Minimum BIAS Voltage (Note 4) ILOAD1 = 100mA mA 1.24 1.30 V 2.5 0.1 µA µA 0.7 V –10 µA 8 mA 3.1 Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The LTM8047 isolation is tested at 725VDC for one second in each polarity. Note 3: The LTM8047E is guaranteed to meet performance specifications from 0°C to 125°C. Specifications over the –40°C to 125°C internal temperature range are assured by design, characterization and correlation V with statistical process controls. LTM8047I is guaranteed to meet specifications over the full –40°C to 125°C internal operating temperature range. The LTM8047MP is guaranteed to meet specifications over the full –55°C to 125°C internal operating temperature range. Note that the maximum internal temperature is determined by specific operating conditions in conjunction with board layout, the rated package thermal resistance and other environmental factors. Note 4: This is the BIAS pin voltage at which the internal circuitry is powered through the BIAS pin and not the integrated regulator. See BIAS Pin Considerations for details. TYPICAL PERFORMANCE CHARACTERISTICS VOUT = 2.5V BIAS = 5V 80 12VIN 70 24VIN 60 50 Efficiency vs Load 90 VOUT = 3.3V BIAS = 5V 12VIN 80 EFFICIENCY (%) EFFICIENCY (%) Efficiency vs Load 90 24VIN 70 60 0 100 300 200 400 VOUT CURRENT (mA) 500 8047 G01 50 VOUT = 5V BIAS = 5V 12VIN 80 EFFICIENCY (%) Efficiency vs Load 90 24VIN 70 60 0 100 300 200 VOUT CURRENT (mA) 400 8047 G02 50 0 50 100 150 200 250 VOUT CURRENT (mA) 300 350 8047 G03 8047fc For more information www.linear.com/LTM8047 3 LTM8047 TYPICAL PERFORMANCE CHARACTERISTICS Efficiency vs Load 100 Efficiency vs Load 100 VOUT = 8V BIAS = 5V 80 24VIN 12VIN 80 24VIN 70 12VIN 7.5 BIAS CURRENT (mA) 12VIN BIAS Current vs VOUT Load VOUT = 2.5V 8.0 BIAS = 5V VOUT = 12V BIAS = 5V 90 EFFICIENCY (%) EFFICIENCY (%) 90 8.5 70 7.0 24VIN 6.5 6.0 5.5 5.0 4.5 50 100 150 200 250 VOUT CURRENT (mA) 300 60 350 10 12VIN BIAS CURRENT (mA) BIAS CURRENT (mA) 24VIN 6.5 6.0 5.5 5.0 13 0 100 300 200 VOUT CURRENT (mA) VOUT = 5V BIAS = 5V 12 24VIN 6 MAXIMUM VOUT LOAD (mA) 11 10 9 24VIN 8 7 6 300 250 8047 G10 8047 G06 BIAS Current vs VOUT Load 12VIN 9 24VIN 8 7 6 Maximum Load vs VIN 350 2.5VOUT 3.3VOUT 5VOUT 5 10 15 VIN (V) 20 100 150 200 250 VOUT CURRENT (mA) 50 25 8047 G11 350 8047 G09 BIAS = VIN IF VIN ≤ 5V BIAS = 5V IF VIN > 5V 250 200 150 100 50 30 300 Maximum Load vs VIN 300 200 0 0 8047 G08 250 100 500 10 4 350 300 4 100 150 200 VOUT CURRENT (mA) 100 150 200 250 VOUT CURRENT (mA) 350 150 50 50 400 5 0 0 BIAS = VIN IF VIN ≤ 5V 450 BIAS = 5V IF VIN > 5V 12VIN 200 300 400 VOUT CURRENT (mA) 5 8047 G07 500 100 VOUT = 8V 11 BIAS = 5V 12VIN 7 0 8047 G05 8 4 400 BIAS Current vs VOUT Load VOUT = 12V 12 BIAS = 5V BIAS CURRENT (mA) 4.0 250 5 4.5 4.0 150 200 100 VOUT CURRENT (mA) BIAS Current vs VOUT Load 9 7.5 7.0 50 8047 G04 BIAS Current vs VOUT Load VOUT = 3.3V 8.0 BIAS = 5V 0 BIAS CURRENT (mA) 8.5 0 MAXIMUM VOUT LOAD (mA) 60 0 8VOUT 12VOUT 0 5 15 10 VIN (V) 20 25 8047 12 8047fc 4 For more information www.linear.com/LTM8047 LTM8047 TYPICAL PERFORMANCE CHARACTERISTICS 30 25 20 15 10 Minimum Load vs VIN 80 8VOUT1 12VOUT1 9 6 3 5 10 15 VIN (V) 20 25 0 30 9 5 4 3 3.3VIN 5VIN 12VIN 24VIN 0 50 TEMPERATURE RISE (°C) TEMPERATURE RISE (°C) 6 0 25 40 30 10 30 100 150 200 250 300 350 400 VOUT LOAD CURRENT (mA) 10 3.3VIN 5VIN 12VIN 24VIN 0 50 16 20 VIN (V) 24 28 32 8047 G15 100 150 200 250 300 350 400 VOUT LOAD CURRENT (mA) 7 6 5 4 3 3.3VIN 5VIN 12VIN 24VIN 2 1 0 0 50 100 150 200 250 300 VOUT LOAD CURRENT (mA) 350 8047 G18 Junction Temperature Rise vs Load Current VOUT = 8V 12 8 8047 G17 12 8 VOUT = 5V 9 3 0 4 Junction Temperature Rise vs Load Current 4 2 0 8047 G14 5 1 10 Output Noise and Ripple VOUT = 12V 10 8 6 4 3.3VIN 5VIN 12VIN 24VIN 2 0 50 100 150 200 250 VOUT LOAD CURRENT (mA) 300 8047 G19 TEMPERATURE RISE (°C) TEMPERATURE RISE (°C) 20 6 Junction Temperature Rise vs Load Current 0 15 VIN (V) 7 8047 G16 12 10 VOUT = 3.3V 8 7 1 50 Junction Temperature Rise vs Load Current VOUT = 2.5V 2 5 8047 G13 Junction Temperature Rise vs Load Current 8 0 TEMPERATURE RISE (°C) 0 60 20 5 0 Input Current vs VIN VOUT Shorted 70 12 INPUT CURRENT (mA) 35 MINIMUM VOUT LOAD (mA) 15 2.5VOUT 3.3VOUT 5VOUT MINIMUM VOUT1 LOAD (mA) 40 Minimum Load vs VIN 10mV/DIV 8 6 4 2µs/DIV 3.3VIN 5VIN 12VIN 24VIN 2 0 0 50 100 150 200 VOUT LOAD CURRENT (mA) 8047 G21 12VIN, 5VOUT at 250mA 0.1μF 250V SAFETY CAPACITOR APPLIED BETWEEN GND AND VOUT– 250 8047 G20 8047fc For more information www.linear.com/LTM8047 5 LTM8047 PIN FUNCTIONS VOUT (Bank 1): VOUT and VOUT– comprise the isolated output of the LTM8047 flyback stage. Apply an external capacitor between VOUT and VOUT–. Do not allow VOUT– to exceed VOUT. VOUT– (Bank 2): VOUT– is the return for VOUT. VOUT and VOUT– comprise the isolated output of the LTM8047. In most applications, the bulk of the heat flow out of the LTM8047 is through the GND and VOUT– pads, so the printed circuit design has a large impact on the thermal performance of the part. See the PCB Layout and Thermal Considerations sections for more details. Apply an external capacitor between VOUT and VOUT–. GND (Bank 4): This is the primary side local ground of the LTM8047 primary. In most applications, the bulk of the heat flow out of the LTM8047 is through the GND and VOUT– pads, so the printed circuit design has a large impact on the thermal performance of the part. See the PCB Layout and Thermal Considerations sections for more details. VIN (Bank 3): VIN supplies current to the LTM8047’s internal regulator and to the integrated power switch. These pins must be locally bypassed with an external, low ESR capacitor. RUN (Pin F3): A resistive divider connected to VIN and this pin programs the minimum voltage at which the LTM8047 will operate. Below 1.24V, the LTM8047 does not deliver power to the secondary. Above 1.24V, power will be delivered to the secondary and 10µA will be fed into the SS pin. When RUN is less than 1.24V, the pin draws 2.5µA, allowing for a programmable hysteresis. Do not allow a negative voltage (relative to GND) on this pin. ADJ (Pin G7): Apply a resistor from this pin to GND to set the output voltage, using the recommended value given in Table 1. If Table 1 does not list the desired VOUT value, the equation ( ) RADJ = 28.4 VOUT –0.879 kΩ may be used to approximate the value. To the seasoned designer, this exponential equation may seem unusual. The equation is exponential due to non-linear current sources that are used to temperature compensate the output regulation. BIAS (Pin H5): This pin supplies the power necessary to operate the LTM8047. It must be locally bypassed with a low ESR capacitor of at least 4.7μF. Do not allow this pin voltage to rise above VIN. SS (Pin H6): Place a soft-start capacitor here to limit inrush current and the output voltage ramp rate. Do not allow a negative voltage (relative to GND) on this pin. 8047fc 6 For more information www.linear.com/LTM8047 LTM8047 BLOCK DIAGRAM VOUT1 VIN • • 0.1µF 1µF RUN BIAS* SS CURRENT MODE CONTROLLER VOUT– ADJ1 GND 8047 BD *DO NOT ALLOW BIAS VOLTAGE TO BE ABOVE VIN 8047fc For more information www.linear.com/LTM8047 7 LTM8047 OPERATION The LTM8047 is a stand-alone isolated flyback switching DC/DC power supply that can deliver up to 440mA of output current. This module provides a regulated output voltage programmable via one external resistor from 2.5V to 12V. The input voltage range of the LTM8047 is 3.1V to 32V. Given that the LTM8047 is a flyback converter, the output current depends upon the input and output voltages, so make sure that the input voltage is high enough to support the desired output voltage and load current. The Typical Performance Characteristics section gives several graphs of the maximum load versus VIN for several output voltages. A simplified block diagram is given. The LTM8047 contains a current mode controller, power switching element, power transformer, power Schottky diode, a modest amount of input and output capacitance. The LTM8047 has a galvanic primary to secondary isolation rating of 725VDC. This is verified by applying 725VDC between the primary to secondary for 1 second and then applying –725VDC for 1 second. For details please refer to the Isolation and Working Voltage section. An internal regulator provides power to the control circuitry. The bias regulator normally draws power from the VIN pin, but if the BIAS pin is connected to an external voltage higher than 3.1V, bias power will be drawn from the external source, improving efficiency. VBIAS must not exceed VIN. The RUN pin is used to turn on or off the LTM8047, disconnecting the output and reducing the input current to 1μA or less. The LTM8047 is a variable frequency device. For a fixed input and output voltage, the frequency increases as the load increases. For light loads, the current through the internal transformer may be discontinuous. 8047fc 8 For more information www.linear.com/LTM8047 LTM8047 APPLICATIONS INFORMATION For most applications, the design process is straightforward, summarized as follows: 1. Look at Table 1 and find the row that has the desired input range and output voltage. 2. Apply the recommended CIN, COUT and RADJ. 3. Connect BIAS as indicated, or tie to an external source up to 15V or VIN, whichever is less. While these component combinations have been tested for proper operation, it is incumbent upon the user to verify proper operation over the intended system’s line, load and environmental conditions. Bear in mind that the maximum output current may be limited by junction temperature, the relationship between the input and output voltage magnitude and polarity and other factors. Please refer to the graphs in the Typical Performance Characteristics section for guidance. Capacitor Selection Considerations The CIN and COUT capacitor values in Table 1 are the minimum recommended values for the associated operating conditions. Applying capacitor values below those indicated in Table 1 is not recommended, and may result in undesirable operation. Using larger values is generally acceptable, and can yield improved dynamic response, if it is necessary. Again, it is incumbent upon the user to verify proper operation over the intended system’s line, load and environmental conditions. Ceramic capacitors are small, robust and have very low ESR. However, not all ceramic capacitors are suitable. X5R and X7R types are stable over temperature and applied voltage and give dependable service. Other types, including Y5V and Z5U have very large temperature and voltage coefficients of capacitance. In an application circuit they may have only a small fraction of their nominal capacitance resulting in much higher output voltage ripple than expected. A final precaution regarding ceramic capacitors concerns the maximum input voltage rating of the LTM8047. A ceramic input capacitor combined with trace or cable inductance forms a high-Q (underdamped) tank circuit. If the LTM8047 circuit is plugged into a live supply, the input voltage can ring to much higher than its nominal value, possibly exceeding the device’s rating. This situation is easily avoided; see the Hot-Plugging Safely section. LTM8047 Table 1. Recommended Component Values and Configuration for Specific VOUT Voltages (TA = 25°C) VIN VOUT VBIAS CIN COUT RADJ 3.1V to 32V 2.5V 3.1V to 15V or Open 2.2µF, 50V, 1206 100µF, 6.3V, 1210 12.4k 3.1V to 32V 3.3V 3.1V to 15V or Open 2.2µF, 50V, 1206 100µF, 6.3V, 1210 10k 3.1V to 29V 5V 3.1V to 15V or Open 2.2µF, 50V, 1206 22µF, 16V, 1210 6.98k 3.1V to 26V 8V 3.1V to 15V or Open 2.2µF, 50V, 1206 22µF, 10V, 1206 4.53k 3.1V to 24V 12V 3.1V to 15V or Open 2.2µF, 25V, 0805 10µF, 16V, 1210 3.16k/12pF* 9V to 15V 2.5V VIN 2.2µF, 50V, 1206 100µF, 6.3V, 1210 12.4k 9V to 15V 3.3V VIN 2.2µF, 50V, 1206 47µF, 6.3V, 1210 10k 9V to 15V 5V VIN 2.2µF, 50V, 1206 22µF, 16V, 1210 6.98k 9V to 15V 8V VIN 2.2µF, 50V, 1206 22µF, 10V, 1206 4.53k 9V to 15V 12V VIN 2.2µF, 25V, 0805 10µF, 16V, 1210 3.16k 18V to 32V 2.5V 3.1V to 15V or Open 2.2µF, 50V, 1206 100µF, 6.3V, 1210 12.4k 18V to 32V 3.3V 3.1V to 15V or Open 2.2µF, 50V, 1206 47µF, 6.3V, 1210 10k 18V to 29V 5V 3.1V to 15V or Open 2.2µF, 50V, 1206 22µF, 16V, 1210 6.98k 18V to 26V 8V 3.1V to 15V or Open 2.2µF, 50V, 1206 22µF, 10V, 1206 4.53k 18V to 24V 12V 3.1V to 15V or Open 2.2µF, 50V, 1206 10µF, 16V, 1210 3.16k/12pF* Note: Do not allow BIAS to exceed VIN, a bulk input capacitor is required. *Connect 3.16k in parallel with 12pF from ADJ to GND. 8047fc For more information www.linear.com/LTM8047 9 LTM8047 APPLICATIONS INFORMATION BIAS Pin Considerations The BIAS pin is the output of an internal linear regulator that powers the LTM8047’s internal circuitry. It is set to 3V and must be decoupled with a low ESR capacitor of at least 4.7μF. The LTM8047 will run properly without applying a voltage to this pin, but will operate more efficiently and dissipate less power if a voltage greater than 3.1V is applied. At low VIN, the LTM8047 will be able to deliver more output current if BIAS is 3.1V or greater. Up to 40V may be applied to this pin, but a high BIAS voltage will cause excessive power dissipation in the internal circuitry. For applications with an input voltage less than 15V, the BIAS pin is typically connected directly to the VIN pin. For input voltages greater than 15V, it is preferred to leave the BIAS pin separate from the VIN pin, either powered from a separate voltage source or left running from the internal regulator. This has the added advantage of keeping the physical size of the BIAS capacitor small. Do not allow BIAS to rise above VIN. Soft-Start For many applications, it is necessary to minimize the inrush current at start-up. The built-in soft-start circuit significantly reduces the start-up current spike and output voltage overshoot by applying a capacitor from SS to GND. When the LTM8047 is enabled, whether from VIN reaching a sufficiently high voltage or RUN being pulled high, the LTM8047 will source approximately 10µA out of the SS pin. As this current gradually charges the capacitor from SS to GND, the LTM8047 will correspondingly increase the power delivered to the output, allowing for a graceful turn-on ramp. Isolation and Working Voltage The LTM8047 isolation is 100% hi-pot tested by tying all of the primary pins together, all of the secondary pins together and subjecting the two resultant circuits to a differential of 725VDC for one second and then –725VDC for one second. This establishes the isolation voltage rating of the LTM8047 component, and is most often used to satisfy component safety specifications issued by agencies such as UL, TUV, CSA and others. The isolation rating of the LTM8047 is not the same as the working or operational voltage that the application will experience. This is subject to the application’s power source, operating conditions, the industry where the end product is used and other factors that dictate design requirements such as the gap between copper planes, traces and component pins on the printed circuit board, as well as the type of connector that may be used. To maximize the allowable working voltage, the LTM8047 has a row of solder balls removed to facilitate the printed circuit board design. The ball to ball pitch is 1.27mm, and the typical ball diameter is 0.78mm. Accounting for the missing row and the ball diameter, the printed circuit board may be designed for a metal-to-metal separation of up to 1.76mm. This may have to be reduced somewhat to allow for tolerances in solder mask or other printed circuit board design rules. To reiterate, the manufacturer’s isolation voltage rating and the required operational voltage are often different numbers. In the case of the LTM8047, the isolation voltage rating is established by 100% hi-pot testing. The working or operational voltage is a function of the end product and its system level specifications. The actual required operational voltage is often smaller than the manufacturer’s isolation rating. For those situations where information about the spacing of LTM8047 internal circuitry is required, the minimum metal to metal separation of the primary and secondary is 0.44mm. ADJ and Line Regulation For VOUT greater than 8V, a capacitor connected from ADJ to GND improves line regulation. Figure 1 shows the effect of three capacitance values applied to ADJ for a load of 15mA. No capacitance has poor line regulation, while 12pF has improved line regulation. As the capacitance increases, the line regulation begins to degrade again, but in the opposite direction as having too little capacitance. Furthermore, too much capacitance from ADJ to GND may increase the minimum load required for proper regulation. 8047fc 10 For more information www.linear.com/LTM8047 LTM8047 APPLICATIONS INFORMATION LTM8047 Line Regulation 12VOUT, 15mA Output Current 12.50 ADJ VOUT LTM8047 NO CAP 12pF 18pF 12.25 SS VOUT (V) 12.00 COUT 11.75 BIAS GND 11.50 VOUT– 11.25 RUN 11.00 10.75 0 5 10 15 VIN (V) 20 25 8047 F01 Figure 1. For higher output voltages, the LTM8047 requires some capacitance from ADJ to GND for proper line regulation CIN VIN THERMAL/INTERCONNECT VIAS VOUT to VOUT– Reverse Voltage 8047 F02 The LTM8047 cannot tolerate a reverse voltage from VOUT to VOUT– during operation. If VOUT– raises above VOUT during operation, the LTM8047 may be damaged. To protect against this condition, a low forward drop power Schottky diode has been integrated into the LTM8047, anti-parallel to VOUT/VOUT–. This can protect the output against many reverse voltage faults. Reverse voltage faults can be both steady state and transient. An example of a steady state voltage reversal is accidentally misconnecting a powered LTM8047 to a negative voltage source. An example of transient voltage reversals is a momentary connection to a negative voltage. It is also possible to achieve a VOUT reversal if the load is short-circuited through a long cable. The inductance of the long cable forms an LC tank circuit with the VOUT capacitance, which drives VOUT negative. Avoid these conditions. Figure 2. Layout Showing Suggested External Components, Planes and Thermal Vias A few rules to keep in mind are: 1. Place the RADJ resistor as close as possible to its respective pin. 2. Place the CIN capacitor as close as possible to the VIN and GND connections of the LTM8047. 3. Place the COUT capacitor as close as possible to VOUT and VOUT–. 4. Place the CIN and COUT capacitors such that their ground current flow directly adjacent or underneath the LTM8047. PCB Layout 5. Connect all of the GND connections to as large a copper pour or plane area as possible on the top layer. Avoid breaking the ground connection between the external components and the LTM8047. Most of the headaches associated with PCB layout have been alleviated or even eliminated by the high level of integration of the LTM8047. The LTM8047 is nevertheless a switching power supply, and care must be taken to minimize electrical noise to ensure proper operation. Even with the high level of integration, you may fail to achieve specified operation with a haphazard or poor layout. See Figure 2 for a suggested layout. Ensure that the grounding and heat sinking are acceptable. 6. Use vias to connect the GND copper area to the board’s internal ground planes. Liberally distribute these GND vias to provide both a good ground connection and thermal path to the internal planes of the printed circuit board. Pay attention to the location and density of the thermal vias in Figure 2. The LTM8047 can benefit from the heat sinking afforded by vias that connect to internal GND planes at these locations, due to their proximity to internal power handling components. The optimum 8047fc For more information www.linear.com/LTM8047 11 LTM8047 APPLICATIONS INFORMATION number of thermal vias depends upon the printed circuit board design. For example, a board might use very small via holes. It should employ more thermal vias than a board that uses larger holes. The printed circuit board construction has an impact on the isolation performance of the end product. For example, increased trace and layer spacing, as well as the choice of core and prepreg materials (such as using polyimide versus FR4) can significantly affect the isolation withstand of the end product. Hot-Plugging Safely The small size, robustness and low impedance of ceramic capacitors make them an attractive option for the input bypass capacitor of the LTM8047. However, these capacitors can cause problems if the LTM8047 is plugged into a live supply (see Linear Technology Application Note 88 for a complete discussion). The low loss ceramic capacitor combined with stray inductance in series with the power source forms an underdamped tank circuit, and the voltage at the VIN pin of the LTM8047 can ring to more than twice the nominal input voltage, possibly exceeding the LTM8047’s rating and damaging the part. If the input supply is poorly controlled or the user will be plugging the LTM8047 into an energized supply, the input network should be designed to prevent this overshoot. This can be accomplished by installing a small resistor in series to VIN, but the most popular method of controlling input voltage overshoot is adding an electrolytic bulk capacitor to VIN. This capacitor’s relatively high equivalent series resistance damps the circuit and eliminates the voltage overshoot. The extra capacitor improves low frequency ripple filtering and can slightly improve the efficiency of the circuit, though it can be a large component in the circuit. Thermal Considerations The LTM8047 output current may need to be derated if it is required to operate in a high ambient temperature. The amount of current derating is dependent upon the input voltage, output power and ambient temperature. The temperature rise curves given in the Typical Performance Characteristics section can be used as a guide. These curves were generated by the LTM8047 mounted to a 58cm2 4-layer FR4 printed circuit board. Boards of other sizes and layer count can exhibit different thermal behavior, so it is incumbent upon the user to verify proper operation over the intended system’s line, load and environmental operating conditions. For increased accuracy and fidelity to the actual application, many designers use FEA to predict thermal performance. To that end, the Pin Configuration section of the data sheet typically gives four thermal coefficients: θJA: Thermal resistance from junction to ambient θJCbottom: Thermal resistance from junction to the bottom of the product case θJCtop: Thermal resistance from junction to top of the product case θJB: Thermal resistance from junction to the printed circuit board. While the meaning of each of these coefficients may seem to be intuitive, JEDEC has defined each to avoid confusion and inconsistency. These definitions are given in JESD 51-12, and are quoted or paraphrased as follows: θJA is the natural convection junction-to-ambient air thermal resistance measured in a one cubic foot sealed enclosure. This environment is sometimes referred to as still air although natural convection causes the air to move. This value is determined with the part mounted to a JESD 51-9 defined test board, which does not reflect an actual application or viable operating condition. θJCbottom is the junction-to-board thermal resistance with all of the component power dissipation flowing through the bottom of the package. In the typical µModule converter, the bulk of the heat flows out the bottom of the package, but there is always heat flow out into the ambient envi- 8047fc 12 For more information www.linear.com/LTM8047 LTM8047 APPLICATIONS INFORMATION ronment. As a result, this thermal resistance value may be useful for comparing packages but the test conditions don’t generally match the user’s application. θJCtop is determined with nearly all of the component power dissipation flowing through the top of the package. As the electrical connections of the typical µModule converter are on the bottom of the package, it is rare for an application to operate such that most of the heat flows from the junction to the top of the part. As in the case of θJCbottom, this value may be useful for comparing packages but the test conditions don’t generally match the user’s application. θJB is the junction-to-board thermal resistance where almost all of the heat flows through the bottom of the µModule converter and into the board, and is really the sum of the θJCbottom and the thermal resistance of the bottom of the part through the solder joints and through a portion of the board. The board temperature is measured a specified distance from the package, using a two-sided, two-layer board. This board is described in JESD 51-9. Given these definitions, it should now be apparent that none of these thermal coefficients reflects an actual physical operating condition of a µModule converter. Thus, none of them can be individually used to accurately predict the thermal performance of the product. Likewise, it would be inappropriate to attempt to use any one coefficient to correlate to the junction temperature vs load graphs given in the product’s data sheet. The only appropriate way to use the coefficients is when running a detailed thermal analysis, such as FEA, which considers all of the thermal resistances simultaneously. A graphical representation of these thermal resistances is given in Figure 3. The blue resistances are contained within the µModule converter, and the green are outside. The die temperature of the LTM8047 must be lower than the maximum rating of 125°C, so care should be taken in the layout of the circuit to ensure good heat sinking of the LTM8047. The bulk of the heat flow out of the LTM8047 is through the bottom of the module and the BGA pads into the printed circuit board. Consequently a poor printed circuit board design can cause excessive heating, resulting in impaired performance or reliability. Please refer to the PCB Layout section for printed circuit board design suggestions. JUNCTION-TO-AMBIENT RESISTANCE (JESD 51-9 DEFINED BOARD) JUNCTION-TO-CASE (TOP) RESISTANCE JUNCTION CASE (TOP)-TO-AMBIENT RESISTANCE JUNCTION-TO-BOARD RESISTANCE CASE (BOTTOM)-TO-BOARD JUNCTION-TO-CASE (BOTTOM) RESISTANCE RESISTANCE AMBIENT BOARD-TO-AMBIENT RESISTANCE 8047 F03 µMODULE DEVICE Figure 3. 8047fc For more information www.linear.com/LTM8047 13 LTM8047 TYPICAL APPLICATIONS Maximum Load vs VIN 3.3V Isolated Flyback Converter LTM8047 VIN BIAS 10k ADJ SS ISOLATION BARRIER RUN 2.2µF 340 VOUT 3.3V 280mA (10VIN) VOUT MAXIMUM VOUT LOAD (mA) VIN 9V TO 15V 4.7µF 350 47µF VOUT– GND 725VDC ISOLATION 330 320 310 300 290 280 270 260 8047 TA02 250 9 10 11 12 VIN (V) 13 14 15 8047 TA02b Use Two LTM8047 Flyback Converters to Generate ±5V LTM8047 VIN BIAS 4.7µF 6.98k ADJ SS 1µF ISOLATION BARRIER RUN 5V 280mA (15VIN) VOUT Maximum Load Current vs VIN 22µF 400 – GND VOUT 725VDC ISOLATION 22µF LTM8047 VIN RUN BIAS 4.7µF 6.98k ADJ SS 1µF GND ISOLATION BARRIER 2.2µF VOUT MAXIMUM VOUT LOAD (mA) VIN 3.5V TO 31V 2.2µF 350 300 250 200 150 100 22µF VOUT– 725VDC ISOLATION 8047 TA03 5 10 20 15 VIN (V) 25 30 8047 TA03b –5V 280mA (15VIN) 8047fc 14 For more information www.linear.com/LTM8047 LTM8047 PACKAGE DESCRIPTION Pin Assignment Table (Arranged by Pin Number) PIN NAME A1 VOUT– A2 VOUT– A3 VOUT– A4 VOUT– A5 VOUT– A6 VOUT A7 VOUT PIN NAME B1 VOUT– B2 VOUT– B3 VOUT– B4 VOUT– B5 VOUT– B6 VOUT B7 VOUT PIN NAME C1 VOUT– C2 VOUT– C3 VOUT– C4 VOUT– C5 VOUT– C6 VOUT C7 VOUT PIN NAME D1 D2 D3 D4 D5 D6 D7 - PIN NAME E1 GND E2 GND E3 GND E4 GND E5 GND E6 GND E7 GND PIN NAME F1 F2 F3 RUN F4 GND F5 GND F6 GND F7 GND PIN NAME G1 VIN G2 VIN G3 G4 GND G5 GND G6 GND G7 ADJ PIN NAME H1 VIN H2 VIN H3 H4 GND H5 BIAS H6 SS H7 GND PACKAGE PHOTO 8047fc For more information www.linear.com/LTM8047 15 4 For more information www.linear.com/LTM8047 E SUGGESTED PCB LAYOUT TOP VIEW 2.540 PACKAGE TOP VIEW 1.270 PIN “A1” CORNER 0.3175 0.000 0.3175 aaa Z 1.270 Y 4.445 3.175 1.905 0.635 0.000 0.635 1.905 3.175 4.445 D X 4.7625 4.1275 aaa Z 3.95 – 4.05 SYMBOL A A1 A2 b b1 D E e F G aaa bbb ccc ddd eee NOM 4.92 0.60 4.32 0.78 0.63 11.25 9.0 1.27 8.89 7.62 DIMENSIONS 0.15 0.10 0.20 0.30 0.15 MAX 5.12 0.70 4.42 0.85 0.66 NOTES DETAIL B PACKAGE SIDE VIEW TOTAL NUMBER OF BALLS: 45 MIN 4.72 0.50 4.22 0.71 0.60 DETAIL A b1 0.27 – 0.37 SUBSTRATE ddd M Z X Y eee M Z DETAIL B MOLD CAP ccc Z A1 A2 A Z (Reference LTC DWG # 05-08-1869 Rev A) Øb (45 PLACES) // bbb Z 16 2.540 b 3 F e SEE NOTES 7 5 4 3 2 1 DETAIL A PACKAGE BOTTOM VIEW 6 G H G F E D C B A PIN 1 DETAILS OF PIN #1 IDENTIFIER ARE OPTIONAL, BUT MUST BE LOCATED WITHIN THE ZONE INDICATED. THE PIN #1 IDENTIFIER MAY BE EITHER A MOLD OR MARKED FEATURE 4 7 TRAY PIN 1 BEVEL ! BGA 45 1212 REV A PACKAGE IN TRAY LOADING ORIENTATION LTMXXXXXX µModule PACKAGE ROW AND COLUMN LABELING MAY VARY AMONG µModule PRODUCTS. REVIEW EACH PACKAGE LAYOUT CAREFULLY 6. SOLDER BALL COMPOSITION IS 96.5% Sn/3.0% Ag/0.5% Cu 5. PRIMARY DATUM -Z- IS SEATING PLANE BALL DESIGNATION PER JESD MS-028 AND JEP95 3 2. ALL DIMENSIONS ARE IN MILLIMETERS 7 SEE NOTES NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M-1994 COMPONENT PIN “A1” BGA Package BGA Package 45-Lead (11.25mm × 9.00mm × 4.92mm) 45-Lead (11.25mm × 4.92mm) (Reference LTC DWG× #9.00mm 05-08-1869 Rev A) LTM8047 PACKAGE DESCRIPTION Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. 8047fc 3.810 3.810 LTM8047 REVISION HISTORY REV DATE DESCRIPTION A 1/14 Correct ADJ resistor on Typical Application schematic. PAGE NUMBER 1 Add Min/Max limits to Output Voltage parameter. 2 Correct the 5VOUT RADJ value in Table 1. 9 Correct the 5VOUT RADJ value in schematic. 14 1, 2 B 1/14 Added SnPb terminal finish product option. C 7/15 Added a new section: ADJ and Line Regulation. 10, 11 8047fc Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. For more information www.linear.com/LTM8047 17 LTM8047 TYPICAL APPLICATION 12V Isolated Flyback Converter 2.2µF RUN BIAS 4.7µF 3.16k ADJ SS VOUT 12V 180mA (15VIN) VOUT 10µF VOUT– GND 725VDC ISOLATION 8047 TA04 240 MAXIMUM VOUT LOAD (mA) LTM8047 VIN ISOLATION BARRIER VIN 15VDC TO 24VDC Maximum Load vs VIN 250 230 220 210 200 190 180 170 160 150 15 18 21 VIN (V) 24 8047 TA04b RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LTM8031 Ultralow Noise EMC 1A µModule Regulator EN55022 Class B Compliant, 3.6V ≤ VIN ≤ 36V; 0.8V ≤ VOUT ≤ 10V LTM8032 Ultralow Noise EMC 2A µModule Regulator EN55022 Class B Compliant, 3.6V ≤ VIN ≤ 36V; 0.8V ≤ VOUT ≤ 10V LTM8033 Ultralow Noise EMC 3A µModule Regulator EN55022 Class B Compliant, 3.6V ≤ VIN ≤ 36V; 0.8V ≤ VOUT ≤ 24V LTM4612 Ultralow Noise EMC 5A µModule Regulator EN55022 Class B Compliant, 5V ≤ VIN ≤ 36V; 3.3V ≤ VOUT ≤ 15V LTM8061 Li-Ion/Polymer µModule Battery Charger 4.95V ≤ VIN ≤ 32V, 2A, 1-Cell and 2-Cell, 4.1V or 4.2V per Cell LTM8048 Isolated DC/DC µModule Regulator with LDO Post Regulator Low Noise LDO Post Regulator, Similar to the LTM8047 8047fc 18 Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, CA 95035-7417 For more information www.linear.com/LTM8047 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com/LTM8047 LT 0715 REV C • PRINTED IN USA  LINEAR TECHNOLOGY CORPORATION 2011